Preparation method of semiconductor device

Abstract

The invention provides a preparation method of a semiconductor device, and the method comprises the steps: firstly, applying bias voltage to a substrate through an ionized metal physical vapor deposition technology, and forming a metal buffer layer on the inner wall of a deep groove, thereby improving the step coverage and the adhesiveness of a barrier layer and the interface of the inner wall of the deep groove, and avoiding the stripping of a first barrier layer; nitrogen plasma is adopted to carry out nitriding treatment on the surface of the metal buffer layer to form the first barrier layer, so that over-hang (suspension) can be reduced, and the situation that holes occur when a metal material layer is deposited in the deep trench subsequently is avoided; applying bias voltage to the substrate by adopting an ionized metal physical vapor deposition process to form a second barrier layer; and finally, the coverage rate of side wall metal ions is increased through a reverse sputtering process, the preparation method provided by the invention improves a process window for filling a subsequent metal material layer, and then the reliability of a rear-section metal interconnection structure process is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for preparing a semiconductor device. Background Art

[0002] In the back-end process of traditional metal interconnection structures, stacked TaN and Ta are often used as diffusion barriers on the sidewalls of deep vias (deep trenches). From the perspective of process integration, TaN films are not easily ionized and difficult to deposit in a biased manner, resulting in poor step coverage of TaN, which is prone to overhang at the top corners of the vias, which in turn leads to holes (voids) in the copper metal when metal materials such as copper are subsequently electroplated in the vias. In addition, TaN films have poor adhesion and are easily peeled off from the sidewalls of deep vias. Therefore, traditional diffusion barriers have a significant impact on the reliability of traditional metal interconnection structures in the back-end. Summary of the invention

[0003] The present application provides a method for preparing a semiconductor device, which can solve at least one of the following problems in the back-end process of a traditional metal interconnect structure: poor adhesion of the diffusion barrier layer, which is easy to peel off; poor step coverage of the diffusion barrier layer, which is easy to form over-hangs at the top corners of the through-hole, thereby causing void defects in the filled metal.

[0004] The present invention provides a method for manufacturing a semiconductor device, comprising:

[0005] Providing a substrate, wherein a dielectric layer is formed on the substrate, and a deep trench is formed in the dielectric layer;

[0006] Using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate, a metal buffer layer is formed on the dielectric layer and on the sidewalls and bottom walls of the deep trench;

[0007] Performing nitridation treatment on the surface of the metal buffer layer by using nitrogen plasma to form a first barrier layer on the surface of the metal buffer layer;

[0008] Using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate to form a second barrier layer on the first barrier layer; and

[0009] The second barrier layer and the first barrier layer on the bottom wall of the deep trench are removed by a reverse sputtering process.

[0010] Optionally, in the method for preparing the semiconductor device, an ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate. In the process of forming a metal buffer layer on the dielectric layer and on the sidewalls and bottom walls of the deep trench, the bias voltage applied to the substrate is 100V to 500V, and the metal ion density output by the sputtering source is 10 11 / cm 3 ~10 12 / cm 3 , the process chamber pressure is 10 -8 Torr~10 -7 Torr, process temperature is 20℃~1000℃.

[0011] Optionally, in the method for preparing the semiconductor device, the thickness of the metal buffer layer is

[0013] Optionally, in the method for preparing the semiconductor device, the surface of the metal buffer layer is nitrided by nitrogen plasma to form a first barrier layer on the surface of the metal buffer layer. The gases involved in the nitridation treatment include at least nitrogen and hydrogen. The process chamber pressure is 100Pa to 800Pa, the process temperature is 400°C to 700°C, the voltage range is 400V to 700V, and the current density is 0.5mA / cm 2 ~3mA / cm 2 .

[0014] Optionally, in the method for preparing the semiconductor device, after the surface of the metal buffer layer is nitrided, the thickness of the first barrier layer is

[0015] Optionally, in the method for preparing the semiconductor device, an ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate. In the process of forming the second barrier layer on the first barrier layer, the bias voltage applied to the substrate is 100V to 500V, and the metal ion density output by the sputtering source is 10 11 / cm 3 ~10 12 / cm 3 , the process chamber pressure is 10 -8 Torr~10 -7 Torr, process temperature is 20℃~400℃.

[0016] Optionally, in the method for preparing the semiconductor device, the thickness of the second barrier layer is

[0018] Optionally, in the method for preparing the semiconductor device, process parameters of the reverse sputtering process include: the etching gas is argon plasma, and the substrate bias is 400V to 1000V.

[0019] Optionally, in the method for preparing the semiconductor device, in the process of removing the second barrier layer and the first barrier layer on the bottom wall of the deep trench by using a reverse sputtering process, metal ions in the second barrier layer are sputtered onto the first barrier layer on the side wall of the deep trench.

[0020] Optionally, in the method for preparing the semiconductor device, after removing the second barrier layer and the first barrier layer on the bottom wall of the deep trench by adopting a reverse sputtering process, the method for preparing the semiconductor device further includes: filling a metal material layer in the deep trench.

[0021] The technical solution of this application has at least the following advantages:

[0022] The present application first forms a metal buffer layer on the inner wall of the deep trench through an ionized metal physical vapor deposition process and applies a bias to the substrate, which can improve the step coverage and the adhesion of the interface between the barrier layer and the inner wall of the deep trench, and avoid the peeling of the first barrier layer; then, nitrogen plasma is used to nitride the surface of the metal buffer layer to form a first barrier layer, which can reduce the generation of over-hang, thereby avoiding the subsequent occurrence of voids in the metal material layer deposited in the deep trench; then, an ionized metal physical vapor deposition process is used and a bias is applied to the substrate to form a second barrier layer; finally, the coverage of the side wall metal ions is increased through a reverse sputtering process. The preparation method provided in the present application improves the process window for subsequent metal material layer filling, thereby improving the reliability of the back-end metal interconnect structure process. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 is a flow chart of a method for preparing a semiconductor device according to an embodiment of the present invention;

[0025] Figure 2 is a schematic diagram of a semiconductor structure after deep trenches are formed according to an embodiment of the present invention;

[0026] Figure 3 is a schematic diagram of a semiconductor structure after a metal buffer layer is formed according to an embodiment of the present invention;

[0027] Figure 4 is a schematic diagram of a semiconductor structure after forming a first barrier layer according to an embodiment of the present invention;

[0028] Figure 5 is a schematic diagram of a semiconductor structure after forming a second barrier layer according to an embodiment of the present invention;

[0029] Figure 6 is a schematic diagram of a semiconductor structure after the second barrier layer and the first barrier layer on the bottom wall of the deep trench are removed according to an embodiment of the present invention;

[0030] The reference numerals are described as follows:

[0031] 10 - substrate, 20 - dielectric layer, 30 - deep trench, 40 - metal buffer layer, 50 - first barrier layer, 60 - second barrier layer. DETAILED DESCRIPTION

[0032] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0034] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0035] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0036] The present application provides a method for preparing a semiconductor device, referring to Figure 1 , Figure 1 1 is a flow chart of a method for preparing a semiconductor device according to an embodiment of the present invention, wherein the method for preparing a semiconductor device comprises:

[0037] Step S1: providing a substrate, on which a dielectric layer is formed, and in which a deep trench is formed;

[0038] Step S2: using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate to form a metal buffer layer on the dielectric layer and on the sidewalls and bottom walls of the deep trench;

[0039] Step S3: performing nitridation treatment on the surface of the metal buffer layer by using nitrogen plasma to form a first barrier layer on the surface of the metal buffer layer;

[0040] Step S4: using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate to form a second barrier layer on the first barrier layer;

[0041] Step S5: removing the second barrier layer and the first barrier layer on the bottom wall of the deep trench by using a reverse sputtering process.

[0042] Specifically, refer to Figure 2-Figure 6 , a method for preparing the semiconductor device provided in this application is introduced in detail.

[0043] First, refer to Figure 2 , a substrate 10 is provided, a dielectric layer 20 is formed on the substrate 10, and a deep trench 30 is formed in the dielectric layer 20.

[0044] In this embodiment, the aspect ratio of the deep trench is 16:5.

[0045] It is worth noting that a multilayer film layer (not shown) of a conventional device can also be formed between the substrate 10 and the dielectric layer 20. The present application does not impose any limitation on the specific film layer structure between the substrate 10 and the dielectric layer 20. It is only necessary to ensure that the multilayer film layer between the substrate 10 and the dielectric layer 20 includes at least a metal interconnection layer, and the metal interconnection layer and the metal material layer in the deep trench of the subsequent back-end process are interconnected and together constitute a metal interconnection structure.

[0046] Then, refer to Figure 3 , an ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate 10 to form a metal buffer layer 40 on the dielectric layer 20 and on the sidewalls and bottom walls of the deep trench 30 .

[0047] Preferably, an ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate 10. In the process of forming the metal buffer layer 40 on the dielectric layer 20 and the sidewalls and bottom walls of the deep trench 30, the bias voltage applied to the substrate 10 is 100V to 500V, and the metal ion density output by the sputtering source is 10 11 / cm 3 ~10 12 / cm 3 , the process chamber pressure is 10 -8 Torr~10 -7 Torr, process temperature is 20℃~1000℃.

[0048] Preferably, the thickness of the metal buffer layer 40 is

[0049] In this embodiment, the metal buffer layer 40 is made of metal tantalum.

[0050] The metal buffer layer formed by the ionized metal physical vapor deposition process and applying bias to the substrate in the present application has good step coverage and adhesion, avoiding the peeling of itself (the metal buffer layer) and the peeling of the first barrier layer subsequently deposited on the metal buffer layer. At the same time, because the metal buffer layer has excellent step coverage, the generation of over-hang can be reduced, thereby avoiding the occurrence of voids in the subsequent metal material layer deposited in the deep groove.

[0051] Next, refer to Figure 4 , a nitrogen plasma is used to perform nitridation treatment on the surface of the metal buffer layer 40 to form a first barrier layer 50 on the surface of the metal buffer layer 40 .

[0052] Preferably, the surface of the metal buffer layer 40 is nitrided by nitrogen plasma to form the first barrier layer 50 on the surface of the metal buffer layer 40. The gases involved in the nitridation treatment include at least nitrogen and hydrogen. The process chamber pressure is 100Pa to 800Pa, the process temperature is 400°C to 700°C, the voltage range is 400V to 700V, and the current density is 0.5mA / cm 2 ~3mA / cm 2 .

[0053] Among them, the principle of the nitridation treatment is specifically: placing the substrate after forming the metal buffer layer 40 in a vacuum chamber, and then introducing nitrogen plasma gas, using high frequency or direct current electric field to accelerate the nitrogen ions in the gas and bombard the surface of the metal buffer layer 40. When these plasmas bombard the surface of the metal buffer layer 40, energy transfer and collision will occur, causing the lattice structure of the surface of the metal buffer layer 40 to change, thereby forming a first barrier layer 50 on the surface of the metal buffer layer 40.

[0054] Preferably, after the surface of the metal buffer layer 40 is nitrided, the thickness of the first barrier layer 50 is

[0055] In this embodiment, the material of the first barrier layer 50 is Tantalum nitride.

[0056] The present application uses nitrogen plasma to nitride the surface of the metal buffer layer to form a first barrier layer, which improves the film layer coverage at the top corners of the deep groove, that is, improves the step coverage, and can further reduce the generation of over-hang, thereby further avoiding the occurrence of voids in the subsequent deposition of the metal material layer in the deep groove.

[0057] For further reference, Figure 5 , an ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate 10 to form a second barrier layer 60 on the first barrier layer 50 .

[0058] Preferably, an ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate 10. In the process of forming the second barrier layer 60 on the first barrier layer 50, the bias voltage applied to the substrate 10 is 100V to 500V, and the metal ion density output by the sputtering source is 10 11 / cm 3 ~10 12 / cm 3 , the process chamber pressure is 10 -8 Torr~10 -7 Torr, process temperature is 20℃~400℃.

[0059] Preferably, the thickness of the second barrier layer 60 is

[0060] In this embodiment, the second barrier layer 60 is made of metal tantalum.

[0061] Finally, reference Figure 6 The second barrier layer 60 and the first barrier layer 50 on the bottom wall of the deep trench 30 are removed by reverse sputtering process.

[0062] Preferably, the process parameters of the reverse sputtering process include: the etching gas is argon plasma, and the substrate bias voltage is 400V to 1000V.

[0063] In this embodiment, in the process of removing the second barrier layer 60 and the first barrier layer 50 on the bottom wall of the deep trench by the reverse sputtering process, the metal ions in the second barrier layer 60 are sputtered onto the first barrier layer 50 on the side wall of the deep trench 30. The principle of the reverse sputtering process is as follows: by biasing the argon ions and changing their direction, the argon ions are bombarded onto the substrate (silicon wafer) after the second barrier layer is formed, so as to cause the metal ions (mainly tantalum metal ions in this embodiment) in the second barrier layer 60 and the first barrier layer 50 at the bottom of the deep trench 30 to reversely sputter onto the side wall of the deep trench 30, thereby increasing the side wall coverage of the metal ions, that is, the second barrier layer 60 and the first barrier layer 50 on the bottom wall of the deep trench are bombarded and removed, and the metal ions in the second barrier layer 60 and the first barrier layer 50 on the bottom wall of the deep trench are transferred to the side wall of the deep trench 30.

[0064] The present application improves the coverage of metal ions on the sidewalls of deep trenches through a reverse sputtering process.

[0065] In this embodiment, the metal buffer layer 40 , the first barrier layer 50 and the second barrier layer 60 together constitute a diffusion barrier layer of the back-end metal interconnect structure.

[0066] The preparation method provided in the present application improves the process window for subsequent metal material layer filling, thereby improving the reliability of the back-end metal interconnection structure process.

[0067] Furthermore, after removing the second barrier layer 60 and the first barrier layer 50 on the bottom wall of the deep trench 30 by the reverse sputtering process, the method for preparing the semiconductor device further includes: filling a metal material layer (not shown) in the deep trench 30. The material of the metal material layer can be copper.

[0068] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.

Claims

1. A method for preparing a semiconductor device, characterized in that: include: Providing a substrate, wherein a dielectric layer is formed on the substrate, and a deep trench is formed in the dielectric layer; Using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate, a metal buffer layer is formed on the dielectric layer and on the sidewalls and bottom walls of the deep trench; Performing nitridation treatment on the surface of the metal buffer layer by using nitrogen plasma to form a first barrier layer on the surface of the metal buffer layer; Using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate to form a second barrier layer on the first barrier layer; as well as The second barrier layer and the first barrier layer on the bottom wall of the deep trench are removed by a reverse sputtering process.

2. The method for preparing a semiconductor device according to claim 1, wherein: In the process of forming a metal buffer layer on the dielectric layer and on the sidewalls and bottom walls of the deep trench by using an ionized metal physical vapor deposition process and applying a certain bias voltage to the substrate, the bias voltage applied to the substrate is 100V to 500V, and the metal ion density output by the sputtering source is 10 11 / cm 3 ~10 12 / cm 3 , the process chamber pressure is 10 -8 Torr~10 -7 Torr, process temperature is 20℃~1000℃.

3. The method for preparing a semiconductor device according to claim 1, characterized in that: The thickness of the metal buffer layer is 4. The method for preparing a semiconductor device according to claim 1, wherein: The surface of the metal buffer layer is nitrided by nitrogen plasma to form a first barrier layer on the surface of the metal buffer layer. The gases involved in the nitridation treatment include at least nitrogen and hydrogen. The process chamber pressure is 100Pa to 800Pa, the process temperature is 400°C to 700°C, the voltage range is 400V to 700V, and the current density is 0.5mA / cm 2 ~3mA / cm 2 .

5. The method for preparing a semiconductor device according to claim 1 or 4, characterized in that: After the surface of the metal buffer layer is nitrided, the thickness of the first barrier layer is 6. The method for preparing a semiconductor device according to claim 1, wherein: The ionized metal physical vapor deposition process is used and a certain bias voltage is applied to the substrate. In the process of forming the second barrier layer on the first barrier layer, the bias voltage applied to the substrate is 100V to 500V, and the metal ion density output by the sputtering source is 10 11 / cm 3 ~10 12 / cm 3 , the process chamber pressure is 10 -8 Torr~10 -7 Torr, process temperature is 20℃~400℃.

7. The method for preparing a semiconductor device according to claim 1, characterized in that: The thickness of the second barrier layer is 8. The method for preparing a semiconductor device according to claim 1, characterized in that: The process parameters of the reverse sputtering process include: the etching gas is argon plasma, and the substrate bias voltage is 400V to 1000V.

9. The method for preparing a semiconductor device according to claim 1, wherein: In the process of removing the second barrier layer and the first barrier layer on the bottom wall of the deep trench by adopting the reverse sputtering process, the metal ions in the second barrier layer are sputtered onto the first barrier layer on the side wall of the deep trench.

10. The method for preparing a semiconductor device according to claim 1, characterized in that: After removing the second barrier layer and the first barrier layer on the bottom wall of the deep trench by using a reverse sputtering process, the method for preparing the semiconductor device further includes: filling a metal material layer in the deep trench.

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