Time-delay configurable multi-pulse generation device

Abstract

The invention provides a time-delay configurable multi-pulse generation device which can output a plurality of paths of pulse signals at the same time, the delay time of the pulse signals can be reconfigured online, and the pulse signals of different paths have coherence. The coherence means that the phase relation of the pulse signal of the specific delay of each channel is kept unchanged when the pulse signal is transmitted to the output port. The circuit has the characteristics of multi-path output, online reconfiguration of delay time, short response time of output signals and strong driving capability, so as to meet the use requirements of radar system equipment.

Description

Technical Field

[0001] The invention belongs to the field of radar technology, and in particular relates to a time-delay configurable multi-pulse generating device. Background Art

[0002] In the radar system, multiple subsystems require pulse signals as trigger sources. With the rapid development of electronic technology and radar technology, the application field of radar is constantly expanding, the technical requirements for high-end radar are constantly increasing, the technical indicators are constantly being refined, and the requirements for pulse width, frequency, rise time, delay and other indicators of pulse signals are becoming increasingly stringent.

[0003] At present, common pulse delay technologies include: RC delay circuit, timer delay circuit, op amp delay circuit, etc. The RC delay circuit uses the charging and discharging time of the capacitor in the series circuit of resistor and capacitor to generate delay. The advantages of this circuit are that it uses fewer components, low cost and small size. However, due to the existence of capacitor filtering effect, the output waveform is often distorted, and the inherent error and temperature characteristics of the resistor and capacitor values ​​also cause the delay time to be not completely controllable, and the delay accuracy is low. It is not suitable for occasions with high requirements for accuracy and reliability. The timer delay circuit is usually composed of a clock source, a prescaler, a counter, control and output logic, etc. The time base oscillator in the clock source oscillates and outputs a clock signal. After the frequency is divided, the required clock frequency is obtained, and then the delay amount is controlled by the counter, and the control and output logic output the delayed signal. The disadvantages of this circuit are obvious. The time base oscillator inside the timer is composed of a passive quartz crystal oscillator, which has poor frequency stability and a low upper frequency limit. The principle of the op amp delay circuit is similar to that of the RC delay circuit. The difference is that the op amp introduces a negative feedback mechanism, which makes the delay time more adjustable. However, the basic principle is still based on capacitor charging and discharging, so the delay accuracy is also poor, and the initial state of the op amp output after power-on is uncertain.

[0004] In general, the above-mentioned delay circuits have problems such as low delay accuracy and poor adjustability of delay time, and cannot meet the needs of high-precision delay in radar systems. Summary of the invention

[0005] In order to overcome the deficiencies in the prior art, the present invention proposes a delay-configurable multi-pulse generating device, which has the characteristics of multi-channel output, online reconfigurable delay time, fast output signal response time, and strong driving capability to meet the use requirements of radar system equipment.

[0006] A time-delay configurable multi-pulse generating device of the present invention comprises:

[0007] The instruction receiving module receives the pulse generation instruction generated by the upper system and parses out the number of pulse signals, frequency, pulse width and delay time required by the upper system.

[0008] The pulse generation module generates a pulse signal with a specified number of paths, a specified frequency, and a specified pulse width. The field programmable gate array (FPGA) is used as the signal source for generating the pulse signal. FPGA has the advantages of parallel operation, reprogrammable, and rich logic resources.

[0009] The pulse delay module performs a specific delay on the pulse signal generated by the pulse generation module. By configuring the data selection input D9 to D0 of the pulse delay module, a programmable step delay output can be obtained, and the minimum time unit of the step is 10ps, thereby achieving high-precision delay.

[0010] The pulse output module outputs the delayed pulse signal after appropriate power amplification. In order to improve the performance of the output pulse signal, including but not limited to obtaining steeper rising / falling edges, smaller overshoot, and stronger driving capability, it is necessary to process the pulse signal output through a high-performance power amplifier circuit.

[0011] Setting the preload delay time table specifies the initial delay offset of each channel. In order to obtain high-precision coherent multi-channel delay output, each pulse output must be compensated for the initial delay time so that the phases of different pulse signals are coherent. In actual circuits, the delay time of each pulse signal output is affected by various factors such as device performance and PCB layout and wiring, and is not the same. Therefore, it is necessary and effective to preload the delay time compensation amount by obtaining calibration data through preliminary experiments.

[0012] High-performance external clock module, connected to the external clock source signal. By connecting to the specified external clock source, the time base of the pulse delay circuit is limited to be strictly synchronized with other systems in the radar system that use this external clock source. By adopting this external clock source technology, the coherence between the pulse delay circuit and other systems is guaranteed, and the synchronization and scalability between multiple devices can be achieved.

[0013] The purpose of the fiber optic communication and command parsing module is to receive control information transmitted from the upper system. Therefore, the communication form that can be adopted is not limited to optical fiber. Serial ports, network cables and other physical structures that can be used for data transmission meet this feature.

[0014] The frequency, pulse width and other characteristics of the initial pulse signal can be configured in real time instead of remaining unchanged all the time.

[0015] The original pulse signal is delayed and the delay time can be reconfigured online.

[0016] After loading the delay compensation amount, the delay index of the output pulse of each channel is deterministic.

[0017] The beneficial effects of the present invention are

[0018] 1. The output pulse delay time has high delay accuracy. It can realize step-by-step delay time increase or decrease, and the minimum step length can reach 10ps.

[0019] 2. The output pulse characteristics can be reconfigured online. By receiving the control instructions from the upper system in real time, the various indicators of the output delay pulse can be reconfigured to meet the needs of real-time changes in complex system requirements.

[0020] 3. Output pulse coherence: By adopting technologies such as pre-loaded delay time table and high-performance external clock module, the output delay pulse can be highly coherent.

[0021] 4. The output pulse rise / fall edge is steep. The output pulse rise time / fall time is less than 1ns, making the pulse waveform close to the ideal pulse signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a system application block diagram of the device of the present invention.

[0023] Figure 2 This is a schematic diagram of the delay control timing.

[0024] Figure 3 Schematic diagram of pulse alignment and delay process.

[0025] Figure 4 This is a schematic diagram of the connection relationship between the control signal and the 16-channel delayed output.

[0026] Figure 5 Schematic diagram of pulse rise time. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present invention are described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] This embodiment shows an embodiment of a delay configurable multi-pulse generating device, and its architecture is as follows: Figure 1 As shown. It includes modules such as optical fiber communication, delay compensation, instruction analysis, pulse generation, power amplification, delay control, and pulse emission.

[0029] The optical fiber communication module receives the control data stream dataflow1 sent by the upper system, and parses dataflow1 to obtain the number of pulse paths pulse1, pulse2, ...pulse16 that need to output pulses, the pulse width width1, width2, ...width16 of each path, the pulse frequency f1, f2, ...f16 of each path, the delay time delay_time1, delay_time2, ...delay_time16 of each path, etc. In this embodiment, optical fiber transmission is used to transmit various characteristics of the delayed pulse. In actual applications, various methods such as synchronous serial port, asynchronous serial port, network cable, etc. can also be used to transmit data, and the format of the transmitted data is not limited to the above data categories.

[0030] The delay compensation module stores the delay compensation values ​​of each channel delta_delay1, delta_delay2, ... delta_delay16. After the system is powered on, the compensation values ​​stored in the delay compensation module are immediately read out. During the whole process of system operation, the output pulses are compensated by the delay values, thereby ensuring the coherence of the output pulses.

[0031] The pulse generation module generates a specified number of original delayed pulse signals. According to the parsed delayed pulse information, the pulse generation module generates at least 16 pulse signals. Under the action of the clock module, the phases of these pulse signals are consistent and consistent with the timing of other external systems using this clock.

[0032] The delay control module performs delay control on each pulse output. According to the analyzed pulse delay time, the delay control module outputs a 10-bit control signal [D9:D0] to control the pulse signal to generate a delayed pulse with a step value of 10ps. Theoretically, in order to simultaneously control the delay of 16 pulses, 16*10=160 control signals are required. This embodiment uses a latch control bit for each pulse signal, a total of 16 latch control bits len1, len2, ... len16. The delay control sequence is as follows: Figure 2 As shown. After the 16-bit latch control position is set to high level, the 10-bit control signal [D9:D0] of the corresponding path can be latched, so that the original 10-bit control signal [D9:D0] can continue to transmit the delay value of other pulses on the control bus. In this embodiment, the connection relationship between the control signal and the pulse output of each channel is as follows Figure 4 As shown. Taking into account the two factors of pulse delay real-time and saving hardware resources, a design of four groups of control signals sharing one control bus is adopted, and 10*4+16=56-bit control signals are actually used, which greatly saves hardware resources while ensuring the real-time update of the delay amount. The waveforms of the original pulse signal output waveform in each state after delay compensation and delay control are shown as follows Figure 3shown.

[0033] The power amplifier module amplifies the power of the delayed pulse signal at a specified ratio. The high-performance integrated operational amplifier used can control the rise / fall time of the output end within 1ns. Figure 5 shown.

[0034] The pulse output module uses a radio frequency connector to output delayed pulses. The radio frequency connector can receive a wide frequency range, its impedance matches the line characteristic impedance, and its voltage standing wave ratio is small, which can maximize the transmission of pulse energy.

[0035] The present invention is not limited to the above specific implementations, and the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made to the above implementations based on the technical essence of the present invention shall be included in the protection scope of the present invention.

Claims

1. A time-delay configurable multi-pulse generating device, characterized in that: Including optical fiber communication, command analysis, pulse generation, delay compensation, delay control, power amplification, and pulse output modules; among them, The optical fiber communication module and the instruction parsing module complete the reception and parsing of the pulse generation instruction of the upper-level system; The pulse generation module completes the generation of the original pulse signal according to the analyzed pulse generation instruction, that is, generates a designated number of pulse signals with basic characteristics such as determined frequency and pulse width; The delay compensation module completes the compensation of the original pulse signal time so that all the compensated pulse signals are aligned at the rising edge of the output end; The delay control module completes the delay control of the compensated pulse signal so that the pulse signal is output with a determined delay time; The power amplifier module performs power amplification on the delayed pulse signal, improves the waveform of the pulse rising / falling edge, shortens the rising / falling time, and improves the driving capability; The pulse output module amplifies the delayed pulse signal and then outputs it.

2. A time-delay configurable multi-pulse generating device as claimed in claim 1, characterized in that: The delay time can be increased in steps, with the minimum step length being 10ps.

3. A time-delay configurable multi-pulse generating device as claimed in claim 2, characterized in that: The delay time of a pulse signal is controlled by ten control signals and one latch control bit.

4. A time-delay configurable multi-pulse generating device as claimed in claim 1, characterized in that: The delayed pulse signal is power amplified and the rise / fall time is less than 1ns.

5. The delay configurable multi-pulse generating device according to claim 1, characterized in that: Set the preload delay time table to load the initial delay time after the system is powered on.

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