Metal-insulating layer-metal capacitor, cooling fin and manufacturing method of metal-insulating layer-metal capacitor and cooling fin
By arranging a thermal conductive layer on the dielectric layer of the power amplifier to conduct heat to the heat sink, the problem of overheating of the power amplifier under high-frequency operation is solved, and effective heat dissipation and normal operation are achieved.
Patent Information
- Application Number
- CN202310908745.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-24
- Publication Date
- 2025-01-24
Smart Images
Figure CN119365067A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a metal-insulating layer-metal capacitor and a heat sink, and in particular to a structure in which a heat conduction layer is arranged on a capacitor dielectric layer to conduct heat to a heat sink, and a manufacturing method thereof. Background Art
[0002] The power amplifier is an important component in the radio frequency transmission circuit. Its main function is to amplify the signal and is usually designed at the front end of the antenna radiator. Currently, the semiconductor components used in power amplifiers are quite diverse.
[0003] With the rapid development of the electronics industry, existing electronic products have become increasingly thinner and lighter, and their integration and functionality have also been increasing. Therefore, circuit boards used to carry electronic devices such as resistors, capacitors or chips will inevitably develop in the direction of thinness. With the increasing popularity of wireless communications and the development needs of miniaturized communication equipment, the production of power amplifiers will become more intensive, but high-frequency operation in a limited space will be accompanied by the generation of a large amount of heat energy, which will affect the normal operation of the power amplifier. Summary of the invention
[0004] In view of this, the present invention provides a metal-insulator-metal capacitor and a heat sink, which have good heat dissipation capability, thereby effectively avoiding the problem of overheating of the power amplifier.
[0005] According to a preferred embodiment of the present invention, a metal-insulator-metal capacitor and heat sink comprises a dielectric layer, wherein the dielectric layer comprises a capacitor region and a heat sink region, a lower electrode is buried in the dielectric layer, a first heat conduction layer covers the capacitor region and the heat sink region of the dielectric layer, a capacitor dielectric layer is arranged on the first heat conduction layer in the capacitor region, a second heat conduction layer covers and contacts the capacitor dielectric layer and the first heat conduction layer, and the second heat conduction layer is arranged in the capacitor region and the heat sink region, an upper electrode is arranged in the capacitor region and the heat sink region and covers the second heat conduction layer, a first heat sink is arranged in the heat sink region and contacts the upper electrode, and a second heat sink is arranged in the heat sink region and contacts the first heat conduction layer and the second heat conduction layer.
[0006] According to another preferred embodiment of the present invention, a method for manufacturing a metal-insulator-metal capacitor and a heat sink comprises providing a dielectric layer, wherein the dielectric layer comprises a capacitor region and a heat sink region, then forming a lower electrode buried in the dielectric layer, then forming a first heat conduction layer covering the capacitor region and the heat sink region of the dielectric layer, then forming a capacitor dielectric layer disposed on the first heat conduction layer in the capacitor region, then forming a second heat conduction layer covering and contacting the capacitor dielectric layer and the first heat conduction layer, and the second heat conduction layer is disposed in the capacitor region and the heat sink region, then forming an upper electrode disposed in the capacitor region and the heat sink region and covering the second heat conduction layer, then forming a first heat sink disposed in the heat sink region and contacting the upper electrode, and finally forming a second heat sink disposed in the heat sink region and contacting the first heat conduction layer and the second heat conduction layer.
[0007] In order to make the above-mentioned objectives, features and advantages of the present invention more clearly understood, the following is a detailed description of the preferred embodiments and the accompanying drawings. However, the following preferred embodiments and the accompanying drawings are only for reference and explanation, and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figures 1 to 6 A method for manufacturing a metal-insulator-metal capacitor and a heat sink is illustrated according to a preferred embodiment of the present invention.
[0009]
Main component symbol description
[0010] 10a: Dielectric layer
[0011] 10b: Interlayer dielectric layer
[0012] 10c: Intermetallic dielectric layer
[0013] 12: Base
[0014] 14: Power Amplifier
[0015] 16: Lower electrode
[0016] 18a: first heat conduction layer
[0017] 18b: Second heat conduction layer
[0018] 20a: Metal interconnect structure
[0019] 20b: Metal interconnect structure
[0020] 20c: Metal interconnect structure
[0021] 22: Capacitor dielectric layer
[0022] 24: Upper electrode
[0023] 24a: Lower level
[0024] 24b: Upper level
[0025] 26a: First plug
[0026] 26b: Second plug
[0027] 28a: first heat sink
[0028] 28b: Second heat sink
[0029] 100: Metal-insulating layer-metal capacitor and heat sink
[0030] A: Active Zone
[0031] B: Capacitor area
[0032] C: Heat dissipation area DETAILED DESCRIPTION
[0033] Figures 1 to 6 A method for manufacturing a metal-insulator-metal capacitor and a heat sink is illustrated according to a preferred embodiment of the present invention.
[0034] like Figure 1 As shown, a dielectric layer 10a is first provided, wherein the dielectric layer 10a includes an active region A, a capacitor region B, and a heat dissipation region C. A substrate 12 is disposed below the dielectric layer 10a, and an interlayer dielectric layer 10b is covered on the substrate 12. The interlayer dielectric layer 10b contacts the dielectric layer 10a. The substrate 12, the interlayer dielectric layer 10b, and the dielectric layer 10a are all divided into the active region A, the capacitor region B, and the heat dissipation region C. A power amplifier 14 is disposed on the substrate 12 in the active region A, and a metal interconnect structure 20b is disposed in the interlayer dielectric layer 10b to electrically connect the power amplifier 14.
[0035] Next, a lower electrode 16 is formed to be buried in the capacitor region B of the dielectric layer 10a, and a metal interconnect structure 20a is formed to be disposed in the dielectric layer 10a in the active region A. The metal interconnect structure 20a contacts the metal interconnect structure 20b.
[0036] like Figure 2 As shown, a first heat conducting layer 18a is formed to cover the active region A, the capacitor region B and the heat dissipation region C of the dielectric layer 10a, and then a capacitor dielectric layer 22 is formed to cover the first heat conducting layer 18a. The capacitor dielectric layer 22 is also located in the active region A, the capacitor region B and the heat dissipation region C. The first heat conducting layer 18a is preferably amorphous aluminum nitride or amorphous boron nitride, and the capacitor dielectric layer 22 is preferably a high dielectric constant material. The first heat conducting layer 18a and the capacitor dielectric layer 22 are formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition or other deposition methods.
[0037] like Figure 3 As shown, the first heat conduction layer 18a is used as an etching stop layer, and the capacitor dielectric layer 22 is patterned to remove the capacitor dielectric layer 22 in the active area A and the heat dissipation area C, and the remaining capacitor dielectric layer 22 remains in the capacitor area B. Figure 4 As shown, a second heat conducting layer 18b is formed to conformably cover the active area A, the capacitor area B and the heat dissipation area C. The second heat conducting layer 18b contacts the capacitor dielectric layer 22 and the first heat conducting layer 18a. The second heat conducting layer 18b is formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition or other deposition methods. The second heat conducting layer 18b is preferably amorphous aluminum nitride or amorphous boron nitride. Then, a top electrode 24 is formed to conformably cover the second heat conducting layer 18b. The top electrode 24 can be a multi-layer conductive structure, such as a stacked structure of a metal layer and a metal nitride. In this embodiment, the bottom layer 24a of the top electrode 24 is aluminum, and the top layer 24b of the top electrode 24 is titanium nitride.
[0038] like Figure 5 As shown, the second heat conduction layer 18b is used as an etching stop layer, and the upper electrode 24 is patterned to remove the upper electrode 24 located in the active area A. The remaining upper electrode 24 is located in the capacitor area B and the heat dissipation area C. At this time, the second heat conduction layer 18b in the active area A is exposed.
[0039] like Figure 6 As shown, a metal interlayer dielectric layer 10c is formed to cover the active region A, the capacitor region B and the heat dissipation region C, and then a metal interconnect structure 20c, a first plug 26a, a second plug 26b and a first heat sink 28a are formed. The metal interconnect structure 20c penetrates the metal interlayer dielectric layer 10c, the second heat conduction layer 18b and the first heat conduction layer 18a located in the active region A, and contacts the metal interconnect structure 20a. The first plug 26a is located in the metal interlayer dielectric layer 10c. 0c and contacts the upper electrode 24, for example, the end of the first plug 26a contacts the lower layer 24a in the upper electrode 24, the second plug 26b penetrates the metal interlayer dielectric layer 10c, the second heat conduction layer 18b and the first heat conduction layer 18a located in the capacitor area B to contact the lower electrode 16, and the first heat sink 28a penetrates the metal interlayer dielectric layer 10c in the heat dissipation area C and contacts the upper electrode 24, for example, the end of the first heat sink 28a contacts the lower layer 24a in the upper electrode 24. The metal interconnect structure 10c, the first plug 26a, the second plug 26b and the first heat sink 28a are formed using the same process. For example, a plurality of grooves are first formed in the intermetallic dielectric layer 10c to accommodate the metal interconnect structure 20c, the first plug 26a, the second plug 26b and the first heat sink 28a. Then, metal layers are filled in each groove to form the metal interconnect structure 20c, the first plug 26a, the second plug 26b and the first heat sink 28a.
[0040] Then, a second heat sink 28b is formed and disposed in the heat dissipation area C and contacts the first heat conducting layer 18a and the second heat conducting layer 18b. Specifically, the second heat sink 28b is a through silicon via, and the second heat sink 28b penetrates the substrate 12, the interlayer dielectric layer 10b, the dielectric layer 10a and the first heat conducting layer 18a, and the end of the second heat sink 28b contacts the second heat conducting layer 18b. At this point, the metal-insulator-metal capacitor and heat sink 100 of the present invention has been completed.
[0041] It is additionally noted that, in the foregoing description, although the metal interconnect structure 10c, the first plug 26a, the second plug 26b and the first heat sink 28a are formed before the second heat sink 28b, depending on different process requirements, the second heat sink 28b may be manufactured first, and then the metal interconnect structure 10c, the first plug 26a, the second plug 26b and the first heat sink 28a may be manufactured together.
[0042] like Figure 6 As shown, a metal-insulator-metal capacitor and heat sink 100 includes a dielectric layer 10a, wherein the dielectric layer 10a includes an active region A, a capacitor region B and a heat dissipation region C, a substrate 12 is disposed below the dielectric layer 10a, an interlayer dielectric layer 10b is covered on the substrate 12, the interlayer dielectric layer 10b contacts the dielectric layer 10a, and the substrate 12, the interlayer dielectric layer 10b and the dielectric layer 10a are all divided into an active region A, a capacitor region B and a heat dissipation region C. A power amplifier 14 is disposed on the substrate 12 in the active region A, a metal interconnect structure 20b is disposed in the interlayer dielectric layer 10b to electrically connect the power amplifier 14, and a metal interconnect structure 20a is disposed in the dielectric layer 10a to contact the metal interconnect structure 20b. A lower electrode 16 is buried in the capacitor region B of the dielectric layer 10a, a first heat conduction layer 18a covers the active region A, the capacitor region B and the heat dissipation region C of the dielectric layer 10a, the first heat conduction layer 18a contacts the lower electrode 16 and the metal interconnect structure 20b, a capacitor dielectric layer 22 is only arranged on the first heat conduction layer 18a in the capacitor region B, the capacitor dielectric layer 22 contacts the first heat conduction layer 18a, a second heat conduction layer 18b covers and contacts the capacitor dielectric layer 22 and the first heat conduction layer 18a, and the second heat conduction layer 18b is arranged in the active region A, the capacitor region B and the heat dissipation region C, and an upper electrode 24 is arranged in the capacitor region B and the heat dissipation region C, and covers and contacts the second heat conduction layer 18b.
[0043] An intermetallic dielectric layer 10c covers the active region A, the capacitor region B and the heat dissipation region C. Specifically, the intermetallic dielectric layer 10c is located above the upper electrode 24 and the second heat conduction layer 18b. A metal interconnect structure 20c penetrates the intermetallic dielectric layer 10c, the second heat conduction layer 18b and the first heat conduction layer 18a located in the active region A, and contacts the metal interconnect structure 20a, the second heat conduction layer 18b and the first heat conduction layer 18a. A first heat sink 28a is disposed in the intermetallic dielectric layer 10c in the heat dissipation region C and contacts the upper electrode 24. A second heat sink 28b is disposed in the heat dissipation region C and contacts the first heat conduction layer 18a and the second heat conduction layer 18b. The second heat sink 28b is a silicon through-hole. The second heat sink 28b penetrates the substrate 12, the interlayer dielectric layer 10b, the dielectric layer 10a and the first heat conduction layer 18a, and the end of the second heat sink 28b contacts the second heat conduction layer 18b.
[0044] A first plug 26a is located in the metal interlayer dielectric layer 10c in the capacitor region B and contacts the upper electrode 24, and a second plug 26b is located in the metal interlayer dielectric layer 10c in the capacitor region B and contacts the lower electrode 16. In detail, the upper electrode 24 preferably includes a multi-layer conductive structure. In this embodiment, the lower layer 24a of the upper electrode 24 is aluminum, and the upper layer 24b of the upper electrode 24 is titanium nitride. For example, the thickness of the lower layer 24a is large, so that the resistance of the upper electrode 24 can be reduced, and the charging and discharging speed of the metal-insulator-metal capacitor 100 can be accelerated. In addition, according to a preferred embodiment of the present invention, the end of the first plug 26a contacts the lower layer 24a in the upper electrode 24, and the end of the second plug 26b contacts the surface of the lower electrode 16.
[0045] The lower electrode 16 and the upper electrode 24 may each include TiN, Al, Ta, Cu, Ti or Ta. The capacitor dielectric layer 22 is a high dielectric constant material, such as hafnium dioxide (HfO2), zirconium dioxide (ZrO2), titanium dioxide (TiO2), aluminum oxide, zirconium oxide, barium strontium titanate (BST), lead zirconate titanate (PZT), zirconium silicate (ZrSiO4), hafnium silicon oxide (HfSiO2), hafnium silicon oxynitride (HfSiON), tantalum oxide or a combination of the above materials.
[0046] The first heat conductive layer 18a and the second heat conductive layer 18b include amorphous aluminum nitride or amorphous boron nitride. Since the materials used for the first heat conductive layer 18a and the second heat conductive layer 18b are insulating materials with high thermal conductivity, especially amorphous aluminum nitride or amorphous boron nitride has a high band gap, the capacitor dielectric layer 22 can be prevented from leaking. In addition, it is worth noting that the first heat conducting layer 18a and the second heat conducting layer 18b contact the upper surface and the lower surface of the capacitor dielectric layer 22 respectively, and the first heat conducting layer 18a and the second heat conducting layer 18b also contact the second heat sink 28b and the upper electrode 24. Furthermore, the first heat conducting layer 18a and the second heat conducting layer 18b are deliberately extended to the active area A to contact the metal interconnect structure 20a. In this way, the heat energy generated by the power amplifier 14 can be transferred to the second heat sink 28b and the upper electrode 24 through the first heat conducting layer 18a and the second heat conducting layer 18b. Because the first heat conducting layer 18a and the second heat conducting layer 18b contact the capacitor dielectric layer 22 respectively, the heat energy generated by the capacitor dielectric layer 22 can also be transferred to the second heat sink 28b and the upper electrode 24 through the first heat conducting layer 18a and the second heat conducting layer 18b. Since the upper electrode 24 contacts the first heat sink 28a, heat energy can be transmitted from the upper electrode 24 to the outside through the first heat sink 28a, and the heat energy transmitted to the second heat sink 28b is transmitted to the outside by the second heat sink 28b.
[0047] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.
Claims
1. A metal-insulator-metal capacitor and a heat sink, comprising: a dielectric layer, wherein the dielectric layer comprises a capacitor region and a heat dissipation region; a lower electrode buried in the dielectric layer; A first heat conducting layer, covering the capacitor region and the heat dissipation region of the dielectric layer; A capacitor dielectric layer is disposed on the first heat conduction layer in the capacitor region; A second heat conduction layer covers and contacts the capacitor dielectric layer and the first heat conduction layer, and the second heat conduction layer is arranged in the capacitor area and the heat dissipation area; The upper electrode is arranged in the capacitor area and the heat dissipation area and covers the second heat conduction layer; A first heat sink is disposed in the heat dissipation area and contacts the upper electrode; as well as The second heat sink is disposed in the heat dissipation area and contacts the first heat conduction layer and the second heat conduction layer.
2. The metal-insulator-metal capacitor and heat sink as claimed in claim 1, wherein the second heat sink penetrates the dielectric layer and contacts the first heat conductive layer and the second heat conductive layer with a distal end of the second heat sink. 3 . The metal-insulator-metal capacitor and heat sink as claimed in claim 1 , wherein the capacitor dielectric layer is only disposed in the capacitor region. 4 . The metal-insulator-metal capacitor and heat sink as claimed in claim 1 , wherein a terminal end of the first heat sink contacts the upper electrode. 5 . The metal-insulator-metal capacitor and heat sink as claimed in claim 1 , further comprising a first plug located in the capacitor region and contacting the upper electrode, and a second plug located in the capacitor region and contacting the lower electrode.
6. The metal-insulator-metal capacitor and heat sink as claimed in claim 1, wherein the dielectric layer further comprises: Active Zone; The metal interconnect structure is disposed in the dielectric layer in the active region; wherein the first heat conduction layer and the second heat conduction layer extend to the active region, and the second heat conduction layer contacts the metal interconnect structure.
7. The metal-insulator-metal capacitor and heat sink as claimed in claim 6, further comprising: a substrate disposed below the dielectric layer; and The power amplifier is disposed on the substrate, wherein the power amplifier is electrically connected to the metal inner connection structure.
8. The metal-insulator-metal capacitor and heat sink as claimed in claim 7, wherein the second heat sink is a through silicon via (TSV), and the second heat sink penetrates the substrate. 9 . The metal-insulator-metal capacitor and heat sink as claimed in claim 1 , wherein the first heat conducting layer comprises amorphous aluminum nitride, and the second heat conducting layer comprises amorphous aluminum nitride.
10. A method for manufacturing a metal-insulating layer-metal capacitor and a heat sink, comprising: Providing a dielectric layer, wherein the dielectric layer comprises a capacitor region and a heat dissipation region; forming a lower electrode buried in the dielectric layer; Forming a first heat conduction layer to cover the capacitor region and the heat dissipation region of the dielectric layer; Forming a capacitor dielectric layer disposed on the first heat conduction layer in the capacitor region; Forming a second heat conduction layer to cover and contact the capacitor dielectric layer and the first heat conduction layer, and the second heat conduction layer is arranged in the capacitor area and the heat dissipation area; forming an upper electrode disposed in the capacitor region and the heat dissipation region and covering the second heat conduction layer; Form a first heat sink disposed in the heat dissipation area and contacting the upper electrode; as well as A second heat sink is formed and disposed in the heat dissipation area and contacts the first heat conduction layer and the second heat conduction layer. 11 . The method for manufacturing a metal-insulator-metal capacitor and a heat sink as claimed in claim 10 , wherein the second heat sink penetrates the dielectric layer and contacts the first heat conducting layer and the second heat conducting layer with a distal end of the second heat sink. 12 . The method for manufacturing a metal-insulator-metal capacitor and a heat sink as claimed in claim 10 , wherein the capacitor dielectric layer is only disposed in the capacitor region. 13 . The method for manufacturing a metal-insulator-metal capacitor and a heat sink as claimed in claim 10 , wherein a terminal end of the first heat sink contacts the upper electrode.
14. The method for manufacturing the metal-insulator-metal capacitor and heat sink as claimed in claim 10, further comprising: forming a first plug located in the capacitor region and contacting the upper electrode; and A second plug is formed in the capacitor region and contacts the lower electrode.
15. The method for manufacturing a metal-insulator-metal capacitor and a heat sink as claimed in claim 10, wherein the dielectric layer further comprises: The active region includes a metal interconnect structure disposed within and above the dielectric layer in the active region, the first heat conducting layer and the second heat conducting layer extending to the active region, and the second heat conducting layer contacting the metal interconnect structure.
16. The method for manufacturing the metal-insulator-metal capacitor and heat sink as claimed in claim 15, further comprising: a substrate disposed below the dielectric layer; and The power amplifier is disposed on the substrate, wherein the power amplifier is electrically connected to the metal inner connection structure. 17 . The method for manufacturing a metal-insulator-metal capacitor and a heat sink as claimed in claim 16 , wherein the second heat sink is a through silicon via (TSV), and the second heat sink penetrates the substrate. 18 . The method for manufacturing a metal-insulator-metal capacitor and a heat sink as claimed in claim 10 , wherein the first heat conducting layer comprises amorphous aluminum nitride, and the second heat conducting layer comprises amorphous aluminum nitride.