A method for detecting a valley voltage of a quasi-resonant circuit

Abstract

The application discloses a kind of quasi-resonant circuit valley voltage detection methods, step 1, when auxiliary side voltage V FB When detecting VFB over the second actual comparison point B, the first switch is opened, and the second switch is closed, and the charging of the charging capacitor is stopped, the charging capacitor starts to discharge, and the discharge current is 2I; step 2, the charging capacitor is discharged to zero voltage, and then the time of 2α-β compensation is compensated, and at this time, the bottom detection signal is sent; α is the delay between the zero point of the zero-crossing comparator and the actual comparison point, and β is the internal delay of the zero-crossing comparator. The present application can detect the lowest point of the resonance voltage to turn on the switch.

Description

TECHNICAL FIELD

[0001] The present application relates to a kind of switch voltage minimum point detection method of flyback switching power supply, specifically relates to a kind of quasi-resonant circuit wave trough voltage detection method. BACKGROUND

[0002] Figure 1 For flyback circuit structure diagram, Figure 2 For flyback circuit working time electric signal waveform diagram, Ip is original side inductance current, Is is auxiliary side inductance current, V DS For switch Q1 drain-source voltage, Vg is the signal of control switch Q1 conduction, add auxiliary side voltage and lead out V FB , voltage VFB is equal to switch Q1 drain-source voltage V DS . As Figure 2 Time period T off Waveform shows, when demagnetization time T demag End switch Q1 both ends voltage V DS Will not immediately become 0, but will enter dead time T off , that is, when original side inductance current Ip and auxiliary side inductance current Is are all zero, original side inductance Lp and Q1 parasitic capacitance C D Resonance occurs, resulting in Q1 both ends voltage V DS Resonance, this will result in certain switching loss, especially obvious at high frequency.Therefore, when V DS Resonance to voltage minimum point, open MOS switch tube Q1 at this time, switching loss is minimum, effectively reduce switching loss.

[0003] Detection V DS Resonance trough method is: when starting resonance, since resonance signal is sine wave, twice detects V FB Zero is 1 / 2 of resonance period, delay a quarter of the above resonance process, then V FB Voltage minimum point, output trough detection signal.The difficulty of detection method is how to accurately obtain the time size of T / 4, the following is several existing technology provides method.

[0004] The first kind of detection method is when switch voltage resonates to zero, add a fixed delay T delay , output trough detection signal after delay T delay , and open switch through subsequent logic circuit.But the method since fixed value T delay , when switch circuit works at high frequency, resonance period changes greatly, therefore the precision of this method is very low.

[0005] The second kind of detection method is to obtain T / 4 by the method of charging capacitor.This detection method is as Figure 3As shown, when the secondary side current drops to 0, the resonance starts, and the first capacitor C1 is charged. When the detection of the switch voltage is 0, the charging of the first capacitor is stopped, and the charging of the second capacitor C2 with the same current is started, and the two capacitor values are equal. The voltages of the two capacitors are input to the positive and negative inputs of the comparator, respectively, and when the voltage on the second capacitor is equal to the voltage on the first capacitor, the valley detection signal is output through the comparator. This method can solve the problem that the first type of method has a large change in the resonance period when the circuit works at a high frequency. If the resonance period is large, the delay time will also be large, and if the resonance period is small, the delay time will also be small.

[0006] The third type of detection method is to obtain T / 4 by charging and discharging the capacitor. When the secondary side current drops to 0, the resonance starts, and the capacitor starts charging from 0 voltage. When the detection of the switch voltage is 0, the charging of the capacitor is stopped. At this time, the capacitor is discharged with the same charging current (the charging and discharging currents are the same by using a current mirror), and when the capacitor is discharged to 0 voltage, the valley detection signal is output. This method can solve the problem that the first type of method has a large change in the resonance period when the circuit works at a high frequency.

[0007] The above second and third types of detection methods do not take into account the deviation caused by non-ideal factors. First, due to the limitation of the common mode input range of the comparator, the actual comparison point cannot reach 0, thus causing a deviation in the detection of the zero point. Second, the comparator also has a delay, and these two factors will cause the final output valley detection signal to be inaccurate, especially in the case of a high resonance frequency. SUMMARY

[0008] In view of the problems of the prior art, the present application provides a quasi-resonant circuit valley voltage detection method, which can detect the lowest point of the resonance voltage to turn on the switch.

[0009] The technical solution to solve the above problems is as follows:

[0010] A quasi-resonant circuit valley voltage detection method, comprising a first constant current source, a second constant current source, a charging capacitor, a first switch, and a second switch, one end of the first constant current source being connected with one end of the first switch, the other end of the first switch being connected with one end of the charging capacitor, the other end of the charging capacitor being connected with the other end of the first constant current source, one end of the charging capacitor being further connected with one end of the second switch, the other end of the second switch being connected with one end of the second constant current source, the other end of the second constant current source being connected with the other end of the charging capacitor, the first constant current source, the first switch, and the charging capacitor constituting a charging circuit, and the second constant current source, the second switch, and the charging capacitor constituting a discharging circuit, the charging and discharging loops of the charging capacitor being adopted to make the valley voltage detection follow the following steps:

[0011] Step 1, when the auxiliary side voltage VFB When the first actual comparison point A is passed, the first switch is closed, the second switch is opened, the charging of the charging capacitor is started, the capacitor initial voltage is zero, and the charging current is I; when the VFB is detected to pass the second actual comparison point B, the first switch is opened, the second switch is closed, the charging of the charging capacitor is stopped, the charging capacitor starts to discharge, the discharging current is 2I, and the discharging is to zero voltage;

[0012] Step 2, the charging capacitor discharges to zero voltage, and 2α-β time is compensated, at this time, a valley detection signal is sent; α is the delay between the zero point of the zero-crossing comparator and the actual comparison point, and β is the internal delay of the zero-crossing comparator.

[0013] Further, the α and β are obtained by testing the zero-crossing comparator, the zero-crossing comparator input sine signal, the sine signal is compared with the first actual comparison point A and the first actual comparison point B to obtain the zero-crossing comparator flip point, α+β and α-β are obtained through testing, and then the values of α and β are obtained.

[0014] Further, the comparator and the delay circuit are further included, the non-inverting input end of the comparator is connected with one end of the charging capacitor, the delay circuit includes a third switch tube and a fourth switch tube, the first ends of the third switch tube and the fourth switch tube are connected with the output end of the comparator, the second end of the third switch tube is used for connecting a power supply, the third end of the third switch tube is connected with the second end of the fourth switch tube, the third end of the fourth switch tube is grounded, and the connection position of the third end of the third switch tube and the second end of the fourth switch tube is the output end of the delay circuit.

[0015] Further, the delay circuit further includes a capacitor, one end of the capacitor is connected to the connection position of the third end of the third switch tube and the second end of the fourth switch tube, and the other end of the capacitor is grounded.

[0016] The technical effect of the present application is:

[0017] The present application adopts compensation to eliminate the error caused by the delay of the zero-crossing comparator and the comparison point of the zero-crossing comparator, and can accurately detect the lowest point of the resonance voltage and turn on the switch tube. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 It is a schematic diagram of the flyback circuit.

[0019] Figure 2 It is a waveform diagram of the flyback circuit in each time state.

[0020] Figure 3 It is a schematic diagram of the second type of detection method of the background technology.

[0021] Figure 4 It is a schematic diagram for obtaining the valley voltage by charging and discharging the capacitor.

[0022] Figure 5 The schematic diagram of the time delay compensation circuit of the present application.

[0023] Figure 6 The schematic diagram for obtaining delay parameters α and β.

[0024] Figure 7 The waveform diagram of the time delay compensation.

[0025] Figure 8 The analysis diagram of the time delay compensation. DETAILED DESCRIPTION

[0026] As Figures 4 to 8 shown, the valley voltage detection method of the quasi-resonant circuit of the present application comprises a first constant current source I1, a second constant current source I2, a charging capacitor C, a first switch S1, and a second switch S2. One end of the first constant current source I1 is connected with one end of the first switch S1, the other end of the first switch S1 is connected with one end of the charging capacitor C, the other end of the charging capacitor C is connected with the other end of the first constant current source I1, one end of the charging capacitor C is also connected with one end of the second switch S2, the other end of the second switch S2 is connected with one end of the second constant current source I2, the other end of the second constant current source I2 is connected with the other end of the charging capacitor C. The first constant current source I1, the first switch S1, and the charging capacitor C constitute a charging circuit, and the second constant current source I2, the second switch S2, and the charging capacitor C constitute a discharging circuit.

[0027] The charging and discharging circuit of the charging capacitor C makes the valley voltage detection follow the steps below:

[0028] Step 1, when the auxiliary side voltage V FB passes the first actual comparison point A, the first switch S1 is closed, the second switch S2 is opened, the charging of the charging capacitor C is started, the initial voltage of the capacitor is zero, and the charging current is I; when it is detected that VFB passes the second actual comparison point B, the first switch S1 is opened, the second switch S2 is closed, the charging of the charging capacitor C is stopped, and the charging capacitor C starts to discharge, the discharging current is 2I, and the discharging is to zero voltage.

[0029] Step 2, the charging capacitor C discharges to zero voltage, and then compensates the time of 2α-β, at this time, the valley bottom detection signal is sent; α is the delay between the zero point of the zero-crossing comparator and the actual comparison point, and β is the internal delay of the zero-crossing comparator.

[0030] The α and β are obtained by testing the zero-crossing comparator. The zero-crossing comparator inputs a sine signal, the sine signal is compared with the first actual comparison point A and the first actual comparison point B to obtain the flipping point of the zero-crossing comparator, α+β and α-β are obtained through testing, and then the values of α and β are obtained.

[0031] It also includes a comparator COMP and a delay circuit. The non-inverting input terminal of the comparator COMP is connected to one end of the charging capacitor C. The delay circuit includes a third switch S3 and a fourth switch S4. The first terminals of the third switch S3 and the fourth switch S4 are connected to the output terminal of the comparator COMP. The second terminal of the third switch S3 is used to connect to the power supply. The third terminal of the third switch S3 is connected to the second terminal of the fourth switch S4. The third terminal of the fourth switch S4 is grounded. The connection point between the third terminal of the third switch S3 and the second terminal of the fourth switch S4 is the output terminal of the delay circuit.

[0032] The delay circuit also includes a capacitor C0, one end of which is connected to the connection between the third terminal of the third switch S3 and the second terminal of the fourth switch S4, and the other end of the capacitor C0 is grounded.

[0033] The voltage across the charging capacitor C is input to the non-inverting input of comparator COMP, and the inverting input of comparator COMP is used to input the comparison voltage K. The output of comparator COMP is V. c It is a switching signal that has not yet been compensated, V c After passing through a delay circuit to achieve the required delay time, the valley-level conduction signal V is output. D ,control Figure 1 The switching transistor Q1 in the middle.

[0034] The principle of this invention is:

[0035] 1. Obtain the auxiliary side voltage V through a zero-crossing comparator. FB The time between the two zeros at resonance is T / 2. (The last part, "V", appears to be a typo and can be omitted.) FB The voltage is drawn through a zero-crossing comparator, and the time between two zero crossings is T / 2.

[0036] like Figure 4 As shown, the first constant current source I1 is connected to the two terminals of the charging capacitor C through the first switch S1 to form a charging circuit; the two terminals of the charging capacitor C are connected to the second constant current source I2 through the second switch S2 to form a discharging circuit. When the auxiliary side voltage V FB When the first zero point is reached, the first switch S1 closes to begin charging the charging capacitor C. The initial voltage of the charging capacitor C is zero, and the charging current is I. When V is detected... FB When the voltage drops to zero again, the first switch S1 opens, stopping the charging of capacitor C. The second switch S2 closes, and capacitor C begins to discharge with a discharge current of 2I until the voltage reaches zero. Since it is the same capacitor C, but the current is doubled, the discharge time is half the charging time, i.e., T / 4. At this point, a valley detection signal is issued.

[0037] 2. Determine the compensation time for the zero-crossing comparator delay.

[0038] The comparison point of the zero-crossing comparator cannot reach zero, so the valley detection signal sent after a delay of T / 4 after the last zero detection is not the real valley. In order to improve the accuracy of valley detection, the delay time needs to be compensated.

[0039] As shown in Figure 8 the reaction time difference of the zero-crossing comparator to the waveform: assuming the delay between the zero point and the actual comparison point is α, the internal delay of the operational amplifier is β, and the actual charging time of the charging capacitor C is (T / 2-2α); the last quarter of the waveform is the discharging time, and the real valley of the waveform is the (T / 4+α-β) time period after starting discharging. In the discharging phase of the charging capacitor, because the charging capacitor C is not fully charged, the discharging of the charging capacitor C ends early. Thus, it is concluded that the discharging time is only (T / 2-2α) / 2, which is less than the real T / 4 by a period of α. At the same time, it can be seen from Figure 8 that the discharging start point is before the zero crossing (α-β), which should be made up. Therefore, the two items of time that need to be compensated for 2α-β are the real valley.

[0040] The above-described examples are only part of the embodiments of the present application, not all the embodiments. Based on the examples in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

Claims

1. A method for detecting valley voltage of a quasi-resonant circuit, comprising a first constant current source (I1), a second constant current source (I2), a charging capacitor (C), a first switch (S1), a second switch (S2), one end of the first constant current source (I1) being connected to one end of the first switch (S1), the other end of the first switch (S1) being connected to one end of the charging capacitor (C), the other end of the charging capacitor (C) being connected to the other end of the first constant current source (I1), one end of the charging capacitor (C) being further connected to one end of the second switch (S2), the other end of the second switch (S2) being connected to one end of the second constant current source (I2), the other end of the second constant current source (I2) being connected to the other end of the charging capacitor (C), the first constant current source (I1), the first switch (S1) and the charging capacitor (C) constituting a charging circuit, and the second constant current source (I2), the second switch (S2) and the charging capacitor (C) constituting a discharging circuit, characterized in that, The charging and discharging circuit of the charging capacitor (C) makes the trough voltage detection follow the steps below: Step 1, when the auxiliary side voltage V FB When the first actual comparison point A is passed, the first switch (S1) is closed, the second switch (S2) is opened, the charging of the charging capacitor (C) is started, the capacitor initial voltage is zero, and the charging current is I; when V FB When the second actual comparison point B is passed, the first switch (S1) is opened, the second switch (S2) is closed, the charging of the charging capacitor (C) is stopped, the charging capacitor (C) starts to discharge, the discharge current is 2I, and the discharge is to zero voltage; Step 2, the charging capacitor (C) is discharged to zero voltage, and then compensated for 2α-β time, at which time the trough detection signal is sent; α is the delay between the zero point of the zero-crossing comparator and the actual comparison point, and β is the internal delay of the zero-crossing comparator.

2. A method of detecting a valley voltage of a quasi-resonant circuit according to claim 1, characterized in that: The α and β are obtained by testing the zero-crossing comparator, the zero-crossing comparator inputting a sine signal, the sine signal being compared with the first actual comparison point A and the first actual comparison point B to obtain the zero-crossing comparator flip point, and α+β and α-β being obtained through testing, and then the values of α and β being obtained.

3. The method of claim 1, wherein: The delay circuit further comprises a capacitor (C0), one end of the capacitor (C0) being connected to the connection between the third end of the third switch tube (S3) and the second end of the fourth switch tube (S4), and the other end of the capacitor (C0) being grounded.

4. A method of detecting a valley voltage of a quasi-resonant circuit according to claim 3, characterized in that: The delay circuit further comprises a capacitor (C0), one end of the capacitor (C0) being connected to the connection between the third end of the third switch tube (S3) and the second end of the fourth switch tube (S4), and the other end of the capacitor (C0) being grounded.

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