Radar arbitrary waveform generator and generation method

By combining FPGA and AD9914 chip, the signal bandwidth of the radar system was expanded and the anti-interference capability was improved, generating a continuously adjustable high-frequency resolution signal, thus solving the problems of insufficient signal bandwidth and anti-interference capability in existing radar systems.

CN119376491APending Publication Date: 2025-01-28LEIHUA ELECTRONICS TECH RES INST AVIATION IND OF CHINA
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Patent Information

Application Number
CN202411352741.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-26
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

Existing radar systems are inadequate in terms of signal bandwidth and anti-jamming capabilities, making it difficult to generate broadband signals and effectively counter active interference.

Method used

A radar arbitrary waveform generator based on FPGA, TS101 and AD9914 is adopted. The host computer compiles and configures the data, and uses the TS101 chip and AD9914 chip to generate linear frequency modulation or spot frequency signals, which are then sent to the transmitter through a frequency synthesizer to realize the programmable control of the signal frequency and amplitude.

Benefits of technology

It achieves wide signal bandwidth, short frequency conversion time, high frequency resolution, continuously adjustable output signal, and good anti-interference capability.

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Abstract

The invention belongs to the technical field of radars, and particularly relates to a radar arbitrary waveform generator and a radar arbitrary waveform generation method, an AD9114 register is configured in a TS101, configured data are transmitted to an FPGA through a LINK port, after the FPGA receives an instruction and the data, the content transmitted by the TS101 is transmitted to a register of an AD9914 chip through an SPI interface according to a specific time sequence, and the FPGA transmits the content to the AD9914 chip through the SPI interface according to the specific time sequence. After transmission is finished, an IOUPDATE signal is sent to an AD9914 chip, and then the AD9914 chip can generate required waveforms such as dot frequency, linear frequency modulation and frequency hopping in a specific time period according to requirements, so that generation of any waveform is achieved.
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Description

Technical Field

[0001] The present application belongs to the field of radar technology, and in particular relates to a radar arbitrary waveform generator and a generating method thereof. Background Art

[0002] Theoretical research and practice show that the performance of radar and radar signal bandwidth are closely related to the signal form. For example, in order to improve the ranging accuracy and ranging resolution, linear frequency modulation or nonlinear frequency modulation signals are added to the time-width product-wide pulse to expand the signal frequency band; for example, in order to improve the radar's ability to counter active interference, it is required to generate bandwidth-agile frequency signals to avoid interference spectrum and effectively counter aiming interference, etc. Therefore, studying the generation of radar broadband signals is a practical need. Summary of the invention

[0003] In order to solve the above problems, the present application provides a radar arbitrary waveform generator based on FPGA, TS101 and AD9914, including:

[0004] Host computer, information processing device, frequency synthesizer and transmitter;

[0005] The host computer is connected to the information processing device, the information processing device is connected to the frequency synthesizer, and the frequency synthesizer is connected to the transmitter;

[0006] The information processing device includes: a control panel, a Ts101 chip, an FPGA chip and a DDS chip;

[0007] The control panel is connected to the Ts101 chip, the Ts101 chip is connected to the FPGA chip, and the FPGA chip is connected to the DDS chip.

[0008] Preferably, the DDS chip is an AD9914 chip.

[0009] Preferably, when the waveform generator generates a linear frequency modulation signal, register 0x00 of the Ts101 chip is configured to 0x00018308, register 0x01 is configured to 0x00882900, register 0x04 is configured to the required lower cutoff frequency, register 0x05 is configured to the required upper cutoff frequency, register 0x06 is configured to the required rising digital ramp step length, register 0x07 is configured to the required falling digital ramp step length, register 0x08 is configured to the required digital ramp rate, and register 0x0C is configured to the required digital ramp rate.

[0010] Preferably, if a dot frequency signal is to be generated, register 0x00 of the Ts101 chip is configured as 0x00018308, register 0x01 is configured as 0x00800900, register 0x0B is configured as the dot frequency output by the DDS, and register 0x0C is configured as the amplitude of the dot frequency output by the DDS.

[0011] A radar arbitrary waveform generation method, wherein configuration data is compiled by a host computer;

[0012] The TS101 chip transmits the configuration data to the FPGA chip through the LINK port;

[0013] After receiving the configuration data, the FPGA chip stores the data and transmits it to the AD9914 chip through the SPI interface in the format of register address and register data. After the transmission is completed, a high level is sent to the IOUPDATE port of the AD9914 chip, indicating that the data transmission is completed.

[0014] After receiving the data and transmission completion instructions, the AD9914 chip generates a corresponding linear frequency modulation signal or a dot frequency signal;

[0015] The linear frequency modulation signal or the dot frequency signal is sent to the transmitter through the frequency synthesizer to transmit the signal.

[0016] The minimum frequency of the linear frequency modulation signal generated is 0HZ, and the maximum frequency is 1750MHZ. The minimum frequency of the dot frequency signal generated is 0HZ, and the maximum frequency is 1750MHZ.

[0017] The advantages of this application include: the AD9914 chip in this design can use a maximum clock of 3500M, and can output any signal between 0-1750M by configuring the chip register. The generated signal has the advantages of relatively wide bandwidth, extremely short frequency conversion time, high frequency resolution, continuous output signal, and the output signal frequency, phase and amplitude can all be program-controlled. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a radar arbitrary waveform generation method in a preferred embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the technical solution and advantages of the present application clearer, the technical solution of the present application will be further described in detail in detail and in detail in conjunction with the accompanying drawings. It can be understood that the specific embodiments described here are only partial embodiments of the present application, which are only used to explain the present application, not to limit the present application. It should be noted that, for the convenience of description, only the parts related to the present application are shown in the accompanying drawings, and other related parts can refer to the general design. In the absence of conflict, the embodiments in the present application and the technical features in the embodiments can be combined with each other to obtain new embodiments.

[0020] like Figure 1 As shown, a radar arbitrary waveform generator includes: a host computer, an information processing device, a frequency synthesizer and a transmitter;

[0021] The host computer is connected to the information processing device, the information processing device is connected to the frequency synthesizer, and the frequency synthesizer is connected to the transmitter;

[0022] The information processing device includes: a control panel, a Ts101 chip, an FPGA chip and a DDS chip;

[0023] The control panel is connected to the Ts101 chip, the Ts101 chip is connected to the FPGA chip, and the FPGA chip is connected to the DDS chip. The DDS chip adopts the AD9914 chip.

[0024] The implementation process of radar frequency modulation ranging preprocessing can be divided into the following steps:

[0025] Step 1: If you want to generate a linear frequency modulation signal, configure the register 0x00 of the AD9914 chip in TS101 to 0x00018308, register 0x01 to 0x00882900, register 0x04 to the required lower cutoff frequency, register 0x05 to the required upper cutoff frequency, register 0x06 to the required rising digital ramp step length, register 0x07 to the required falling digital ramp step length, register 0x08 to the required digital ramp rate, and register 0x0C to the required digital ramp rate.

[0026] If you want to generate a dot frequency signal, configure the register 0x00 of the AD9914 chip in TS101 to 0x00018308, the register 0x01 to 0x00800900, the register 0x0B to the frequency of the dot frequency output by DDS, and the register 0x0C to the amplitude of the dot frequency output by DDS.

[0027] Step 2: The data configured by TS101 is sent to FPGA through the LINK interface. After receiving the data, FPGA first saves the data, and then transmits it to AD9914 through the SPI interface in the format of register address + register data. After the transmission is completed, a high level is sent to the IOUPDATE port of AD9914, indicating that the data transmission is completed.

[0028] Step 3: After receiving the data and transmission completion instructions, AD9914 generates the corresponding linear frequency modulation signal or dot frequency signal. The minimum frequency of the generated linear frequency modulation signal is 0HZ, the maximum frequency is 1750MHZ, it is continuously adjustable, and the frequency modulation direction is variable. The minimum frequency of the generated dot frequency signal is 0HZ, and the maximum frequency is 1750MHZ.

[0029] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A radar arbitrary waveform generator, characterized in that: include: Host computer, information processing device, frequency synthesizer and transmitter; The host computer is connected to the information processing device, the information processing device is connected to the frequency synthesizer, and the frequency synthesizer is connected to the transmitter; The information processing device includes: a control panel, a Ts101 chip, an FPGA chip and a DDS chip; The control panel is connected to the Ts101 chip, the Ts101 chip is connected to the FPGA chip, and the FPGA chip is connected to the DDS chip.

2. The radar arbitrary waveform generator according to claim 1, characterized in that: include: The DDS chip uses AD9914 chip.

3. The radar arbitrary waveform generator according to claim 1, characterized in that: When the waveform generator generates a linear frequency modulation signal, the register 0x00 of the TS101 chip is configured to 0x00018308, the register 0x01 is configured to 0x00882900, the register 0x04 is configured to the required lower cutoff frequency, the register 0x05 is configured to the required upper cutoff frequency, the register 0x06 is configured to the required rising digital ramp step length, the register 0x07 is configured to the required falling digital ramp step length, the register 0x08 is configured to the required digital ramp rate, and the register 0x0C is configured to the required digital ramp rate.

4. The radar arbitrary waveform generator according to claim 1, characterized in that: When generating a dot frequency signal, register 0x00 of the TS101 chip is configured as 0x00018308, register 0x01 is configured as 0x00800900, register 0x0B is configured as the frequency of the dot frequency output by the DDS, and register 0x0C is configured as the amplitude of the dot frequency output by the DDS.

5. A radar arbitrary waveform generation method, using any one of claims 1 to 4, characterized in that: Compile configuration data through the host computer; The TS101 chip transmits the configuration data to the FPGA chip through the LINK port; After receiving the configuration data, the FPGA chip stores the data and transmits it to the AD9914 chip through the SPI interface in the format of register address and register data. After the transmission is completed, a high level is sent to the IOUPDATE port of the AD9914 chip, indicating that the data transmission is completed. After receiving the data and transmission completion instructions, the AD9914 chip generates a corresponding linear frequency modulation signal or a dot frequency signal; The linear frequency modulation signal or the dot frequency signal is sent to the transmitter through the frequency synthesizer to transmit the signal.

6. The radar arbitrary waveform generation method according to claim 5, characterized in that: The minimum frequency of the linear frequency modulation signal generated is 0HZ, and the maximum frequency is 1750MHZ. The minimum frequency of the dot frequency signal generated is 0HZ, and the maximum frequency is 1750MHZ.