Method and system for monitoring running frequency of processor in electromagnetic transient simulation

Abstract

The invention discloses a method and system for monitoring the running frequency of a processor in electromagnetic transient simulation, and relates to the technical field of power system simulation, and the method comprises the steps: obtaining a plurality of processor cores and simulation running time associated with the electromagnetic transient simulation, carrying out the simulation task distribution of all processor cores, obtaining a target core and a plurality of simulation cores, and carrying out the simulation task distribution of the target core and the simulation cores; the target core is adopted to obtain register data of the simulation sub-tasks corresponding to the simulation cores for solving, operation frequencies of the simulation cores are calculated according to the simulation operation time and the register data, the operation frequencies are compared, and a processor operation frequency monitoring result is obtained. In the prior art, the operating frequency of a multiprocessor core in an electromagnetic transient simulation process is obtained by reading an operating system file so as to adjust the time of electromagnetic transient simulation, but the actual operating frequency of a processor in the electromagnetic transient simulation process is not matched, so that the reliability in the electromagnetic transient simulation process is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power system simulation, and in particular to a method and system for monitoring the operating frequency of a processor in electromagnetic transient simulation. Background Art

[0002] The electromagnetic transient simulation computing platform is a simulation software widely used in the field of power systems. It is used to evaluate the impact of transient phenomena in power systems on the system. Electromagnetic transient simulation has strict time requirements for each link. With the rapid development of new power systems, massive new energy units and power electronic devices are connected to the grid, and the system scale has expanded dramatically, requiring multi-computing nodes and multi-processor core parallel computing to meet the needs of electromagnetic transient simulation of power systems.

[0003] At present, in the electromagnetic transient simulation calculation process, the change of the processor's operating frequency will cause a significant change in the simulation step size of each step, affecting the accuracy of the simulation calculation results and reducing the reliability of the electromagnetic transient simulation process. Summary of the invention

[0004] The present invention provides a method and system for monitoring the operating frequency of a processor in an electromagnetic transient simulation, which solves the technical problem that in the prior art, the operating frequency of multiple processor cores in the electromagnetic transient simulation process is mainly obtained by reading an operating system file / proc / cpuinfo to adjust the time of the electromagnetic transient simulation, but the operating frequency does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process.

[0005] A first aspect of the present invention provides a method for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0006] Acquire multiple processor cores and simulation running time associated with electromagnetic transient simulation, and assign simulation tasks to all the processor cores to obtain a target core and multiple simulation cores;

[0007] Using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask;

[0008] Calculating the operating frequency of each simulation core according to the simulation running time and each of the stored data;

[0009] The operating frequencies are compared to obtain the processor operating frequency monitoring result.

[0010] Furthermore, the step of allocating simulation tasks to all the processor cores to obtain a target core and multiple simulation cores includes:

[0011] Selecting any one of the processor cores from all the processor cores as an initial core, and using the remaining processor cores as simulation cores;

[0012] The initial core is thread bound to obtain the target core.

[0013] Furthermore, the step of using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask includes:

[0014] Acquire the simulation identity of each simulation core through the target core;

[0015] Using all the simulation identity identifiers to perform information labeling operations on the interrupt controller of the target core to obtain the target controller;

[0016] respectively determining whether each of the simulation cores is in a simulation parsing state;

[0017] When the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform a counting operation;

[0018] When the simulation core is not in the simulation parsing state, various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

[0019] Furthermore, the step of calculating the operating frequency of each simulation core according to the simulation running time and each of the stored data includes:

[0020] Respectively performing ratio processing on the first count value of each of the stored data and the simulation running time to obtain a reference frequency corresponding to each of the simulation cores;

[0021] Performing multiplication processing on each of the reference frequencies and the third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each of the simulation cores;

[0022] Ratio processing is performed on each of the first multiplication values ​​and the second count value of the data stored corresponding to the first multiplication value to obtain the operating frequency of each of the simulation cores.

[0023] Furthermore, the step of comparing the operating frequencies to obtain the processor operating frequency monitoring result includes:

[0024] Calculating the difference between each of the operating frequencies respectively to obtain a plurality of first difference values;

[0025] Determining whether each of the first differences is less than or equal to a preset monitoring threshold;

[0026] If each of the first differences is less than or equal to the monitoring threshold, generating a processor operating frequency monitoring result indicating that the processor operating frequency is normal;

[0027] If any of the first differences is greater than the monitoring threshold, a processor operating frequency monitoring result indicating an abnormal processor operating frequency is generated.

[0028] Furthermore, the register group includes a timestamp register, a maximum performance register and an actual performance register.

[0029] A second aspect of the present invention provides a system for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0030] An acquisition module is used to obtain multiple processor cores and simulation running time associated with electromagnetic transient simulation, and to allocate simulation tasks to all the processor cores to obtain a target core and multiple simulation cores;

[0031] A frequency counting module, used to use the target core to obtain the registered data of each simulation core solving the corresponding simulation subtask;

[0032] An analysis module, used for calculating the operating frequency of each simulation core according to the simulation running time and each of the stored data;

[0033] The comparison module is used to compare the operating frequencies to obtain the processor operating frequency monitoring result.

[0034] A third aspect of the present invention provides an electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor executes the steps of the method for monitoring the operating frequency of the processor in electromagnetic transient simulation as described in any one of the above items.

[0035] A fourth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed, implements the method for monitoring the operating frequency of a processor in an electromagnetic transient simulation as described in any one of the above items.

[0036] A fifth aspect of the present invention provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer executes a method for monitoring the operating frequency of a processor in an electromagnetic transient simulation as described in any one of the above items.

[0037] It can be seen from the above technical solutions that the present invention has the following advantages:

[0038] The present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core, and analyzes it in combination with the simulation running time, so as to obtain the running frequency of each simulation core. It overcomes the technical problem that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is obtained by reading the operating system file / proc / cpuinfo in the prior art to adjust the time of the electromagnetic transient simulation, but it does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process. Compared with the traditional operating frequency monitoring method, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core and corrects the reference main frequency in combination with the simulation running time, so as to obtain the accurate running frequency of each simulation core. At the same time, by comparing each running frequency, it is judged whether the electromagnetic transient simulation process is overclocked or downclocked, thereby improving the reliability of the electromagnetic transient simulation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0040] Figure 1 A flowchart of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Embodiment 1 of the present invention;

[0041] Figure 2 A flowchart of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Embodiment 2 of the present invention;

[0042] Figure 3 A schematic diagram of the processor state during the electromagnetic transient simulation process provided by the second embodiment of the present invention;

[0043] Figure 4 A schematic diagram of the processor core hardware provided in the second embodiment of the present invention;

[0044] Figure 5 A schematic diagram of a processor frequency acquisition process provided by an embodiment of the present invention;

[0045] Figure 6 A structural block diagram of a system for monitoring the operating frequency of a processor in electromagnetic transient simulation provided by a third embodiment of the present invention;

[0046] Figure 7 This is a structural block diagram of a computer device provided in Embodiment 4 of the present invention. DETAILED DESCRIPTION

[0047] An embodiment of the present invention provides a method and system for monitoring the operating frequency of a processor in an electromagnetic transient simulation, which is used to solve the technical problem that in the prior art, the operating frequency of multiple processor cores in the electromagnetic transient simulation process is mainly obtained by reading the operating system file / proc / cpuinfo to adjust the time of the electromagnetic transient simulation, but the operating frequency does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process.

[0048] In addition, in order to improve the calculation speed and accuracy, the existing electromagnetic transient simulation usually needs to use multiple CPU cores for parallel calculation. During the simulation process, each CPU core must complete its own tasks and exchange data with other CPU cores. Therefore, the CPU core's main frequency has a significant impact on the simulation calculation speed. The CPU's main frequency, that is, the clock frequency of the CPU core (CPUClockSpeed), generally speaking, the number of instructions completed in one clock cycle is fixed, so the higher the main frequency, the more instructions are executed per unit time, and the less time the CPU takes to complete the same amount of calculation. "

[0049] "In order to better optimize system operation and provide a better user experience, the operating system will reduce the CPU operating frequency, power consumption and temperature when the system load is light, that is, the CPU usage is low, thereby extending the CPU's service life. The operating system's reduction of the CPU's operating frequency when the CPU usage is low is beneficial for most application scenarios, but it will have an adverse effect on electromagnetic transient real-time simulation calculation application scenarios. During the real-time simulation calculation process, the change in the CPU's operating frequency will cause a significant change in the simulation step size of each step, affecting the accuracy of the simulation calculation results."

[0050] “There are two traditional methods for detecting CPU operating frequency.

[0051] Method 1: Read the operating system file / proc / cpuinfo to obtain the CPU main frequency, so as to obtain the CPU operating frequency. However, this method has the following disadvantages: the CPU operating frequency is not constant during the electromagnetic simulation process. When the overclocking feature is enabled in the server BIOS, the CPU operating frequency is allowed to run at a higher frequency than the CPU main frequency indicated in the device manual. In addition, when the server CPU is idle, in order to reduce power consumption, the operating system will enter the power-saving mode through some strategies. At this time, the CPU will run at a lower frequency. The above method obtains the fixed main frequency of the CPU, which does not match the actual operating frequency of the CPU during the electromagnetic simulation process.

[0052] Method 2: Use a program to detect the CPU operating frequency, as follows Figure 2 As shown, first read the current CPUtick count tsc_begin and the current time nanoseconds time1 through the rdtsc instruction, and read the current CPUtick count tsc_end and the current time nanoseconds time2 again after a period of time. Then the CPU running frequency during this period of time is (tsc_end-tsc_begin) / (time2-time1). Although this method can calculate the running frequency of a certain CPU core, it has the following disadvantages. 1) There is a system call when using clock_time to obtain the current system time, so there is a context switch from user mode to kernel mode. The time-consuming context switch is uncontrollable, even at the ms level, so the calculated CPU running frequency has a large error. 2) Most of today's servers are SMP (symmetric multiprocessing) symmetric multiprocessor architectures, that is, a server has multiple CPU cores. The rdtsc instruction reading tsc count method can only read the running frequency of the currently running CPU, and the tsc technology of other CPU cores cannot be read, so this method has certain limitations. 3) Although the TSC counter can calculate the CPU's main frequency, it is inaccurate to use the TSC counter to calculate the CPU frequency when the CPU is overclocked or when the CPU enters power saving mode. The reason is that the counting frequency of the TSC counter is constant.

[0053] To this end, the present invention provides a method for monitoring the operating frequency of the CPU during real-time simulation calculation. When the monitoring method detects that the CPU operating frequency changes during the simulation process, the automatic adjustment of the CPU frequency can be avoided by optimizing the operating system parameters or BIOS parameters, thereby ensuring stable operation of the CPU frequency.

[0054] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0055] See also Figure 1 , Figure 1 A flowchart of the steps of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Embodiment 1 of the present invention.

[0056] The present invention provides a method for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0057] Step 101, obtaining multiple processor cores and simulation running time associated with electromagnetic transient simulation, and allocating simulation tasks to all processor cores to obtain a target core and multiple simulation cores;

[0058] In an embodiment of the present invention, multiple processor cores (i.e., CPU cores) for computing electromagnetic transient simulation and the simulation running time of the electromagnetic transient simulation are obtained. One of all processor cores is randomly selected as the target core, and the remaining processor cores are used as simulation cores, wherein the simulation core is used to execute the computing task of the electromagnetic transient simulation.

[0059] Step 102: using the target core to obtain the stored data of each simulation core for solving the corresponding simulation subtask;

[0060] The registered data refers to the count data obtained by counting the register group when each simulation core solves the corresponding simulation subtask. The count data includes the first count value of the timestamp register, the second count value of the maximum performance register and the third count value of the actual performance register.

[0061] In the embodiment of the present invention, the target core is used to perform IPI operations on each simulation core, and the registered data of each simulation core for solving the corresponding simulation subtask is read.

[0062] It should be noted that the electromagnetic transient simulation test consists of multiple simulation subtasks, each of which is used to perform a certain part of the electromagnetic transient simulation operation. The simulation subtasks are operated in parallel by multiple simulation cores, thereby realizing the operation of the electromagnetic transient simulation model.

[0063] It should be noted that the IPI operation is a mechanism for inter-processor communication, and its main application is that one CPU core asks another core to do something specific. During the IPI operation, the target core will allocate a memory address for each simulation core to store the acquired register data.

[0064] Step 103, calculating the operating frequency of each simulation core according to the simulation running time and each stored data;

[0065] In an embodiment of the present invention, taking a simulation core as an example: the ratio between the first count value and the simulation running time is calculated to obtain the CPU base frequency, the ratio between the third count value and the second count value is calculated to obtain the first ratio, and the multiplication value between the CPU base frequency and the first ratio is calculated to obtain the running frequency of the simulation core.

[0066] Step 104: Compare the various operating frequencies to obtain a processor operating frequency monitoring result.

[0067] In the embodiment of the present invention, the difference between each operating frequency is calculated to obtain multiple operating frequency differences. When any operating frequency difference is greater than a preset monitoring and warning threshold, it indicates that there is a frequency reduction or overclocking phenomenon in the electromagnetic transient simulation process, and a processor operating frequency monitoring result indicating that the processor operating frequency is abnormal is generated. When all operating frequency differences are less than or equal to the preset monitoring and warning threshold, it indicates that there is no abnormality in the electromagnetic transient simulation process, and a processor operating frequency monitoring result indicating that the processor is operating normally is generated.

[0068] In an embodiment of the present invention, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core, and analyzes it in combination with the simulation running time, thereby obtaining the running frequency of each simulation core. This overcomes the technical problem that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is obtained by reading the operating system file / proc / cpuinfo in the prior art to adjust the time used for electromagnetic transient simulation, but it does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process. Compared with the traditional operating frequency monitoring method, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core and corrects the reference main frequency in combination with the simulation running time, thereby obtaining the accurate running frequency of each simulation core. At the same time, by comparing each running frequency, it is determined whether the electromagnetic transient simulation process is overclocked or downclocked, thereby improving the reliability of the electromagnetic transient simulation process.

[0069] See also Figure 2 , Figure 2 A flowchart of the steps of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Embodiment 2 of the present invention.

[0070] The present invention provides a method for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0071] Step 201, obtaining multiple processor cores and simulation running time associated with electromagnetic transient simulation, and allocating simulation tasks to all processor cores to obtain a target core and multiple simulation cores;

[0072] Further, step 201 includes the following sub-steps:

[0073] S11, selecting any processor core from all processor cores as an initial core, and using the remaining processor cores as simulation cores;

[0074] In the embodiment of the present invention, one processor core is randomly selected from all processor cores as the initial core, and the remaining processor cores are used as simulation cores.

[0075] S12, performing thread binding processing on the initial core to obtain the target core.

[0076] In the embodiment of the present invention, a thread binding API interface is used to bind a preset registered data acquisition program to an initial core to obtain a target core.

[0077] Step 202: using the target core to obtain the stored data of each simulation core for solving the corresponding simulation subtask;

[0078] Further, step 202 includes the following sub-steps:

[0079] S21, obtaining the simulation identity of each simulation core through the target core;

[0080] The simulation identity refers to the mask of the simulation core.

[0081] In the embodiment of the present invention, the mask of each simulation core is obtained through the target core.

[0082] S22, using all simulation identity identifiers to perform information labeling operations on the interrupt controller of the target core to obtain the target controller;

[0083] In the embodiment of the present invention, all simulation identities are loaded into the interrupt controller of the target core (ie, the LAPIC device) to obtain the target controller.

[0084] It should be noted that the LAPIC device is an important device for processing interrupts in modern computer architecture. The LAPIC device includes an interrupt request register (IRR), an interrupt service register (ISR), and an interrupt mask register (IMR). The interrupt request register (IRR) is used to receive interrupt request signals from external devices or other interrupt sources. For example, when a key is pressed on the keyboard or the mouse is moved, the relevant device will send an interrupt request to the IRR, and the IRR will record these requests and wait for further processing. The interrupt service register (ISR) is used to transfer the corresponding interrupt vector information from the IRR to the ISR when the LAPIC starts to process an interrupt request. The ISR is mainly used to track the interrupt being processed. For example, when the CPU is processing an interrupt from the completion of disk I / O, the relevant information of the interrupt will be stored in the ISR to indicate that the interrupt is being serviced. The interrupt mask register (IMR) is used to mask specific interrupt requests. For example, during the system initialization phase, if the interrupts of certain devices may interfere with the initialization process, the interrupt requests of these devices can be masked by setting the IMR until the initialization is completed.

[0085] S23, respectively judging whether each simulation core is in a simulation analysis state;

[0086] The simulation analysis status refers to whether the simulation core is performing computational analysis on the electromagnetic transient simulation.

[0087] In the embodiment of the present invention, it is determined whether each simulation core is performing computational analysis on the electromagnetic state simulation.

[0088] S24, when the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform a counting operation;

[0089] In the embodiment of the present invention, when the simulation core is performing operation analysis on the electromagnetic state simulation, the target controller controls the register group of the simulation core to perform counting operation.

[0090] It is worth mentioning that see Figure 4-5 As shown, when performing electromagnetic transient simulation, the target controller will send an Interrupt Message to the simulation core. After receiving the Interrupt Message, the simulation core will check the CPU mask of the message to check whether the CPU core is in the mask. If it is in the mask, the function of reading the TSC, MERF, and APERF registers will be executed, and the read content will be stored in the memory address opened by the target core. When the electromagnetic transient simulation ends, an Interrupt Message will be replied to the target core to indicate the end of the count.

[0091] S25. When the simulation core is not in the simulation parsing state, various count values ​​in the register group are used as the registered data for solving the corresponding simulation subtask by the simulation core.

[0092] In the embodiment of the present invention, when the simulation core is not in the simulation analysis state (ie, the operation analysis of the electromagnetic state simulation is completed), various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

[0093] It should be noted that the register group includes the timestamp register (TSC register), the maximum performance register (MPERF register) and the actual performance register (APERF register). 1. TSC (TimeStamp Counter) timestamp register. This register is 64 bits long and increases at the rate of the CPU base frequency. The RDTSC instruction can read the value of this register. Assuming that the CPU base frequency is 3GHZ, the TSC register count increases by 3 every 1 nanosecond. The register count frequency will not decrease as the CPU frequency decreases, nor will it stop counting as the CPU enters sleep mode. 2. MPERF (Max Performance Frequency Clock Count) register. This register is 64 bits long and increases at the rate of the CPU base frequency. The RDMSR instruction + register number 0xE7 can read the value of this register. Assuming that the CPU base frequency is 3GHZ, the MPERF register count increases by 3 every 1 nanosecond. The register count frequency will not decrease as the CPU frequency decreases, but if the CPU enters sleep mode, the MPERF register will stop counting. 3. APERF (ActualPerformance Frequency Clock Count) register. This register is 64 bits long and increases at the rate of the actual CPU operating frequency. The value of this register can be read by the RDMSR instruction + register number 0xE8. Assuming that the CPU's base frequency is 3GHZ and there is no frequency reduction during CPU operation, the APERF register count increases by 3 for every 1 nanosecond. However, if the CPU is frequency reduced in order to save energy when in idle state, resulting in an actual operating frequency of only 2GHZ, then in the frequency reduction scenario, the APERF register count only increases by 2 for every 1 nanosecond. In addition, when the CPU enters sleep state, the APERF register will also stop counting.

[0094] In another embodiment, see Figure 3As shown in the figure, at time t1, when the electromagnetic transient simulation starts (i.e., the simulation core is in the simulation parsing state), the target controller controls the register group of the simulation core to perform counting operations and read the value of the TSC register as tsc1, the value of the MPERF register as mperf1, and the value of the APERF register as aperf1. At time t2~t3, the CPU enters the sleep state, and the MERF register and APERF register stop counting. When the CPU exits the sleep state, the MPERF register and APERF register continue to count at the base frequency. At t4~t5, the CPU has a low usage rate and the operating system generates a frequency reduction for energy saving. At this time, the MPERF register still counts at the CPU base frequency, while the APERF register counts at a lower frequency. When the CPU exits the frequency reduction state, the APERF register resumes counting at the CPU base frequency. At time t6, the electromagnetic transient simulation program ends, and the target controller reads the / proc / msr file to read the TSC register to obtain the value tsc2, the MPERF register to obtain the value mperf2, and the APERF register to obtain the value aperf2.

[0095] Step 203, calculating the operating frequency of each simulation core according to the simulation running time and each stored data;

[0096] Further, step 203 includes the following sub-steps:

[0097] S31, performing ratio processing on the first count value of each stored data and the simulation running time respectively to obtain the reference frequency corresponding to each simulation core;

[0098] In the embodiment of the present invention, the first count value (ie, tsc2-tsc1) of each registered data is ratio-processed with the simulation running time to obtain the reference frequency corresponding to each simulation core.

[0099] S32, respectively multiplying each reference frequency by the third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each simulation core;

[0100] In the embodiment of the present invention, each reference frequency is multiplied by the third count value (ie, aperf2-aperf1) of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each simulation core.

[0101] S33, performing ratio processing on each first multiplication value and the second count value of the data stored corresponding to the first multiplication value, to obtain the operating frequency of each simulation core.

[0102] In the embodiment of the present invention, each first multiplication value is ratio-processed with the second count value (ie, mperf2-mperf1) of the data stored corresponding to the first multiplication value to obtain the operating frequency of each simulation core.

[0103] Step 204, respectively calculating the difference between the operating frequencies to obtain a plurality of first difference values;

[0104] In the embodiment of the present invention, the differences between the operating frequencies are calculated respectively to obtain a plurality of first differences.

[0105] Step 205: determine whether each first difference is less than or equal to a preset monitoring threshold;

[0106] Step 206: If each of the first differences is less than or equal to the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is normal is generated;

[0107] In an embodiment of the present invention, it is determined whether each first difference is less than or equal to a preset monitoring threshold. When each first difference is less than or equal to the monitoring threshold, it indicates that the multi-processor core has not been overclocked or downclocked when performing computational analysis on electromagnetic transient simulation to generate a processor operating frequency monitoring result in which the processor operating frequency is normal.

[0108] Step 207: If any first difference is greater than the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is abnormal is generated.

[0109] In the embodiment of the present invention, when any first difference is greater than the monitoring threshold, it indicates that the multi-processor core is overclocked or underclocked when performing computational analysis on electromagnetic transient simulation, generating a processor operating frequency monitoring result indicating an abnormal processor operating frequency.

[0110] In an embodiment of the present invention, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core, and analyzes it in combination with the simulation running time, thereby obtaining the running frequency of each simulation core. This overcomes the technical problem that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is obtained by reading the operating system file / proc / cpuinfo in the prior art to adjust the time used for electromagnetic transient simulation, but it does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process. Compared with the traditional operating frequency monitoring method, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core and corrects the reference main frequency in combination with the simulation running time, thereby obtaining the accurate running frequency of each simulation core. At the same time, by comparing each running frequency, it is determined whether the electromagnetic transient simulation process is overclocked or downclocked, thereby improving the reliability of the electromagnetic transient simulation process.

[0111] See also Figure 6 , Figure 6 This is a structural block diagram of a system for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Example 3.

[0112] The present invention provides a system for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0113] The acquisition module 301 is used to obtain multiple processor cores and simulation running time associated with the electromagnetic transient simulation, and to allocate simulation tasks to all processor cores to obtain a target core and multiple simulation cores;

[0114] A frequency counting module 302 is used to use the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask;

[0115] An analysis module 303 is used to calculate the operating frequency of each simulation core according to the simulation running time and each registered data;

[0116] The comparison module 304 is used to compare various operating frequencies to obtain the processor operating frequency monitoring result.

[0117] Furthermore, the acquisition module 301 includes:

[0118] A selection submodule is used to select any processor core from all processor cores as an initial core and use the remaining processor cores as simulation cores;

[0119] The binding submodule is used to perform thread binding processing on the initial core to obtain the target core.

[0120] Furthermore, the frequency counting module 302 includes:

[0121] The identification submodule is used to obtain the simulation identity of each simulation core through the target core;

[0122] A labeling submodule is used to perform information labeling operation on the interrupt controller of the target core using all simulation identity identifiers to obtain the target controller;

[0123] The first analysis submodule is used to determine whether each simulation core is in a simulation analysis state;

[0124] When the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform counting operations;

[0125] When the simulation core is not in the simulation parsing state, various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

[0126] Furthermore, the analysis module 303 includes:

[0127] The second analysis submodule is used to perform ratio processing on the first count value of each stored data and the simulation running time to obtain the reference frequency corresponding to each simulation core;

[0128] A third analysis submodule is used to perform multiplication processing on each reference frequency and a third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each simulation core;

[0129] The fourth analysis submodule is used to perform ratio processing on each first multiplication value and the second count value of the data stored corresponding to the first multiplication value to obtain the operating frequency of each simulation core.

[0130] Furthermore, the comparison module 304 includes:

[0131] A fifth analysis submodule, used to respectively calculate the difference between each operating frequency to obtain a plurality of first difference values;

[0132] A sixth analysis submodule, used to determine whether each first difference is less than or equal to a preset monitoring threshold;

[0133] If each of the first difference values ​​is less than or equal to the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is normal is generated;

[0134] If any first difference is greater than the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is abnormal is generated.

[0135] Furthermore, the register group includes a timestamp register, a maximum performance register and an actual performance register.

[0136] See also Figure 7 , Figure 7 This is a structural block diagram of a computer device provided in Embodiment 4 of the present invention.

[0137] An electronic device according to an embodiment of the present invention includes: a memory 401 and a processor 402, wherein the memory 402 stores a computer program; when the computer program is executed by the processor 402, the processor 402 executes a method for monitoring the operating frequency of the processor in electromagnetic transient simulation as described in any of the above embodiments.

[0138] The memory 401 may be an electronic memory such as a flash memory, an EEPROM (electrically erasable programmable read-only memory), an EPROM, a hard disk or a ROM. The memory 401 has a storage space 403 for a program code 413 for executing any method step in the above method. For example, the storage space 403 for the program code may include individual program codes 413 for implementing the various steps in the above method, respectively. These program codes may be read from or written to one or more computer program products. These computer program products include program code carriers such as hard disks, compact disks (CDs), memory cards or floppy disks. The program code may be compressed, for example, in an appropriate form. When these codes are run by a computing and processing device, the computing and processing device performs the various steps in the method described above. These program codes may be read from or written to one or more computer program products. These computer program products include program code carriers such as hard disks, compact disks (CDs), memory cards or floppy disks. The program code may be compressed, for example, in an appropriate form. When these codes are executed by a computing and processing device, they cause the computing and processing device to execute the steps of the method for monitoring the operating frequency of a processor in electromagnetic transient simulation described above.

[0139] Embodiment 5 of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the method for monitoring the operating frequency of a processor in electromagnetic transient simulation as described in any of the above embodiments is implemented.

[0140] Embodiment 6 of the present invention further provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer executes a method for monitoring the operating frequency of a processor in an electromagnetic transient simulation as described in any of the above embodiments.

[0141] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0142] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0143] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0144] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0145] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0146] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for monitoring the operating frequency of a processor in electromagnetic transient simulation, characterized in that: include: Acquire multiple processor cores and simulation running time associated with electromagnetic transient simulation, and assign simulation tasks to all the processor cores to obtain a target core and multiple simulation cores; Using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask; Calculating the operating frequency of each simulation core according to the simulation running time and each of the stored data; The operating frequencies are compared to obtain the processor operating frequency monitoring result.

2. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The step of allocating simulation tasks to all the processor cores to obtain a target core and multiple simulation cores includes: Selecting any one of the processor cores from all the processor cores as an initial core, and using the remaining processor cores as simulation cores; The initial core is thread bound to obtain the target core.

3. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The step of using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask includes: Acquire the simulation identity of each simulation core through the target core; Using all the simulation identity identifiers to perform information labeling operations on the interrupt controller of the target core to obtain the target controller; respectively determining whether each of the simulation cores is in a simulation parsing state; When the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform a counting operation; When the simulation core is not in the simulation parsing state, various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

4. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The step of calculating the operating frequency of each simulation core according to the simulation running time and each of the registered data comprises: Respectively performing ratio processing on the first count value of each of the stored data and the simulation running time to obtain a reference frequency corresponding to each of the simulation cores; Performing multiplication processing on each of the reference frequencies and the third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each of the simulation cores; Ratio processing is performed on each of the first multiplication values ​​and the second count value of the data stored corresponding to the first multiplication value to obtain the operating frequency of each of the simulation cores.

5. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The step of comparing the operating frequencies to obtain the processor operating frequency monitoring result includes: Calculating the difference between each of the operating frequencies respectively to obtain a plurality of first difference values; Determining whether each of the first differences is less than or equal to a preset monitoring threshold; If each of the first differences is less than or equal to the monitoring threshold, generating a processor operating frequency monitoring result indicating that the processor operating frequency is normal; If any of the first differences is greater than the monitoring threshold, a processor operating frequency monitoring result indicating an abnormal processor operating frequency is generated.

6. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 3, characterized in that: The register group includes a timestamp register, a maximum performance register and an actual performance register.

7. A system for monitoring the operating frequency of a processor in electromagnetic transient simulation, characterized in that: include: An acquisition module is used to obtain multiple processor cores and simulation running time associated with electromagnetic transient simulation, and to allocate simulation tasks to all the processor cores to obtain a target core and multiple simulation cores; A frequency counting module, used to use the target core to obtain the registered data of each simulation core solving the corresponding simulation subtask; An analysis module, used for calculating the operating frequency of each simulation core according to the simulation running time and each of the stored data; The comparison module is used to compare the operating frequencies to obtain the processor operating frequency monitoring result.

8. An electronic device, characterized in that: It comprises a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor executes the steps of the method for monitoring the operating frequency of the processor in the electromagnetic transient simulation as described in any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed, the method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to any one of claims 1 to 6 is implemented.

10. A computer program product, characterized in that The computer program product includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer executes the method for monitoring the operating frequency of a processor in an electromagnetic transient simulation as described in any one of claims 1 to 6.

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