A method and system for monitoring processor operating frequency in electromagnetic transient simulation

Abstract

The present invention discloses a method and system for monitoring the operating frequency of a processor in electromagnetic transient simulation, relating to the technical field of power system simulation. The method obtains multiple processor cores and simulation run times associated with the electromagnetic transient simulation, and performs simulation task allocation on all processor cores to obtain a target core and multiple simulation cores. The target core is used to obtain the register data of each simulation core for solving corresponding simulation subtasks. Based on the simulation run time and the register data, the operating frequency of each simulation core is calculated. The operating frequencies are compared to obtain processor operating frequency monitoring results. In the prior art, the operating frequencies of multiple processor cores during electromagnetic transient simulation are obtained by reading operating system files to adjust the duration of the electromagnetic transient simulation. However, this method does not match the actual operating frequency of the processor during the electromagnetic transient simulation, thereby reducing the reliability of the electromagnetic transient simulation process.

Description

Technical Field

[0001] The present invention relates to the technical field of power system simulation, and in particular to a method and system for monitoring the operating frequency of a processor in electromagnetic transient simulation. Background Art

[0002] The electromagnetic transient simulation computing platform is a widely used simulation software in the power system field, used to assess the impact of transient phenomena in power systems. Electromagnetic transient simulation places stringent time constraints on each step. With the rapid development of new power systems and the integration of massive amounts of renewable energy generators and power electronic devices, the scale of systems has expanded dramatically, necessitating parallel computing across multiple computing nodes and processor cores to meet the demands of power system electromagnetic transient simulation.

[0003] At present, during the electromagnetic transient simulation calculation process, changes in the processor's operating frequency will cause significant changes in the simulation step size of each step, affecting the accuracy of the simulation calculation results and reducing the reliability of the electromagnetic transient simulation process. Summary of the Invention

[0004] The present invention provides a method and system for monitoring the operating frequency of a processor in an electromagnetic transient simulation, which solves the technical problem in the prior art that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is mainly obtained by reading the operating system file / proc / cpuinfo to adjust the time of the electromagnetic transient simulation, but the operating frequency does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process.

[0005] A first aspect of the present invention provides a method for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0006] Acquire multiple processor cores and simulation running times associated with electromagnetic transient simulation, and assign simulation tasks to all the processor cores to obtain a target core and multiple simulation cores;

[0007] Using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask;

[0008] Calculating the operating frequency of each simulation core according to the simulation running time and each of the registered data;

[0009] The operating frequencies are compared to obtain a processor operating frequency monitoring result.

[0010] Furthermore, the step of allocating simulation tasks to all the processor cores to obtain a target core and multiple simulation cores includes:

[0011] Selecting any one of the processor cores from all the processor cores as an initial core, and using the remaining processor cores as simulation cores;

[0012] The initial core is thread-bound to obtain the target core.

[0013] Furthermore, the step of using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask includes:

[0014] Acquire the simulation identity of each simulation core through the target core;

[0015] Using all of the simulation identity identifiers, an information tagging operation is performed on the interrupt controller of the target core to obtain a target controller;

[0016] respectively determining whether each of the simulation cores is in a simulation parsing state;

[0017] When the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform a counting operation;

[0018] When the simulation core is not in the simulation parsing state, the various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

[0019] Furthermore, the step of calculating the operating frequency of each simulation core according to the simulation running time and each of the registered data includes:

[0020] performing a ratio processing on the first count value of each of the registered data and the simulation running time to obtain a reference frequency corresponding to each of the simulation cores;

[0021] performing multiplication processing on each of the reference frequencies and the third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each of the simulation cores;

[0022] Each of the first multiplication values ​​is respectively subjected to ratio processing with a second count value of the registered data corresponding to the first multiplication value to obtain an operating frequency of each of the simulation cores.

[0023] Furthermore, the step of comparing the operating frequencies to obtain a processor operating frequency monitoring result includes:

[0024] respectively calculating the difference between the operating frequencies to obtain a plurality of first difference values;

[0025] Determining whether each of the first differences is less than or equal to a preset monitoring threshold;

[0026] If each of the first differences is less than or equal to the monitoring threshold, generating a processor operating frequency monitoring result indicating that the processor operating frequency is normal;

[0027] If any of the first differences is greater than the monitoring threshold, a processor operating frequency monitoring result indicating an abnormal processor operating frequency is generated.

[0028] Furthermore, the register group includes a timestamp register, a maximum performance register and an actual performance register.

[0029] A second aspect of the present invention provides a system for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0030] an acquisition module, configured to obtain multiple processor cores and simulation running time associated with electromagnetic transient simulation, and to allocate simulation tasks to all the processor cores to obtain a target core and multiple simulation cores;

[0031] A frequency counting module, configured to use the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask;

[0032] An analysis module, configured to calculate an operating frequency of each simulation core according to the simulation running time and each of the registered data;

[0033] The comparison module is used to compare the operating frequencies to obtain a processor operating frequency monitoring result.

[0034] A third aspect of the present invention provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor executes the steps of the method for monitoring the processor operating frequency in electromagnetic transient simulation as described in any one of the above items.

[0035] A fourth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed, the method for monitoring the operating frequency of a processor in electromagnetic transient simulation as described in any one of the above items is implemented.

[0036] A fifth aspect of the present invention provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer executes the method for monitoring the processor operating frequency in electromagnetic transient simulation as described in any one of the above items.

[0037] It can be seen from the above technical solutions that the present invention has the following advantages:

[0038] The present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core, and analyzes it in combination with the simulation running time, thereby obtaining the operating frequency of each simulation core. This overcomes the technical problem in the prior art that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is obtained by reading the operating system file / proc / cpuinfo to adjust the time used for electromagnetic transient simulation, but does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process. Compared with the traditional operating frequency monitoring method, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core and corrects the reference main frequency in combination with the simulation running time, thereby obtaining the accurate operating frequency of each simulation core. At the same time, by comparing the various operating frequencies, it is possible to determine whether the electromagnetic transient simulation process is overclocked or downclocked, thereby improving the reliability of the electromagnetic transient simulation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0040] Figure 1 A flowchart of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in the first embodiment of the present invention;

[0041] Figure 2 A flowchart of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in the second embodiment of the present invention;

[0042] Figure 3 A schematic diagram of the processor state during the electromagnetic transient simulation process provided by the second embodiment of the present invention;

[0043] Figure 4 A schematic diagram of the processor core hardware provided in the second embodiment of the present invention;

[0044] Figure 5 A schematic diagram of a processor frequency acquisition process according to an embodiment of the present invention;

[0045] Figure 6 This is a structural block diagram of a system for monitoring the operating frequency of a processor in electromagnetic transient simulation provided by the third embodiment of the present invention;

[0046] Figure 7 This is a structural block diagram of a computer device provided in Example 4 of the present invention. DETAILED DESCRIPTION

[0047] An embodiment of the present invention provides a method and system for monitoring the operating frequency of a processor in an electromagnetic transient simulation, which is used to solve the technical problem in the prior art that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is mainly obtained by reading the operating system file / proc / cpuinfo to adjust the time of the electromagnetic transient simulation, but the operating frequency does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process.

[0048] Furthermore, existing electromagnetic transient simulations typically require parallel computing using multiple CPU cores to improve computational speed and accuracy. During the simulation process, each CPU core must both complete its own tasks and exchange data with other CPU cores. Therefore, the CPU core's clock speed significantly impacts simulation speed. The CPU clock speed, or the CPU core's operating clock rate (CPU Clock Speed), generally has a fixed number of instructions executed per clock cycle. Therefore, a higher clock speed means more instructions can be executed per unit time, resulting in less CPU time required to complete the same computational workload.

[0049] "To optimize system operation and provide a better user experience, the operating system reduces the CPU's operating frequency when the system load is light, meaning CPU usage is low. This reduces power consumption and temperature, thereby extending the CPU's lifespan. While this is beneficial for most applications, it can have an adverse effect on electromagnetic transient real-time simulation scenarios. During real-time simulations, changes in the CPU's operating frequency can significantly alter the simulation step size, affecting the accuracy of the simulation results."

[0050] There are two traditional methods for detecting CPU operating frequency.

[0051] Method 1: Read the operating system file / proc / cpuinfo to obtain the CPU's main frequency, thereby obtaining the CPU's operating frequency. However, this method has the following drawbacks: The CPU's operating frequency is not constant during electromagnetic simulation. If the overclocking feature is enabled in the server BIOS, the CPU can run at a higher frequency than the CPU main frequency specified in the device manual. In addition, when the server CPU is idle, the operating system uses certain policies to enter power-saving mode to reduce power consumption. During this time, the CPU runs at a lower frequency. However, this method only obtains a fixed CPU main frequency, which does not match the actual CPU operating frequency during electromagnetic simulation.

[0052] Method 2: Use a program to detect the CPU operating frequency, as follows Figure 2 As shown, the rdtsc instruction first reads the current CPU tick count tsc_begin and the current time in nanoseconds time1. After a period of time, the current CPU tick count tsc_end and the current time in nanoseconds time2 are read again. The CPU frequency during this period is then calculated as (tsc_end – tsc_begin) / (time2 – time1). Although this method can calculate the operating frequency of a specific CPU core, it has the following disadvantages. 1) Using clock_time to obtain the current system time involves a system call, which results in a context switch from user mode to kernel mode. The context switch time is uncontrollable and can even take milliseconds, resulting in large errors in the calculated CPU operating frequency. 2) Most servers today use an SMP (symmetric multiprocessing) architecture, meaning a server has multiple CPU cores. The rdtsc instruction method of reading the TSC count can only read the operating frequency of the currently running CPU and cannot read the TSC technology of other CPU cores. Therefore, this method has certain limitations. 3) Although the TSC counter can calculate the CPU's main frequency, it is inaccurate to use the TSC counter to calculate the CPU frequency when the CPU is overclocked or when the CPU enters power saving mode. The reason is that the counting frequency of the TSC counter is constant.

[0053] To this end, the present invention provides a method for monitoring the operating frequency of the CPU during real-time simulation calculation. When the monitoring method detects that the CPU operating frequency has changed during the simulation process, the automatic adjustment of the CPU frequency can be avoided by optimizing the operating system parameters or BIOS parameters, thereby ensuring stable operation of the CPU frequency.

[0054] In order to make the purpose, features, and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0055] See also Figure 1 , Figure 1 This is a flowchart of the steps of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Example 1 of the present invention.

[0056] The present invention provides a method for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0057] Step 101: Acquire multiple processor cores and simulation run times associated with electromagnetic transient simulation, and assign simulation tasks to all processor cores to obtain a target core and multiple simulation cores.

[0058] In this embodiment of the present invention, multiple processor cores (i.e., CPU cores) performing electromagnetic transient simulation operations and the simulation runtime of the electromagnetic transient simulation are obtained. One of the processor cores is randomly selected as the target core, and the remaining processor cores are used as simulation cores. The simulation cores are used to perform electromagnetic transient simulation operations.

[0059] Step 102: Using the target core, obtain the registered data of each simulation core for solving the corresponding simulation subtask;

[0060] Registered data refers to the count data obtained by the register group when each simulation core solves the corresponding simulation subtask. The count data includes the first count value of the timestamp register, the second count value of the maximum performance register, and the third count value of the actual performance register.

[0061] In the embodiment of the present invention, the target core is used to perform IPI operations on each simulation core, and read the registered data of each simulation core to solve the corresponding simulation subtask.

[0062] It should be noted that the electromagnetic transient simulation test consists of multiple simulation subtasks, each of which is used to perform operations on a certain part of the electromagnetic transient simulation. The multiple simulation cores are used to perform parallel operations on the simulation subtasks, thereby realizing the operation of the electromagnetic transient simulation model.

[0063] It should be noted that IPI operations are a mechanism for inter-processor communication, primarily used when one CPU core instructs another to perform specific tasks. During an IPI operation, the target core allocates a memory address to each simulated core to store the acquired register data.

[0064] Step 103: Calculate the operating frequency of each simulation core based on the simulation running time and each registered data;

[0065] In an embodiment of the present invention, taking a simulation core as an example: the ratio between the first count value and the simulation running time is calculated to obtain the CPU base frequency, the ratio between the third count value and the second count value is calculated to obtain the first ratio, and the multiplication value between the CPU base frequency and the first ratio is calculated to obtain the running frequency of the simulation core.

[0066] Step 104: Compare the various operating frequencies to obtain a processor operating frequency monitoring result.

[0067] In an embodiment of the present invention, the differences between the various operating frequencies are calculated to obtain multiple operating frequency differences. When any operating frequency difference is greater than a preset monitoring and warning threshold, it indicates that underclocking or overclocking occurs during the electromagnetic transient simulation process, and a processor operating frequency monitoring result indicating an abnormal processor operating frequency is generated. When all operating frequency differences are less than or equal to the preset monitoring and warning threshold, it indicates that there are no abnormalities during the electromagnetic transient simulation process, and a processor operating frequency monitoring result indicating normal processor operation is generated.

[0068] In an embodiment of the present invention, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core, and analyzes it in combination with the simulation running time, thereby obtaining the operating frequency of each simulation core. This overcomes the technical problem in the prior art that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is obtained by reading the operating system file / proc / cpuinfo to adjust the time used for electromagnetic transient simulation, but does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process. Compared with the traditional operating frequency monitoring method, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core and corrects the reference main frequency in combination with the simulation running time, thereby obtaining the accurate operating frequency of each simulation core. At the same time, by comparing the various operating frequencies, it is possible to determine whether the electromagnetic transient simulation process is overclocked or downclocked, thereby improving the reliability of the electromagnetic transient simulation process.

[0069] See also Figure 2 , Figure 2 This is a flowchart of the steps of a method for monitoring the operating frequency of a processor in electromagnetic transient simulation provided by the second embodiment of the present invention.

[0070] The present invention provides a method for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0071] Step 201: Acquire multiple processor cores and simulation run times associated with electromagnetic transient simulation, and assign simulation tasks to all processor cores to obtain a target core and multiple simulation cores.

[0072] Furthermore, step 201 includes the following sub-steps:

[0073] S11, selecting any processor core from all processor cores as an initial core, and using the remaining processor cores as simulation cores;

[0074] In the embodiment of the present invention, one processor core is randomly selected from all processor cores as the initial core, and the remaining processor cores are used as simulation cores.

[0075] S12: Perform thread binding processing on the initial core to obtain the target core.

[0076] In the embodiment of the present invention, a thread binding API interface is used to bind a preset registered data acquisition program to an initial core to obtain a target core.

[0077] Step 202: Using the target core, obtain the registered data of each simulation core for solving the corresponding simulation subtask;

[0078] Furthermore, step 202 includes the following sub-steps:

[0079] S21, obtaining the simulation identity of each simulation core through the target core;

[0080] The simulation identity refers to the mask of the simulation core.

[0081] In the embodiment of the present invention, the mask of each simulation core is obtained through the target core.

[0082] S22, using all simulation identity identifiers to perform information labeling operations on the interrupt controller of the target core to obtain the target controller;

[0083] In an embodiment of the present invention, all simulation identities are loaded into an interrupt controller (ie, a LAPIC device) of a target core to obtain a target controller.

[0084] It's important to note that the LAPIC is a crucial interrupt processing device in modern computer architectures. It includes an interrupt request register (IRR), an interrupt service register (ISR), and an interrupt mask register (IMR). The IRR receives interrupt request signals from external devices or other interrupt sources. For example, when a keyboard key is pressed or a mouse is moved, the device sends an interrupt request to the IRR, which records these requests for further processing. The ISR transfers the corresponding interrupt vector information from the IRR to the ISR when the LAPIC begins processing an interrupt request. The ISR primarily tracks the interrupt being processed. For example, when the CPU is processing an interrupt from a disk I / O completion, information about the interrupt is stored in the ISR to indicate that the interrupt is being serviced. The IMR is used to mask specific interrupt requests. For example, during system initialization, if interrupts from certain devices might interfere with the initialization process, the IMR can be set to mask these interrupt requests until initialization is complete.

[0085] S23, respectively determine whether each simulation core is in the simulation analysis state;

[0086] The simulation analysis status refers to whether the simulation core is performing computational analysis on the electromagnetic transient simulation.

[0087] In the embodiment of the present invention, it is determined whether each simulation core is performing computational analysis on the electromagnetic state simulation.

[0088] S24, when the simulation core is in the simulation parsing state, controlling the register group of the simulation core to perform a counting operation through the target controller;

[0089] In the embodiment of the present invention, when the simulation core is performing operation analysis on the electromagnetic state simulation, the target controller controls the register group of the simulation core to perform counting operations.

[0090] It is worth mentioning that see Figure 4-5 As shown in the figure, when performing electromagnetic transient simulation, the target controller will send an Interrupt Message to the simulation core. After receiving the Interrupt Message, the simulation core will check the CPU mask of the message to see if the CPU core is in the mask. If it is in the mask, it will execute the function of reading the TSC, MERF, and APERF registers, and store the read content in the memory address opened by the target core. When the electromagnetic transient simulation ends, an Interrupt Message will be replied to the target core to indicate the end of the count.

[0091] S25. When the simulation core is not in the simulation parsing state, the various count values ​​in the register group are used as the registered data for solving the corresponding simulation subtask by the simulation core.

[0092] In an embodiment of the present invention, when the simulation core is not in the simulation analysis state (ie, the operation analysis of the electromagnetic state simulation is completed), the various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

[0093] It should be noted that the register group includes the timestamp register (TSC), the maximum performance register (MPERF), and the actual performance register (APERF). 1. The TSC (Timestamp Counter) register. This register is 64 bits long and increments at the rate of the CPU's base frequency. The RDTSC instruction can be used to read its value. Assuming the CPU's base frequency is 3 GHz, the TSC register increments by 3 every nanosecond. This register's counting frequency does not decrease with a CPU frequency reduction, nor does it stop counting when the CPU enters sleep mode. 2. The MPERF (Maximum Performance Frequency Clock Count) register. This register is 64 bits long and increments at the rate of the CPU's base frequency. The RDMSR instruction followed by register number 0xE7 can be used to read its value. Assuming the CPU's base frequency is 3 GHz, the MPERF register increments by 3 every nanosecond. This register's counting frequency does not decrease with a CPU frequency reduction, but it stops counting when the CPU enters sleep mode. 3. APERF (Actual Performance Frequency Clock Count) register. This register is 64 bits long and increments at the rate of the CPU's actual operating frequency. The value of this register can be read using the RDMSR instruction followed by register number 0xE8. Assuming the CPU's base frequency is 3 GHz and there is no frequency reduction during CPU operation, the APERF register count increases by 3 every nanosecond. However, if the CPU frequency is reduced to save power during idle mode, resulting in an actual operating frequency of only 2 GHz, the APERF register count increases by only 2 every nanosecond in this frequency reduction scenario. Furthermore, the APERF register stops counting when the CPU enters sleep mode.

[0094] In another embodiment, see Figure 3As shown in the figure, at time t1, when the electromagnetic transient simulation begins (i.e., the simulation core is in the simulation analysis state), the target controller controls the simulation core's registers to perform counting operations and reads the TSC register value as tsc1, the MPERF register value as mperf1, and the APERF register value as aperf1. Between t2 and t3, the CPU enters sleep mode, and the MERF and APERF registers stop counting. When the CPU exits sleep mode, the MPERF and APERF registers resume counting at the base clock frequency. Between t4 and t5, due to low CPU usage, the operating system reduces the CPU's frequency to save energy. At this time, the MPERF register continues counting at the CPU's base clock frequency, while the APERF register counts at a lower frequency. When the CPU exits the reduced clock frequency state, the APERF register resumes counting at the CPU's base clock frequency. At time t6, the electromagnetic transient simulation program ends, and the target controller reads the / proc / msr file to read the TSC register and obtain the value tsc2, the MPERF register value mperf2, and the APERF register value aperf2.

[0095] Step 203: Calculate the operating frequency of each simulation core based on the simulation running time and each registered data;

[0096] Furthermore, step 203 includes the following sub-steps:

[0097] S31, performing ratio processing on the first count value of each stored data and the simulation running time to obtain the reference frequency corresponding to each simulation core;

[0098] In the embodiment of the present invention, the first count value of each registered data (ie, tsc2 - tsc1) is respectively compared with the simulation running time to obtain the reference frequency corresponding to each simulation core.

[0099] S32, multiplying each reference frequency by the third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each simulation core;

[0100] In the embodiment of the present invention, each reference frequency is multiplied by the third count value (ie, aperf2 - aperf1) of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each simulation core.

[0101] S33 , performing ratio processing on each first multiplication value and the second count value of the registered data corresponding to the first multiplication value to obtain the operating frequency of each simulation core.

[0102] In the embodiment of the present invention, each first multiplication value is ratio-processed with the second count value (ie, mperf2 - mperf1) of the registered data corresponding to the first multiplication value to obtain the operating frequency of each simulation core.

[0103] Step 204: Calculate the difference between each operating frequency to obtain a plurality of first difference values;

[0104] In the embodiment of the present invention, the differences between the operating frequencies are calculated respectively to obtain a plurality of first differences.

[0105] Step 205: Determine whether each first difference is less than or equal to a preset monitoring threshold;

[0106] Step 206: If all first differences are less than or equal to the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is normal is generated;

[0107] In an embodiment of the present invention, it is determined whether each first difference is less than or equal to a preset monitoring threshold. When each first difference is less than or equal to the monitoring threshold, it indicates that the multi-processor core has not been overclocked or downclocked when performing computational analysis on electromagnetic transient simulation, and a processor operating frequency monitoring result is generated, indicating that the processor operating frequency is normal.

[0108] Step 207: If any first difference is greater than the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is abnormal is generated.

[0109] In an embodiment of the present invention, when any first difference is greater than the monitoring threshold, it indicates that the multi-processor core is overclocked or underclocked when performing computational analysis on electromagnetic transient simulation, generating a processor operating frequency monitoring result indicating abnormal processor operating frequency.

[0110] In an embodiment of the present invention, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core, and analyzes it in combination with the simulation running time, thereby obtaining the operating frequency of each simulation core. This overcomes the technical problem in the prior art that the operating frequency of multiple processor cores in the electromagnetic transient simulation process is obtained by reading the operating system file / proc / cpuinfo to adjust the time used for electromagnetic transient simulation, but does not match the actual operating frequency of the processor in the electromagnetic transient simulation process, thereby reducing the reliability of the electromagnetic transient simulation process. Compared with the traditional operating frequency monitoring method, the present invention obtains the register data of each simulation core to solve the corresponding simulation subtask through the target core and corrects the reference main frequency in combination with the simulation running time, thereby obtaining the accurate operating frequency of each simulation core. At the same time, by comparing the various operating frequencies, it is possible to determine whether the electromagnetic transient simulation process is overclocked or downclocked, thereby improving the reliability of the electromagnetic transient simulation process.

[0111] See also Figure 6 , Figure 6 This is a structural block diagram of a system for monitoring the operating frequency of a processor in electromagnetic transient simulation provided in Example 3.

[0112] The present invention provides a system for monitoring the operating frequency of a processor in electromagnetic transient simulation, comprising:

[0113] The acquisition module 301 is used to obtain multiple processor cores and simulation running time associated with the electromagnetic transient simulation, and to allocate simulation tasks to all processor cores to obtain a target core and multiple simulation cores;

[0114] A frequency counting module 302 is used to obtain the registered data of each simulation core solving the corresponding simulation subtask using the target core;

[0115] An analysis module 303 is configured to calculate the operating frequency of each simulation core based on the simulation running time and each registered data;

[0116] The comparison module 304 is used to compare the various operating frequencies to obtain a processor operating frequency monitoring result.

[0117] Furthermore, the acquisition module 301 includes:

[0118] A selection submodule is used to select any processor core from all processor cores as an initial core and use the remaining processor cores as simulation cores;

[0119] The binding submodule is used to perform thread binding processing on the initial core to obtain the target core.

[0120] Furthermore, the frequency counting module 302 includes:

[0121] The identification submodule is used to obtain the simulation identity of each simulation core through the target core;

[0122] The labeling submodule is used to perform information labeling operations on the interrupt controller of the target core using all simulation identity identifiers to obtain the target controller;

[0123] The first analysis submodule is used to determine whether each simulation core is in a simulation analysis state;

[0124] When the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform counting operations;

[0125] When the simulation core is not in the simulation parsing state, the various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

[0126] Furthermore, the analysis module 303 includes:

[0127] The second analysis submodule is used to perform ratio processing on the first count value of each stored data and the simulation running time to obtain the reference frequency corresponding to each simulation core;

[0128] a third analysis submodule, configured to perform multiplication processing on each reference frequency and a third count value of the registered data corresponding to the reference frequency, to obtain a first multiplication value corresponding to each simulation core;

[0129] The fourth analysis submodule is configured to perform ratio processing on each first multiplication value and the second count value of the data stored corresponding to the first multiplication value, so as to obtain the operating frequency of each simulation core.

[0130] Furthermore, the comparison module 304 includes:

[0131] a fifth analysis submodule, configured to calculate the difference between each operating frequency to obtain a plurality of first difference values;

[0132] a sixth analysis submodule, configured to determine whether each first difference is less than or equal to a preset monitoring threshold;

[0133] If each of the first differences is less than or equal to the monitoring threshold, generating a processor operating frequency monitoring result indicating that the processor operating frequency is normal;

[0134] If any first difference is greater than the monitoring threshold, a processor operating frequency monitoring result indicating that the processor operating frequency is abnormal is generated.

[0135] Furthermore, the register group includes a timestamp register, a maximum performance register, and an actual performance register.

[0136] See also Figure 7 , Figure 7 This is a structural block diagram of a computer device provided in Example 4 of the present invention.

[0137] An electronic device according to an embodiment of the present invention includes: a memory 401 and a processor 402, wherein the memory 402 stores a computer program; when the computer program is executed by the processor 402, the processor 402 executes the method for monitoring the processor operating frequency in electromagnetic transient simulation according to any of the above embodiments.

[0138] Memory 401 may be an electronic memory such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM, hard disk, or ROM. Memory 401 has storage space 403 for program code 413 for executing any of the method steps described above. For example, storage space 403 for program code may include individual program codes 413 for implementing various steps in the method described above. These program codes may be read from or written to one or more computer program products. These computer program products include program code carriers such as hard disks, compact disks (CDs), memory cards, or floppy disks. The program codes may be compressed, for example, in a suitable format. When executed by a processing device, these codes cause the processing device to execute the various steps in the method described above. These program codes may be read from or written to one or more computer program products. These computer program products include program code carriers such as hard disks, compact disks (CDs), memory cards, or floppy disks. The program codes may be compressed, for example, in a suitable format. When these codes are executed by a computing and processing device, they cause the computing and processing device to execute the steps of the above-described method for monitoring the operating frequency of a processor in electromagnetic transient simulation.

[0139] The fifth embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method for monitoring the operating frequency of a processor in electromagnetic transient simulation as described in any of the above embodiments is implemented.

[0140] Embodiment 6 of the present invention also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, the computer executes a method for monitoring the processor operating frequency in electromagnetic transient simulation as described in any of the above embodiments.

[0141] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0142] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, device or unit, which can be electrical, mechanical or other forms.

[0143] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0144] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0145] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the method of the present invention. The aforementioned storage medium includes various media that can store program code, such as USB flash drives, mobile hard drives, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical disks.

[0146] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for monitoring the operating frequency of a processor in electromagnetic transient simulation, characterized in that: include: Acquire multiple processor cores and simulation running times associated with electromagnetic transient simulation, and assign simulation tasks to all the processor cores to obtain a target core and multiple simulation cores; Using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask; Calculating the operating frequency of each simulation core according to the simulation running time and each of the registered data; Comparing the operating frequencies to obtain a processor operating frequency monitoring result; The step of using the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask includes: Acquire the simulation identity of each simulation core through the target core; Using all of the simulation identity identifiers, an information tagging operation is performed on the interrupt controller of the target core to obtain a target controller; respectively determining whether each of the simulation cores is in a simulation parsing state; When the simulation core is in the simulation parsing state, the target controller controls the register group of the simulation core to perform a counting operation; When the simulation core is not in the simulation parsing state, the various count values ​​in the register group are used as the registered data for the simulation core to solve the corresponding simulation subtask.

2. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The step of allocating simulation tasks to all the processor cores to obtain a target core and multiple simulation cores includes: Selecting any one of the processor cores from all the processor cores as an initial core, and using the remaining processor cores as simulation cores; The initial core is thread bound to obtain the target core.

3. The method for monitoring the processor operating frequency in electromagnetic transient simulation according to claim 1, characterized in that: The step of calculating the operating frequency of each simulation core according to the simulation running time and each of the registered data includes: performing a ratio processing on the first count value of each of the registered data and the simulation running time to obtain a reference frequency corresponding to each of the simulation cores; performing multiplication processing on each of the reference frequencies and the third count value of the registered data corresponding to the reference frequency to obtain a first multiplication value corresponding to each of the simulation cores; Each of the first multiplication values ​​is respectively subjected to ratio processing with a second count value of the registered data corresponding to the first multiplication value to obtain an operating frequency of each of the simulation cores.

4. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The step of comparing the operating frequencies to obtain a processor operating frequency monitoring result includes: respectively calculating the difference between the operating frequencies to obtain a plurality of first difference values; Determining whether each of the first differences is less than or equal to a preset monitoring threshold; If each of the first differences is less than or equal to the monitoring threshold, generating a processor operating frequency monitoring result indicating that the processor operating frequency is normal; If any of the first differences is greater than the monitoring threshold, a processor operating frequency monitoring result indicating an abnormal processor operating frequency is generated.

5. The method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to claim 1, characterized in that: The register group includes a timestamp register, a maximum performance register and an actual performance register.

6. A system for monitoring the operating frequency of a processor in electromagnetic transient simulation, for implementing the method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to any one of claims 1 to 5, characterized in that: include: an acquisition module, configured to obtain multiple processor cores and simulation running time associated with electromagnetic transient simulation, and to allocate simulation tasks to all the processor cores to obtain a target core and multiple simulation cores; A frequency counting module, configured to use the target core to obtain the registered data of each simulation core for solving the corresponding simulation subtask; An analysis module, configured to calculate an operating frequency of each simulation core according to the simulation running time and each of the registered data; The comparison module is used to compare the operating frequencies to obtain a processor operating frequency monitoring result.

7. An electronic device, characterized in that: The method comprises a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the processor executes the steps of the method for monitoring the operating frequency of the processor in the electromagnetic transient simulation according to any one of claims 1 to 5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed, the method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to any one of claims 1 to 5 is implemented.

9. A computer program product, characterized in that The computer program product includes a computer program stored on a non-transitory computer-readable storage medium, wherein the computer program includes program instructions, wherein when the program instructions are executed by a computer, the computer is caused to execute the method for monitoring the operating frequency of a processor in electromagnetic transient simulation according to any one of claims 1 to 5.

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