Low noise amplifier, communication chip and electronic equipment

Abstract

The invention discloses a low-noise amplifier, a communication chip and electronic equipment. The low-noise amplifier comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first resistor, a second resistor and a third resistor. The first transistor, the second transistor, the fourth transistor and the fifth transistor are used for realizing an amplification function, the second transistor, the fourth transistor and the fifth transistor form a noise elimination structure, the second transistor is used for realizing single-end input, the fourth transistor and the fifth transistor are used for realizing double-end output, and the second transistor is used for realizing double-end output. The third transistor is used for realizing a buffer function; the loop where the first resistor is located is used for forming a local feedback branch, and the loop where the third resistor and the third capacitor are located is used for forming a global feedback branch. The layout area of the low-noise amplifier is reduced, the practicability of the low-noise amplifier can be improved, and the low-noise amplifier can be widely applied to the technical field of electronic devices.

Description

Technical Field

[0001] The present application relates to the technical field of wireless communications and electronic devices, and in particular to a low noise amplifier, a communication chip and an electronic device. Background Art

[0002] The rapid development of wireless communication technology has put forward higher requirements for the performance of communication systems such as data transmission rate, transmission bandwidth and efficiency. The fifth generation mobile communication technology (5G) has attracted more and more attention from researchers in recent years due to its characteristics of high speed, low latency and large bandwidth. The RF receiver is an important part of the 5G communication system. Among them, the 5G communication frequency band mainly includes the low-frequency Sub 6GHz band and the high-frequency millimeter wave band. The propagation distance of Sub 6GHz is farther than that of millimeter wave, and it is easier to solve the signal coverage problem in a large area. At present, my country mainly uses Sub6GHz in remote areas because the signal penetration of this frequency band is strong, the coverage range is wide, it can better penetrate objects, and it can be directly installed on the basis of the base station, so for operators, its construction cost is lower.

[0003] The front-end link in the RF receiver needs an amplifier with a large gain to amplify the signal received by the antenna with low noise. This amplifier is a low noise amplifier (LNA), and its performance plays a decisive role in the signal-to-noise ratio of the entire receiving system. In terms of low noise requirements, the first existing solution proposes a low noise amplifier based on a noise elimination structure. The principle is to use a single-ended input and a double-ended output line. The noise of the two paths that produce opposite voltages will be offset at the output end, thereby reducing interference with useful signals. The circuit includes a resistive feedback structure and a common source and common gate structure. Both structures optimize the noise performance of the entire circuit by reducing the noise of the MOS transistor at the input end. This method can achieve a very low noise coefficient. The second existing solution uses an equivalent transconductance enhancement network to achieve low noise. Although this method is simple in design and easy to implement, it has a large area and is not easy to mass produce.

[0004] In summary, the problems existing in related technologies need to be solved urgently. Summary of the invention

[0005] The purpose of this application is to solve one of the technical problems existing in the related art to at least a certain extent.

[0006] To this end, an object of embodiments of the present application is to provide a low noise amplifier, a communication chip and an electronic device.

[0007] In order to achieve the above technical objectives, the technical solutions adopted by the embodiments of the present application include:

[0008] On the one hand, an embodiment of the present application provides a low noise amplifier, including:

[0009] A first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, a first resistor, a second resistor and a third resistor;

[0010] The first transistor, the second transistor, the fourth transistor and the fifth transistor are used to realize an amplification function, the second transistor, the fourth transistor and the fifth transistor constitute a noise elimination structure, wherein the second transistor is used to realize a single-ended input, the fourth transistor and the fifth transistor are used to realize a double-ended output, and the third transistor is used to realize a buffering function;

[0011] The loop where the first resistor is located is used to form a local feedback branch, and the loop where the third resistor and the third capacitor are located is used to form a global feedback branch.

[0012] In addition, the low noise amplifier according to the above embodiment of the present application may also have the following additional technical features:

[0013] Furthermore, in one embodiment of the present application, the first end of the first capacitor is used to connect to the RF input end, the second end of the first capacitor is connected to the gate of the first transistor, the gate of the first transistor is connected to the gate of the fourth transistor through the third capacitor, the source of the first transistor is connected to a power supply, and the drain of the first transistor is connected to the drain of the second transistor, so as to realize signal input.

[0014] Furthermore, in one embodiment of the present application, the second end of the first capacitor is also connected to the first end of the first resistor, the second end of the first resistor is connected to the gate of the third transistor through the second capacitor, the second end of the first resistor is also connected to the drain of the first transistor, and the resistance of the first resistor is 2 to 3 kΩ, which is used to realize local feedback of the circuit.

[0015] Furthermore, in one embodiment of the present application, the source of the second transistor is grounded, and the source of the fifth transistor is grounded; the first end of the third resistor is connected to the RF input terminal through the third capacitor and the first capacitor, and the second end of the third resistor is connected to the RF output terminal through the fourth capacitor, and the resistance of the third resistor is 2 to 3 kΩ, which is used to achieve global feedback from the output terminal to the input terminal.

[0016] Furthermore, in an embodiment of the present application, the second end of the first capacitor is also connected to the gate of the second transistor and the gate of the fifth transistor to achieve signal amplification.

[0017] Furthermore, in one embodiment of the present application, the drain of the third transistor is connected to a power supply, the source of the fourth transistor is connected to a power supply, the source of the third transistor, the drain of the fourth transistor and the drain of the fifth transistor are connected to a first end of the fourth capacitor, and the second end of the fourth capacitor is used to connect to a radio frequency output end to realize signal output.

[0018] Further, in an embodiment of the present application, the first end of the second resistor is connected to the drain of the third transistor, and the second end of the second resistor is connected to the gate of the third transistor, so as to realize the buffering function of the circuit.

[0019] Further, in one embodiment of the present application, the second transistor, the third transistor and the fifth transistor include corresponding substrate isolation resistors;

[0020] The second transistor, the third transistor and the fifth transistor are all grounded through corresponding substrate isolation resistors;

[0021] The first transistor and the fourth transistor include corresponding substrate isolation resistors;

[0022] The first transistor and the fourth transistor are both connected to a power source through corresponding substrate isolation resistors.

[0023] On the other hand, an embodiment of the present application provides an electronic device, including the aforementioned low-noise amplifier.

[0024] On the other hand, an embodiment of the present application provides an electronic device, comprising the aforementioned communication chip.

[0025] The advantages and benefits of the present application will be partially given in the following description, and partially become apparent from the following description, or be understood through the practice of the present application:

[0026] A low noise amplifier, a communication chip and an electronic device disclosed in an embodiment of the present application, the low noise amplifier includes a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, a first resistor, a second resistor and a third resistor; the first transistor, the second transistor, the fourth transistor and the fifth transistor are used to realize the amplification function, and the second transistor, the fourth transistor and the fifth transistor constitute a noise elimination structure, wherein the second transistor is used to realize single-ended input, the fourth transistor and the fifth transistor are used to realize double-ended output, and the third transistor is used to realize the buffering function; the loop where the first resistor is located is used to constitute a local feedback branch, and the loop where the third resistor and the third capacitor are located is used to constitute a global feedback branch. In summary, the low noise amplifier effectively reduces the area of ​​the circuit, saves costs, and improves the practicality of the low noise amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following introduction is made to the drawings of the embodiments of the present application or the related technical solutions in the prior art. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present application. For technical personnel in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 A schematic diagram of a circuit principle of a low noise amplifier provided in an embodiment of the present application is shown;

[0029] Figure 2 A schematic diagram of a circuit principle of a low noise amplifier provided in the related art is shown;

[0030] Figure 3 A schematic diagram showing the S parameters of a low noise amplifier provided in an embodiment of the present application;

[0031] Figure 4 A schematic diagram showing the noise coefficient of a low noise amplifier provided in an embodiment of the present application is shown;

[0032] Figure 5 A schematic diagram showing the stability coefficient of a low noise amplifier provided in an embodiment of the present application;

[0033] Figure 6 A schematic diagram of the circuit principle of another low noise amplifier provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0034] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. The described embodiments should not be regarded as limiting the present application, and all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.

[0035] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0036] In the description of the present application, it should be understood that the terms "length", "up", "down", "front", "back", "left", "right", "top", "inside", "outside", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, unless otherwise specified, "multiple" means two or more.

[0037] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0038] In terms of low noise requirements, the first existing solution proposes a low noise amplifier based on a noise elimination structure. The principle is to use a single-ended input and a double-ended output line. The noises that generate opposite voltages in the two paths will be canceled out at the output end, thereby reducing interference with useful signals. The circuit includes a resistive feedback structure and a common source and common gate structure. Both structures optimize the noise performance of the entire circuit by reducing the noise of the MOS transistor input. This method can achieve a very low noise factor, but it has the disadvantage of high power consumption. The second existing solution uses an equivalent transconductance enhancement network to achieve low noise. Although this method is simple in design and easy to implement, it has high power consumption and is not easy to implement on-chip.

[0039] In view of this, a low noise amplifier, a communication chip and an electronic device are provided in an embodiment of the present application, wherein the low noise amplifier comprises a first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, a first resistor, a second resistor and a third resistor; the first transistor, the second transistor, the fourth transistor and the fifth transistor are used to realize the amplification function, and the second transistor, the fourth transistor and the fifth transistor constitute a noise elimination structure, wherein the second transistor is used to realize single-ended input, the fourth transistor and the fifth transistor are used to realize double-ended output, and the third transistor is used to realize the buffering function; the loop where the first resistor is located is used to constitute a local feedback branch, and the loop where the third resistor and the third capacitor are located is used to constitute a global feedback branch. The low noise amplifier effectively reduces the area of ​​the circuit, saves costs, and can improve the practicality of the low noise amplifier.

[0040] Below, in conjunction with specific drawings, a low noise amplifier, a communication chip and an electronic device provided in the embodiments of the present application are described in detail.

[0041] First, the low noise amplifier provided in the embodiments of the present application is introduced and described.

[0042] The embodiment of the present application provides a low noise amplifier, which can be applied to the technical field of electronic devices. Specifically, the low noise amplifier provided in the embodiment of the present application mainly includes:

[0043] A first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, a first resistor, a second resistor and a third resistor;

[0044] The first transistor, the second transistor, the fourth transistor and the fifth transistor are used to realize an amplification function, the second transistor, the fourth transistor and the fifth transistor constitute a noise elimination structure, wherein the second transistor is used to realize a single-ended input, the fourth transistor and the fifth transistor are used to realize a double-ended output, and the third transistor is used to realize a buffering function;

[0045] The loop where the first resistor is located is used to form a local feedback branch, and the loop where the third resistor and the third capacitor are located is used to form a global feedback branch.

[0046] In an embodiment of the present application, a low noise amplifier is provided, in which a noise elimination structure, a local feedback resistor and a global feedback resistor structure are used. Compared with the traditional noise elimination structure, the solution provided in the embodiment of the present application can achieve higher gain under low noise; moreover, the local feedback resistor can improve the gain and noise factor of the circuit without deteriorating the input matching and power consumption of the circuit, and the global feedback resistor maintains the advantages of the (noise elimination) NC structure and eliminates the noise of the transistor with limited impact on power consumption.

[0047] Please refer to Figure 1 , Figure 1 A schematic diagram of the circuit structure of a low noise amplifier provided in an embodiment of the present application is shown, and the low noise amplifier may include:

[0048] A first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first resistor R1, a third resistor R3, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4 and a fifth transistor M5;

[0049] The first end of the first capacitor C1 is used to connect to the RF input end, the second end of the first capacitor C1 is connected to the gate of the first transistor M1, the gate of the first transistor M1 is connected to the gate of the fourth transistor M4 through the third capacitor C3, the source of the first transistor M1 is connected to the power supply, and the drain of the first transistor M1 is connected to the drain of the second transistor M2, so as to realize the input of the signal; the second end of the first capacitor C1 is also connected to the first end of the first resistor R1, the second end of the first resistor R1 is connected to the gate of the third transistor M3 through the second capacitor C2, and the second end of the first resistor R1 is also connected to the drain of the first transistor M1 and the drain of the second transistor M2, so as to realize the local feedback of the circuit; the first capacitor The second end of C1 is also connected to the gate of the second transistor M2 and the gate of the fifth transistor M5, so as to amplify the signal; the drain of the third transistor M3 is connected to the power supply, the source of the fourth transistor M4 is connected to the power supply, the source of the third transistor M3, the drain of the fourth transistor M4 and the drain of the fifth transistor M5 are connected to the first end of the fourth capacitor C4, and the second end of the fourth capacitor C4 is used to connect to the RF output end, so as to output the signal; the source of the second transistor M2 is grounded, and the source of the fifth transistor M5 is grounded; the first end of the third resistor R3 is connected to the gate of the fourth transistor M4, and the second end of the third resistor R3 is connected to the drain of the fourth transistor M4, so as to realize global feedback from the output end to the input end.

[0050] In an embodiment of the present application, a low noise amplifier is provided, which is mainly composed of a dual resistor feedback structure and a noise elimination structure, and the specific circuit connection is as follows:

[0051] The RF input terminal is connected to the first resistor R1 and the gates of the first transistor M1 and the second transistor M2 through the first capacitor C1, the source of the first transistor M1 is connected to the power supply VDD, the drain of the first transistor M1 is connected to the first resistor R1, the second capacitor C2 and the drain of the second transistor M2, the gate of the first transistor M1 is connected to the third resistor R3 and the gate of the fourth transistor M4 through the third capacitor C3, the drain of the second transistor M2 is connected to the first resistor R1, the second capacitor C2 and the drain of the first transistor M1, the gate of the second transistor M2 is connected to the gate of the fifth transistor M5, and the source of the second transistor M2 is connected to the ground. The second capacitor C2 is connected to the gate of the third transistor M3, the drain of the third transistor M3 is connected to the power supply VDD, and the source of the third transistor M3 is connected to the RF output terminal through a fourth capacitor C4. One end of the third resistor R3 is connected to the gate of the fourth transistor M4, and the other end is connected to the drain of the fourth transistor M4. The drain of the fourth transistor M4 is connected to the fourth capacitor C4, the source of the third transistor M3 and the drain of the fifth transistor M5, and the source of the fourth transistor M4 is connected to the power supply VDD. The source of the fifth transistor M5 is connected to the ground, and the drain of the fifth transistor M5 and the fourth capacitor C4 are connected to the RF output terminal.

[0052] In some embodiments, the low noise amplifier further includes a second resistor R2; a first end of the second resistor R2 is connected to the drain of the third transistor M3, and a second end of the second resistor R2 is connected to the gate of the third transistor M3, for realizing a buffering function of the circuit.

[0053] In some embodiments, the second transistor M2, the third transistor M3 and the fifth transistor M5 include corresponding substrate isolation resistors;

[0054] The second transistor M2 , the third transistor M3 , and the fifth transistor M5 are all grounded through corresponding substrate isolation resistors.

[0055] In some embodiments, the first transistor M1 and the fourth transistor M4 include corresponding substrate isolation resistors;

[0056] The first transistor M1 and the fourth transistor M4 are both connected to a power source through corresponding substrate isolation resistors.

[0057] Circuit working principle description

[0058] The low noise amplifier in the embodiment of the present application is implemented based on a dual resistor feedback type noise elimination structure, which mainly includes a noise elimination structure and a dual resistor feedback network. The two parts are introduced and explained below.

[0059] 1) Dual resistor feedback

[0060] This application designs a dual resistor feedback structure based on the traditional single resistor feedback noise elimination type low noise amplifier. The specific analysis is as follows:

[0061] Please refer to Figure 2 , Figure 2 The schematic diagram of the structure of a single resistor feedback noise elimination type low noise amplifier provided in the related art, wherein the input resistance R in，conv It can be expressed as:

[0062]

[0063] In the formula, g m6 and r ds6 are the transconductance and drain resistance of the sixth transistor M6 respectively.

[0064] Due to R F1 The resistance of the sixth transistor M6 is much smaller than the drain resistance r ds6 , so the input resistance is approximately equal to 1 / g m6 The sixth transistor M6 is an input matching transistor, with a current noise I n，M1 Based on this, two in-phase noise voltages I are generated at node X. n，M6RS , and the voltage at node Y is I n，M6(RS+RF1) The seventh transistor M7 is used to amplify and reverse the polarity of the previous noise voltage. The branch noise of node Y is only amplified by the eighth transistor M8 without causing phase change. If the following formula (2) is met, the phases of the noise voltages of the two branches at the output port will be opposite, thereby achieving the effect of noise elimination:

[0065]

[0066] Where RS is the impedance of the voltage source, which is 50Ω, g m7 and g m8 The left side (LHS) of the above formula (2) is the transconductance of the noise elimination stage, and the right side (RHS) is the ratio of the noise voltage between nodes X and Y. When the noise of the sixth transistor M6 is eliminated, the noise factor of the NC stage is:

[0067]

[0068] Where γ is the thermal noise parameter, α = gm / g d0 , g d0 is the zero bias drain conductance. For the signal voltage, the total voltage gain under noise cancellation conditions is expressed as:

[0069]

[0070] According to (3) and (4), by enlarging R F1 The residual noise factor and circuit gain can be improved. Based on the above formula (1), when R F1 With r ds6 In comparison, if no additional power is consumed to increase g m6 , then the increase in R F1 By increasing R in，conv to weaken the input matching. Figure 1 The dual-resistance feedback noise elimination type low noise amplifier provided in the embodiment of the present application can increase the resistance of the first resistor R1 without reducing the input matching or increasing the power consumption. The global feedback third resistor R3 connects the input and output of the low noise amplifier, so the total input resistance is:

[0071] R in = R in，conv / / R in，aux (5)

[0072]

[0073] Where gM1 is the transconductance of the first transistor M1, g m2 is the transconductance of the second transistor M2, g m3 is the transconductance of the third transistor M3.

[0074] According to (5) and (6), the introduction of the third feedback resistor R3 effectively adds a shunt load R at the gate of the input matching transistor. in，aux As mentioned above, the increase of the first resistor R1 can increase the input resistance R in，conv and the amplifier gain, but will reduce the input resistance R in the circuit structure in，aux These two effects are offset by the increase of the first resistor R1. If the value of the third resistor R3 is appropriate, the input resistance will not be affected.

[0075] In fact, choosing a third resistor R3 with a suitable high resistance value will not significantly reduce the input resistance R in，aux, and can also achieve input matching with the first resistor R1. Therefore, the third resistor R3 in the embodiment of the present application can constrain the resistance value to be greater than the predetermined first threshold value. The specific value of the first threshold value can be set according to the actual circuit requirements, and the present application does not limit this. It can be understood that the low-noise amplifier structure proposed in the embodiment of the present application can improve the gain and noise coefficient of the circuit by adding the first resistor R1, while not deteriorating the input matching and power consumption of the circuit.

[0076] 2) Noise cancellation

[0077] The low noise amplifier provided in the embodiment of the present application mainly has noise coming from various MOS tubes and resistors. The noise factor F of the low noise amplifier can be expressed as:

[0078] F = 1 + F M1 + F M2 + F M3 + F M4 + F M5 + F1 + F2 + F3 (7)

[0079] The first term "1" of the noise factor represents the noise caused by the source resistance, and Fi is the noise contribution of component i. The channel thermal noise power spectral density I of the first transistor M1 simulated by the current source between the drain and the source is n，M1 It can be expressed as:

[0080]

[0081] Where kB is the Boltzmann constant and T is the absolute temperature. The noise factor contributed by the first transistor M1 is:

[0082]

[0083] In the formula, G m is the transconductance of the circuit as a whole.

[0084] F M1 The noise when = 0 is calculated as:

[0085]

[0086] Compared with formula (2), the transconductance of the second transistor M2 in the embodiment of the present application is reduced by 1 / R3, while the noise voltage ratio between nodes X and Y is increased by R1 / R3, so a higher g is required. m2 However, under the combined effect of current reuse and the high-resistance third resistor R3, the increase of g m2The additional power caused is basically not consumed. Therefore, the addition of the third resistor R3 still maintains the advantages of the NC structure and eliminates the noise of the first transistor M1 with limited impact on power consumption. The high gain brought by the first resistor R1 can effectively reduce the noise of the remaining noise sources, especially those with low noise contribution rates, and the noise of the third resistor R3 can be ignored due to its high resistance value.

[0087] In addition to the structures and devices mentioned above, the functions of other components in the circuit not mentioned above will be described below: In the embodiment of the present application, the first capacitor C1 and the fourth capacitor C4 are DC blocking capacitors for isolating DC signals; the second resistor R2 is used to provide a gate bias voltage for the third transistor M3, and the third transistor M3 acts as a buffer. Input matching is achieved by the first capacitor C1, the second capacitor C2, the first resistor R1, the first transistor M1 and the second transistor M2, and no inductor is used, so the circuit area is extremely small.

[0088] The values ​​of some device parameters in the embodiment of the present application are: the resistance value of the first resistor R1 can be 2.5kΩ, the resistance value of the second resistor R2 can be 2.5kΩ, the resistance value of the third resistor R3 can be 1kΩ, the transistor size of the first transistor M1 and the second transistor M2 is 80um×120nm, the transistor size of the third transistor M3 is 100um×100nm, the transistor size of the fourth transistor M4 is 14um×65nm, and the transistor size of the fifth transistor M5 is 80um×65nm.

[0089] It is understandable that a noise elimination type low noise amplifier mainly based on dual resistor feedback is provided in the embodiment of the present application. In the network of the third resistor R3 of global feedback, the gain and noise factor of the circuit are improved by adding the first resistor R1, while the input matching and power consumption of the circuit are not deteriorated. The third resistor R3 of global feedback is added to maintain the advantages of the NC structure, and the noise of the transistor is eliminated with limited impact on power consumption, and the high gain brought by the first resistor R1 can effectively reduce the noise of the remaining noise source. In addition, using a common source amplifier as an input stage is one of the common structures of a low noise amplifier, because compared with cascode and common-gate amplifiers, the common source amplifier has the smallest noise factor. The low noise amplifier in the embodiment of the present application has a simple input matching structure, which is mainly composed of a first transistor M1 and a second transistor M2. The entire circuit does not use an inductor structure, which greatly saves the layout area of ​​the circuit.

[0090] Please refer to Figure 3-5 ,in, Figure 3 is a schematic diagram of the S parameters of the low noise amplifier provided in the embodiment of the present application, Figure 4is a schematic diagram of the noise coefficient of the low noise amplifier provided in the embodiment of the present application, Figure 5 Schematic diagram of the stability coefficient of the low noise amplifier provided in the embodiment of the present application. The noise cancellation type low noise amplifier with dual resistor feedback in the embodiment of the present application operates in the Sub 6GHz frequency band and is suitable for the receiver link in the RF front-end system. Specifically, the low noise amplifier can be implemented based on a 65nm CMOS process, with a 3dB bandwidth of 0.47-3.01GHz, an in-band noise figure of 2.20-2.28dB, an IIP3 of -7.31dBm, a maximum gain of 17.5dB, a power consumption of 10.7mW, a total area of ​​0.073mm2, and a core area of ​​0.016mm 2 .

[0091] Embodiment 2

[0092] The second embodiment and the first embodiment proposed in the present application select different parameter combinations. In the first embodiment, a first transistor and a second transistor with a larger gate width are used to achieve high transconductance and high gain of the circuit. In the second embodiment, a first resistor R1 with a higher resistance value and a first transistor and a second transistor with a lower gate width are used to achieve low power consumption, while ensuring that the performance of the circuit remains almost the same as that of the first embodiment.

[0093] Embodiment 3

[0094] like Figure 6 As shown, on the basis of the first embodiment, the third embodiment adds a first inductor L1 between the first capacitor C1 and the first resistor R1, expands the input matching network from an RC network to an RLC network, optimizes the input matching while not affecting the performance of the circuit. After the above modifications, this embodiment can also achieve high gain and low noise performance similar to the first embodiment.

[0095] Embodiment 4

[0096] The fourth embodiment and the first embodiment proposed in the present application select similar parameter combinations. In the first embodiment, the TSMC 65nm production process is adopted, and the fourth embodiment adopts the TSMC 40nm process. The fourth embodiment can achieve a smaller chip area and better circuit performance.

[0097] Embodiments 1, 2, 3 and 4 proposed in this application illustrate that the low noise amplifier can be applied to any structure and any possible parameter design.

[0098] In summary, the embodiments of the present application have the following advantages and beneficial effects compared with the prior art:

[0099] 1) High gain, low noise: This application combines a noise elimination structure, a local feedback resistor, and a global feedback resistor structure. Compared with the traditional noise elimination structure, this application can achieve higher gain at low noise. The local feedback first resistor R1 can improve the gain and noise factor of the circuit, and the global feedback third resistor R3 maintains the advantages of the NC structure and further improves the gain and noise factor of the circuit without deteriorating the input matching and power consumption of the circuit.

[0100] 2) Reduce area: This application uses a common-source amplifier structure and resistors and capacitors for input matching, capacitors and source follower structures for matching between stages, and capacitors for output matching. The circuit does not use any inductors. Compared with low-noise amplifiers with the same performance, the layout area of ​​this application is the smallest.

[0101] This embodiment also provides a communication chip and an electronic device, wherein the communication chip includes the above-mentioned low noise amplifier, and the electronic device includes the communication chip. Exemplarily, the electronic device can be a transceiver device, and of course, its specific device type can be flexibly implemented as needed, and this application does not limit this.

[0102] It can be understood that the contents of the above-mentioned low-noise amplifier embodiments are all applicable to the present communication chip and electronic device embodiments. The functions specifically implemented by the present communication chip and electronic device embodiments are the same as those of the above-mentioned low-noise amplifier embodiments, and the beneficial effects achieved are also the same as those achieved by the above-mentioned low-noise amplifier embodiments, which will not be elaborated here.

[0103] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the embodiments. Technical personnel familiar with the field can make various equivalent modifications or substitutions without violating the spirit of the present application. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present application.

[0104] In the description of this specification, the description with reference to the terms "one embodiment", "another embodiment" or "certain embodiments" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0105] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A low noise amplifier, characterized in that: include: A first transistor, a second transistor, a third transistor, a fourth transistor and a fifth transistor, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, a first resistor, a second resistor and a third resistor; The first transistor, the second transistor, the fourth transistor and the fifth transistor are used to realize an amplification function, the second transistor, the fourth transistor and the fifth transistor constitute a noise elimination structure, wherein the second transistor is used to realize a single-ended input, the fourth transistor and the fifth transistor are used to realize a double-ended output, and the third transistor is used to realize a buffering function; The loop where the first resistor is located is used to form a local feedback branch, and the loop where the third resistor and the third capacitor are located is used to form a global feedback branch.

2. A low noise amplifier according to claim 1, characterized in that: The first end of the first capacitor is used to connect to the RF input end, the second end of the first capacitor is connected to the gate of the first transistor, the gate of the first transistor is connected to the gate of the fourth transistor through the third capacitor, the source of the first transistor is connected to the power supply, and the drain of the first transistor is connected to the drain of the second transistor, so as to realize the input of the signal.

3. A low noise amplifier according to claim 1, characterized in that: The second end of the first capacitor is also connected to the first end of the first resistor, the second end of the first resistor is connected to the gate of the third transistor through the second capacitor, the second end of the first resistor is also connected to the drain of the first transistor, the resistance of the first resistor is 2 to 3 kΩ, and is used to achieve local feedback of the circuit.

4. A low noise amplifier according to claim 1, characterized in that: The source of the second transistor is grounded, and the source of the fifth transistor is grounded; the first end of the third resistor is connected to the RF input terminal through the third capacitor and the first capacitor, and the second end of the third resistor is connected to the RF output terminal through the fourth capacitor. The resistance of the third resistor is 2 to 3 kΩ, which is used to achieve global feedback from the output terminal to the input terminal.

5. A low noise amplifier according to claim 1, characterized in that: The second end of the first capacitor is also connected to the gate of the second transistor and the gate of the fifth transistor to achieve signal amplification.

6. A low noise amplifier according to claim 1, characterized in that: The drain of the third transistor is connected to a power supply, the source of the fourth transistor is connected to a power supply, the source of the third transistor, the drain of the fourth transistor and the drain of the fifth transistor are connected to a first end of the fourth capacitor, and the second end of the fourth capacitor is used to connect to a radio frequency output end to realize signal output.

7. A low noise amplifier according to claim 1, characterized in that: The first end of the second resistor is connected to the drain of the third transistor, and the second end of the second resistor is connected to the gate of the third transistor, so as to realize the buffering function of the circuit.

8. A low noise amplifier according to any one of claims 1 to 7, characterized in that: The second transistor, the third transistor and the fifth transistor include corresponding substrate isolation resistors; The second transistor, the third transistor and the fifth transistor are all grounded through corresponding substrate isolation resistors; The first transistor and the fourth transistor include corresponding substrate isolation resistors; The first transistor and the fourth transistor are both connected to a power source through corresponding substrate isolation resistors.

9. A communication chip, characterized in that: The invention comprises a low noise amplifier as claimed in any one of claims 1 to 8.

10. An electronic device, characterized in that: Comprising the communication chip as claimed in claim 9.

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