Filter construction method and device, electronic equipment, storage medium and vehicle

Abstract

The invention discloses a filter construction method and device, electronic equipment, a storage medium and a vehicle. The method comprises the steps that a frequency domain representation function of an initial filter is determined based on target group delay of the initial filter, the frequency domain representation function is used for representing transmission characteristics of a pole of an initial transfer function of the initial filter in a frequency domain, the frequency domain representation function is an N-order polynomial, and the initial filter is an N-order filter; based on the position relation between the zero point of the frequency domain representation function and the unit circle, decomposing the frequency domain representation function to obtain a plurality of sub-frequency domain representation functions, the sum of orders of the plurality of sub-frequency domain representation functions being N; constructing an all-pass sub-filter corresponding to each sub-frequency domain representation function based on a position relationship between a pole of the frequency domain representation function and a unit circle; and performing parallel operation on the plurality of all-pass sub-filters to construct a target filter. According to the scheme provided by the invention, the calculation complexity of the filter can be reduced, and the filtering efficiency of the filter is improved.

Description

Technical Field

[0001] The present application belongs to the field of digital signal processing, and in particular, relates to a filter construction method, device, electronic device, storage medium and vehicle. Background Art

[0002] In a digital signal processing system, a digital filter is usually used to filter the digital signal to obtain the desired response characteristics.

[0003] However, existing digital filters (e.g., Butterworth filters) cannot adjust delay or phase linearity. In addition, although digital filters with good frequency selection performance can achieve accurate filtering of digital signals, digital filters with good frequency selection performance usually have a higher order, and the amount of calculation required to filter digital signals is large, which reduces the filtering efficiency of the digital filter. Summary of the invention

[0004] The embodiments of the present application provide a method, device, electronic device, storage medium and vehicle for constructing a filter, which can reduce the computational complexity of the filter and improve the filtering efficiency of the filter.

[0005] In a first aspect, an embodiment of the present application provides a method for constructing a filter, the method comprising: determining a frequency domain representation function of an initial filter based on a target group delay of the initial filter, wherein the frequency domain representation function is used to characterize the transmission characteristics of the poles of an initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an Nth order polynomial, N is a positive integer greater than or equal to 0, and the initial filter is an Nth order filter; based on the positional relationship between the zero point of the frequency domain representation function and the unit circle, the frequency domain representation function is decomposed to obtain a plurality of sub-frequency domain representation functions, wherein the sum of the orders of the plurality of sub-frequency domain representation functions is N; based on the positional relationship between the poles of the frequency domain representation function and the unit circle, an all-pass sub-filter corresponding to each sub-frequency domain representation function is constructed; and the plurality of all-pass sub-filters are operated in parallel to construct a target filter.

[0006] In the second aspect, an embodiment of the present application provides a filter construction device, which includes: a function determination module, which is used to determine the frequency domain representation function of the initial filter based on the target group delay of the initial filter, wherein the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an N-order polynomial, N is a positive integer greater than or equal to 0, and the initial filter is an N-order filter; a function decomposition module, which is used to decompose the frequency domain representation function based on the positional relationship between the zero point of the frequency domain representation function and the unit circle to obtain multiple sub-frequency domain representation functions, wherein the sum of the orders of the multiple sub-frequency domain representation functions is N; a first construction module, which is used to construct an all-pass sub-filter corresponding to each sub-frequency domain representation function based on the positional relationship between the poles of the frequency domain representation function and the unit circle; and a second construction module, which is used to perform parallel operation on multiple all-pass sub-filters to construct a target filter.

[0007] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a processor and a memory storing computer program instructions; when the processor executes the computer program instructions, the filter construction method described in the first aspect is implemented.

[0008] In a fourth aspect, an embodiment of the present application provides a computer storage medium, on which computer readable storage medium is stored computer program instructions, and when the computer program instructions are executed by a processor, the method for constructing a filter as described in the first aspect is implemented.

[0009] In a fifth aspect, an embodiment of the present application provides a vehicle, comprising at least one of the following: a filter construction device as described in the second aspect; an electronic device as described in the third aspect; a computer-readable storage medium as described in the fourth aspect.

[0010] The present application obtains multiple low-order filters by splitting a high-order initial filter. First, the frequency domain representation function of the initial filter is determined based on the target group delay of the initial filter; then, based on the positional relationship between the zero point of the frequency domain representation function and the unit circle, the frequency domain representation function is decomposed to obtain multiple sub-frequency domain representation functions; then, based on the positional relationship between the poles of the frequency domain representation function and the unit circle, an all-pass sub-filter corresponding to each sub-frequency domain representation function is constructed; finally, multiple all-pass sub-filters are connected in parallel to construct a target filter. Among them, the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an N-order polynomial, N is a positive integer greater than or equal to 0, and the sum of the orders of multiple sub-frequency domain representation functions is N.

[0011] It can be seen from the above content that in the present application, in the process of splitting the high-order initial filter, the frequency domain representation function of the high-order initial filter is split into multiple sub-frequency domain representation functions. Since the sum of the orders of the multiple sub-frequency domain representation functions is the order of the frequency domain representation function of the high-order initial filter, the filtering accuracy of the target filter constructed based on the multiple sub-frequency domain representation functions will not be reduced, that is, the target filter constructed using the solution provided in the present application has the same filtering effect as the high-order initial filter.

[0012] In addition, since the target filter is a parallel operation of multiple low-order all-pass sub-filters, the amount of calculation required when filtering the digital signal is less than that of the high-order filter. It can be seen that compared with the existing high-order filters, the target filter constructed in this application can reduce the amount of filtering calculation and improve the filtering efficiency while ensuring the filtering accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0014] Figure 1 It is a flowchart of a method for constructing a filter provided by an embodiment of the present application;

[0015] Figure 2 is a schematic diagram of the structure of a target filter of an all-pass and structure provided by an embodiment of the present application;

[0016] Figure 3 It is a schematic diagram of the structure of filters with different bandwidths provided by an embodiment of the present application;

[0017] Figure 4 is a schematic diagram of the structure of a filter bank provided by an embodiment of the present application;

[0018] Figure 5 is a schematic structural diagram of a filter construction device provided in another embodiment of the present application;

[0019] Figure 6 It is a structural schematic diagram of an electronic device provided in yet another embodiment of the present application. DETAILED DESCRIPTION

[0020] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the scheme of the present application will be further described below. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0021] In the following description, many specific details are set forth to facilitate a full understanding of the present application, but the present application may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only part of the embodiments of the present application, rather than all of the embodiments.

[0022] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0023] In view of this, in order to solve the above-mentioned prior art problems, the embodiments of the present application provide a method for constructing a filter, a device, an electronic device, a storage medium and a vehicle. The following first introduces the method for constructing a filter provided in the embodiments of the present application. The method for constructing a filter can be applied to an electronic device, which can be a terminal or a server, etc., and the present application does not make specific restrictions on this.

[0024] Existing digital filters, such as Butterworth filters, have a relatively high order. Therefore, the amount of calculation required to filter digital signals using the existing digital filters is relatively large, and the filtering efficiency is relatively low.

[0025] To solve the above problems, the embodiments of the present application provide a filter construction method, device, electronic device, storage medium and vehicle. The filter construction method provided by the embodiments of the present application is first introduced below.

[0026] Figure 1 FIG. 1 is a flow chart of a method for constructing a filter provided by an embodiment of the present application. Figure 1 As shown, the method comprises the following steps:

[0027] Step S101 : determining a frequency domain representation function of an initial filter based on a target group delay of the initial filter.

[0028] In step S101, the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, and the frequency domain representation function is an N-order polynomial, where N is a positive integer greater than or equal to zero.

[0029] In this embodiment, the initial filter may be a digital filter, and the initial transfer function corresponding to the digital filter is an N-order polynomial, that is, in this application, the initial filter is an N-order filter.

[0030] It should be noted that different filters have different transfer functions, that is, a transfer function can be characterized as a filter, wherein the expression of the transfer function of the initial filter can be shown as follows:

[0031]

[0032] In the above formula (1), N is the order of the transfer function; a n is the coefficient of the transfer function; b0 is the sum of all the coefficients of the transfer function, that is, D(z) is the frequency domain representation function, which is about z -1 N-order polynomial, that is

[0033] It can be seen from the above formula that after determining the coefficients of the frequency domain representation function, the frequency domain representation function can be determined, so that the transfer function corresponding to the initial filter can be determined, and then the initial filter corresponding to the transfer function can be determined. Among them, the initial filter can be a flat filter, and the flat filter can flatten or smooth the digital signal within a specified passband bandwidth, and its group delay has a specified flatness. The flat filter can be a high-pass filter or a low-pass filter. If the flat filter is a high-pass filter, the target filter constructed based on steps S101 to S104 can also be a high-pass filter; correspondingly, if the flat filter is a low-pass filter, the target filter constructed based on steps S101 to S104 can also be a low-pass filter.

[0034] In addition, group delay represents the time when a group of physical quantities is delayed through a device. In step S101, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, wherein the target group delay can be defined as the negative value of the derivative of the phase with respect to the angular frequency. In the embodiment, the target group delay is represented by G(ω).

[0035] Step S102: based on the positional relationship between the zero point of the frequency domain representation function and the unit circle, the frequency domain representation function is decomposed to obtain a plurality of sub-frequency domain representation functions, wherein the sum of the orders of the plurality of sub-frequency domain representation functions is N.

[0036] In step S102, the zero point of the frequency domain representation function is the z value obtained when the numerator of the transfer function of the initial filter is 0, which indicates that for the selected frequency portion, the output of the filter is zero. In this embodiment, the positional relationship between the zero point of the frequency domain representation function and the unit circle at least includes the zero point being located inside the unit circle and the zero point being located outside the unit circle.

[0037] It should be noted that the unit circle is a circle whose Z domain modulus is 1. The Z domain is a spatial domain for sampling a continuous time system and processing a signal.

[0038] In addition, it should be noted that in step S102, the sum of the orders of the multiple sub-frequency domain representation functions obtained by decomposing the frequency representation function is N, so the order of each sub-frequency domain representation function is less than N. Based on this, the order of the filter constructed by the present application based on the sub-frequency domain representation function must be less than N, thereby achieving the purpose of decomposing a high-order filter into a low-order filter, that is, the decomposition of the frequency domain representation function provides a basis for the construction of subsequent low-order filters, and then the digital signal is filtered based on the low-order filter, and its calculation amount must be less than that of the high-order filter, thereby achieving the effect of reducing the calculation amount of the filter and improving the filtering efficiency of the filter.

[0039] Step S103: constructing an all-pass sub-filter corresponding to each sub-frequency domain representation function based on the positional relationship between the poles of the frequency domain representation function and the unit circle.

[0040] In step S103, the pole of the frequency domain representation function is the z value obtained when the denominator of the transfer function of the initial filter is 0. Similar to the zero point, the positional relationship between the pole and the unit circle also includes two positional relationships: the pole is located inside the unit circle, and the pole is located outside the unit circle.

[0041] It should be noted that the filter whose poles are within the unit circle is a stable filter; and the closer the poles are to the unit circle from the inside to the outside, the more unstable the filter is. In addition, if the output of the filter at a certain moment depends only on the input at that moment and before that moment, the filter is a causal filter. In order to ensure the stability and causality of the filter, in this embodiment, the initial filter is decomposed based on the zeros and poles of the frequency domain representation function of the initial filter to obtain multiple all-pass sub-filters with stable causality, and then the target filter constructed based on the multiple all-pass sub-filters with stable causality is also causally stable.

[0042] In addition, it should be noted that since the all-pass sub-filter is constructed based on the sub-frequency domain representation function, and it can be known from step S102 that the order of the sub-frequency domain representation function is less than N, the order of the all-pass sub-filter constructed based on the sub-frequency domain representation function must also be less than N. On this basis, the calculation amount of filtering the digital signal based on the low-order filter must be less than that of the high-order filter, thereby achieving the effect of reducing the calculation amount of the filter and improving the filtering efficiency of the filter.

[0043] Step S104: performing a parallel operation on a plurality of all-pass sub-filters to construct a target filter.

[0044] In step S104, since the target filter is constructed by a plurality of all-pass sub-filters, in this embodiment, the target filter is an all-pass filter with an all-pass and structure.

[0045] In one example, after a plurality of low-order all-pass sub-filters are obtained, the plurality of all-pass sub-filters may be connected in parallel based on the all-pass sum structure of the filter, thereby obtaining a target filter.

[0046] It should be noted that in the present application, the initial filter is an N-order filter, and the sum of the orders of the multiple all-pass sub-filters obtained after the initial filter is split is N. Therefore, the order of each all-pass sub-filter must be less than N, so that the order of the target filter obtained by operating multiple all-pass sub-filters in parallel is also less than N. For example, the order of the initial filter is 9th order, and the order of multiple all-pass sub-filters is 3rd order, that is, the high-order initial filter is split into 3 3rd-order all-pass sub-filters. The target filter obtained after the three all-pass sub-filters are connected in parallel is a 3rd-order filter, which is less than the order of the initial filter.

[0047] It is easy to notice that, since the target filter is a parallel operation of multiple low-order all-pass sub-filters, the amount of calculation required when filtering the digital signal is less than that of the high-order filter. It can be seen that compared with the existing high-order filters, the target filter constructed in this application can reduce the amount of filtering calculation and improve the filtering efficiency while ensuring the filtering accuracy.

[0048] The present application obtains multiple low-order filters by splitting a high-order initial filter. First, the frequency domain representation function of the initial filter is determined based on the target group delay of the initial filter; then, based on the positional relationship between the zero point of the frequency domain representation function and the unit circle, the frequency domain representation function is decomposed to obtain multiple sub-frequency domain representation functions; then, based on the positional relationship between the poles of the frequency domain representation function and the unit circle, an all-pass sub-filter corresponding to each sub-frequency domain representation function is constructed; finally, multiple all-pass sub-filters are connected in parallel to construct a target filter. Among them, the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an N-order polynomial, N is a positive integer greater than or equal to 0, and the sum of the orders of multiple sub-frequency domain representation functions is N.

[0049] From the above content, it can be seen that in the present application, in the process of splitting the high-order initial filter, the frequency domain representation function of the high-order initial filter is split into multiple sub-frequency domain representation functions. Since the sum of the orders of the multiple sub-frequency domain representation functions is the order of the frequency domain representation function of the high-order initial filter, the filtering accuracy of the target filter constructed based on the multiple sub-frequency domain representation functions will not be reduced, that is, the target filter constructed using the solution provided in the present application has the same filtering effect as the high-order initial filter.

[0050] In addition, since the target filter is a parallel operation of multiple low-order all-pass sub-filters, the amount of calculation required when filtering the digital signal is less than that of the high-order filter. It can be seen that compared with the existing high-order filters, the target filter constructed in this application can reduce the amount of filtering calculation and improve the filtering efficiency while ensuring the filtering accuracy.

[0051] The specific implementation methods of the above steps are introduced below.

[0052] In one example, before decomposing the high-order initial filter, it is necessary to first determine the frequency domain representation function of the initial filter, that is, perform step S101.

[0053] Specifically, first obtain the target delay of the initial filter, which is used to characterize the phase change between the input signal and the output signal of the initial filter. The target delay is also the delay of the constructed target filter, which can be set by the user according to his actual use needs, or can be selected from multiple delays according to the filter bandwidth requirements set by the user.

[0054] From the above content, it can be seen that the user can directly or indirectly set the delay of the filter, thereby realizing the adjustment of the delay of the filter. There is a certain correlation between the linear phase of the filter and the delay of the filter. Therefore, the user can also adjust the linear phase of the filter, thereby avoiding the problem of being unable to adjust the delay or linear phase of the filter in the related technology.

[0055] Furthermore, after obtaining the target delay, the first flatness and the second flatness corresponding to the frequency domain representation function can be determined based on the target delay; then, under the preset first constraint condition, the multiple coefficients of the frequency domain representation function are adjusted based on the first flatness, the second flatness and the target group delay to obtain multiple target coefficients; finally, the function variables of the frequency domain representation function are weighted and summed based on the multiple target coefficients to obtain the frequency domain representation function.

[0056] It should be noted that the first flatness characterizes the passband bandwidth of the initial filter at the first phase, the second flatness characterizes the passband bandwidth of the initial filter at the second phase, the sum of the first flatness and the second flatness is N, the first phase is less than the second phase, and the phase difference between the first phase and the second phase is π. As an example, the first phase is 0 and the second phase is π.

[0057] In one example, after the target delay is obtained, multiple flatness groups are determined based on the target delay under a preset second constraint condition, and then a target flatness group matching the preset target passband bandwidth is determined from the multiple flatness groups to obtain a first flatness and a second flatness. The multiple flatness groups are multiple combinations of different first flatnesses and different second flatnesses.

[0058] Specifically, the transfer function of the filter with all-pass and structure can be expressed as:

[0059]

[0060] In the above formula (2), A1(z) and A2(z) represent two all-pass filters respectively, d represents the target delay, and z represents the variable of the filter transfer function in the Z domain.

[0061] For the determined target delay d and the order N of the transfer function, a set of appropriate coefficients can be selected so that the amplitude response of the transfer function is eliminated as much as possible at ω=0 and ω=π. When selecting the coefficients, the first flatness, the second flatness, and the target delay can be constrained based on the second constraint condition, and multiple flatness groups can be obtained based on the second preset condition, and then the target flatness group is determined from the multiple flatness groups according to the target passband bandwidth required by the user, and the coefficients determined under the target flatness group are used as the coefficients of the transfer function.

[0062] As an example, a second constraint condition may be constructed according to the first flatness, the second flatness, and the target delay, wherein the second constraint condition may include at least one of the following:

[0063] |KL|+1≤d≤K+L+1;

[0064] d has the same parity as K+L+1;

[0065] Wherein, K is the first flatness, which represents the number of constraints of the transfer function at the first phase; L is the second flatness, which represents the number of constraints of the transfer function at the second phase; the relative values ​​of K and L determine the width of the initial filter passband; d is the target delay, which is a non-negative integer.

[0066] It should be noted that, given a fixed set of K and L, d can be selected from (K+L-|KL|) / 2+1 different values. Similarly, given a target delay d, the first flatness and the second flatness can be selected from the (K,L) (i.e., flatness group) of the d combination method.

[0067] In addition, it should be noted that the target group delay can be expressed by the following formula:

[0068] τ=(dN) / 2 (3)

[0069] In the above formula (3), τ=(dN) / 2 must be an odd multiple of 1 / 2, and when K and L are closer, d has more selection data.

[0070] It is easy to notice that the flatness of the frequency domain representation function is determined based on the target passband bandwidth required by the user. Therefore, in practical applications, the relevant parameters of the filter can be adjusted based on the user's passband bandwidth requirements.

[0071] In addition, the flatness of the initial filter can be determined based on the target delay, and then the frequency domain representation function of the initial filter can be determined, thereby laying a data foundation for the generation of the target filter.

[0072] Further, after the first flatness and the second flatness are determined, under a preset first constraint condition, multiple coefficients of the frequency domain representation function are adjusted based on the first flatness, the second flatness and the target group delay.

[0073] As an example, the first constraint condition may be constructed according to the group delay of the initial filter at different phases and / or the even-order derivatives of the initial filter at different phases, wherein the first constraint condition may include at least one of the following:

[0074] G(ω=ω1)=τ(K>0);

[0075] G(ω=ω2)=τ(L>0);

[0076] G (2i) (ω=ω1)=0(i=1,…,K-1);

[0077] G (2i) (ω=ω2)=0(i=1,…,L-1);

[0078] Under the above first constraint, τ is the target group delay; ω is the phase of the initial filter; ω1 is the first phase; ω2 is the second phase; the phase difference between ω1 and ω2 is π; G(ω=ω1) is the group delay of the initial filter at the first phase; G(ω=ω2) ​​is the group delay of the initial filter at the second phase; K is the first flatness; L is the second flatness; G (2i) (ω=ω1) is the even-order derivative of the initial filter at the first phase; G (2i) (ω=ω2) is the even-order derivative of the initial filter at the second phase. The first flatness and the second flatness may be different.

[0079] The above four constraints are equivalent to the following two sets of equations:

[0080]

[0081]

[0082] It should be noted that the above two equations can be composed of Vandermonde-like matrices. Under high-order derivatives at certain points, the Vandermonde matrix can become an ill-conditioned function. In this regard, the coefficients of the filter can be expressed by the following formula:

[0083]

[0084] In the above formula, (x) i represents cumulative multiplication, i.e. (x) i =x.(x+1).(x+2)…(x+i-1).

[0085] Furthermore, after determining the target coefficient, we can Determine the frequency domain representation function.

[0086] After the frequency domain representation function is determined, the frequency domain representation function can be decomposed to obtain the frequency domain representation function corresponding to the all-pass sub-filter, and then construct the target filter of the all-pass sum structure.

[0087] The structure of the target filter of the all-pass and structure is as follows Figure 2 As shown, the corresponding transfer function can be expressed as follows:

[0088]

[0089] In the above formula (4), A1(z) and A2(z) are both stationary causal all-pass filters, and d is a non-negative integer.

[0090] It should be noted that the transfer function of the all-pass and structured filter can also be expressed by the following formula:

[0091]

[0092] From the two forms of transfer functions shown in the above formulas (4) and (5), it can be seen that the two forms of transfer functions have the same amplitude response, but the phase responses of the two forms are different, and the second form of transfer function has a pole outside the unit circle. In terms of the approximate amplitude response, considering the above two forms of transfer functions, it can be expressed as follows:

[0093]

[0094] In the above formula (6), A(z) generally has a pole located outside the unit circle.

[0095] As an example, A(z) can be factored as follows:

[0096]

[0097] In the above formula (7), A1(z) and A2(z) are both causal stationary all-pass filters.

[0098] From the above decomposition, we can see that the transfer function Therefore, in the design stage, we do not need to care about the stability of A(z). Even if A(z) is a non-stationary all-pass filter, we can obtain a causally stable low-pass filter by decomposing it. If A(z) is a causally stationary all-pass filter, then the total frequency response of A(z) has approximately linear phase. The linearity of the total response generally depends on the relative order of A1(z) and A2(z). As d increases, the phase of the total response becomes more linear, but the total delay also increases.

[0099] Consider the form An all-pass filter, where A(z) is an all-pass filter with N-order real coefficients. For an all-pass filter, A(z) can be expressed as follows:

[0100]

[0101] In the above formula (8), D(z) is the frequency domain representation function, which is -1 Nth-order polynomial.

[0102] If A(z) satisfies A(z)≈z in the passband -d , in the stop band, A(z)≈-z -d ,So is a low-pass filter, which is a maximally flat low-pass filter. This shows that the group delay of A(z) should be approximately d in both the passband and the stopband. Therefore, the group delay of the frequency domain representation function 1 / D(z) should be approximately (dN) / 2 in both the passband and the stopband.

[0103] In this application, for the frequency domain representation function 1 / D(z), its group delay is approximately (dN) / 2 in a maximally flat sense. The coefficient solution of D(z) can be obtained by setting the derivative of the group delay to zero at ω=0 and ω=π.

[0104] As mentioned above, since the all-pass filter A(z) usually has poles outside the unit circle, it needs to be factorized to obtain multiple all-pass sub-filters, that is, to execute step S102 and step S103.

[0105] In one example, after obtaining the zero point of the frequency domain representation function within the unit circle (i.e., the zero point inside the circle) and the zero point of the frequency domain representation function outside the unit circle (i.e., the zero point outside the circle), the product calculation is performed on the zero points inside the circle to obtain a first sub-frequency domain representation function, and the product calculation is performed on the zero points outside the circle to obtain a second sub-frequency domain representation function; finally, based on the first sub-frequency domain representation function and the second sub-frequency domain representation function, multiple sub-frequency domain representation functions are obtained.

[0106] Specifically, the first sub-frequency domain representation function can be determined by the following formula:

[0107]

[0108] The second sub-frequency domain representation function can be determined by the following formula:

[0109]

[0110] In the above formulas (9) and (10), z i (i=1,…,N) is the zero point of the frequency domain representation function D(z), D1(z) is the first sub-frequency domain representation function, and D2(z) is the second sub-frequency domain representation function.

[0111] It should be noted that by decomposing the frequency domain representation function into low-order sub-frequency domain representation functions, a basis is provided for the subsequent construction of low-order filters. Then, when filtering the digital signal based on the low-order filter, the amount of calculation must be smaller than that of the high-order filter, thereby achieving the effect of reducing the amount of calculation of the filter and improving the filtering efficiency of the filter.

[0112] After the frequency domain representation function is decomposed, step S103 may be executed, that is, constructing an all-pass sub-filter corresponding to each sub-frequency domain representation function based on the positional relationship between the poles of the frequency domain representation function and the unit circle.

[0113] Specifically, the number of poles of the frequency domain representation function that are within the unit circle is counted to obtain the first number of poles, and the number of poles of the frequency domain representation function that are outside the unit circle is counted to obtain the second number of poles; then, a first all-pass sub-filter is constructed based on the first number of poles and the first sub-frequency domain representation function, and a second all-pass sub-filter is constructed based on the second number of poles and the second sub-frequency domain representation function. The first number of poles is used to characterize the order of the first all-pass sub-filter; the second number of poles is used to characterize the order of the second all-pass sub-filter.

[0114] As an example, an all-pass filter A(z) usually has poles outside the unit circle, so it needs to be factorized, that is,

[0115]

[0116] In the above formula (11), A1(z) and A2(z) are both causally stable all-pass filters. The order of the all-pass filter A2(z) is equal to the number of poles of A(z) outside the unit circle, and the order of A1(z) is equal to the number of poles of A(z) inside and on the unit circle. In this embodiment, n1 and n2 represent the orders of the all-pass filters A1(z) and A2(z), respectively.

[0117] After determining D1(z) and D2(z), substitute them into formula (12):

[0118]

[0119] The all-pass sub-filters A1(z) and A2(z) can be obtained:

[0120]

[0121]

[0122] It should be noted that the all-pass sub-filter is constructed by the positional relationship between the poles of the frequency domain representation function and the unit circle, which can ensure the causal stability of the all-pass sub-filter. In addition, by constructing a low-order all-pass sub-filter, the construction of the subsequent all-pass and structured filter (i.e., the target filter) provides a data basis.

[0123] Furthermore, after a plurality of all-pass sub-filters are constructed, step S104 may be executed, that is, a parallel operation is performed on the plurality of all-pass sub-filters to construct a target filter.

[0124] Specifically, the second all-pass sub-filter is delayed based on the target delay of the initial filter to obtain a delayed second all-pass sub-filter; then, the delayed second all-pass sub-filter and the first all-pass sub-filter are operated in parallel to obtain a target filter.

[0125] As an example, let Thus, the all-pass sub-filters A1(z) and A2(z) are expressed as:

[0126]

[0127]

[0128] Substitute formula (15) and formula (16) into the transfer function H(z) of the target filter with an all-pass and structure, that is, substitute the all-pass sub-filters A1(z) and A2(z) into formula (4), thereby obtaining the target filter with an all-pass and structure, namely:

[0129]

[0130] It can be seen from the above formula (17) that the numerator of the target filter H(z) of the all-pass and structure is symmetrical and has an order of N+d. It is easy to notice that the target filter used to filter the digital signal only requires N multiplications and N+d delay calculations. Compared with the computational complexity of filtering the digital signal using a high-order filter in the prior art, the target filter constructed in the present application can reduce the amount of filtering calculations and improve the filtering efficiency.

[0131] It should be noted that after constructing the target filter, different flatnesses can be set at ω = 0 and ω = π, thereby obtaining a set of filters with different bandwidths, such as Figure 3 As shown, the flatness of the two low-pass filters on the left at ω = 0 is K = 3 and K = 8 respectively; the flatness of the two high-pass filters on the right at ω = π is L = 3 and L = 8 respectively. If the transfer functions of two low-pass filters or two high-pass filters are subtracted, a bandpass filter can be obtained, thereby obtaining a set of filters with approximately uniform bandwidth, such as Figure 4 shown.

[0132] From the above content, it can be seen that the present application uses the maximally flat low-pass filter as the basic filter, and designs a low-pass filter and a high-pass filter with an all-pass structure, wherein the design of the maximally flat low-pass filter can be planned as the group delay approximation of a single all-pole filter, that is, the group delay of the all-pole filter has a maximum flatness characteristic at ω=0 and ω=π.

[0133] The flatness of the target filter with an all-pass and structure provided by the present application may be unequal at ω=0 and ω=π, so that filters with different bandwidths can be obtained, and then a filter group with approximately uniform bandwidth can be obtained. Using the target filter with an all-pass and structure provided by the present application to process digital signals can effectively reduce the computational complexity and improve the operating efficiency.

[0134] The present application also provides a filter construction device, such as Figure 5 As shown, the device includes: a function determination module 501, a function decomposition module 502, a first construction module 503 and a second construction module 504.

[0135] A function determination module 501 is used to determine a frequency domain representation function of an initial filter based on a target group delay of the initial filter, wherein the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an Nth order polynomial, N is a positive integer greater than or equal to 0, and the initial filter is an Nth order filter;

[0136] A function decomposition module 502 is used to decompose the frequency domain representation function based on the positional relationship between the zero point of the frequency domain representation function and the unit circle to obtain multiple sub-frequency domain representation functions, wherein the sum of the orders of the multiple sub-frequency domain representation functions is N;

[0137] A first construction module 503 is used to construct an all-pass sub-filter corresponding to each sub-frequency domain representation function based on the positional relationship between the poles of the frequency domain representation function and the unit circle;

[0138] The second construction module 504 is used to perform a parallel operation on a plurality of all-pass sub-filters to construct a target filter.

[0139] As can be seen from the above, in the present application, in the process of splitting the high-order initial filter, the frequency domain representation function of the high-order initial filter is split into multiple sub-frequency domain representation functions. Since the sum of the orders of the multiple sub-frequency domain representation functions is the order of the frequency domain representation function of the high-order initial filter, the filtering accuracy of the target filter constructed based on the multiple sub-frequency domain representation functions will not be reduced, that is, the target filter constructed using the solution provided in the present application has the same filtering effect as the high-order initial filter.

[0140] In addition, since the target filter is a parallel operation of multiple low-order all-pass sub-filters, the amount of calculation required when filtering the digital signal is less than that of the high-order filter. It can be seen that compared with the existing high-order filters, the target filter constructed in this application can reduce the amount of filtering calculation and improve the filtering efficiency while ensuring the filtering accuracy.

[0141] In one example, the function determination module includes: a delay acquisition module, a flatness determination module, a coefficient adjustment module and a third construction module. The delay acquisition module is used to obtain the target delay of the initial filter, wherein the target delay is used to characterize the phase change between the input signal and the output signal of the initial filter; the flatness determination module is used to determine the first flatness and the second flatness corresponding to the frequency domain representation function based on the target delay, wherein the first flatness characterizes the passband bandwidth of the initial filter at the first phase, the second flatness characterizes the passband bandwidth of the initial filter at the second phase, the sum of the first flatness and the second flatness is N, and the first phase is less than the second phase; the coefficient adjustment module is used to adjust multiple coefficients of the frequency domain representation function based on the first flatness, the second flatness and the target group delay under the preset first constraint condition to obtain multiple target coefficients; the third construction module is used to perform weighted summation of the function variables of the frequency domain representation function based on the multiple target coefficients to obtain the frequency domain representation function.

[0142] In one example, the first constraint condition is constructed according to the group delay of the initial filter at different phases and / or the even-order derivatives of the initial filter at different phases. The first constraint condition includes at least one of the following:

[0143] G(ω=ω1)=τ(K>0);

[0144] G(ω=ω2)=τ(L>0);

[0145] G (2i) (ω=ω1)=0(i=1,…,K-1);

[0146] G (2i) (ω=ω2)=0(i=1,…,L-1);

[0147] Wherein, τ is the target group delay; ω is the phase of the initial filter; ω1 is the first phase; ω2 is the second phase; the phase difference between ω1 and ω2 is π; G(ω=ω1) is the group delay of the initial filter at the first phase; G(ω=ω2) ​​is the group delay of the initial filter at the second phase; K is the first flatness; L is the second flatness; G (2i) (ω=ω1) is the even-order derivative of the initial filter at the first phase; G (2i) (ω=ω2) is the even-order derivative of the initial filter at the second phase.

[0148] In one example, the flatness determination module is used to include: a first determination module and a second determination module. The first determination module is used to determine a plurality of flatness groups based on a target delay under a preset second constraint condition, wherein the plurality of flatness groups are a plurality of combinations of different first flatnesses and different second flatnesses; the second determination module is used to determine a target flatness group matching a preset target passband bandwidth from the plurality of flatness groups to obtain the first flatness and the second flatness.

[0149] In one example, a second constraint condition may be constructed based on the first flatness, the second flatness, and the target delay, wherein the second constraint condition includes at least one of the following:

[0150] |KL|+1≤d≤K+L+1;

[0151] d has the same parity as K+L+1;

[0152] Wherein, K is the first flatness; L is the second flatness; and d is the target delay.

[0153] In one example, the function decomposition module includes: a first zero point acquisition module, a second zero point acquisition module, a first zero point calculation module, a second zero point calculation module and a function construction module. The first zero point acquisition module is used to acquire the zero point of the frequency domain representation function within the unit circle to obtain the zero point within the circle; the second zero point acquisition module is used to acquire the zero point of the frequency domain representation function outside the unit circle to obtain the zero point outside the circle; the first zero point calculation module is used to perform product calculation on the zero point within the circle to obtain the first sub-frequency domain representation function; the second zero point calculation module is used to perform product calculation on the zero point outside the circle to obtain the second sub-frequency domain representation function; the function construction module is used to obtain multiple sub-frequency domain representation functions according to the first sub-frequency domain representation function and the second sub-frequency domain representation function.

[0154] In one example, the first building block includes: a first pole statistics module, a second pole statistics module, a fourth building block and a fifth building block. The first pole statistics module is used to count the number of poles of the frequency domain representation function that are within the unit circle to obtain a first pole number, and the first pole number is used to characterize the order of the first all-pass sub-filter; the second pole statistics module is used to count the number of poles of the frequency domain representation function that are outside the unit circle to obtain a second pole number, and the second pole number is used to characterize the order of the second all-pass sub-filter; the fourth building block is used to construct the first all-pass sub-filter based on the first pole number and the first sub-frequency domain representation function; the fifth building block is used to construct the second all-pass sub-filter based on the second pole number and the second sub-frequency domain representation function.

[0155] In one example, the second building block includes: a delay module and a parallel module. The delay module is used to perform a delay operation on the second all-pass sub-filter based on the target delay of the initial filter to obtain the delayed second all-pass sub-filter; the parallel module is used to perform a parallel operation on the delayed second all-pass sub-filter and the first all-pass sub-filter to obtain the target filter.

[0156] The filter construction device provided in the embodiment of the present application can implement each process implemented in the aforementioned method embodiment, and will not be described again here to avoid repetition.

[0157] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0158] Figure 6 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application is shown.

[0159] The electronic device may include a processor 601 and a memory 602 storing computer program instructions.

[0160] Specifically, the processor 601 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0161] The memory 602 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 602 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 602 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 602 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 602 is a non-volatile solid-state memory.

[0162] The memory may include read-only memory (ROM), random access memory (RAM), magnetic disk storage media devices, optical storage media devices, flash memory devices, electrical, optical or other physical / tangible memory storage devices. Thus, typically, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to one aspect of the present application.

[0163] The processor 601 implements any one of the filter construction methods in the above embodiments by reading and executing computer program instructions stored in the memory 602 .

[0164] In one example, the electronic device may further include a communication interface 603 and a bus 610. Figure 6 As shown, the processor 601, the memory 602, and the communication interface 603 are connected via a bus 610 and communicate with each other.

[0165] The communication interface 603 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0166] Bus 610 includes hardware, software or both, and the parts of electronic equipment are coupled to each other. For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 610 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.

[0167] In addition, in combination with the filter construction method in the above embodiment, the embodiment of the present application can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by a processor, any filter construction method in the above embodiment is implemented.

[0168] In addition, in combination with the filter construction method in the above embodiment, the present application embodiment can provide a vehicle for implementation. The vehicle includes at least one of the following: the filter construction device as described above; the electronic device as described above; and the computer-readable storage medium as described above.

[0169] When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes and implements any one of the filter construction methods in the above embodiments.

[0170] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.

[0171] The functional modules shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. Programs or code segments can be stored in machine-readable media, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable media" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.

[0172] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0173] The above reference is made to the flowchart and / or block diagram of the method, device, electronic device, storage medium and vehicle according to the embodiment of the present application. Various aspects of the present application are described. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0174] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.

Claims

1. A method for constructing a filter, characterized in that: include: Determine a frequency domain representation function of the initial filter based on a target group delay of the initial filter, wherein the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an Nth order polynomial, N is a positive integer greater than or equal to 0, and the initial filter is an Nth order filter; Based on the positional relationship between the zero point of the frequency domain representation function and the unit circle, the frequency domain representation function is decomposed to obtain a plurality of sub-frequency domain representation functions, wherein the sum of the orders of the plurality of sub-frequency domain representation functions is N; Based on the positional relationship between the poles of the frequency domain representation function and the unit circle, construct an all-pass sub-filter corresponding to each sub-frequency domain representation function; Multiple all-pass sub-filters are operated in parallel to construct a target filter.

2. The method according to claim 1, characterized in that Determining a frequency domain representation function of the initial filter based on a target group delay of the initial filter includes: Acquire a target delay of the initial filter, wherein the target delay is used to characterize a phase change between an input signal and an output signal of the initial filter; Determine a first flatness and a second flatness corresponding to the frequency domain representation function based on the target delay, wherein the first flatness represents a passband bandwidth of the initial filter at a first phase, the second flatness represents a passband bandwidth of the initial filter at a second phase, the sum of the first flatness and the second flatness is N, and the first phase is less than the second phase; Under a preset first constraint condition, adjusting multiple coefficients of the frequency domain representation function based on the first flatness, the second flatness, and the target group delay to obtain multiple target coefficients; The frequency domain representation function is obtained by performing weighted summation on the function variables of the frequency domain representation function based on the multiple target coefficients.

3. The method according to claim 2, characterized in that The method further comprises: The first constraint condition is constructed according to the group delay of the initial filter at different phases and / or the even-order derivatives of the initial filter at different phases.

4. The method according to claim 3, characterized in that: The first constraint condition includes at least one of the following: G(ω=ω1)=τ(K>0); G(ω=ω2)=τ(L>0); G (2i) (ω=ω1)=0(i=1,…,K-1); G (2i) (ω=ω2)=0(i=1,…,L-1); Wherein, τ is the target group delay; ω is the phase of the initial filter; ω1 is the first phase; ω2 is the second phase; the phase difference between ω1 and ω2 is π; G(ω=ω1) is the group delay of the initial filter at the first phase; G(ω=ω2) ​​is the group delay of the initial filter at the second phase; K is the first flatness; L is the second flatness; G (2i) (ω=ω1) is the even-order derivative of the initial filter at the first phase; G (2i) (ω=ω2) is the even-order derivative of the initial filter at the second phase.

5. The method according to claim 2, characterized in that: Determining a first flatness and a second flatness corresponding to the frequency domain representation function based on the target delay includes: Under a preset second constraint condition, determining a plurality of flatness groups based on the target delay, wherein the plurality of flatness groups are a plurality of combinations of different first flatnesses and different second flatnesses; A target flatness group matching a preset target passband bandwidth is determined from the plurality of flatness groups to obtain the first flatness and the second flatness.

6. The method according to claim 5, characterized in that The method further comprises: The second constraint condition is constructed according to the first flatness, the second flatness, and the target delay.

7. The method according to claim 6, characterized in that The second constraint condition includes at least one of the following: |KL|+1≤d≤K+L+1; d has the same parity as K+L+1; Wherein, K is the first flatness; L is the second flatness; and d is the target delay.

8. The method according to claim 1, characterized in that Based on the positional relationship between the zero point of the frequency domain representation function and the unit circle, the frequency domain representation function is decomposed to obtain multiple sub-frequency domain representation functions, including: Acquire the zero point of the frequency domain representation function within the unit circle to obtain the zero point within the circle; Acquire the zero point of the frequency domain representation function outside the unit circle to obtain the zero point outside the circle; Perform product calculation on the zero points in the circle to obtain a first sub-frequency domain representation function; Perform product calculation on the zero points outside the circle to obtain a second sub-frequency domain representation function; The multiple sub-frequency domain representation functions are obtained according to the first sub-frequency domain representation function and the second sub-frequency domain representation function.

9. The method according to claim 8, characterized in that Based on the positional relationship between the poles of the frequency domain representation function and the unit circle, constructing an all-pass sub-filter corresponding to each sub-frequency domain representation function, including: Counting the number of poles of the frequency domain representation function that are within the unit circle to obtain a first number of poles, where the first number of poles is used to characterize the order of the first all-pass sub-filter; Counting the number of poles of the frequency domain representation function that are outside the unit circle to obtain a second number of poles, where the second number of poles is used to characterize the order of the second all-pass sub-filter; constructing the first all-pass sub-filter based on the first number of poles and the first sub-frequency domain representation function; The second all-pass sub-filter is constructed based on the second number of poles and the second sub-frequency domain representation function.

10. The method according to claim 9, characterized in that Multiple all-pass sub-filters are operated in parallel to construct the target filter, including: Performing a delay operation on the second all-pass sub-filter based on the target delay of the initial filter to obtain a delayed second all-pass sub-filter; The delayed second all-pass sub-filter and the first all-pass sub-filter are operated in parallel to obtain the target filter.

11. A filter construction device, characterized in that: include: a function determination module, configured to determine a frequency domain representation function of an initial filter based on a target group delay of the initial filter, wherein the frequency domain representation function is used to characterize the transmission characteristics of the poles of the initial transfer function of the initial filter in the frequency domain, the target group delay is used to characterize the rate of change of the phase of the initial filter relative to the frequency, the frequency domain representation function is an Nth order polynomial, N is a positive integer greater than or equal to 0, and the initial filter is an Nth order filter; A function decomposition module, used for decomposing the frequency domain representation function based on the positional relationship between the zero point of the frequency domain representation function and the unit circle to obtain multiple sub-frequency domain representation functions, wherein the sum of the orders of the multiple sub-frequency domain representation functions is N; A first construction module is used to construct an all-pass sub-filter corresponding to each sub-frequency domain representation function based on the positional relationship between the poles of the frequency domain representation function and the unit circle; The second building module is used to perform a parallel operation on a plurality of all-pass sub-filters to build a target filter.

12. An electronic device, characterized in that: The electronic device comprises: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the method for constructing a filter according to any one of claims 1 to 10 is implemented.

13. A computer-readable storage medium, characterized in that: Computer program instructions are stored on the computer-readable storage medium, and when the computer program instructions are executed by the processor, the method for constructing the filter according to any one of claims 1 to 10 is implemented.

14. A vehicle, characterized in that: Include at least one of the following: The filter construction device as claimed in claim 11; The electronic device as claimed in claim 12; The computer readable storage medium of claim 13.

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