A Successive Approximation ADC Capacitance Mismatch Calibration Method
By setting the initial capacitance weight in the successive approximation ADC and iteratively update to match the probability density function of the input signal, the problem of capacitance mismatch calibration complexity and low efficiency is solved, and accurate capacitance weight calibration and performance improvement is achieved.
Patent Information
- Application Number
- CN202411362375.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2044-09-27
AI Technical Summary
In the prior art, when calibration of capacitor mismatch in successive approximation ADCs, the coordination of calibration circuits and timing circuits is required, which increases the complexity of circuit design and chip area, and also has the problems of large data volume and slow iteration speed.
By setting the initial value of each capacitor weight in the ADC to be calibrated, input a preset type of input signal to the ADC, collecting the output codewords, drawing the actual curve, and selecting the probability density function as the ideal curve according to the type of the input signal, iteratively updates the capacitance weight until the actual curve is closest to the ideal curve, and capacitance mismatch calibration is completed.
It realizes that all capacitance weights can be calibrated without the need for additional analog-to-digital converters and disturbance signals, and without the need for analog circuit coordination, thereby obtaining accurate capacitance weights, reducing circuit complexity and chip area.
Smart Images
Figure CN119382702B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuits, and particularly to a method for calibrating capacitor mismatch of a successive approximation ADC. Background Art
[0002] With the continuous development of integrated circuits, analog-to-digital converters (ADCs) are gradually developing towards high speed, high precision, and low power consumption. Successive approximation register (SAR) analog-to-digital converters have been widely used in the fields of 5G and WIFI6 / 7 wireless communications due to their simple structure, low power consumption, and good robustness. However, due to the influence of manufacturing process errors, problems such as capacitor mismatch occur, which has a great impact on the performance of SAR ADCs.
[0003] In order to eliminate the influence of capacitor mismatch, calibration techniques can be adopted. The first method is a mixed-signal self-calibration method. It first quantifies the capacitor mismatch, and then compensates the mismatch error through an auxiliary capacitor DAC during the analog-to-digital conversion process to adjust the capacitor value to the designed value. The second method is a pure digital calibration method. It realizes the capacitor calibration function by digitally estimating the capacitor mismatch and then correcting the capacitor weights in the digital domain.
[0004] However, the mixed-signal method requires the cooperation of calibration circuits and timing circuits, increasing the complexity of circuit design and the chip area. The pure digital calibration method has problems such as a large amount of data and a slow iteration speed. Summary of the Invention
[0005] The present invention provides a method for calibrating capacitor mismatch of a successive approximation ADC to solve the technical problems in the prior art that require the cooperation of calibration circuits and timing circuits, increasing the complexity of circuit design and the chip area, as well as the large amount of data and slow iteration speed existing in the prior art.
[0006] To solve the above technical problems, the present invention provides the following technical solutions:
[0007] On the one hand, the present invention provides a method for calibrating capacitor mismatch of a successive approximation ADC, including:
[0008] Setting the initial values of the weights of each capacitor in the ADC to be calibrated, inputting a preset type of input signal to the ADC to be calibrated, collecting the output codewords of the ADC to be calibrated, and plotting the actual curve of the output codewords;
[0009] According to the type of the input signal, select the corresponding probability density function, and plot the curve corresponding to the probability density function as the ideal curve of the output codewords of the ADC to be calibrated;
[0010] Based on the initial values of each capacitor weight, iteratively update each capacitor weight with a preset weight change step size, and redraw the actual curve after each iterative update of each capacitor weight. Find the capacitor weight that makes the actual curve closest to the ideal curve as the optimal capacitor weight to complete the calibration of capacitor mismatch.
[0011] Further, the collecting of the output codewords of the ADC to be calibrated includes:
[0012] Collect the output codewords of the ADC to be calibrated through a logic analyzer or an FPGA.
[0013] Further, the process of plotting the actual curve of the output codewords includes:
[0014] Multiply each output codeword by the corresponding capacitor weight and calculate the weighted sum D out , which is expressed by the formula:
[0015]
[0016] where d i represents the i-th output codeword; W i represents the capacitor weight corresponding to d i ; n represents the number of bits of the capacitor;
[0017] Perform histogram statistics on D out to obtain a histogram representing the distribution characteristics of D out ;
[0018] Obtain the height of each bin in the histogram, use the data points corresponding to the heights of each bin in the histogram as discrete points for curve fitting, and take the fitted curve as the actual curve of the output codewords.
[0019] Further, the selecting of the corresponding probability density function according to the type of the input signal includes:
[0020] When the input signal is a sine wave signal, the corresponding probability density function p(k) is:
[0021]
[0022] where k represents the independent variable; C 0 , C 1 are both preset fitting parameters.
[0023] Further, selecting a corresponding probability density function according to the type of the input signal further includes:
[0024] When the input signal is a ramp or triangular wave signal, the corresponding probability density function p(k) is:
[0025] p(k) = C 0 k
[0026] where k represents the independent variable; C 0 is a preset fitting parameter.
[0027] Further, finding the capacitance weight that makes the actual curve closest to the ideal curve as the optimal capacitance weight includes:
[0028] Calculating the sum of squared errors between the actual curve and the ideal curve; finding the capacitance weight that makes the sum of squared errors between the actual curve and the ideal curve the smallest as the optimal capacitance weight.
[0029] On the other hand, the present invention also provides an electronic device, which includes a processor and a memory; wherein, at least one instruction is stored in the memory, and the instruction is loaded and executed by the processor to implement the above method.
[0030] On another hand, the present invention also provides a computer-readable storage medium, in which at least one instruction is stored, and the instruction is loaded and executed by the processor to implement the above method.
[0031] The beneficial effects brought by the technical solution provided by the present invention at least include:
[0032] By setting the initial values of the capacitance weights in the ADC to be calibrated, inputting a preset type of input signal to the ADC to be calibrated, collecting the output codewords of the ADC to be calibrated, and drawing the actual curve of the output codewords; selecting a corresponding probability density function according to the type of the input signal, and drawing the curve corresponding to the probability density function as the ideal curve of the output codewords of the ADC to be calibrated; on the basis of the initial values of the capacitance weights, iteratively updating the capacitance weights with a preset weight change step size, and redrawing the actual curve after each iterative update of the capacitance weights, finding the capacitance weight that makes the actual curve closest to the ideal curve as the optimal capacitance weight. Thus, it is possible to calibrate all the capacitance weights and obtain accurate capacitance weights without introducing an additional analog-to-digital converter, without adding a perturbation signal, and without the cooperation of an analog circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.
[0034] Figure 1 is the flowchart of the successive approximation ADC capacitance mismatch calibration method provided by the embodiment of the present invention;
[0035] Figure 2 is the statistical histogram of the output codeword distribution corresponding to the sine input signal provided by the embodiment of the present invention;
[0036] Figure 3 is the statistical histogram of the output codeword distribution corresponding to the harmonic or triangular wave input signal provided by the embodiment of the present invention;
[0037] Figure 4 is the schematic diagram of the SFDR results before and after 200 - time Monte Carlo calibration with 0.5% capacitance mismatch added, provided by the embodiment of the present invention;
[0038] Figure 5 is the schematic diagram of the SNDR results before and after 200 - time Monte Carlo calibration with 0.5% capacitance mismatch added, provided by the embodiment of the present invention;
[0039] Figure 6 is a partial histogram before calibration of the calibration method with 0.5% capacitance mismatch added, provided by the embodiment of the present invention;
[0040] Figure 7 is a partial histogram after calibration of the calibration method with 0.5% capacitance mismatch added, provided by the embodiment of the present invention;
[0041] Figure 8 is the system block diagram of the electronic device provided by the embodiment of the present invention. Specific embodiments
[0042] To make the objectives, technical solutions, and advantages of the present invention clearer, the following will further describe the embodiments of the present invention in detail with reference to the accompanying drawings.
[0043] First of all, it should be noted that in the embodiments of the present invention, words such as "exemplarily" and "for example" are used to represent examples, illustrations, or explanations. Any embodiment or design solution described as "exemplary" in the present invention should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly, the use of the word "exemplarily" is intended to present concepts in a specific manner. In addition, in the embodiments of the present invention, the meaning expressed by "and / or" can be both, or it can be either one of the two.
[0044] The first embodiment
[0045] This embodiment provides a successive approximation ADC capacitance mismatch calibration method to obtain accurate capacitance weights. Specifically, the execution process of this method is as Figure 1 shown, including the following steps:
[0046] S1. Set the initial values of the capacitance weights in the ADC to be calibrated, input a preset type of input signal to the ADC to be calibrated, collect the output codewords of the ADC to be calibrated, and draw the actual curve of the output codewords;
[0047] It should be noted that the initial values of the capacitance weights can be set according to experience or relevant experimental data, and this embodiment does not make specific limitations on this. The input signal can be a sine wave signal, or a ramp or triangular wave signal. The output codewords are obtained by: collecting the output codewords of the ADC to be calibrated through a logic analyzer or FPGA. After collecting the output codewords, the way to draw the actual curve of the output codewords is as follows:
[0048] S11. Multiply the SAR ADC output codewords d 1 , d 2 , d 3 …d n , and then multiply them by the corresponding weights W 1 , W 2 , W 3 …W n to obtain the weighted sum D out , and the formula is expressed as:
[0049]
[0050] where d i represents the i-th output codeword; W i represents the capacitance weight corresponding to d i ; n represents the number of bits of the capacitance;
[0051] S12. Perform histogram statistics on D out to obtain a histogram representing the distribution characteristics of D out ;
[0052] S13. Obtain the height of each bin in the histogram, use the data points corresponding to the heights of the bins in the histogram as discrete points for curve fitting, and use the fitted curve as the actual curve of the output codewords;
[0053] where, when the input signal is a sine wave signal, in this embodiment, histogram statistics are performed on D out to obtain bin[1], bin[2], bin[3]…bin[k], asFigure 2 As shown, discrete points h(1), h(2), h(3) … h(k) representing the height of each bin can be obtained based on this. Curve fitting is performed using the discrete points to obtain the fitting function When the input signal is a ramp or triangular wave signal, in this embodiment, for D out Histogram statistics are performed to obtain bin[1], bin[2], bin[3] … bin[k], as Figure 3 shown. Based on this, discrete points h(1), h(2), h(3) … h(k) representing the height of each bin can be obtained. Curve fitting is performed using the discrete points to obtain the fitting function Among them, it should be noted that when performing histogram statistics on D out First, the value range of D needs to be determined according to the effective number of bits of the ADC out , and then this value range is equally divided into multiple intervals. Then, the number of samples of D falling into each interval is counted. That is, in the obtained histogram, each bin corresponds to the number of samples of D in a certain interval out . As for the interval size, it is based on the effective number of bits of the ADC and can be set according to experience. After obtaining the corresponding histogram, for each bin in the figure, the discrete point representing its height is the point with the middle value of the interval corresponding to the bin as the abscissa and the number of samples corresponding to the bin as the ordinate out .
[0054] S2. According to the type of the input signal, select the corresponding probability density function and draw the curve corresponding to the probability density function as the ideal curve of the output codeword of the ADC to be calibrated
[0055] Among them, when the input signal is a sine wave signal, its corresponding probability density function p(k) is
[0056]
[0057] where k represents the independent variable; C 0 , C 1 are fitting parameters, and these two values are related to the effective number of bits of the ADC and can be set according to experience in practical applications
[0058] When the input signal is a ramp or triangular wave signal, its corresponding probability density function p(k) is
[0059] p(k) = C 0 k
[0060] where k represents the independent variable; C 0 is a fitting parameter, and this value is related to the effective number of bits of the ADC and can be set according to experience in practical applications
[0061] S3. Based on the initial values of each capacitance weight, iteratively update each capacitance weight with a preset weight change step size, and redraw the actual curve after each iterative update of each capacitance weight. Find the capacitance weight that makes the actual curve closest to the ideal curve as the optimal capacitance weight to complete the capacitance mismatch calibration;
[0062] Specifically, in this embodiment, the capacitance weight W 1 ±Δ, W 2 ±Δ, W 3 ±Δ…W n ±Δ is continuously iterated, where Δ is the weight change step size, so that the mean square error of the ideal function p(k) and the fitting function sum of squared errors is minimized, and the weight that minimizes the sum of squared errors between the ideal function and the fitting function is used as the optimal weight.
[0063] Furthermore, to illustrate the effectiveness and necessity of the present invention, a 12-bit SAR ADC circuit is built in this embodiment, and 0.5% capacitance mismatch is added to simulate the errors that may be brought in the actual process; Figure 4 shows the schematic diagram of the SFDR results before and after 200 times of Monte Carlo calibration with 0.5% capacitance mismatch added in this embodiment (the dark color is before calibration, and the light color is after calibration); Figure 5 shows the schematic diagram of the SNDR results before and after 200 times of Monte Carlo calibration with 0.5% capacitance mismatch added in this embodiment (the dark color is before calibration, and the light color is after calibration); Refer to Figure 4 and Figure 5 As shown, it can be seen that after adding 0.5% capacitance mismatch, the performance of the SAR ADC drops sharply; at the same time, the performance is greatly improved after calibration. The mean value of SFDR (spurious-free dynamic range) increases from 61.43 dB to 83.32 dB, and the mean value of SNDR (signal-to-noise distortion ratio) increases from 55.69 dB to 71.63 dB, proving the effectiveness of the calibration method provided by the present invention.
[0064] Figure 6 shows the histogram of part (bin[8]-bin
[26] ) before calibration by the calibration method with 0.5% capacitance mismatch added in this embodiment; Figure 7 shows the histogram of part (bin[8]-bin
[26] ) after calibration by the calibration method with 0.5% capacitance mismatch added in this embodiment; Refer to Figure 6 and Figure 7 As shown, it can be seen that after adding 0.5% capacitance mismatch, the degree of fitting between the discrete points and the curve is low and scattered; at the same time, after calibration, the degree of fitting between the discrete points and the curve is high and concentrated, proving the necessity of the calibration method provided by the present invention.
[0065] Second Embodiment
[0066] This embodiment provides an electronic device, as Figure 8 shown. The electronic device includes: a processor and a memory; wherein, the processor and the memory can be connected through a communication bus; at least one instruction is stored in the memory, and the instruction is loaded and executed by the processor to implement the method of the above first embodiment. In addition, the electronic device may further include a transceiver, and the processor and the transceiver can be connected through a communication bus, and the transceiver is used for communicating with other devices.
[0067] Next, in combination with Figure 8 each component of the electronic device will be specifically introduced:
[0068] Among them, the processor is the control center of the electronic device. The electronic device may include multiple processors, and each of these processors may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). Here, the processor may be a single processor or a collective term for multiple processing elements. For example, the processor is one or more central processing units (CPU), or may also be other general-purpose processors, application specific integrated circuits (ASIC), or one or more integrated circuits configured to implement the embodiments of the present invention. For example: one or more digital signal processors (DSP), or one or more field programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. The processor can execute various functions of the electronic device by running or executing software programs stored in the memory and calling data stored in the memory.
[0069] In a specific implementation, as an embodiment, the processor may include one or more CPUs, such as Figure 8 the CPU0 and CPU1 shown in
[0070] The memory is used to store the software program for implementing the solution of the present invention and is controlled by the processor for execution. The specific implementation manner may refer to the above method embodiment and will not be elaborated here.
[0071] Optionally, the memory may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or may also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may be integrated with the processor or may exist independently and be coupled to the processor through the interface circuit ( Figure 8 not shown) of the electronic device. The embodiments of the present invention do not make specific limitations in this regard.
[0072] The transceiver may include a receiver and a transmitter ( Figure 8 not shown separately). Among them, the receiver is used to implement the receiving function, and the transmitter is used to implement the transmitting function. The transceiver may be integrated with the processor or may exist independently and be coupled to the processor through the interface circuit ( Figure 8 not shown) of the electronic device. The embodiments of the present invention do not make specific limitations in this regard.
[0073] In addition, it should be noted that Figure 8 the structure of the electronic device shown in
[0074] does not constitute a limitation on the device. The actual device may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements. In addition, the technical effects achieved by the electronic device when executing the method of the first embodiment above may refer to the technical effects described in the first embodiment above, so they will not be repeated here.
[0075] This embodiment provides a computer-readable storage medium, in which at least one instruction is stored. The instruction is loaded and executed by the processor to implement the method of the first embodiment above. Among them, the computer-readable storage medium may be ROM, random access memory, CD-ROM, magnetic tape, floppy disk, and optical data storage devices, etc. The instructions stored therein can be loaded and executed by the processor in the terminal to implement the above method.
[0076] In addition, it should be noted that the present invention can be provided as a method, apparatus, or computer program product. Therefore, the embodiments of the present invention can take the form of all or part of a hardware embodiment, all or part of a software embodiment, or an embodiment combining software and hardware aspects. Moreover, when implemented using software, the embodiments of the present invention can take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program code. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the processes or functions described in the embodiments of the present invention are fully or partially generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (such as infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center containing one or more collections of available media. The available media can be magnetic media (such as floppy disks, hard disks, magnetic tapes), optical media (such as DVDs), or semiconductor media. The semiconductor media can be a solid-state drive.
[0077] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, and the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing terminal device generate a device for implementing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.
[0078] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device that implements the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1the functions specified in one or more boxes. These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable terminal device provide steps for implementing the functions specified in one or more processes and / or boxes Figure 1 one process or more processes and / or boxes Figure 1 steps for implementing the functions specified in one or more boxes
[0079] It should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or terminal device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the existence of additional identical elements in the process, method, article or terminal device comprising the element. In addition, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. Among them, A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship, which can be understood specifically with reference to the context. "At least one" means one or more, and "a plurality" means two or more. "At least one of the following (items)" or similar expressions refer to any combination of these items, including any combination of single (item) or plural (items). For example, at least one of a, b or c can mean: a, b, c, a - b, a - c, b - c, or a - b - c, where a, b, c can be single or multiple
[0080] In addition, it can be understood that in various embodiments of the present invention, the magnitude of the serial numbers of the above processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention
[0081] Those of ordinary skill in the art will realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.
[0082] In several embodiments provided by the present invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of functional modules / units is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces. The indirect couplings or communication connections of devices or units can be in electrical, mechanical, or other forms. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they can be located in one place or distributed to multiple network units. One can select some or all of the units according to actual needs to achieve the purpose of the solution of this embodiment. In addition, in each embodiment of the present invention, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit.
[0083] If the method is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs.
[0084] Finally, it should be noted that the above description is only the preferred embodiment of the present invention. It should be pointed out that although the preferred embodiments of the present invention have been described, for those of ordinary skill in the art, once they know the basic creative concept of the present invention, several improvements and refinements can be made without departing from the principle described in the present invention. These improvements and refinements should also be regarded as the protection scope of the present invention. Therefore, the appended claims are intended to be construed to include the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the present invention.
Claims
1. A method for calibrating capacitance mismatch of a successive approximation ADC, characterized in that: include: The initial value of each capacitor weight in the analog-to-digital converter ADC to be calibrated is set, a preset type of input signal is input to the ADC to be calibrated, an output codeword of the ADC to be calibrated is collected, and an actual curve of the output codeword is drawn, including: multiplying each output codeword with the corresponding capacitor weight, and calculating the weighted sum D out , the formula is: Among them, d i represents the i-th output codeword; W i Indicates d i The corresponding capacitance weight; n represents the number of bits of capacitance; for D out Perform histogram statistics to get the value D out A histogram of the distribution characteristics; obtaining the height of each bin in the histogram, taking the data points corresponding to the heights of each bin in the histogram as discrete points for curve fitting, and taking the fitted curve as the actual curve of the output codeword; wherein, in the case of D out When performing histogram statistics, we first need to determine D based on the effective number of bits of the ADC. out Then divide this value range into multiple intervals at equal intervals, and then count the D values falling into each interval. out The number of samples, that is, each bin in the statistical histogram corresponds to a D in a certain interval. out The number of samples and the size of the interval are based on the effective number of bits of the ADC and are set based on experience. After obtaining the corresponding histogram, for each bin in the graph, the discrete point representing its height is the point with the middle value of the interval corresponding to the bin as the horizontal coordinate and the number of samples corresponding to the bin as the vertical coordinate. According to the type of input signal, a corresponding probability density function is selected, and a curve corresponding to the probability density function is drawn as an ideal curve of the output codeword of the ADC to be calibrated; Based on the initial value of each capacitor weight, each capacitor weight is iteratively updated with a preset weight change step, and the actual curve is redrawn after each iterative update of each capacitor weight, and the capacitor weight that makes the actual curve closest to the ideal curve is found as the optimal capacitor weight to complete the capacitor mismatch calibration.
2. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: The collecting the output codeword of the ADC to be calibrated includes: The output codewords of the ADC to be calibrated are collected through a logic analyzer or FPGA.
3. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: The selecting a corresponding probability density function according to the type of the input signal includes: When the input signal is a sinusoidal signal, the corresponding probability density function p(k) is: Among them, k represents the independent variable; C0 and C1 are both preset fitting parameters.
4. The method for calibrating capacitance mismatch of a successive approximation ADC as claimed in claim 3, wherein: The selecting a corresponding probability density function according to the type of the input signal also includes: When the input signal is a ramp or triangle wave signal, the corresponding probability density function p(k) is: p(k)=C0k Among them, k represents the independent variable; C0 is a preset fitting parameter.
5. The method for calibrating capacitance mismatch of a successive approximation ADC according to claim 1, wherein: Finding a capacitance weight that makes the actual curve closest to the ideal curve as the optimal capacitance weight includes: The sum of square errors between the actual curve and the ideal curve is calculated; and a capacitance weight that minimizes the sum of square errors between the actual curve and the ideal curve is found as an optimal capacitance weight.