Common-mode gain suppression active balun architecture, receiver and communication system

Abstract

The invention discloses a common-mode gain suppression active balun architecture, a receiver and a communication system. The common-mode gain suppression active balun architecture comprises a first amplifier unit, a second amplifier unit and a trans-impedance amplifier unit. The first amplifier unit is connected with a first input voltage and a second bias voltage and outputs a first current path and a second current path; the second amplifier unit is connected with a second input voltage and a second bias voltage and outputs a first current path and a second current path; the transimpedance amplifier unit amplifies the first current path and the second current path and then outputs a first differential signal and a second differential signal. The first current path and the second current path generated by the two amplifier units are added to the input node of the trans-impedance amplifier unit in a crossed mode, when differential signals are subtracted, common-mode components can be restrained, and therefore the gain and phase mismatch of output signals can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a common-mode gain suppression active balun architecture, a receiver and a communication system. Background Art

[0002] In high-speed optical or wired communications, there are scenarios where single-ended signals are used to transmit high-speed serial data. In this scenario, single-ended signals have weak anti-interference capabilities and are generally converted into differential signals through baluns and then processed by subsequent modules.

[0003] Balun is a structure used to convert single-ended signals into differential signals in communication systems. It can improve signal transmission efficiency and anti-interference ability, reduce signal distortion and noise, and improve eye diagram quality. Balun is the core component of the receiving end of a single-ended communication system. Traditional baluns based on passive devices use passive components such as capacitors, inductors, transmission lines or coaxial cables to achieve the function of converting single-ended signals into differential signals. Active baluns have the following advantages over traditional passive baluns: 1. It can provide gain, enhance signal strength, and improve signal-to-noise ratio; 2. It can provide buffering, isolate signal sources and loads, and reduce interference; 3. The device is small in size and easy to integrate into the chip.

[0004] However, due to the characteristics of the transistors or triodes of the active balun, the circuit common-mode gain of the traditional active balun is high, resulting in obvious gain and phase mismatch between the output signals.

[0005] Therefore, the prior art still needs to be improved and developed. Summary of the invention

[0006] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a common-mode gain suppression active balun architecture, a receiver and a communication system to solve the problem of obvious gain and phase mismatch between output signals of a traditional active balun.

[0007] The technical solution of the present invention is as follows:

[0008] In a first aspect, the present invention provides a common-mode gain suppression active balun architecture, which includes: a first amplifier unit, a second amplifier unit and a transimpedance amplifier unit; wherein,

[0009] The first amplifier unit receives a first input voltage and a second bias voltage, and outputs a first current path and a second current path;

[0010] The second amplifier unit is connected to a second input voltage and a second bias voltage, and outputs a first current path and a second current path;

[0011] The output end of the first amplifier unit and the output end of the second amplifier unit are cross-connected with the input end of the transimpedance amplifier unit, and the first current path and the second current path are cross-added at the input end of the transimpedance amplifier unit;

[0012] The transimpedance amplifier unit amplifies the first current path and the second current path and outputs a first differential signal and a second differential signal; wherein the first differential signal and the second differential signal both include a summation signal of the first current path and the second current path.

[0013] According to a further configuration of the present invention, the transimpedance amplifier unit includes a first transimpedance amplifier and a second transimpedance amplifier; wherein,

[0014] The first transimpedance amplifier is connected to the first amplifier unit, and is used to amplify the first current path and the second current path to output a first differential signal;

[0015] The second transimpedance amplifier is connected to the second amplifier unit, and is used to amplify the first current path and the second current path to output a second differential signal.

[0016] According to a further configuration of the present invention, the first amplifier unit includes: a first MOS tube, a second MOS tube and a third MOS tube;

[0017] The gate of the first MOS transistor is connected to a first input voltage, the drain of the first MOS transistor is connected to the gate of the third MOS transistor, and the source of the first MOS transistor is grounded via a current source;

[0018] The gate of the second MOS tube is connected to the first bias voltage, the drain of the second MOS tube is connected to the drain of the third MOS tube, and the source of the second MOS tube is grounded via a current source;

[0019] The source of the third MOS tube is connected to the power supply voltage;

[0020] A common terminal of the drain of the second MOS tube and the drain of the third MOS tube is connected to an input terminal of the first transimpedance amplifier.

[0021] According to a further configuration of the present invention, the second amplifier unit includes: a fourth MOS tube, a fifth MOS tube and a sixth MOS tube; wherein,

[0022] The gate of the fourth MOS tube is connected to the second input voltage, the drain of the fourth MOS tube is connected to the drain of the sixth MOS tube, and the source of the fourth MOS tube is grounded via a current source;

[0023] The gate of the fifth MOS tube is connected to the second bias voltage, the drain of the fifth MOS tube is connected to the gate of the sixth MOS tube, and the source of the fifth MOS tube is grounded via a current source;

[0024] The source of the sixth MOS tube is connected to the power supply voltage;

[0025] The common terminal of the drain of the fourth MOS tube and the drain of the sixth MOS tube is connected to the input terminal of the second transimpedance amplifier.

[0026] According to a further configuration of the present invention, the common-mode suppression active balun architecture further includes: a seventh MOS transistor, an eighth MOS transistor, a first resistor and a second resistor; wherein,

[0027] One end of the first resistor is connected to the drain of the first MOS transistor, and the other end of the first resistor is connected to the gate of the seventh MOS transistor;

[0028] The drain of the seventh MOS tube is connected to the drain of the first MOS tube, and the source of the seventh MOS tube is connected to the power supply voltage;

[0029] One end of the second resistor is connected to the drain of the fifth MOS transistor, and the other end of the second resistor is connected to the gate of the eighth MOS transistor;

[0030] The drain of the eighth MOS tube is connected to the drain of the fifth MOS tube, and the source of the eighth MOS tube is connected to the power supply voltage.

[0031] According to a further configuration of the present invention, the common-mode rejection active balun architecture further includes a low-frequency filter, which is connected to the input end of the transimpedance amplifier unit and is used to filter out low-frequency component signals.

[0032] According to a further configuration of the present invention, the first transimpedance amplifier includes: a ninth MOS transistor, a tenth MOS transistor and a first feedback resistor; wherein,

[0033] The gate of the ninth MOS tube is connected to the gate of the tenth MOS tube, the drain of the ninth MOS tube is connected to the drain of the tenth MOS tube, the source of the ninth MOS tube is connected to the power supply voltage, and the source of the tenth MOS tube is grounded via a current source;

[0034] The first feedback resistor is connected between an input terminal and an output terminal of the first transimpedance amplifier.

[0035] According to a further configuration of the present invention, the second transimpedance amplifier comprises: an eleventh MOS transistor, a twelfth MOS transistor and a second feedback resistor; wherein,

[0036] The gate of the eleventh MOS tube is connected to the gate of the twelfth MOS tube, the drain of the eleventh MOS tube is connected to the drain of the twelfth MOS tube, the source of the eleventh MOS tube is connected to the power supply voltage, and the source of the twelfth MOS tube is grounded via a current source;

[0037] The second feedback resistor is connected between the input terminal and the output terminal of the second transimpedance amplifier.

[0038] In a second aspect, the present invention provides a receiver comprising the common-mode rejection active balun architecture as described above.

[0039] In a third aspect, the present invention provides a communication system, which comprises the receiver as described above.

[0040] The present invention provides a common-mode gain suppression active balun architecture, a receiver and a communication system, wherein the common-mode gain suppression active balun architecture includes: a first amplifier unit, a second amplifier unit and a transimpedance amplifier unit. The first amplifier unit is connected to a first input voltage and a second bias voltage, and outputs a first current path and a second current path; the second amplifier unit is connected to a second input voltage and a second bias voltage, and outputs a first current path and a second current path; the output end of the first amplifier unit, the output end of the second amplifier unit and the input end of the transimpedance amplifier unit are cross-connected, and the first current path and the second current path are cross-added at the input end of the transimpedance amplifier unit; the transimpedance amplifier unit amplifies the first current path and the second current path and outputs a first differential signal and a second differential signal; wherein the first differential signal and the second differential signal both include the summed signal of the first current path and the second current path. The two amplifier units in the present invention can both generate a first current path and a second current path, and the first current path and the second current path generated by the two amplifier units are cross-added at the input node of the transimpedance amplifier unit. Since the first differential signal and the second differential signal output by the transimpedance amplifier unit both include the summed signal of the first current path and the second current path, when the differential signals are subtracted, the common-mode component can be suppressed, thereby reducing the gain and phase mismatch of the output signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary personnel in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0042] Figure 1It is the schematic diagram of the traditional active balun architecture and its small signal model.

[0043] Figure 2 Schematic diagram of the common mode gain suppression active balun architecture of the present invention.

[0044] Figure 3 It is a circuit schematic diagram of the common-mode gain suppression active balun architecture in the present invention and its common-mode small signal model.

[0045] Figure 4 3 is a comparison diagram of the common-mode gain of the novel active balun provided by the present invention and the traditional active balun in one embodiment of the present invention.

[0046] Figure 5 It is a comparison diagram of gain mismatch and phase mismatch between the novel active balun provided by the present invention and the traditional active balun in one embodiment of the present invention.

[0047] The reference numerals in the drawings are: 100, a first amplifier unit; 200, a second amplifier unit; 300, a transimpedance amplifier unit. DETAILED DESCRIPTION

[0048] The present invention provides a common-mode gain suppression active balun architecture, a receiver and a communication system. In order to make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0049] In the embodiments and the scope of the patent application, unless the text specifically defines the article, "a", "an", "the" and "the" may also include plural forms. If there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0050] It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when an element is said to be "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there can also be intermediate elements. In addition, the "connection" or "coupling" used herein can include wireless connection or wireless coupling. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.

[0051] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined as herein.

[0052] In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0053] The inventor has found that for an active balun circuit, one end of the differential input of the circuit is the input signal, and the other end is the bias signal. in It can be written as (V in +V in ) / 2, bias voltage V B It can be expressed as (V in -V in ) / 2. Each of them contains the common-mode signal V in / 2 and the differential signal (V in / 2, -V in / 2).

[0054] like Figure 1 As shown, for the traditional current mode logic type active balun circuit, the differential output signal V outp and V outn For example, they can be expressed as:

[0055]

[0056] Among them, A CM and A CM , which represent the common-mode gain and differential-mode gain, respectively. The mismatch between differential signals can be expressed as ΔV OUT express:

[0057]

[0058] Enhanced common-mode rejection results in a smaller differential signal mismatch, making the output signal closer to the ideal differential signal. The small signal common-mode gain of the traditional current-mode logic type active balun circuit can be expressed as:

[0059]

[0060] Among them, r O is the equivalent output impedance of the tail current source, g m1 is the transconductance of transistor M1, g m2 is the transconductance of transistor M2. Due to the finite output impedance and parasitic capacitance, the common-mode gain cannot be completely cancelled. Therefore, the traditional current-mode logic type active balun circuit has an amplitude and phase mismatch between the outputs at its differential output P / N node.

[0061] In response to the above technical problems, the present invention provides a common-mode gain suppression active balun architecture, a receiver and a communication system. The two amplifier units in the common-mode gain suppression active balun architecture can both generate a first current path and a second current path, and the first current path and the second current path generated by the two amplifier units are cross-added at the input node of the transimpedance amplifier unit. Because the first differential signal and the second differential signal output by the transimpedance amplifier unit both include the summed signal of the first current path and the second current path, when the differential signals are subtracted, the common-mode component can be suppressed, thereby reducing the gain and phase mismatch of the output signal, which is more competitive than traditional passive baluns.

[0062] Please also see Figures 2 to 5 The present invention provides a preferred embodiment of a common-mode gain suppression active balun architecture.

[0063] In some embodiments, Figure 2 As shown, the present invention provides a common-mode gain suppression active balun architecture, which includes: a first amplifier unit 100, a second amplifier unit 200 and a transimpedance amplifier unit 300. The first amplifier unit 100 is connected to a first input voltage and a second bias voltage, and outputs a first current path Path1 and a second current path Path2; the second amplifier unit 200 is connected to a second input voltage V in2 With the second bias voltage V b2 , and outputs a first current path Path1 and a second current path Path2; the output end of the first amplifier unit 100, the output end of the second amplifier unit 200 and the input end of the transimpedance amplifier unit 300 are cross-connected, and the first current path Path1 and the second current path Path2 are cross-added at the input end of the transimpedance amplifier unit 300; the transimpedance amplifier unit 300 amplifies the first current path Path1 and the second current path Path2 and outputs a first differential signal V outp and the second differential signal V outn ; Wherein, the first differential signal V outp The second differential signal V outn Both include a summation signal of the first current path and the second current path.

[0064] In this embodiment, the active balun architecture is composed of two amplifier units and one transimpedance amplifier unit, wherein both amplifier units can generate a first current path Path1 and a second current path Path2, that is, the first amplifier unit 100 and the second amplifier unit 200 can generate a first current path Path1 and a second current path Path2 respectively. The first current path Path1 and the second current path Path2 generated by the two amplifier units are cross-added at the input node of the transimpedance amplifier unit, and can be summed at the input end of the transimpedance amplifier unit. Due to the first differential signal V output by the transimpedance amplifier unit outp and the second differential signal V outn Both include the summed signal of the first current path Path1 and the second current path Path2. When the differential signals are subtracted, the common-mode component can be suppressed, and only the differential mode signal is amplified, thereby reducing the gain and phase mismatch of the output signal. It is more competitive than the traditional passive balun.

[0065] In some embodiments, Figure 2 and Figure 3 As shown, the transimpedance amplifier unit 300 includes a first transimpedance amplifier and a second transimpedance amplifier. The first transimpedance amplifier is connected to the first amplifier unit and is used to amplify the first current path Path1 and the second current path Path2 and then output a first differential signal V outp The second transimpedance amplifier is connected to the second amplifier unit, and is used to amplify the first current path Path1 and the second current path Path2 and then output a second differential signal V outn .

[0066] In this embodiment, the transimpedance amplifier unit 300 is composed of the first transimpedance amplifier and the second transimpedance amplifier. The output signal V is formed by adding the first current path Path1 and the second current path Path2 output by the first amplifier unit 100. op After being amplified by the first transimpedance amplifier, a first differential signal V is output. outp The output signal V is formed by adding the first current path Path1 and the second current path Path2 output by the second amplifier unit. on After being amplified by the second transimpedance amplifier, a second differential signal V is output. outn Therefore, the signals outputted from the two output terminals of the transimpedance amplifier unit both include the summed signals of the first current path Path1 and the second current path Path2, and when the two differential signals are subtracted, the common mode component is suppressed.

[0067] In some embodiments, Figure 2 and Figure 3 As shown, the first amplifier unit 100 includes: a first MOS tube M1, a second MOS tube M2 and a third MOS tube M3; the gate of the first MOS tube M1 is connected to the first input voltage V in1 The drain of the first MOS tube M1 is connected to the gate of the third MOS tube M3, and the source of the first MOS tube M1 is grounded through a current source; the gate of the second MOS tube M2 is connected to a first bias voltage V b1 , the drain of the second MOS tube M2 is connected to the drain of the third MOS tube M3, and the source of the second MOS tube M2 is grounded via a current source; the source of the third MOS tube M3 is connected to a power supply voltage VDD; and the common terminal of the drain of the second MOS tube M2 and the drain of the third MOS tube M3 is connected to the input terminal of the first transimpedance amplifier.

[0068] Furthermore, the second amplifier unit 200 includes: a fourth MOS transistor M4, a fifth MOS transistor M5 and a sixth MOS transistor M6; wherein the gate of the fourth MOS transistor M4 is connected to the second input voltage V in2 The drain of the fourth MOS tube M4 is connected to the drain of the sixth MOS tube M6, and the source of the fourth MOS tube M4 is grounded via a current source; the gate of the fifth MOS tube M5 is connected to the second bias voltage V b2 , the drain of the fifth MOS tube M5 is connected to the gate of the sixth MOS tube M6, and the source of the fifth MOS tube M5 is grounded via a current source; the source of the sixth MOS tube M6 is connected to the power supply voltage VDD; the common terminal of the drain of the fourth MOS tube M4 and the drain of the sixth MOS tube M6 is connected to the input terminal of the second transimpedance amplifier.

[0069] Specifically, the first input voltage V in1 Applied to the input terminal of the first MOS tube, the second input voltage V in2 Applied to the input end of the fourth MOS tube M4, the first bias voltage V b1 Applied to the input terminal of the second MOS tube M2, the second bias voltage V b2 The current is applied to the input end of the fifth MOS transistor M5, thus forming signals of two paths, namely, the first current path Path1 and the second current path Path2.

[0070] Among them, V cmrepresents the common-mode small signal input, M1+M5 represents the addition of the common-mode components of the first MOS tube and the fifth MOS tube, M2+M4 represents the addition of the common-mode components of the second MOS tube and the fourth MOS tube, M3+M6 represents the addition of the common-mode components of the third MOS tube and the sixth MOS tube, and M7+M8 represents the addition of the common-mode components of the seventh MOS tube and the eighth MOS tube. The gate of the first MOS tube M1 is connected to the first input voltage V in1 The first input signal is amplified by the first MOS tube M1 and then amplified by the third MOS tube M3, and is amplified by the second input voltage V of the fourth MOS tube M4. in2 Common drain amplification (source follower) is performed, and then common gate amplification is performed in the second MOS tube M2. The first input voltage V in1 With the second input voltage V in2 The drain of the second MOS tube M2 and the drain of the third MOS tube M3 are added together to form an output signal V op The gate of the fourth MOS tube M4 is connected to the second input voltage V in2 , the second input voltage V in2 The fourth MOS tube M4 performs common source amplification, and the first input voltage V of the first MOS tube M1 is in1 Perform common drain amplification (source follower), and then perform common gate amplification on the fifth MOS tube M5. The second input voltage V in2 With the first input voltage V in1 The output signal is added at the common terminal of the drain of the fourth MOS transistor M4 and the drain of the sixth MOS transistor. In this way, by cross-coupling the single-ended input voltage and the bias voltage to the input terminals of the two amplifier units, the signals on the two output paths with different strengths (the first current path Path1 and the second current path Path2) are added at one output terminal, so each output signal contains the signals of the first current path Path1 and the second current path Path2, and when the differential signals are subtracted, the common mode component can be suppressed.

[0071] In some embodiments, Figure 3As shown, the common-mode suppression active balun architecture also includes: a seventh MOS tube M7, an eighth MOS tube M8, a first resistor R1 and a second resistor R2. Among them, one end of the first resistor R1 is connected to the drain of the first MOS tube M1, and the other end of the first resistor R1 is connected to the gate of the seventh MOS tube M7; the drain of the seventh MOS tube M7 is connected to the drain of the first MOS tube M1, and the source of the seventh MOS tube M7 is connected to the power supply voltage VDD; one end of the second resistor R2 is connected to the drain of the fifth MOS tube M5, and the other end of the second resistor R2 is connected to the gate of the eighth MOS tube M8; the drain of the eighth MOS tube M8 is connected to the drain of the fifth MOS tube M5, and the source of the eighth MOS tube M8 is connected to the power supply voltage VDD.

[0072] In this embodiment, the seventh MOS transistor M7 and the first resistor R1 form an active inductor, the eighth MOS transistor M8 and the second resistor R2 form an active inductor, and the first resistor R1 and the second resistor R2 are active peak resistors, which can improve the bandwidth without occupying a large area.

[0073] In some embodiments, Figure 2 As shown, the common-mode rejection active balun architecture also includes a low-frequency filter LPF, which is connected to the input end of the transimpedance amplifier unit 300 and is used to filter out low-frequency component signals so that the first input voltage and the second input voltage are signals with high-frequency components.

[0074] In some embodiments, Figure 2 and Figure 3 As shown, the first transimpedance amplifier includes: a ninth MOS tube M9, a tenth MOS tube M10 and a first feedback resistor R F1 The gate of the ninth MOS tube M9 is connected to the gate of the tenth MOS tube M10, the drain of the ninth MOS tube M9 is connected to the drain of the tenth MOS tube M10, the source of the ninth MOS tube M9 is connected to the power supply voltage VDD, and the source of the tenth MOS tube M10 is grounded via a current source; the first feedback resistor R F1 Connected between the input terminal and the output terminal of the first transimpedance amplifier.

[0075] Furthermore, the second transimpedance amplifier includes: an eleventh MOS transistor M11, a twelfth MOS transistor M12 and a second feedback resistor R F2The gate of the eleventh MOS tube M11 is connected to the gate of the twelfth MOS tube M12, the drain of the eleventh MOS tube M11 is connected to the drain of the twelfth MOS tube M12, the source of the eleventh MOS tube M11 is connected to the power supply voltage VDD, and the source of the twelfth MOS tube M12 is grounded via a current source; the second feedback resistor R F2 Connected between the input terminal and the output terminal of the second transimpedance amplifier.

[0076] Specifically, the first transimpedance amplifier and the second transimpedance amplifier are both composed of an inverter and a feedback resistor. The common terminal of the gates of the ninth MOS tube M9 and the tenth MOS tube M10 is the input terminal of the first transimpedance amplifier, the common terminal of the drain of the ninth MOS tube M9 and the drain of the tenth MOS tube M10 is the output terminal of the first transimpedance amplifier, and the output signal V op The first differential signal V is input from the input end of the first transimpedance amplifier and output from the output end of the first transimpedance amplifier after amplification. outp The common terminal of the gate of the eleventh MOS tube M11 and the gate of the twelfth MOS tube M12 is the input terminal of the second transimpedance amplifier, the common terminal of the drain of the eleventh MOS tube M11 and the drain of the twelfth MOS tube M12 is the output terminal of the second transimpedance amplifier, and the output signal V on The second differential signal V is input from the input end of the second transimpedance amplifier and output from the output end of the second transimpedance amplifier after amplification. outn .

[0077] In this embodiment, the small signal common mode gain of the active balun can be expressed as:

[0078] A CM =(G m1 -G m2 ) · CM_Gain TIA .

[0079] Among them, G m1 and G m2 Represents the common mode gain of the first current path Path1 and the second current path Path2, CM_Gain TIA represents the common-mode gain of the transimpedance amplifier, G m1 and G m2 Respectively expressed as:

[0080]

[0081]

[0082] Among them, g m1 Indicates the transconductance of the first MOS tube, g m2 Indicates the transconductance of the second MOS tube, g m3 represents the transconductance of the third MOS tube, g m4 represents the transconductance of the fourth MOS tube, S refers to the independent variable of the Laplace change, ω T is the zero point of the input impedance of the transimpedance amplifier, r O is the equivalent output impedance of the tail current source, and R represents the resistance value of the first resistor R1 and the second resistor R2.

[0083] like Figure 4 As shown, the active balun structure of the present invention has a higher common-mode gain suppression capability than the traditional inverter structure. Figure 5 As shown, the active balun structure of the present invention has lower differential output mismatch compared to the traditional current mode logic structure.

[0084] In some embodiments, the present invention further provides a receiver, which includes the common-mode rejection active balun architecture as described above. Specifically, as described in an embodiment of a common-mode rejection active balun structure, it will not be repeated here.

[0085] In some embodiments, the present invention further provides a communication system, which includes the receiver as described above, wherein the receiver includes a common-mode rejection active balun structure, as described in detail in a common-mode rejection active balun structure, which will not be described in detail here.

[0086] In summary, the common-mode gain suppression active balun architecture, receiver and communication system provided by the present invention have the following beneficial effects:

[0087] The two amplifier units used can both generate a first current path and a second current path, and the first current path and the second current path generated by the two amplifier units are cross-added at the input node of the transimpedance amplifier unit. Since the first differential signal and the second differential signal output by the transimpedance amplifier unit both include the summed signal of the first current path and the second current path, when the differential signals are subtracted, the common-mode component can be suppressed, thereby reducing the gain and phase mismatch of the output signal. Compared with the active balun structure of the traditional inverter structure, it has higher common-mode gain suppression capability, and compared with the active balun structure of the traditional current mode logic structure, it has lower differential output mismatch.

[0088] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A common-mode gain suppression active balun architecture, characterized in that: include: A first amplifier unit, a second amplifier unit and a transimpedance amplifier unit; wherein, The first amplifier unit receives a first input voltage and a second bias voltage, and outputs a first current path and a second current path; The second amplifier unit is connected to a second input voltage and a second bias voltage, and outputs a first current path and a second current path; The output end of the first amplifier unit and the output end of the second amplifier unit are cross-connected with the input end of the transimpedance amplifier unit, and the first current path and the second current path are cross-added at the input end of the transimpedance amplifier unit; The transimpedance amplifier unit amplifies the first current path and the second current path and outputs a first differential signal and a second differential signal; wherein the first differential signal and the second differential signal both include a summation signal of the first current path and the second current path.

2. The common-mode gain suppression active balun architecture according to claim 1, characterized in that: The transimpedance amplifier unit includes a first transimpedance amplifier and a second transimpedance amplifier; wherein, The first transimpedance amplifier is connected to the first amplifier unit, and is used to amplify the first current path and the second current path to output a first differential signal; The second transimpedance amplifier is connected to the second amplifier unit, and is used to amplify the first current path and the second current path to output a second differential signal.

3. The common-mode gain suppression active balun architecture according to claim 2, characterized in that: The first amplifier unit includes: a first MOS tube, a second MOS tube and a third MOS tube; The gate of the first MOS transistor is connected to a first input voltage, the drain of the first MOS transistor is connected to the gate of the third MOS transistor, and the source of the first MOS transistor is grounded via a current source; The gate of the second MOS tube is connected to the first bias voltage, the drain of the second MOS tube is connected to the drain of the third MOS tube, and the source of the second MOS tube is grounded via a current source; The source of the third MOS tube is connected to the power supply voltage; A common terminal of the drain of the second MOS tube and the drain of the third MOS tube is connected to an input terminal of the first transimpedance amplifier.

4. The common-mode gain suppression active balun architecture according to claim 3, characterized in that: The second amplifier unit includes: a fourth MOS tube, a fifth MOS tube and a sixth MOS tube; wherein, The gate of the fourth MOS tube is connected to the second input voltage, the drain of the fourth MOS tube is connected to the drain of the sixth MOS tube, and the source of the fourth MOS tube is grounded via a current source; The gate of the fifth MOS tube is connected to the second bias voltage, the drain of the fifth MOS tube is connected to the gate of the sixth MOS tube, and the source of the fifth MOS tube is grounded via a current source; The source of the sixth MOS tube is connected to the power supply voltage; The common terminal of the drain of the fourth MOS tube and the drain of the sixth MOS tube is connected to the input terminal of the second transimpedance amplifier.

5. The common-mode gain suppression active balun architecture according to claim 4, characterized in that: Also includes: A seventh MOS tube, an eighth MOS tube, a first resistor and a second resistor; wherein, One end of the first resistor is connected to the drain of the first MOS transistor, and the other end of the first resistor is connected to the gate of the seventh MOS transistor; The drain of the seventh MOS tube is connected to the drain of the first MOS tube, and the source of the seventh MOS tube is connected to the power supply voltage; One end of the second resistor is connected to the drain of the fifth MOS transistor, and the other end of the second resistor is connected to the gate of the eighth MOS transistor; The drain of the eighth MOS tube is connected to the drain of the fifth MOS tube, and the source of the eighth MOS tube is connected to the power supply voltage.

6. The common-mode gain suppression active balun architecture according to claim 1, characterized in that: A low-frequency filter is also included, and the low-frequency filter is connected to the input end of the transimpedance amplifier unit and is used to filter out low-frequency component signals.

7. The common-mode gain suppression active balun architecture according to claim 2, characterized in that: The first transimpedance amplifier includes: a ninth MOS tube, a tenth MOS tube and a first feedback resistor; wherein, The gate of the ninth MOS tube is connected to the gate of the tenth MOS tube, the drain of the ninth MOS tube is connected to the drain of the tenth MOS tube, the source of the ninth MOS tube is connected to the power supply voltage, and the source of the tenth MOS tube is grounded via a current source; The first feedback resistor is connected between an input terminal and an output terminal of the first transimpedance amplifier.

8. The common-mode gain suppression active balun architecture according to claim 2, characterized in that: The second transimpedance amplifier includes: an eleventh MOS tube, a twelfth MOS tube and a second feedback resistor; wherein, The gate of the eleventh MOS tube is connected to the gate of the twelfth MOS tube, the drain of the eleventh MOS tube is connected to the drain of the twelfth MOS tube, the source of the eleventh MOS tube is connected to the power supply voltage, and the source of the twelfth MOS tube is grounded via a current source; The second feedback resistor is connected between the input terminal and the output terminal of the second transimpedance amplifier.

9. A receiver, characterized in that: It comprises the common-mode suppression active balun architecture as described in any one of claims 1 to 8.

10. A communication system, characterized in that: Comprising a receiver as claimed in claim 9.

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