Two-dimensional HNN-like hyper-chaotic mapping implementation circuit and random number generation method

Abstract

The invention relates to the technical field of chaotic circuits, in particular to a two-dimensional HNN-like hyper-chaotic mapping implementation circuit and a random number generation method, and the circuit comprises a first function generation circuit, a second function generation circuit, a first hyper-chaotic mapping circuit and a second hyper-chaotic mapping circuit; wherein the first function generation circuit and the second function generation circuit are used for generating sine and cosine excitation signals; the first hyper-chaotic mapping circuit and the second hyper-chaotic mapping circuit are used for generating different two-dimensional SC hyper-chaotic mapping states. According to the invention, a two-dimensional discrete system simulation circuit with an initial value is constructed, and the circuit realizability of two-dimensional SC hyperchaotic mapping is verified.

Description

Technical Field

[0001] The present invention relates to the technical field of chaotic systems, and in particular to a two-dimensional HNN-like hyperchaotic mapping implementation circuit and a random number generation method. Background Art

[0002] Discrete chaotic systems have complex dynamic characteristics and have become a current research hotspot, but their analog circuit implementation is rarely discussed; for discrete chaotic systems, digital circuit implementation is more common, and some researchers have used digital circuits to implement discrete systems, including DSP, FPGA, and STM32; however, digital circuits have limited precision and cannot produce real chaos, while analog circuits have no precision restrictions and can produce real chaos, which can verify the feasibility of their circuits; therefore, using analog circuits to implement discrete chaotic systems is conducive to further applications.

[0003] Xianming Wu et al. conducted an analog circuit experiment on the Logistic-like map to verify the feasibility of the analog circuit implementation, but there is no literature publicly implementing the analog circuit of a two-dimensional HNN-like map.

[0004] The document Discrete MemristorHyperchaotic Maps uses discrete chaotic maps to design a pseudo-random number generator. The obtained pseudo-random numbers are generated by a deterministic software algorithm. However, in scenarios with high security requirements, the predictability of pseudo-random numbers may become a breakthrough for attacks; for example, if an attacker can obtain or guess the initial seed of the generator, the entire random number sequence can be reproduced, which will pose a security risk. Summary of the invention

[0005] In view of the shortcomings of the existing system, the present invention constructs a two-dimensional discrete system simulation circuit with initial values ​​to verify the circuit feasibility of the two-dimensional SC hyperchaotic mapping.

[0006] The technical solution adopted by the present invention is: a two-dimensional HNN-like hyperchaotic mapping implementation circuit comprises:

[0007] A first function generating circuit, a second function generating circuit, a first hyperchaotic mapping circuit and a second hyperchaotic mapping circuit; wherein,

[0008] The first function generating circuit and the second function generating circuit are used for generating sine and cosine excitation signals;

[0009] The first hyperchaotic mapping circuit and the second hyperchaotic mapping circuit are used to generate different two-dimensional SC hyperchaotic mapping states.

[0010] As a preferred embodiment of the present invention, the first function generating circuit comprises: a sinusoidal signal generator M 1 、Cosine signal generator M 2 and multiplier mult 1 , M 1 and M 2 The output terminals are connected to mult 1 The input terminal connection of

[0011] As a preferred embodiment of the present invention, the second function generating circuit comprises: a sine signal generator M 3 、Cosine signal generator M 4 and multiplier mult 2 , M 3 and M 4 The output terminals are connected to mult 2 The input terminal connection of

[0012] As a preferred embodiment of the present invention, the first hyperchaotic mapping circuit includes a resistor R 1 To R 3 , resistor R 7 To R 10 、Operational amplifier U 1 , U 2 and pulse signal generator S 1 , R 1 The left end of M 1 and M 2 The common input connection, R 1 The right end of R 2 , R 3 , R 7 One end and U 1 The inverting input terminal is connected to R 2 The left end of mult 1 The output connection of R 7 The right end of 1 The output terminal and R 8 The left end of the connection, R 8 The right end of R 9 , R 10 One end and U 2 The inverting input terminal is connected to R 10 The left end of S 1 Connect to ground, R 9 The right end of U 2 The output terminal is connected.

[0013] As a preferred embodiment of the present invention, the second hyperchaotic mapping circuit includes a resistor R 4 To R 6 , resistor R11 To R 14 、Operational amplifier U 3 , U 4 and pulse signal generator S 2 , R 4 The left end of M 3 and M 4 The common input connection, R 4 The right end of R 5 , R 11 One end and U 3 The inverting input terminal is connected to R 5 The left end of mult 2 The output terminal, R 3 The left end of the connection, R 11 The right end of 3 The output terminal and R 14 The left end of the connection, R 14 The right end of R 6 , R 12 , R 13 One end and U 4 The inverting input terminal is connected to R 6 The left end of 2 The left end and mult 1 The output connection of R 12 The left end of S 2 Connect to ground, R 13 The right end of U 4 The output terminal is connected.

[0014] As a preferred implementation manner of the present invention, the operational amplifier model is AD711.

[0015] As a preferred implementation of the present invention, the multiplier model is AD633.

[0016] As a preferred implementation manner of the present invention, the sine signal generator and the cosine signal generator are of model AD639.

[0017] As a preferred embodiment of the present invention, a random number generation method for a two-dimensional HNN-like hyperchaotic mapping circuit includes the following steps:

[0018] Using two-dimensional HNN-like hyperchaotic mapping to realize circuit generation of one-dimensional chaotic sequence X k ;

[0019] The sequence X k Each element in is modulo 1 to obtain the iterative sequence X m ;

[0020] Through the random number generation function Generate a random number; where L is a positive number and K is the magnification factor.

[0021] Beneficial effects of the present invention:

[0022] 1. Realize multiple discharge states of two-dimensional SC hyperchaotic mapping through analog components such as resistors and operational amplifiers;

[0023] 2. Realize a true random number generator based on a two-dimensional SC hyperchaotic map, which is beneficial to the further application of discrete chaotic systems and generates unpredictable and non-reproducible chaotic sequences. Since the true random numbers generated by analog circuits usually come from the uncertainty of the circuit process and are essentially random, the true random numbers (TRN) generated from analog circuits are usually considered to be true random numbers rather than pseudo-random numbers, which is beneficial to the further development of discrete chaotic systems in confidential communications, network security and other occasions.

[0024] 3. By setting the output of the DAC module through the microcontroller, the discharge state of the two-dimensional SC hyperchaotic map can be switched online, and numerical discharge activities in various situations can be realized. The DAC outputs DC signals of different amplitudes to realize online switching of online states. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a first example diagram of a circuit for realizing a two-dimensional HNN-like hyperchaotic mapping of the present invention;

[0026] Figure 2 It is the chaotic attractor phase diagram of the two-dimensional SC hyperchaotic map;

[0027] Figure 3 It is a physical picture of the PCB of the present invention;

[0028] Figure 4 is a two-dimensional SC hyperchaotic map at the initial value (x 0 ,y 0 )=(5,5) discharge mode simulation circuit experimental diagram;

[0029] Figure 5 Experimental diagram of 16 different discharge modes of one-dimensional time series of two-dimensional SC hyperchaotic mapping. DETAILED DESCRIPTION

[0030] The present invention is further described below in conjunction with the accompanying drawings and embodiments. This figure is a simplified schematic diagram, which only illustrates the basic structure of the present invention in a schematic manner, and therefore it only shows the components related to the present invention.

[0031] The circuit for realizing the two-dimensional HNN-like hyperchaotic mapping includes:

[0032] The mathematical model of the two-dimensional HNN-like hyperchaotic mapping is constructed as follows:

[0033]

[0034] Among them, x n and n are two discrete time variables of the nth iteration, n is a natural number, x and y represent the electrical activities of the first and second neurons respectively; for neurons at the edge of internal decay, parameter g 11 , g 12 , g 21 , g 22 is the connection weight, and sin() is the nonlinear sinusoidal activation function.

[0035] Considering that the power supply voltage of the analog circuit is ±15V, in order to show more discharge state modes, the two-dimensional HNN-like hyperchaotic map is scaled by 2 times. After scaling, the mathematical model formula of the two-dimensional SC hyperchaotic map is:

[0036]

[0037] Where n is a natural number, x n and n are the two state variables of the nth iteration; a, b, c, and d are four control parameters, a is the first control parameter, b is the second control parameter, c is the third control parameter, and d is the fourth control parameter; sin() and cos() are both nonlinear functions with a threshold of 1.

[0038] On the MATLAB simulation platform, let a = 3.5, b = 1, c = -1, d = 3.5, the initial value (x 0 ,y 0 )=(-5,-5)=(-1,-5)=(1,-5)=(5,-5)=(-5,-1)=(-1,-1)=(1,-1)=(5,-1)=(-5,1)=(-1,1)=(1,1)=(5,1)=(-5,5)=(-1,5)=(1,5)=(5,5), the chaotic attractor phase diagram of the two-dimensional SC hyperchaotic mapping is as follows: Figure 2 As shown, 16 different discharge states are shown in the figure.

[0039] According to the two-dimensional SC hyperchaotic mapping model, its simulation circuit is constructed to verify the circuit feasibility of the two-dimensional SC hyperchaotic mapping. The simulation circuit of the two-dimensional SC hyperchaotic mapping is composed of trigonometric function modules, multipliers, operational amplifiers and resistors to realize the system equation of the two-dimensional SC hyperchaotic mapping. The circuit is designed as Figure 1 shown.

[0040] like Figure 1, comprising a first function generating circuit, a second function generating circuit, a first hyperchaotic mapping circuit and a second hyperchaotic mapping circuit; wherein,

[0041] The first function generating circuit and the second function generating circuit are used for generating sine and cosine excitation signals;

[0042] The first hyperchaotic mapping circuit and the second hyperchaotic mapping circuit are used to generate different two-dimensional SC hyperchaotic mapping states.

[0043] The first function generating circuit includes: a sine signal generator M 1 、Cosine signal generator M 2 and multiplier mult 1 , M 1 and M 2 The output terminals are connected to mult 1 The input connection of M 1 and M 2 The input terminal is connected to x in , x in is the input of the x-dimensional SC hyperchaotic mapping.

[0044] The second function generating circuit comprises: a sine signal generator M 3 、Cosine signal generator M 4 and multiplier mult 2 , M 3 and M 4 The output terminals are connected to mult 2 The input connection of M 3 and M 4 The input terminal is connected to y in ,y in is the input of the y-dimensional SC hyperchaotic mapping.

[0045] The first hyperchaotic mapping circuit includes a resistor R 1 To R 3 , resistor R 7 To R 10 、Operational amplifier U 1 , U 2 and pulse signal generator S 1 , R 1 The left end of M 1 and M 2 The common input connection, R 1 The right end of R 2 , R 3 , R 7 One end and U 1 The inverting input terminal is connected to R 2 The left end of mult 1 The output connection of R7 The right end of 1 The output terminal and R 8 The left end of the connection, R 8 The right end of R 9 , R 10 One end and U 2 The inverting input terminal is connected to R 10 The left end of S 1 Connect to ground, R 9 The right end of U 2 The output connection of U 2 The output terminal is x out , is the output of the x-dimensional SC hyperchaotic mapping; U 1 , U 2 The same-inverting input terminal is grounded.

[0046] The second hyperchaotic mapping circuit includes a resistor R 4 To R 6 , resistor R 11 To R 14 、Operational amplifier U 3 , U 4 and pulse signal generator S 2 , R 4 The left end of M 3 and M 4 The common input connection, R 4 The right end of R 5 , R 11 One end and U 3 The inverting input terminal is connected to R 5 The left end of mult 2 The output terminal, R 3 The left end of the connection, R 11 The right end of 3 The output terminal and R 14 The left end of the connection, R 14 The right end of R 6 , R 12 , R 13 One end and U 4 The inverting input terminal is connected to R 6 The left end of 2 The left end and mult 1 The output connection of R 12 The left end of S 2 Connect to ground, R 13 The right end of U 4 The output connection of U 4 The output terminal is y out , is the output of the y-dimensional SC hyperchaotic mapping; U 3 , U4 The same-inverting input terminal is grounded.

[0047] Among them, U 1 -U 4 Model: AD711; S 1 , S 2 It is a pulse signal generator, which can generate pulse signals through a single chip microcomputer or a pulse signal generating circuit. 1 , S 2 Assign the initial value (x) to the two-dimensional SC hyperchaotic system 0 ,y 0 ) and initial value state switching; mult 1 、mult 2 Model: AD633; M 1 To M 4 The model is AD639.

[0048] Combined with Kirchhoff's law, through Figure 1 The circuit can get the state equation of the circuit, the formula is:

[0049]

[0050] In this embodiment, when a=3.5, b=1, c=-1, d=3.5, the system is in a chaotic state; corresponding to setting R 1 =35K, R 2 =10K, R 3 =35K, R 4 =35K, R 5 =10K, R 6 =35K, R 7 ~R 14 =35K.

[0051] like Figure 3 and 4 ,In the hardware circuit construction, the system’s analog circuit is composed of four trigonometric function chips AD639, two multipliers AD633, four operational amplifiers TL082CP, four operational amplifiers AD711 and several resistors and capacitors; AD639 and TL082CP are used to generate sine and cosine excitation signals.

[0052] By using a microcontroller and a digital signal processing module, the solution of mixed analog and digital circuits is applied to the analog circuit design of discrete systems to realize multiple discharge states of discrete systems and their online switching.

[0053] like Figure 4As shown, the microcontroller uses the STM32H743XIH6 chip, the A / D converter uses the AD7606 chip, and the D / A converter uses the DAC8563 chip; the main function of the STM32 is to read the data of the system analog circuit for sampling and holding, and to control the output data for state adjustment. The task of the A / D converter is to convert the analog signal into a digital signal that can be read and used by the microcontroller, and the task of the D / A converter is to convert the digital signal into an analog voltage signal that can be used by the system analog circuit.

[0054] After the system analog circuit and the single-chip computer are powered on, the microcontroller converts the fixed digital signal (system initial value) into an analog signal through the DAC module and outputs it to the system circuit. After the analog circuit calculates, it is connected to the ADC module. The ADC monitors the output signal in real time. The microcontroller reads the converted digital signal and outputs it to the system circuit. The calculation is iterated in a loop to realize the numerical discharge activity. The voltage range of the dual-channel 16-bit resolution DAC8563 and the eight-channel 16-bit resolution AD7606 converter output is ±10V, which can represent 2 16 =65536 different output voltage levels, that is, 0-65536 corresponds to ±10V voltage; 65536 / 20=3276.8, that is, the value corresponding to 1V is 3277; set the voltage input range of AD7606 to ±10V, the initial output value of DAC8563 is (32768+16384,32768+16384), and you can get the initial value (x 0 ,y 0 )=(5,5) case, such as Figure 4 Oscilloscope image; By setting the output of the DAC module through the microcontroller, the discharge state of the two-dimensional SC hyperchaotic map can be switched online, realizing numerical discharge activities in various situations.

[0055] The output value of the DAC dual channel is adjusted by the joystick button of the single-chip computer. The joystick upward indicates that the voltage of channel 2 increases by about 4V, the joystick downward indicates that the voltage of channel 2 decreases by about 4V, the joystick left indicates that the voltage of channel 1 decreases by about 4V, and the joystick right indicates that the voltage of channel 1 increases by about 4V. The discharge state switching of 16 situations can be realized, including (-5,-5), (-1,-5), (1,-5), (5,-5), (-5,-1), (-1,-1), (1,-1), (5,-1), (-5,1), (-1,1), (1,1), (5,1), (-5,5), (-1,5), (1,5), (5,5); Figure 4 The figure shows a simulation circuit experiment diagram of one of the discharge modes; Figure 5 One-dimensional timing diagram of 16 different discharge modes.

[0056] A random number generation method for a circuit implemented by a two-dimensional HNN-like hyperchaotic mapping comprises the following steps:

[0057] A TRNG is designed using the analog circuit of the two-dimensional SC hyperchaotic mapping model; the parameters are specified as (a, b, c, d) = (3.5, 1, -1, 3.5), the initial value (x 0 ,y 0 ) is generated by setting the analog voltage output by the DAC8563 digital-to-analog converter through the microcontroller. Due to the different initial value settings, the generated chaotic sequence will also be different; in order to ensure that the properties of the chaotic sequence are not destroyed, a one-dimensional chaotic sequence is selected and converted into a binary number; record {X k | k =1,2,3,…} is the iterative sequence provided by the two-dimensional SC hyperchaotic mapping model simulation circuit;

[0058] The sequence X k Each element in is modulo 1, that is, the remainder is obtained to obtain a new iterative sequence X m , all elements in this new sequence are in the interval [0,1]; then, the design of TRNG is as follows:

[0059]

[0060] Where K = 10 9 is the magnification, L=2i is a positive number, Indicates a round-up operation.

[0061] Obviously, when i=8, each true random number (TRN) can generate 8 binary numbers, and each iteration generates an 8-bit TRN as an output result.

[0062] The method of the present invention generates true random numbers, which are unpredictable and non-reproducible. In the fields of cryptography and security, true random numbers are indispensable; because of the unpredictability and independence, the keys and other security parameters generated based on true random numbers are more difficult to be cracked.

[0063] Based on the above ideal embodiments of the present invention, the relevant staff can make various changes and modifications without departing from the technical concept of the present invention through the above description. The technical scope of the present invention is not limited to the contents of the specification, and its technical scope must be determined according to the scope of the claims.

Claims

1. Two-dimensional HNN-like hyperchaotic mapping implementation circuit, characterized in that: include: A first function generating circuit, a second function generating circuit, a first hyperchaotic mapping circuit and a second hyperchaotic mapping circuit; wherein, The first function generating circuit and the second function generating circuit are used for generating sine and cosine excitation signals; The first hyperchaotic mapping circuit and the second hyperchaotic mapping circuit are used to generate different two-dimensional SC hyperchaotic mapping states.

2. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claim 1, characterized in that: The first function generating circuit comprises: a sine signal generator M1, a cosine signal generator M2 and a multiplier mult1, and the output ends of M1 and M2 are respectively connected to the input end of mult1.

3. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claim 2, characterized in that: The second function generating circuit comprises: a sine signal generator M3, a cosine signal generator M4 and a multiplier mult2, and the output ends of M3 and M4 are respectively connected to the input end of mult2.

4. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claim 3, characterized in that: The first hyperchaotic mapping circuit includes resistors R1 to R3, resistors R7 to R 10 , operational amplifiers U1, U2 and pulse signal generator S1, the left end of R1 is connected to the common input of M1 and M2, the right end of R1 is connected to one end of R2, R3, R7 and the reverse input of U1, the left end of R2 is connected to the output of mult1, the right end of R7 is connected to the output of U1 and the left end of R8, the right end of R8 is connected to R9, R 10 One end of the U2 is connected to the reverse input terminal, R 10 The left end of R is connected to S1 and then grounded, and the right end of R9 is connected to the output end of U2.

5. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claim 4, characterized in that: The second hyperchaotic mapping circuit includes resistors R4 to R6, a resistor R 11 To R 14 , operational amplifiers U3, U4 and pulse signal generator S2, the left end of R4 is connected to the common input end of M3 and M4, and the right end of R4 is connected to R5, R 11 The left end of R5 is connected to the output end of mult2 and the left end of R3. 11 The right end is connected to the output of U3 and R 14 The left end of the connection, R 14 The right end of R6 and R 12 , R 13 The left end of R6 is connected to the left end of R2 and the output end of mult1. 12 The left end is connected to S2 and then grounded. 13 The right end is connected to the output of U4.

6. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claims 2 and 3, characterized in that: The multiplier model is AD633.

7. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claims 2 and 3, characterized in that: The sine signal generator and cosine signal generator are AD639.

8. The two-dimensional HNN-like hyperchaotic mapping implementation circuit according to claims 4 and 5, characterized in that: The operational amplifier model is AD711.

9. A method for generating random numbers for a circuit using the two-dimensional HNN-like hyperchaotic mapping described in claims 1-6, characterized in that: The steps include: Using two-dimensional HNN-like hyperchaotic mapping to realize circuit generation of one-dimensional chaotic sequence X k ; The sequence X k Each element in is modulo 1 to obtain the iterative sequence X m ; Through the random number generation function Generate a random number; where L is a positive number and K is the magnification factor.

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