Display panel and display module
By adjusting the thermal expansion coefficient of the thin-film transistor device layer and using thermally conductive tape and board layer, the problem of warping of the display panel during heating was solved, resulting in a better display effect.
Patent Information
- Application Number
- CN202411508359.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2044-10-25
AI Technical Summary
During the heating process, the display panel warps due to the large difference in the thermal expansion coefficients of adjacent film layers, which affects the display effect.
By adjusting the thermal expansion coefficient of the thin-film transistor device layer to be close to that of the substrate, and by combining thermally conductive tape and substrate layers to reduce warpage, the display effect is improved.
It effectively reduces warping of the display panel when it heats up, thus improving the display effect.
Smart Images

Figure CN119384042B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, specifically to a display panel and a display module. Background Technology
[0002] To improve display quality, the brightness of display panels has already reached hundreds of thousands of kilohertz, which has led to a significant increase in the heat generated by the display panels.
[0003] During use, increased heat generation causes the internal temperature of the display panel to rise. Due to the large difference in thermal expansion coefficients between adjacent film layers inside the display panel, significant warping occurs during the heating process, affecting the display effect.
[0004] Therefore, it is necessary to propose a new technical solution to solve the above-mentioned technical problems. Summary of the Invention
[0005] The purpose of this application is to provide a display panel and a display module to reduce the warping caused by the display panel heating up and improve the display effect.
[0006] To solve the above problems, the technical solution of this application is as follows:
[0007] In a first aspect, this application proposes a display panel, comprising:
[0008] Substrate;
[0009] A thin-film transistor device layer is disposed on one side of the substrate in the thickness direction; and
[0010] A light-emitting device layer is disposed on the side of the thin-film transistor device layer away from the substrate;
[0011] The absolute value of the difference between the thermal expansion coefficient of the thin-film transistor device layer and the thermal expansion coefficient of the substrate is less than or equal to 0.00001 Kelvin.
[0012] In one embodiment of this application, the thin-film transistor device layer includes a first inorganic insulating layer, which is disposed between the substrate and the light-emitting device layer;
[0013] The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer and the thermal expansion coefficient of the substrate is the first difference, which is less than or equal to 0.00001 Kelvin.
[0014] In one embodiment of this application, the thin-film transistor device layer further includes a second inorganic insulating layer, which is disposed on the side of the first inorganic insulating layer away from the substrate;
[0015] The absolute value of the difference between the thermal expansion coefficient of the second inorganic insulating layer and the thermal expansion coefficient of the substrate is a second difference, and the second difference is less than or equal to 0.00001 per Kelvin, and the second difference is less than or equal to the first difference.
[0016] In an embodiment of the present application, the thin-film transistor device layer further comprises a first organic planar layer, the first organic planar layer being arranged on a side of the first inorganic insulating layer away from the substrate.
[0017] The absolute value of the difference between the elastic modulus of the first organic planar layer and the elastic modulus of the substrate is less than or equal to 10 gigapascals.
[0018] In an embodiment of the present application, the display panel further comprises a plate layer, the plate layer being arranged on a side of the substrate away from the first inorganic insulating layer.
[0019] The elastic modulus of the plate layer is greater than the elastic modulus of the substrate.
[0020] The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer and the thermal expansion coefficient of the plate layer is a third difference, and the third difference is less than or equal to 0.00001 per Kelvin.
[0021] In an embodiment of the present application, the material of the plate layer comprises metal.
[0022] The display panel further comprises a heat-conducting adhesive tape, the heat-conducting adhesive tape being arranged between the plate layer and the substrate and connecting the plate layer and the substrate.
[0023] In an embodiment of the present application, the display panel further comprises a sensor, the sensor being arranged on a side of the substrate in the thickness direction and used for monitoring the warping amount of the substrate.
[0024] In a second aspect, the present application provides a display module, comprising the display panel, the display panel comprising a substrate, a thin-film transistor device layer, and a light-emitting device layer; the thin-film transistor device layer being arranged on a side of the substrate in the thickness direction; the light-emitting device layer being arranged on a side of the thin-film transistor device layer away from the substrate; and the absolute value of the difference between the thermal expansion coefficient of the thin-film transistor device layer and the thermal expansion coefficient of the substrate being less than or equal to 0.00001 per Kelvin.
[0025] In an embodiment of the present application, the display panel comprises a display area and a non-display area located at the periphery of the display area.
[0026] The display module further comprises a limiting mechanism, a limiting groove is arranged on the surface of the limiting mechanism, and the display panel is at least partially accommodated in the limiting groove.
[0027] In the present application, one side of the substrate is provided with a thin film transistor device layer. The present application reduces the thermal expansion coefficient of the thin film transistor device layer, and makes the thermal expansion coefficient of the thin film transistor device layer close to the thermal expansion coefficient of the substrate. When the absolute value of the difference between the thermal expansion coefficient of the thin film transistor and the thermal expansion coefficient of the substrate is less than or equal to 0.00001 per Kelvin, the amount of warping generated when the display panel is heated can be reduced, and the display effect can be improved. BRIEF DESCRIPTION OF DRAWINGS
[0028] Figure 1 is a schematic diagram of the warping generated by a conventional display module when heated;
[0029] Figure 2 is a schematic diagram of an embodiment of the display module of the present application;
[0030] Figure 3 is Figure 2 a schematic diagram of A in FIG.
[0031] Figure 4 is Figure 2 a schematic diagram of B in FIG.
[0032] Figure 5 is a schematic diagram of another embodiment of the display module of the present application. DETAILED DESCRIPTION
[0033] The meanings of the terms used in the specification and claims correspond to the meanings commonly understood by those of ordinary skill in the art to which the present application belongs. The terms used in the specification and claims are only for the purpose of facilitating the description and understanding of the present application, and are not intended to limit the present application to the narrow interpretation of the specific terms used in the specification and claims.
[0034] Please refer to Figure 1In the conventional display module 1000a, when the conventional display panel 100a is working, a large amount of heat is generated by the light emitting device layer 30a, which greatly increases the heat generation inside the conventional display panel 100a, resulting in the temperature rise inside the conventional display panel 100a. The conventional display panel 100a usually includes a substrate 10a, a thin film transistor device layer 20a and a light emitting device layer 30a which are stacked in sequence, wherein the material of the substrate 10a usually includes at least one of glass or organic material, and the material of the thin film transistor device layer 20a located on one side of the substrate 10a includes inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, etc. In the conventional display panel 100a, the difference between the thermal expansion coefficients of the material of the substrate 10a and the material of the thin film transistor device layer 20a is too large, and the thermal expansion coefficient of the thin film transistor device layer 20a is greater than that of the substrate 10a. When the conventional display panel 100a is heated, both the substrate 10a and the thin film transistor device layer 20a will expand due to heat. However, because the thermal expansion coefficient of the thin film transistor device layer 20a is greater than that of the substrate 10a, the expansion amount of the thin film transistor device layer 20a due to temperature rise is greater than that of the substrate 10a due to temperature rise. Therefore, stress is generated inside the conventional display panel 100a, causing the conventional display panel 100a to warp, which affects the display effect of the conventional display panel 100a.
[0035] The present application provides a display module 1000 which can be assembled in a display device. The display device can be a mobile phone, a tablet computer, an electronic reader, an electronic display screen, a notebook computer, a mobile phone, an augmented reality (AR) / virtual reality (VR) device, a media player, a wearable device, a digital camera, a car navigation device, etc. The display module 1000 includes a display panel 100.
[0036] Please refer to Figure 2 The present application also provides a display panel 100. The display panel 100 includes a substrate 10, a thin film transistor device layer 20 and a light emitting device layer 30. The thin film transistor device layer 20 is arranged on one side of the substrate 10 in the thickness direction. The light emitting device layer 30 is arranged on the side of the thin film transistor device layer 20 away from the substrate 10. The absolute value of the difference between the thermal expansion coefficients of the thin film transistor device layer 20 and the substrate 10 is less than or equal to 0.00001 per Kelvin.
[0037] In the embodiment, one side of the substrate 10 is provided with the thin film transistor device layer 20. The application reduces the amount of warping of the display panel 100 when the display panel 100 is heated and improves the display effect by reducing the coefficient of thermal expansion of the thin film transistor device layer 20 and making the coefficient of thermal expansion of the thin film transistor device layer 20 close to the coefficient of thermal expansion of the substrate 10, when the absolute value of the difference between the coefficient of thermal expansion of the thin film transistor device layer 20 and the coefficient of thermal expansion of the substrate 10 is less than or equal to 0.00001 per Kelvin.
[0038] Optionally, the thickness of the substrate 10 is less than or equal to 1 millimeter, so that the substrate 10 is greatly affected by the thermal expansion force of the film layer adjacent to the substrate 10. The thickness of the substrate 10 is one of 0.1 millimeter, 0.2 millimeter, 0.3 millimeter, 0.4 millimeter, 0.5 millimeter, 0.6 millimeter, 0.7 millimeter, 0.8 millimeter, 0.9 millimeter, and 1 millimeter.
[0039] Optionally, the light emitting device layer 30 includes a light emitting device. The light emitting device can be one of an organic light emitting diode (OLED), a micro light emitting diode (Micro LED), and a mini light emitting diode (Mini LED).
[0040] Optionally, the absolute value of the difference between the coefficient of thermal expansion of the thin film transistor device layer 20 and the coefficient of thermal expansion of the substrate 10 is E0 multiplied by 0.000001. Wherein, E0 is a positive real number less than or equal to 10.
[0041] Optionally, the value of E0 is one of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, and 10.
[0042] Optionally, the substrate 10 is a flexible substrate 10, and the material of the substrate 10 can be polyimide.
[0043] Optionally, the substrate 10 is a rigid substrate 10, and the material of the substrate 10 can be glass.
[0044] Optionally, the material of the thin film transistor device layer 20 includes at least one inorganic material of oxide of silicon and nitride of silicon. The material of the thin film transistor device layer 20 is modified to reduce the thermal expansion coefficient of the material of the thin film transistor device layer 20, so that the thermal expansion coefficient of the thin film transistor device layer 20 approaches the thermal expansion coefficient of the substrate 10, thereby reducing the stress inside the display panel 100 during the heating process, reducing the warping of the display panel 100, and improving the display effect.
[0045] Optionally, the thermal expansion coefficient of the thin film transistor device layer 20 can be reduced by doping metal in the inorganic material of the thin film transistor device layer 20. The thermal expansion coefficient of the inorganic material of the thin film transistor device layer 20 can also be reduced by heat treatment (normalizing treatment, quenching treatment, annealing treatment, etc.) of the inorganic material of the thin film transistor device layer 20.
[0046] Optionally, the thickness of the inorganic material film layer of the thin film transistor device layer 20 can be reduced under the premise of meeting the insulation requirement, thereby reducing the influence of internal stress on the warping of the substrate 10 during the heating of the display panel 100.
[0047] The substrate 10 is a rigid substrate 10, and the material of the substrate 10 is glass.
[0048] Optionally, the thin film transistor device layer 20 includes a plurality of thin film transistors arranged in an array. When the thin film transistor device layer 20 is a bottom gate structure, the thin film transistor device layer 20 includes a first metal layer, a gate insulating layer, a semiconductor layer, an interlayer dielectric layer, a second metal layer, a first organic planarization layer 23, a first passivation layer 221, a third metal layer, a second organic planarization layer 24, a second passivation layer 222, a fourth metal layer, and a third passivation layer 223, which are sequentially stacked. The first metal layer includes a gate electrode, the second metal layer includes a source electrode and a drain electrode arranged on the interlayer dielectric layer, and the second metal layer is electrically connected to the semiconductor layer and the third metal layer. The difference between the thermal expansion coefficient of at least one of the gate insulating layer, the interlayer dielectric layer, the first passivation layer 221, and the second passivation layer 222 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin.
[0049] Optionally, referring to Figure 3 , the thin film transistor device layer 20 further includes a first trace 41, an interlayer dielectric layer, a second trace 42, the first organic planarization layer 23, the first passivation layer 221, a third trace 43, the second organic planarization layer 24, the second passivation layer 222, and a fourth trace 44, which are sequentially stacked. The first trace 41 is arranged in the same layer as the first metal layer, the second trace 42 is arranged in the same layer as the second metal layer, the third trace 43 is arranged in the same layer as the third metal layer, and the fourth trace 44 is arranged in the same layer as the fourth metal layer. The first trace 41 is electrically connected to the second trace 42, the second trace 42 is electrically connected to the third trace 43, and the third trace 43 is electrically connected to the fourth trace 44.
[0050] Optionally, the material of the first trace 41 is the same as that of the first metal layer, the material of the second trace 42 is the same as that of the second metal layer, the material of the third trace 43 is the same as that of the third metal layer, and the material of the fourth trace 44 is the same as that of the fourth metal layer. The absolute value of the difference between the thermal expansion coefficient of the first trace 41 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin. The absolute value of the difference between the thermal expansion coefficient of the second trace 42 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin. The absolute value of the difference between the thermal expansion coefficient of the third trace 43 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin. The absolute value of the difference between the thermal expansion coefficient of the fourth trace 44 and the thermal expansion coefficient of the substrate 10 is less than or equal to 0.00001 per Kelvin.
[0051] Optionally, in order to further reduce the problem of warping of the display panel 100 caused by temperature rise, the thickness of the film layer can be adjusted.
[0052] Optionally, the thickness of the second passivation layer 222 is less than or equal to the thickness of the first passivation layer 221. In the display panel 100, the second passivation layer 222 is located on the side of the first passivation layer 221 away from the substrate 10. Since the thermal expansion coefficient of the second passivation layer 222 is greater than the thermal expansion coefficient of the substrate 10, the display panel 100 will warp during the temperature rising process. By reducing the thickness of the second passivation layer 222 on the side away from the substrate 10, the warping of the display panel 100 during the temperature rising process can be reduced, and the display effect can be improved.
[0053] Optionally, the thickness of the first passivation layer 221 is less than or equal to the thickness of the interlayer dielectric layer. By reducing the thickness of the first passivation layer 221 on the side away from the substrate 10, the warping of the display panel 100 during the temperature rising process can be reduced, and the display effect can be improved.
[0054] Optionally, the thin film transistor device layer 20 further comprises a buffer layer. The buffer layer is arranged between the first metal layer and the substrate 10. The material of the buffer layer is one of an oxide of silicon and a nitride of silicon. By modifying the material of the buffer layer, the thermal expansion coefficient of the buffer layer material is reduced, the thermal expansion coefficient of the thin film transistor device layer 20 approaches the thermal expansion coefficient of the substrate 10, the stress inside the display panel 100 during the temperature rising process is reduced, the warping amount of the display panel 100 is reduced, and the display effect is improved.
[0055] Optionally, the thin film transistor device layer 20 comprises a first inorganic insulating layer 21. The first inorganic insulating layer 21 is arranged between the substrate 10 and the light emitting device layer 30. The first inorganic insulating layer 21 can be at least one of silicon oxide, silicon nitride and silicon oxynitride. The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer 21 and the thermal expansion coefficient of the substrate 10 is a first difference.
[0056] Optionally, the material of the first inorganic insulating layer 21 comprises at least one of an oxide of silicon and an oxide of nitrogen. The material of the first inorganic insulating layer 21 can be at least one of silicon oxide, silicon nitride and silicon oxynitride.
[0057] Optionally, the first inorganic insulating layer 21 comprises at least one of a buffer layer, a gate insulating layer and an interlayer dielectric layer.
[0058] Optionally, the first difference is less than or equal to 0.00001 per Kelvin. The value of the first difference is E1 multiplied by 0.000001. Wherein E1 is a positive real number less than 10.
[0059] Optionally, E1 is equal to one of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.
[0060] In one embodiment, the first inorganic insulating layer 21 is an interlayer dielectric layer, which is arranged on one side of the substrate 10. By modifying the material of the buffer layer to reduce the thermal expansion coefficient of the buffer layer material, the thermal expansion coefficient of the first inorganic insulating layer 21 approaches the thermal expansion coefficient of the substrate 10, thereby reducing the stress inside the display panel 100 during the heating process, reducing the warpage of the display panel 100, and improving the display effect.
[0061] In another embodiment, the first inorganic insulating layer 21 is two film layers among the buffer layer, the gate insulating layer, and the interlayer dielectric layer.
[0062] In yet another embodiment, the first inorganic insulating layer 21 includes the buffer layer, the gate insulating layer, and the interlayer dielectric layer.
[0063] Optionally, the thermal expansion coefficient of the interlayer insulating layer is less than or equal to the thermal expansion coefficient of the gate insulating layer, and the difference between the thermal expansion coefficient of the interlayer dielectric layer and the thermal expansion coefficient of the gate insulating layer is less than or equal to 0.00001. Since the interlayer dielectric layer is located on the side of the gate insulating layer away from the substrate 10, reducing the thermal expansion coefficient of the interlayer dielectric layer can reduce the warpage of the display panel 100 and improve the display effect.
[0064] Optionally, the thermal expansion coefficient of the gate insulating layer is less than or equal to the thermal expansion coefficient of the buffer layer, and the difference between the thermal expansion coefficient of the gate insulating layer and the thermal expansion coefficient of the buffer layer is less than or equal to 0.00001. Since the gate insulating layer is located on the side of the buffer layer away from the substrate 10, reducing the thermal expansion coefficient of the gate insulating layer can reduce the amount of warping of the display panel 100 and improve the display effect.
[0065] Optionally, the thin-film transistor device layer 20 further comprises a second inorganic insulating layer 22. The second inorganic insulating layer 22 is located on the side of the first inorganic insulating layer 21 away from the substrate 10. The absolute value of the difference between the thermal expansion coefficient of the second inorganic insulating layer 22 and the thermal expansion coefficient of the substrate 10 is a second difference value.
[0066] Optionally, the second inorganic insulating layer 22 comprises at least one of a first passivation layer 221, a second passivation layer 222, and a third passivation layer 223.
[0067] Optionally, the second difference value is less than or equal to 0.00001 per Kelvin. The numerical value of the second difference value is E2 multiplied by 0.000001. Wherein, E2 is a positive real number less than or equal to 10.
[0068] Optionally, the value of E2 is one of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, 10.
[0069] Optionally, the second difference is less than or equal to the first difference. In the display panel 100, the second inorganic insulating layer 22 is located on the side of the first inorganic insulating layer 21 away from the substrate 10. By setting the second difference to be less than or equal to the first difference, the second inorganic insulating layer 22 located on the other side of the first inorganic insulating layer 21 can share part of the stress, thereby reducing the stress on the substrate 10. The embodiment reduces the stress in the display panel 100 during the heating process, thereby reducing the warping amount of the display panel 100 and improving the display effect.
[0070] Optionally, the second inorganic insulating layer 22 includes a first passivation layer 221, a second passivation layer 222, and a third passivation layer 223.
[0071] Optionally, the thermal expansion coefficient of the third passivation layer 223 is less than or equal to the thermal expansion coefficient of the second passivation layer 222, and the thermal expansion coefficient of the third passivation layer 223 is less than or equal to the thermal expansion coefficient of the second passivation layer 222 by 0.00001 or less. Because the third passivation layer 223 is located on the side of the second passivation layer 222 away from the substrate 10, reducing the thermal expansion coefficient of the third passivation layer 223 can reduce the warping amount of the display panel 100 and improve the display effect.
[0072] Optionally, the thermal expansion coefficient of the second passivation layer 222 is less than or equal to the thermal expansion coefficient of the first passivation layer 221, and the thermal expansion coefficient of the second passivation layer 222 is less than or equal to the thermal expansion coefficient of the first passivation layer 221 by 0.00001 or less. Because the second passivation layer 222 is located on the side of the first passivation layer 221 away from the substrate 10, reducing the thermal expansion coefficient of the second passivation layer 222 can reduce the warping amount of the display panel 100 and improve the display effect.
[0073] Optionally, the thin film transistor device layer 20 further includes a first organic planarization layer 23. The first organic planarization layer 23 is located on the side of the first inorganic insulating layer 21 away from the substrate 10 and between the first inorganic insulating layer 21 and the second inorganic insulating layer 22.
[0074] Optionally, when the material of the substrate 10 is glass, the material of the first organic planarization layer 23 is organic photoresist, and the elastic modulus of the material of the first organic planarization layer 23 is less than or equal to the elastic modulus of the substrate 10.
[0075] The elastic modulus of the material of the first organic planarization layer 23 can be increased by baking, doping, or the like, so that the elastic modulus of the material of the first organic planarization layer 23 approaches the elastic modulus of the substrate 10. When the display panel 100 is heated, the first organic planarization layer 23 can share part of the stress, thereby reducing the stress on the substrate 10. The present application reduces the stress in the display panel 100 during the heating process, thereby reducing the warping amount of the display panel 100 and improving the display effect.
[0076] Optionally, the absolute value of the difference between the elastic modulus of the first organic planarization layer 23 and the elastic modulus of the substrate 10 is less than or equal to 10 Giga Pascal (GPa). The absolute value of the difference between the elastic modulus of the first organic planarization layer 23 and the elastic modulus of the substrate 10 is one of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9.
[0077] Optionally, the thin film transistor device layer 20 further comprises a second organic planarization layer 24. The second organic planarization layer 24 is arranged on the side of the first organic planarization layer 23 away from the substrate 10.
[0078] Optionally, when the material of the substrate 10 is glass, the material of the second organic planarization layer 24 is organic photoresist, and the elastic modulus of the material of the second organic planarization layer 24 is less than or equal to the elastic modulus of the substrate 10.
[0079] The elastic modulus of the material of the second organic planarization layer 24 can be increased by baking, doping, etc. to make the elastic modulus of the material of the second organic planarization layer 24 close to the elastic modulus of the substrate 10. When the display panel 100 is heated, the second organic planarization layer 24 can share part of the stress, thereby reducing the stress on the substrate 10. The present application reduces the stress inside the display panel 100 during heating, thereby reducing the warping amount of the display panel 100 and improving the display effect.
[0080] Optionally, the absolute value of the difference between the elastic modulus of the second organic flat layer 24 and the elastic modulus of the substrate 10 is less than or equal to 10 Giga Pascal (GPa). The absolute value of the difference between the elastic modulus of the second organic flat layer 24 and the elastic modulus of the substrate 10 is one of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, and 10.
[0081] In the above embodiment, the present application reduces the amount of warping of the display panel 100 when it is heated and improves the display effect by modifying the film layers of the thin film transistor device layer 20 on one side of the substrate 10. In the following embodiment, the present application can also reduce the amount of warping of the display panel 100 when it is heated and improve the display effect by providing a plate layer 200 on the side of the substrate 10 away from the thin film transistor device layer 20.
[0082] The above embodiment and the following embodiment can be independently provided to form a specific embodiment, and the above embodiment and the following embodiment can also be simultaneously provided to form a combined embodiment. The combined embodiment of the above embodiment and the following embodiment will not be described again.
[0083] Optionally, referring to Figure 4 , the display panel 100 further comprises a plate layer 200. The plate layer 200 is provided on the side of the substrate 10 away from the first inorganic insulating layer 21. The plate layer 200 is provided to improve the strength of the side of the substrate 10 away from the thin film transistor device layer 20, thereby improving the structural strength of the display panel 100 and reducing the amount of warping of the display panel 100. In this embodiment, the material of the plate layer 200 can be metal, aluminum alloy, red copper, steel plate, plastic with an elastic modulus greater than that of metal, or the like.
[0084] Optionally, the elastic modulus of the plate layer 200 is greater than the elastic modulus of the substrate 10. Thus, the warping of the substrate 10 during temperature rising is reduced, and the display effect is improved.
[0085] Optionally, the material of the plate layer 200 is aluminum alloy. The thermal expansion coefficient of the aluminum alloy is 0.00002 per Kelvin, the elastic modulus is 70 Giga Pascal, and the Poisson's ratio is 0.3. The thickness of the plate layer 200 is 0.5 millimeter.
[0086] Optionally, the absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer 21 and the thermal expansion coefficient of the plate layer 200 is a third difference, and the third difference is less than or equal to 0.00001 per Kelvin. In the embodiment, the substrate 10 is located between the first inorganic insulating layer 21 and the plate layer 200. When the thermal expansion coefficient of the first inorganic insulating layer 21 is greater than the thermal expansion coefficient of the substrate 10, the edges of the substrate 10 will be warped downward. When the thermal expansion coefficient of the plate layer 200 is greater than the thermal expansion coefficient of the substrate 10, the edges of the substrate 10 will be warped upward. When the absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer 21 and the thermal expansion coefficient of the plate layer 200 is less than or equal to 0.00001 per Kelvin, the warping of the display panel 100 is reduced, and only a slight deformation of the display panel 100 occurs during temperature rising, thus improving the display effect.
[0087] Optionally, the third difference is less than or equal to 0.00001 per Kelvin. The value of the third difference is E3 multiplied by 0.000001. Wherein, E3 is a positive real number less than or equal to 10.
[0088] Optionally, the value of E3 is one of 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.9, 3.0, 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 4.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7, 4.8, 4.9, 5.0, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9, 6.0, 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.7, 6.8, 6.9, 7.0, 7.1, 7.2, 7.3, 7.4, 7.5, 7.6, 7.7, 7.8, 7.9, 8.0, 8.1, 8.2, 8.3, 8.4, 8.5, 8.6, 8.7, 8.8, 8.9, 9.0, 9.1, 9.2, 9.3, 9.4, 9.5, 9.6, 9.7, 9.8, 9.9, and 10.
[0089] In the above embodiment, as the value of E3 decreases, the warping amount of the display panel 100 also decreases, achieving the purpose of improving the display effect.
[0090] Optionally, the material of the plate layer 200 includes metal.
[0091] The reason for the traditional display panel 100a to produce warping is that, during the temperature rising process of the traditional display module 1000a, the difference between the thermal expansion coefficients of the substrate 10a and the adjacent film layers is too large, resulting in excessive internal stress of the traditional display panel 100a, so that the traditional display panel 100a produces warping, affecting the display effect.
[0092] Therefore, during the temperature rising process of the display panel 100, the present embodiment can reduce the temperature rise of the display panel 100 per unit time by improving the heat dissipation amount of the display panel 100, thereby achieving the purpose of reducing the warping amount of the display panel 100, and improving the display effect. When the material of the plate layer 200 is metal, the metal has good heat dissipation performance, and can quickly dissipate the heat generated by the light emitting device and the thin film transistor in the display panel 100, reducing the warping of the display panel 100.
[0093] Optionally, the display panel 100 further includes a heat-conducting adhesive tape 400, which is arranged between the plate layer 200 and the substrate 10 and connects the plate layer 200 and the substrate 10. The heat-conducting adhesive tape 400 is used as a medium to fill heat conduction. The heat-conducting adhesive tape 400 can further improve the heat dissipation efficiency of the display panel 100, thereby reducing the temperature rise of the display panel 100 in the working state and reducing the warping of the display panel 100.
[0094] Optionally, the heat-conducting adhesive tape 400 includes three film layers. The heat-conducting adhesive tape 400 includes a first adhesive layer 410, a base material layer 420, and a second adhesive layer 430. The material of the base material layer 420 can be polyethylene terephthalate (PET), and the materials of the first adhesive layer 410 and the second adhesive layer 430 can be double-sided adhesive tape. The base material layer 420 can improve the cohesion of the heat-conducting adhesive tape 400. The overall thickness of the heat-conducting adhesive tape 400 is 0.1 millimeters, the thickness of the first adhesive layer 410 and the second adhesive layer 430 is 0.04 millimeters, and the thickness of the base material layer 420 is 0.03 millimeters. The elastic modulus of the base material layer 420 is 1 gigapascal (GPa).
[0095] Optionally, the display panel 100 further includes an insulating adhesive tape 500. The insulating adhesive tape 500 is arranged between the heat-conducting adhesive tape 400 and the substrate 10, and the thickness of the insulating adhesive tape 500 is 0.01 millimeters. The insulating adhesive tape 500 is used for shielding signals and connecting the heat-conducting adhesive tape 400 and the substrate 10.
[0096] Optionally, the display panel 100 further comprises a sensor 300 arranged on one side of the substrate 10 in the thickness direction, for monitoring the warping amount of the substrate 10.
[0097] Since the display panel 100 selects a heat conduction material with good heat conduction performance as the material of the plate layer 200, in the process of heating the display panel 100, the plate layer 200 can average the temperature of the film layer where the substrate 10 is located, avoid the uneven temperature of the substrate 10 affecting the display effect, and improve the heat dissipation effect. Under this premise, on the one hand, the sensor 300 can be arranged in the display panel 100 to monitor the temperature inside the display panel 100 in real time, so as to avoid the temperature being too high, causing the substrate 10 to be broken due to excessive warping, and on the other hand, the temperature of the display panel 100 can be monitored in real time and accurately, so as to avoid the light emitting device inside the display panel 100 from being burned out.
[0098] Optionally, the sensor 300 can be a stress-strain sensor 300. In various embodiments of the present application, only the warping of the display panel 100 due to temperature rise is weakened, and the warping of the display panel 100 due to temperature rise is not completely eliminated. The stress-strain sensor 300 can be a piezoelectric ceramic or a PVDF piezoelectric film. When the display panel 100 warps due to temperature rise, the stress-strain sensor 300 can sense the strain in real time, generate a voltage value corresponding to the warping amount of the display panel 100, and then determine the specific temperature of the temperature rise through the size of the voltage value.
[0099] It can be understood that when there is a difference in thermal expansion coefficient between the substrate 10 and the thin film transistor device layer 20, as the temperature inside the display panel 100 rises, the small warping amount of the display panel 100 will gradually increase, and different warping amounts will correspond to different voltage values generated by the stress-strain sensor 300. According to different voltage values, the real-time temperature inside the display panel 100 can be monitored. This embodiment is a principle of realizing temperature detection of the display panel 100 by monitoring warping through the numerical relationship between temperature and warping.
[0100] In the conventional display panel 100a, the internal temperature of the display panel 100 is monitored by the temperature sensor 300. However, the temperature sensor 300 is difficult to monitor the real-time temperature inside the display panel 100. Because the battery inside the display device generates heat, high-power components, and external infrared radiation heat sources will cause great interference to such temperature sensor 300, and the heat insulation design inside the display panel 100 must involve vacuum and insulation, so it is difficult to achieve accurate and real-time monitoring. The conventional display panel 100a can also monitor the temperature of the display panel 100 by monitoring the real-time brightness of the display panel 100. However, the change of brightness has a lag effect compared with the change of temperature, and when the brightness decays, the high temperature inside the display panel 100 may have caused some components to burn out. The conventional display panel 100a also monitors the temperature by monitoring the real-time power consumption. Because the proportion of total power consumption and thermal power consumption is dynamically changed due to the influence of algorithm, the influence of display picture, and the complex heat transfer process in the whole machine structure, the temperature determined by power consumption is usually inaccurate, which leads to that the terminal usually gives a large power consumption gradient to control the influence of temperature on brightness in the design, and such detection and control precision is too low to affect the user experience. Therefore, the present embodiment reduces the warping of the display panel 100 in the temperature rising process, controls the degree of warping deformation of the substrate 10 with the change of temperature in a flat and monitorable interval, and monitors the slight warping of the display panel 100 in the temperature rising process by the stress and strain sensor 300, so as to achieve the effect of accurately monitoring the real-time temperature of the display panel 100.
[0101] Optionally, the display panel 100 includes a display area AA and a non-display area NA located at the periphery of the display area AA. On the premise that the plate layer 200 selects a heat uniform material (such as red copper, aluminum plate, etc.) with good heat uniform effect, the sensor 300 can be arranged in the non-display area NA.
[0102] Optionally, the thickness of the plate layer 200 located in the display area AA is greater than the thickness of the plate layer 200 located in the non-display area NA. In this embodiment, the portion of the plate layer 200 located in the non-display area NA is relatively thinned, and the portion of the plate layer 200 located in the display area AA is relatively thickened. On the one hand, the thickening of the portion of the plate layer 200 located in the display area AA can improve the heat conduction effect and the heat dissipation effect of the portion of the display panel located in the display area AA. Under the premise of inputting the same power to the display panel 100, the good heat conduction effect and the heat dissipation effect can reduce the temperature rise of the display panel 100, so that the temperature rise of the display panel 100 is reduced, thereby reducing the warping of the display panel 100. On the other hand, since the non-display area NA does not have a light emitting device and does not have a display function, the portion of the plate layer 200 located in the non-display area NA is thinned without affecting the heat conduction effect of the plate layer 200. After the portion of the plate layer 200 corresponding to the portion of the substrate 10 located in the non-display area NA is thinned, the portion of the substrate 10 located in the non-display area NA will produce a micro-warping within the specification range of the display panel 100 during the temperature rise. The micro-warping within the specification range of the display panel 100 can make the sensor 300 of the present application more accurately and precisely monitor the warping degree of the display panel 100. Since the sensor 300 of the present application is a stress-strain sensor 300, under the premise that the sensor 300 accurately and precisely monitors the warping degree of the display panel 100, the sensor 300 can output a real-time voltage value. Since the higher the temperature rise of the display panel 100, the greater the warping degree of the display panel 100, and the greater the voltage value output by the sensor 300 for monitoring the warping degree of the display panel 100, the thickness of the plate layer 200 located in the non-display area NA can be thinned to accurately and precisely monitor the warping degree and the real-time temperature of the display panel 100.
[0103] Since the display area AA is the concentrated heat generation area of the panel, in this embodiment, the thickness of the plate layer 200 located in the display area AA is increased by partition design, thereby improving the heat dissipation effect of the display panel 100, and controlling the area of the thermal warping deformation of the substrate 10 within the safe area of the panel.
[0104] Optionally, referring to Figure 5 The display module 1000 of the present application further comprises a limiting mechanism 600, and the surface of the limiting mechanism 600 is provided with a limiting groove 610. At least a portion of the display panel 100 located in the non-display area NA is accommodated in the limiting groove 610.
[0105] The limiting mechanism 600 can be a middle frame. By setting the part of the display panel 100 located in the non-display area NA in the limiting groove 610, and reserving a certain gap between the inner wall of the limiting groove 610 and the display panel 100, the length of the gap is in the range of 1 to 10 microns. During the temperature rise of the display panel 100, the limiting groove 610 can allow the display panel 100 to produce a slight warping, and prevent the display panel 100 from producing a warping beyond the allowed range. At the same time of detecting the temperature of the display panel 100, the display panel 100 is prevented from having a too large warping amount, causing irreversible deformation of the display panel 100, and affecting the display effect.
[0106] The specific embodiments of the present application are described in detail above. The above-described embodiments disclosed by the present application are only preferred embodiments of the present application. For those skilled in the art, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements are also within the scope of protection of the claims of the present application.
Claims
1. A display panel, characterized by, The display panel comprises: a substrate; a thin film transistor device layer provided on one side of the substrate in a thickness direction, the thin film transistor device layer comprising a first inorganic insulating layer and a first organic planar layer; and a light-emitting device layer provided on a side of the thin film transistor device layer away from the substrate; wherein the first inorganic insulating layer is provided between the substrate and the light-emitting device layer, the first organic planar layer is provided on a side of the first inorganic insulating layer away from the substrate, an absolute value of a difference between an elastic modulus of the first organic planar layer and an elastic modulus of the substrate is less than or equal to 10 gigapascals, and an absolute value of a difference between a thermal expansion coefficient of the thin film transistor device layer and a thermal expansion coefficient of the substrate is less than or equal to 0.00001 per kelvin.
2. The display panel of claim 1, wherein, The absolute value of the difference between the thermal expansion coefficient of the first inorganic insulating layer and the thermal expansion coefficient of the substrate is a first difference, and the first difference is less than or equal to 0.00001 per kelvin. The thin film transistor device layer further comprises a second inorganic insulating layer provided on a side of the first inorganic insulating layer away from the substrate; 3. The display panel of claim 2, wherein, wherein an absolute value of a difference between a thermal expansion coefficient of the second inorganic insulating layer and the thermal expansion coefficient of the substrate is a second difference, the second difference is less than or equal to 0.00001 per kelvin, and the second difference is less than or equal to the first difference. The display panel further comprises a plate layer provided on a side of the substrate away from the first inorganic insulating layer; 4. The display panel of claim 2, wherein, wherein an elastic modulus of the plate layer is greater than the elastic modulus of the substrate. An absolute value of a difference between the thermal expansion coefficient of the first inorganic insulating layer and a thermal expansion coefficient of the plate layer is a third difference, and the third difference is less than or equal to 0.00001 per kelvin.
5. The display panel of claim 4, wherein, The material of the plate layer comprises metal.
6. The display panel of claim 4, wherein, The display panel further comprises a heat-conducting adhesive tape provided between the plate layer and the substrate and connecting the plate layer and the substrate. The display panel further comprises a sensor provided on one side of the substrate in a thickness direction, for monitoring a warping amount of the substrate.
7. The display panel of claim 1, wherein, The display module comprises the display panel as claimed in any one of claims 1-7.
8. A display module, characterized by The display panel comprises a display area and a non-display area located at a periphery of the display area; 9. The display module of claim 8, wherein the display module is configured to be mounted to a display module mounting surface of a display module mounting structure. The display module further comprises a limiting mechanism, a surface of the limiting mechanism is provided with a limiting groove, and at least part of the display panel located in the non-display area is accommodated in the limiting groove.
Citation Information
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