Signal processing device and method and related equipment

Abstract

A signal processing device, method and related device are used for reducing the influence of the nonlinear characteristic of a PA on the signal processing performance of the PA so as to improve the communication quality. Moreover, in the signal processing device, the cost and the power consumption can be reduced and the complexity of nonlinear pre-distortion can be reduced through the implementation mode that the M paths of first signals are combined and processed by the combiner. The signal processing device comprises a combiner used for inputting M paths of first signals and outputting a second signal formed by combining the M paths of first signals, the M paths of first signals respectively comprise output signals of M PAs, and M is an integer greater than 2; the signal processing device further comprises a signal processor used for outputting a third signal based on the second signal, and the third signal is used for compensating nonlinear information of the M paths of first signals.

Description

A signal processing device, method and related equipment Technical Field

[0001] The present application relates to the field of communications, and in particular to a signal processing device, method, and related equipment. Background Art

[0002] With the explosive growth of user demand, high capacity and high speed have become essential features of future wireless communication systems. To achieve these, communication systems need to adopt wider signal bandwidths and more complex modulation schemes, which will result in higher peak-to-average power ratios (PAPRs) of communication signals.

[0003] Currently, power amplifiers (PAs) are crucial components of communications devices. Signals with high PAPRs can easily affect the PA's signal processing performance. For example, these can degrade the error vector magnitude (EVM) of the PA-processed signal, increase the receiver's bit error rate (BER), and cause adjacent channel interference. These issues can reduce the signal transmission efficiency of the PA-containing communication device and affect communication quality.

[0004] Therefore, how to improve the signal processing performance of PA in communication devices is a technical problem that needs to be solved urgently.

[0005] Summary of the Invention

[0006] This application provides a signal processing device, method, and related equipment for reducing the impact of a PA's nonlinear characteristics on the PA's signal processing performance, thereby improving communication quality. Furthermore, in this signal processing device, combining M first signals via a combiner can reduce cost and power consumption, and reduce the complexity of nonlinear predistortion.

[0007] In a first aspect, the present application provides a signal processing device, which is included in a communication device, wherein the communication device includes at least M PAs. The communication device can be a terminal device or a network device. The signal processing device includes a combiner for inputting M first signals and outputting a second signal obtained by combining the M first signals, wherein the M first signals each include the output signals of the M PAs, where M is an integer greater than 2; the signal processing device also includes a signal processor for outputting a third signal based on the second signal, wherein the third signal is used to compensate for nonlinear information in the M first signals.

[0008] Based on the above technical solution, the combiner in the signal processing device is configured to input M first signals and output a second signal resulting from the combination of the M first signals. Furthermore, the signal processor in the signal processing device is configured to output a third signal based on the second signal, which is used to compensate for the nonlinearity of the M first signals. In other words, the third signal obtained by the signal processing device can be used to predistort the nonlinearity of the M first signals, thereby reducing the impact of the PA's nonlinear characteristics on the PA's signal processing performance, thereby improving communication quality.

[0009] In addition, in the signal processing device, the implementation of combining the M first signals through a combiner can reduce costs and power consumption, and reduce the complexity of nonlinear predistortion.

[0010] Optionally, the signal processing device includes the M PAs. Alternatively, the signal processing device does not include the M PAs, that is, the signal processing device and the M PAs are both independently provided parts in the communication device.

[0011] In a possible implementation manner of the first aspect, the third signal includes a first sub-signal, and the first sub-signal is used to compensate for first nonlinear information of the M first signals.

[0012] Based on the above technical solution, the third signal obtained by the signal processor in the signal processing device includes a first sub-signal for compensating for the first nonlinear information of the M first signals. The first nonlinear information may include identical nonlinear information corresponding to the M first signals. This first sub-signal is used to perform predistortion compensation for the first nonlinear information of the M first signals, thereby reducing the impact of identical nonlinear characteristics of the M PAs on the PA's signal processing performance.

[0013] It should be understood that the first nonlinear information of the M-path first signals can be called the common nonlinear information of the M-path first signals, the same nonlinear information of the M-path first signals, the same part of the nonlinear information of the M-path first signals, the common part of the nonlinear information of the M-path first signals, or other descriptions, which are not limited here.

[0014] In a possible implementation manner of the first aspect, the signal processor is specifically configured to output the first sub-signal to a first predistorter, and the first predistorter is connected to the M PAs.

[0015] Based on the above technical solution, the third signal obtained by the signal processor in the signal processing device includes a first sub-signal used to compensate for the first nonlinear information of the M first signals. In addition, the signal processor can also output the first sub-signal to a first predistorter connected to the M PAs, so that the first predistorter can perform predistortion compensation on the M PAs based on the first sub-signal.

[0016] Optionally, the signal processing device includes the first predistorter. Alternatively, the signal processing device does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently provided parts in the communication device.

[0017] It should be noted that the number of the first pre-distorters is N, where N is an integer greater than or equal to 1.

[0018] Optionally, the value of N may be the same as the value of M, that is, N predistorters are used to perform predistortion compensation on M PAs based on N first sub-signals respectively.

[0019] Optionally, the value of N is 1, that is, predistortion compensation is performed on M PAs based on the first sub-signal through one predistorter.

[0020] Optionally, the value of N is greater than 1 and less than M, i.e., predistortion compensation is performed on N of the M PAs using N predistorters based on the N first sub-signals, while predistortion compensation is not required for the remaining MN PAs, thereby reducing processing overhead. For example, the nonlinear information of the MN PAs indicates that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the first nonlinear information of the MN PAs is predistorted using other methods.

[0021] Optionally, the value of N is greater than 1 and less than M, that is, predistortion compensation is performed on M PAs based on N first sub-signals respectively through N predistorters, wherein at least one predistorter among the N predistorters performs predistortion compensation on two or more PAs based on the first sub-signal.

[0022] In a possible implementation of the first aspect, the first predistorter is configured to input the first sub-signal and output M first processing results to the M PAs respectively, where the M first processing results are obtained by performing predistortion processing on the first sub-signal.

[0023] Based on the above technical solution, after the signal processor in the signal processing device outputs the first sub-signal to the first predistorter, the first predistorter is used to perform predistortion processing based on the first sub-signal to obtain M first processing results and output the M first processing results to M PAs respectively, so that the M PAs can perform predistortion compensation for the first nonlinear information based on the M first processing results.

[0024] In a possible implementation manner of the first aspect, the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals.

[0025] Based on the above technical solution, the third signal obtained by the signal processor in the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals. The second nonlinear information may include different nonlinear information corresponding to the M first signals. Predistortion compensation is performed on the second nonlinear information of the M first signals using the M second sub-signals, thereby reducing the impact of the different nonlinear characteristics corresponding to the M PAs on the signal processing performance of the PAs.

[0026] It should be understood that the second nonlinear information of the M-channel first signals can be called the non-shared nonlinear information of the M-channel first signals, the different nonlinear information of the M-channel first signals, the different parts of the nonlinear information of the M-channel first signals, the non-shared parts of the nonlinear information of the M-channel first signals, or other descriptions, which are not limited here.

[0027] Optionally, the number of second sub-signals included in the third signal is denoted as K, where K is an integer greater than or equal to 1, and K may be less than M. That is, pre-distortion compensation is performed on K of the M PAs using K first sub-signals, while pre-distortion compensation is not required for the remaining MK PAs, thereby reducing processing overhead. For example, the nonlinear information of the MK PAs may indicate that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the second nonlinear information of the MK PAs may be pre-distortion compensated using other means.

[0028] In a possible implementation manner of the first aspect, the signal processor is specifically configured to output the M second sub-signals to M second pre-distorters, and the M second pre-distorters are respectively connected to the M PAs.

[0029] Based on the above technical solution, the third signal obtained by the signal processor in the signal processing device includes M second sub-signals used to compensate for the second nonlinear information of the M first signals. In addition, the signal processor can also output the M second sub-signals to M second pre-distorters connected to the M PAs, so that the M second pre-distorters can perform pre-distortion compensation on the M PAs based on the M second sub-signals.

[0030] Optionally, the signal processing device includes the second predistorter. Alternatively, the signal processing device does not include the second predistorter, that is, the signal processing device and the second predistorter are both independently provided parts in the communication device.

[0031] Optionally, the second predistorter and the first predistorter are implemented by the same predistorter, or the second predistorter is different from the first predistorter.

[0032] In a possible implementation manner of the first aspect, the M second predistorters are configured to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing based on the second sub-signals.

[0033] Based on the above technical solution, after the signal processor in the signal processing device outputs the M second sub-signals to M second pre-distorters, the M second pre-distorters are used to perform predistortion processing based on the second sub-signals to obtain M second processing results and output the M second processing results to M PAs, respectively, so that the M PAs can perform predistortion compensation for the second nonlinear information based on the M second processing results.

[0034] It can be understood that, when the number of second sub-signals included in the third signal is K and K is less than M, the number of the second pre-distortion processors can be K to reduce processing overhead.

[0035] In a possible implementation manner of the first aspect, the device further includes a sampler; and the combiner is connected to the signal processor through the sampler.

[0036] Based on the above technical solution, the combiner in the signal processing device is connected to the signal processor through the sampler, so that the signal of the combiner is sampled and processed by the sampler and then input into the signal processor for further processing.

[0037] Optionally, the signal processing device includes the sampler. Alternatively, the signal processing device does not include the sampler, that is, the signal processing device and the sampler are both independently provided parts in the communication device.

[0038] In a possible implementation manner of the first aspect, the sampler is configured to input the fourth signal and output an under-sampling result of the fourth signal to the signal processor, where the fourth signal is obtained based on the second signal.

[0039] Based on the above technical solution, when the combiner in the signal processing device is connected to the signal processor through a sampler, the sampler is used to input a fourth signal obtained based on the second signal, and output an under-sampling result of the fourth signal to the signal processor, so that the signal processor determines a third signal for compensating for the nonlinear information of the M-way first signal based on the under-sampling result, so as to reduce the number of samples processed by the signal processor and reduce the computational complexity.

[0040] In a possible implementation manner of the first aspect, the signal processor is specifically configured to output the third signal based on an undersampling result of the fourth signal.

[0041] Based on the above technical solution, when the combiner in the signal processing device is connected to the signal processor through the sampler, the signal processor can specifically output the third signal based on the undersampling result of the fourth signal to reduce computational complexity.

[0042] In a possible implementation of the first aspect, the M first signals respectively include input signals of M PAs, and the signal processor is further used to output a fifth signal to a third predistorter (or modulator) based on the input signals of the M PAs, where the fifth signal is used to compensate for in-phase quadrature (IQ) errors of the modulator.

[0043] Based on the above technical solution, in order to reduce the interference of the modulator on the signal in the communication device, the signal processor is also used to output a fifth signal for compensating the IQ error of the modulator to the third predistorter (or modulator) based on the input signals of the M PAs, so that the third predistorter (or modulator) can subsequently perform signal compensation processing based on the fifth signal, further improving the processing performance of predistortion compensation based on the third signal.

[0044] Optionally, the fifth signal includes an IQ imbalance parameter and / or a compensation model parameter.

[0045] Optionally, the signal processing device includes the third predistorter (or modulator). Alternatively, the signal processing device does not include the third predistorter (or modulator), that is, the signal processing device and the third predistorter (or modulator) are both independently provided parts in the communication device.

[0046] Optionally, the third predistorter is the first predistorter, or the third predistorter is the second predistorter, or the third predistorter is different from the first predistorter and the third predistorter is different from the second predistorter.

[0047] In a possible implementation manner of the first aspect, the combiner is connected to the M PAs through M adjustable attenuators, and the M adjustable attenuators are respectively used to process output signals of the M PAs.

[0048] Based on the above technical solution, the M first signals output by the combiner of M PA outputs can be processed by M adjustable attenuators respectively and then input into the combiner for combined processing, so that the combiner obtains the attenuated signal, reducing the processing complexity and improving the accuracy of subsequent calculations.

[0049] Optionally, the signal processing device includes the adjustable attenuator. Alternatively, the signal processing device does not include the adjustable attenuator, that is, the signal processing device and the adjustable attenuator are both independently provided parts in the communication device.

[0050] In a possible implementation manner of the first aspect, the M adjustable attenuators are respectively used to process input signals of the M PAs.

[0051] Based on the above technical solution, when the M first signals also include input signals of M PAs, the M adjustable attenuators can also be used to process the input signals of the M PAs respectively, so as to reduce the processing complexity of the third predistorter (or modulator).

[0052] In a possible implementation manner of the first aspect, the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust power configuration coefficients of the M adjustable attenuators.

[0053] Based on the above technical solution, when the combiner is connected to the M PAs through M adjustable attenuators, the M adjustable attenuators can also be connected to an adjustable power coefficient configuration module, which is used to adjust the power configuration coefficients of the M adjustable attenuators to adjust the power configuration coefficients of the M first signals input to the combiner.

[0054] Optionally, the signal processing device includes the adjustable power factor configuration module. Alternatively, the signal processing device does not include the adjustable power factor configuration module, that is, the signal processing device and the adjustable power factor configuration module are both independently provided parts in the communication device.

[0055] The second aspect of the present application provides a signal processing method, which is performed by a communication device, or the method is performed by some components in the communication device (such as the signal processing device mentioned in the first aspect and any embodiment thereof, or the processor, chip or chip system in the communication device, etc.), or the method can also be implemented by a functional logic module or software that can implement the signal processing method. It should be understood that the communication device can be a terminal device or a network device. In the second aspect and its possible implementation, the communication method is described as being performed by a signal processing device. In this method, the signal processing device obtains M first signals, and the first signal includes the output signal of the PA, where M is an integer greater than 2; the signal processing device determines a second signal after the M first signals are merged; the signal processing device outputs a third signal based on the second signal, and the third signal is used to compensate for the nonlinear information of the M first signals.

[0056] Based on the above technical solution, after obtaining M first signals including the PA's output signal, the signal processing device determines a second signal resulting from the combination of the M first signals. Furthermore, based on the second signal, the signal processing device outputs a third signal for compensating for the nonlinear information in the M first signals. In other words, the third signal obtained by the signal processing device can be used to predistort the nonlinear information in the M first signals, reducing the impact of the PA's nonlinear characteristics on the PA's signal processing performance, thereby improving communication quality.

[0057] In addition, in this signal processing method, by implementing the merging process on M channels of first signals, the cost and power consumption can be reduced, and the complexity of nonlinear predistortion can be reduced.

[0058] In a possible implementation of the second aspect, the third signal includes a first sub-signal, and the first sub-signal is used to compensate for first nonlinear information of the M first signals; outputting the third signal based on the second signal includes: outputting the first sub-signal to a first predistorter based on the second signal, and the first predistorter is connected to the M PAs; wherein the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results are obtained by predistortion processing based on the first sub-signal.

[0059] Based on the above technical solution, the third signal obtained by the signal processing device includes a first sub-signal used to compensate for the first nonlinear information of the M first signals. The first nonlinear information may include identical nonlinear information corresponding to the M first signals. This first sub-signal is used to perform predistortion compensation on the first nonlinear information of the M first signals, thereby reducing the impact of the identical nonlinear characteristics of the M PAs on the PA's signal processing performance.

[0060] It should be understood that the first nonlinear information of the M-path first signals can be called the common nonlinear information of the M-path first signals, the same nonlinear information of the M-path first signals, the same part of the nonlinear information of the M-path first signals, the common part of the nonlinear information of the M-path first signals, or other descriptions, which are not limited here.

[0061] Optionally, the signal processing device includes the first predistorter. Alternatively, the signal processing device does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently provided parts in the communication device.

[0062] It should be noted that the number of the first pre-distorters is N, where N is an integer greater than or equal to 1.

[0063] Optionally, the value of N may be the same as the value of M, that is, N predistorters are used to perform predistortion compensation on M PAs based on N first sub-signals respectively.

[0064] Optionally, the value of N is 1, that is, predistortion compensation is performed on M PAs based on the first sub-signal through one predistorter.

[0065] Optionally, the value of N is greater than 1 and less than M, i.e., predistortion compensation is performed on N of the M PAs using N predistorters based on the N first sub-signals, while predistortion compensation is not required for the remaining MN PAs, thereby reducing processing overhead. For example, the nonlinear information of the MN PAs indicates that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the first nonlinear information of the MN PAs is predistorted using other methods.

[0066] Optionally, the value of N is greater than 1 and less than M, that is, predistortion compensation is performed on M PAs based on N first sub-signals respectively through N predistorters, wherein at least one predistorter among the N predistorters performs predistortion compensation on two or more PAs based on the first sub-signal.

[0067] In a possible implementation of the second aspect, the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for second nonlinear information of the M first signals. Outputting the third signal based on the second signal includes: outputting the M second sub-signals to M second pre-distorters based on the second signal, and the M second pre-distorters are respectively connected to the M PAs; wherein the M second pre-distorters are used to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing on the second sub-signals.

[0068] Based on the above technical solution, the third signal obtained by the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals. The second nonlinear information may include different nonlinear information corresponding to the M first signals. Predistortion compensation is performed on the second nonlinear information of the M first signals using the M second sub-signals, thereby reducing the impact of the different nonlinear characteristics corresponding to the M PAs on the signal processing performance of the PAs.

[0069] It should be understood that the second nonlinear information of the M-channel first signals can be called the non-shared nonlinear information of the M-channel first signals, the different nonlinear information of the M-channel first signals, the different parts of the nonlinear information of the M-channel first signals, the non-shared parts of the nonlinear information of the M-channel first signals, or other descriptions, which are not limited here.

[0070] Optionally, the number of second sub-signals included in the third signal is denoted as K, where K is an integer greater than or equal to 1, and K may be less than M. That is, pre-distortion compensation is performed on K of the M PAs using K first sub-signals, while pre-distortion compensation is not required for the remaining MK PAs, thereby reducing processing overhead. For example, the nonlinear information of the MK PAs may indicate that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the second nonlinear information of the MK PAs may be pre-distortion compensated using other means.

[0071] In a possible implementation manner of the second aspect, outputting the third signal based on the second signal includes: outputting the third signal based on an undersampling result of the second signal.

[0072] Based on the above technical solution, in the process of outputting the third signal based on the second signal, the signal processing device can output the third signal based on the undersampling result of the second signal, that is, the signal processing device can determine the third signal for compensating for the nonlinear information of the M-channel first signal based on the undersampling result, so as to reduce the number of processed samples and reduce the computational complexity.

[0073] In a possible implementation manner of the second aspect, determining the second signal after the M first signals are merged includes: determining the second signal after processing the output signals of the M PAs respectively based on M adjustable attenuators.

[0074] Based on the above technical solution, the M first signals output by the combiner of M PA outputs can be processed by M adjustable attenuators respectively and then input into the combiner for combined processing, so that the combiner obtains the attenuated signal, reducing the processing complexity and improving the accuracy of subsequent calculations.

[0075] In a possible implementation manner of the second aspect, the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators.

[0076] Based on the above technical solution, when the combiner is connected to the M PAs through M adjustable attenuators, the M adjustable attenuators can also be connected to an adjustable power coefficient configuration module, which is used to adjust the power configuration coefficients of the M adjustable attenuators to adjust the power configuration coefficients of the M first signals input to the combiner.

[0077] The third aspect of the present application provides a communication device, which can implement the method in the above-mentioned second aspect or any possible implementation of the second aspect. The device includes corresponding units or modules for executing the above-mentioned method. The units or modules included in the device can be implemented by software and / or hardware. For example, the device can be a communication device, or the device can be a component in a communication device (such as the signal processing device mentioned in the first aspect and any embodiment thereof, or a processor, chip or chip system in a communication device, etc.), or the method can also be implemented by a functional logic module or software that can implement the signal processing method. It should be understood that the communication device can be a terminal device or a network device.

[0078] The device includes a processing unit and a transceiver unit; the transceiver unit is used to obtain M first signals, the first signal including the output signal of the PA, M is an integer greater than 2; the processing unit is used to determine the second signal after the M first signals are merged; the processing unit is also used to output a third signal based on the second signal, and the third signal is used to compensate for the nonlinear information of the M first signals.

[0079] In a possible implementation of the third aspect, the third signal includes a first sub-signal, and the first sub-signal is used to compensate for first nonlinear information of the M first signals; the processing unit outputting the third signal based on the second signal includes: the processing unit outputting the first sub-signal to a first predistorter based on the second signal, and the first predistorter is connected to the M PAs; wherein the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results are obtained by predistortion processing based on the first sub-signal.

[0080] In a possible implementation of the third aspect, the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for second nonlinear information of the M first signals. The processing unit outputs the third signal based on the second signal, including: the processing unit outputs the M second sub-signals to M second pre-distorters based on the second signal, and the M second pre-distorters are respectively connected to the M PAs; wherein the M second pre-distorters are used to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing on the second sub-signals.

[0081] In a possible implementation manner of the third aspect, the processing unit outputting the third signal based on the second signal includes: the processing unit outputting the third signal based on an undersampling result of the second signal.

[0082] In a possible implementation of the third aspect, the processing unit determines the second signal after the M first signals are merged, including: the processing unit determines the second signal after processing the output signals of the M PAs respectively based on M adjustable attenuators.

[0083] In a possible implementation manner of the third aspect, the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust power configuration coefficients of the M adjustable attenuators.

[0084] In the third aspect of the present application, the constituent modules of the communication device can also be used to execute the steps performed in each possible implementation method of the second aspect and achieve corresponding technical effects. For details, please refer to the second aspect and will not be repeated here.

[0085] A fourth aspect of an embodiment of the present application provides a communication device, comprising the signal processing device in the aforementioned first aspect or any possible implementation of the first aspect.

[0086] Optionally, the communication device is a transmitter, a sending device, a signal sending device, etc.

[0087] A fifth aspect of an embodiment of the present application provides a communication device, comprising at least one processor, wherein the at least one processor is coupled to a memory; the memory is used to store programs or instructions; the at least one processor is used to execute the program or instructions so that the device implements the method described in the second aspect or any possible implementation method of the second aspect, or.

[0088] In a sixth aspect, an embodiment of the present application provides a communication device, comprising at least one logic circuit and an input / output interface; the logic circuit and the input / output interface are used to execute the method described in the second aspect or any possible implementation of the second aspect.

[0089] In a seventh aspect, an embodiment of the present application provides a computer-readable storage medium storing one or more computer-executable instructions. When the computer-executable instructions are executed by a processor, the processor executes the method described in the second aspect or any possible implementation of the second aspect.

[0090] An eighth aspect of an embodiment of the present application provides a computer program product (or computer program) storing one or more computers. When the computer program product is executed by the processor, the processor executes the method of the above-mentioned second aspect or any possible implementation of the second aspect.

[0091] A ninth aspect of an embodiment of the present application provides a chip system comprising at least one processor for supporting a communication device to implement the functions involved in the second aspect or any possible implementation of the second aspect.

[0092] In one possible design, the chip system may further include a memory for storing program instructions and data necessary for the communication device. The chip system may be composed of a chip or may include a chip and other discrete components. Optionally, the chip system may further include an interface circuit for providing program instructions and / or data to the at least one processor.

[0093] A tenth aspect of an embodiment of the present application provides a communication system, which includes the communication device of the third aspect mentioned above, or the communication system includes the communication device of the fourth aspect mentioned above, or the communication system includes the communication device of the fifth aspect mentioned above, or the communication system includes the communication device of the sixth aspect mentioned above.

[0094] Among them, the technical effects brought about by any design method in the third to tenth aspects can refer to the technical effects brought about by different design methods in the above-mentioned first aspect (or second aspect), and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0095] FIG1a is a schematic diagram of a communication system provided by the present application;

[0096] FIG1b is a schematic diagram of a communication signal involved in this application;

[0097] FIG2 is a schematic diagram of a communication method provided by this application;

[0098] FIG3 a is a schematic diagram of a signal processing device;

[0099] FIG3 b is another schematic diagram of a signal processing device;

[0100] FIG4 is a schematic diagram of a signal processing device provided by the present application;

[0101] FIG5a is another schematic diagram of the signal processing device provided by the present application;

[0102] FIG5 b is another schematic diagram of the signal processing device provided by the present application;

[0103] FIG5c is another schematic diagram of the signal processing device provided by the present application;

[0104] FIG5 d is another schematic diagram of the signal processing device provided by the present application;

[0105] FIG5e is another schematic diagram of the signal processing device provided by the present application;

[0106] FIG5f is another schematic diagram of the signal processing device provided by the present application;

[0107] FIG5g is another schematic diagram of the signal processing device provided by the present application;

[0108] FIG5h is another schematic diagram of the signal processing device provided by the present application;

[0109] FIG6 is a schematic diagram of a signal processing method provided by the present application;

[0110] FIG7 is a schematic diagram of a communication device provided by the present application;

[0111] FIG8 is another schematic diagram of a communication device provided by the present application;

[0112] FIG9 is another schematic diagram of a communication device provided by the present application;

[0113] FIG10 is another schematic diagram of the communication device provided in this application. DETAILED DESCRIPTION

[0114] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application.

[0115] First, some of the terms used in the embodiments of the present application are explained to facilitate understanding by those skilled in the art.

[0116] (1) Terminal device: It can be a wireless terminal device that can receive network device scheduling and instruction information. The wireless terminal device can be a device that provides voice and / or data connectivity to the user, or a handheld device with wireless connection function, or other processing device connected to a wireless modem.

[0117] Terminal devices can communicate with one or more core networks or the Internet via a radio access network (RAN). Terminal devices can be mobile terminal devices, such as mobile phones (also known as "cellular" phones, mobile phones), computers, and data cards. For example, they can be portable, pocket-sized, handheld, computer-built-in, or vehicle-mounted mobile devices that exchange voice and / or data with the radio access network. Examples include personal communication service (PCS) phones, cordless phones, Session Initiation Protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), tablet computers, and computers with wireless transceiver capabilities. A wireless terminal device may also be referred to as a system, a subscriber unit, a subscriber station, a mobile station, a mobile station (MS), a remote station, an access point (AP), a remote terminal, an access terminal, a user terminal, a user agent, a subscriber station (SS), a customer premises equipment (CPE), a terminal, a user equipment (UE), a mobile terminal (MT), etc. A terminal device may also be a wearable device or a next-generation communication system, for example, a terminal device in a 5G communication system or a terminal device in a future-evolved public land mobile network (PLMN).

[0118] (2) Network equipment: It can be a device in a wireless network, for example, a network device can be a radio access network (RAN) node (or device) that connects a terminal device to a wireless network, which can also be called a base station. Currently, some examples of RAN equipment are: a new generation Node B (gNodeB) in a 5G communication system, a transmission reception point (TRP), an evolved Node B (eNB), a radio network controller (RNC), a Node B (NB), a base station controller (BSC), a base transceiver station (BTS), a home base station (e.g., home evolved Node B, or home Node B, HNB), a base band unit (BBU), or a wireless fidelity (Wi-Fi) access point (AP). In addition, in a network structure, a network device can include a centralized unit (CU) node, a distributed unit (DU) node, or a RAN device including a CU node and a DU node.

[0119] It should be understood that, in other possible cases, the network device may be another device that provides wireless communication functions for the terminal device. The embodiments of this application do not limit the specific technology and specific device form used by the network device. For the convenience of description, the embodiments of this application are not limited. Exemplarily, the network device may also include a core network device, which may include, for example, an access and mobility management function (AMF), a user plane function (UPF), or a session management function (SMF).

[0120] In the embodiments of the present application, the apparatus for implementing the function of the network device may be the network device, or may be a device capable of supporting the network device in implementing the function, such as a chip system, which may be installed in the network device. In the technical solutions provided in the embodiments of the present application, the technical solutions provided in the embodiments of the present application are described by taking the network device as an example.

[0121] (3) The terms "system" and "network" in the embodiments of the present application can be used interchangeably. "At least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, "at least one of A, B and C" includes A, B, C, AB, AC, BC or ABC. In addition, unless otherwise specified, the ordinal numbers such as "first" and "second" mentioned in the embodiments of the present application are used to distinguish multiple objects, and are not used to limit the order, timing, priority or importance of multiple objects.

[0122] In this application, unless otherwise specified, the same or similar parts between the various embodiments can refer to each other. In the various embodiments of this application, and the various methods / designs / implementations in each embodiment, if there is no special explanation and logical conflict, the terms and / or descriptions between different embodiments and the various methods / designs / implementations in each embodiment are consistent and can be referenced to each other. The technical features in different embodiments and the various methods / designs / implementations in each embodiment can be combined to form new embodiments, methods, or implementations according to their inherent logical relationships. The following description of the implementation methods of this application does not constitute a limitation on the scope of protection of this application.

[0123] Please refer to Figure 1a, which is a schematic diagram of a communication system in this application. Figure 1a exemplarily illustrates a network device 101 and six terminal devices, namely terminal device 1, terminal device 2, terminal device 3, terminal device 4, terminal device 5, and terminal device 6. In the example shown in Figure 1a, terminal device 1 is a smart teacup, terminal device 2 is a smart air conditioner, terminal device 3 is a smart gas pump, terminal device 4 is a vehicle, terminal device 5 is a mobile phone, and terminal device 6 is a printer.

[0124] As shown in Figure 1a, during the communication process, the signal sending device (or called the transmitting end, transmitting end device) can be a network device, and the signal receiving device (or called the receiving end, receiving end device) can be a terminal device; or, the signal sending device can be a terminal device, and the signal receiving device can be a network device; or, both the signal sending device and the signal receiving device can be network devices; or, both the signal sending device and the signal receiving device can be terminal devices.

[0125] The present application can be applied to a long term evolution (LTE) system, a new radio (NR) system, or a communication system evolved after 5G (such as 6G, etc.). The communication system includes at least one network device and / or at least one terminal device.

[0126] With the explosive growth of user demand, high capacity and high speed have become essential features of future wireless communication systems. Taking Figure 1a as an example, both network equipment and any terminal device can act as transmitters of communication signals. To achieve high capacity and high speed, the communication system requires wider signal bandwidths and more complex modulation schemes, which results in a higher peak-to-average power ratio (PAPR) for the communication signals sent by the transmitters.

[0127] For example, PAPR can be determined by the mathematical relationship between peak power and average power. For example, in a time domain signal, PAPR can be determined as follows:

[0128]

[0129] Currently, power amplifiers (PAs) are crucial components of communications devices. Signals with high PAPRs can easily affect the PA's signal processing performance. For example, these can degrade the error vector magnitude (EVM) of the PA-processed signal, increase the receiver's bit error rate (BER), and cause adjacent channel interference. These issues can reduce the signal transmission efficiency of the PA-containing communication device and affect communication quality.

[0130] For example, the power back-off phenomenon caused by higher PAPR can be achieved by the method shown in FIG1b. As shown in FIG1b, the straight line represents the ideal transfer function and the curve represents the practical transfer function. As shown in FIG1b, when the input power is low (P in FIG1b), in 1 ), the output power (out power) corresponding to the ideal transfer function and the actual transfer function are basically consistent, and the values ​​are both within P in 1 There is no power fallback (or the power fallback is not obvious) near the input power. However, when the input power is high (as shown in Figure 1b, P in 2 ), the output power corresponding to the ideal transfer function is P out 2, the output power corresponding to the actual transfer function is P′ out 2 It can be seen that the difference between the two will increase with the increase of input power, resulting in power back-off, which will affect the reduction of transmission power and thus reduce the transmission distance of the signal.

[0131] Therefore, how to improve the signal processing performance of the PA in a communication device is a technical problem that needs to be solved urgently. The solution provided by this application will be introduced below with reference to more figures.

[0132] For example, please refer to FIG2 , which is a schematic diagram of an application scenario of the present application, wherein the transmitter may be a network device or a terminal device, and the receiver may be a network device or a terminal device.

[0133] As shown in Figure 2, the transmitter may include the following modules:

[0134] The coding module (not shown in the figure) is mainly used to complete the coding and interleaving of the information bits to be transmitted (denoted as Tx bits);

[0135] The baseband processing module at the transmitting end is mainly used to complete information modulation, framing, filtering and shaping, pre-distortion correction and other processing;

[0136] Pre-distortion (PD) module, mainly used for linear pre-correction of power amplifier;

[0137] Digital to analog converter (DAC) module, mainly used for conversion between digital signals and analog signals;

[0138] The transmitting RF module mainly performs functions such as modulating the baseband signal into the RF signal and filtering the signal;

[0139] Power amplifier (PA), mainly used to amplify the signal power;

[0140] Wireless channel mainly refers to the wireless transmission of electromagnetic waves in media such as atmosphere, vacuum, and water;

[0141] Wired channels mainly refer to transmission in media such as optical fiber and copper wire;

[0142] As shown in Figure 2, the receiver may include the following modules:

[0143] The receiving RF module is mainly used to down-convert the received RF signal to a low-frequency signal or baseband signal;

[0144] Analog to digital converter (ADC) module, mainly used for conversion between analog signals and digital signals;

[0145] The receiving baseband unit module is mainly used to complete the recovery of the received baseband signal, including synchronization, equalization, decoding and other processing.

[0146] As shown in the aforementioned PAPR implementation example, when the input signal peak in the transmitter is large, it will cause the signal processing performance of the PA device to degrade. The solution provided in this application focuses on reducing the impact of the PA's nonlinear characteristics on the PA's signal processing performance, in order to improve communication quality. In other words, the solution provided in this application can be applied to improve the processing process of the PD module in Figure 2. Among them, this PD module can be called digital pre-distortion (DPD).

[0147] The following describes some implementations of a PD module in a communication device, using Figures 3a and 3b. It should be understood that in the following examples, the communication device in which the PD module resides can be a transmitter or a receiver, and that the communication device includes M PAs, with the signals input to the M PAs denoted as x1, x2, ..., xM, and the signals processed by the M PAs are output through M antennas (i.e., Antenna_1, Antenna_2, ..., Antenna_M in the figure), where M is an integer greater than or equal to 2.

[0148] A possible implementation of a PD module is shown in Figure 3a. In a communication device comprising M PAs, M PD modules are configured to improve the signal processing of the M PAs (i.e., PA_1, PA_2, ..., PA_M in the figure). In other words, the signal processing device in Figure 3a includes a coefficient solution algorithm module, which is used to obtain the output signals of the M PAs, perform coefficient solution based on the output signals of the M PAs to obtain M pieces of feedback information, and then send these M pieces of feedback information to M PDs (i.e., PD_1, PD_2, ..., PD_M in the figure). These M PDs then perform predistortion processing on the PAs on each link based on the feedback information, thereby improving the signal processing performance of the M PAs.

[0149] However, in the implementation shown in Figure 3a, although the processing accuracy is very high, as the number of antennas (it is generally believed that the number of antennas is the same as the number of PAs) increases, the need to configure the same number of PDs will result in a proportional increase in power consumption and cost, and the complexity will also increase accordingly.

[0150] A possible implementation of a PD module is shown in Figure 3b. In a communication device comprising M PAs, M PD modules are configured to improve the signal processing of the M PAs (i.e., PA_1, PA_2, ..., PA_M in the figure). In other words, the signal processing device in Figure 3b includes a coefficient solution algorithm module. By adding a time-division switch module, the coefficient solution algorithm module obtains the output signal of a specific PA from the M PAs at a given moment, performs coefficient solution based on the output signal of the specific PA, and obtains feedback information. This feedback information is then sent to a corresponding PD from the M PDs (i.e., PD_1, PD_2, ..., PD_M in the figure), causing the corresponding PD to perform predistortion processing on the PA on the link based on the feedback information. This process is then repeated M times to improve the signal processing performance of each of the M PAs.

[0151] However, in the implementation shown in Figure 3b, the time-division multiplexing single-path feedback structure, switched by a time-division switch, reduces the complexity of the feedback branch to a certain extent. However, the time-division switch configuration introduces crosstalk isolation issues between multiple input signals, causing the acquired feedback signal to be consistently interfered with by other branches, thereby degrading the performance of the digital predistortion (DPD). Furthermore, the high-speed switching of the time-division switch requires a high-precision synchronization mechanism with multiple baseband modules, making its implementation complex.

[0152] As can be seen from the above description, although the implementations shown in Figures 3a and 3b can correct the nonlinearity of the PA to a certain extent and improve the signal processing performance of the PA, some unresolved issues still exist. The solution provided by this application will be described below with reference to more figures.

[0153] As shown in Figure 4, a schematic diagram of a signal processing device provided by the present application is provided. The signal processing device is located in a communication device, which can be a terminal device or a network device. The signal processing device includes at least a signal processor and a combiner.

[0154] In the signal processing device shown in FIG4 , the combiner is used to input M first signals and output a second signal obtained by combining the M first signals, wherein the M first signals respectively include output signals of M PAs, and M is an integer greater than 2.

[0155] In the signal processing device shown in FIG4 , the signal processor is configured to output a third signal based on the second signal, wherein the third signal is used to compensate for nonlinear information of the M first signals.

[0156] Based on the technical solution shown in Figure 4, the combiner in the signal processing device is configured to input M first signals and output a second signal resulting from the combination of the M first signals. Furthermore, the signal processor in the signal processing device is configured to output a third signal based on the second signal, which is used to compensate for the nonlinearity of the M first signals. In other words, the third signal obtained by the signal processing device can be used to predistort the nonlinearity of the M first signals, reducing the impact of the PA's nonlinear characteristics on the PA's signal processing performance, thereby improving communication quality.

[0157] Furthermore, compared to the implementation shown in Figure 3b, which relies on a time-division switch, there are crosstalk isolation issues between multiple input signals. This causes the acquired feedback signal to be constantly interfered with by other branches, thereby deteriorating the performance of the digital pre-distortion. Furthermore, the high-speed switching of the time-division switch in the implementation shown in Figure 3b requires a high-precision synchronization mechanism with multiple baseband modules, making implementation complex. In contrast, the signal processing device shown in Figure 4 uses a combiner to combine M first signals, reducing cost and power consumption, and reducing the complexity of nonlinear pre-distortion.

[0158] It should be noted that in the implementation shown in FIG4 , the signal processing device may not include the M PAs, i.e., the signal processing device and the M PAs are both independently configured components of the communication device. In actual applications, the signal processing device may include the M PAs, and this is not limited here.

[0159] The following will provide an exemplary description of the PD module connected to the signal processing device shown in FIG4 in conjunction with more implementation examples.

[0160] In one possible implementation, the third signal output by the signal processing device (to the PD module) includes a first sub-signal, which is used to compensate for the first nonlinear information of the M first signals. Specifically, the third signal obtained by the signal processor in the signal processing device includes the first sub-signal used to compensate for the first nonlinear information of the M first signals. The first nonlinear information may include the same nonlinear information corresponding to the M first signals, so that the first sub-signal can be used to perform pre-distortion compensation for the first nonlinear information of the M first signals, thereby reducing the impact of the same nonlinear characteristics of the M PAs on the signal processing performance of the PAs.

[0161] It should be understood that the first nonlinear information of the M-path first signals can be called the common nonlinear information of the M-path first signals, the same nonlinear information of the M-path first signals, the same part of the nonlinear information of the M-path first signals, the common part of the nonlinear information of the M-path first signals, or other descriptions, which are not limited here.

[0162] In one possible implementation, the signal processor is specifically configured to output the first sub-signal to a first predistorter connected to the M PAs. Specifically, the third signal obtained by the signal processor in the signal processing device includes a first sub-signal used to compensate for first nonlinear information of the M first signals. Furthermore, the signal processor may further output the first sub-signal to the first predistorter connected to the M PAs, so that the first predistorter performs predistortion compensation on the M PAs based on the first sub-signal.

[0163] Optionally, the example shown in FIG4 does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently provided components of the communication device. Alternatively, the signal processing device in the example shown in FIG4 includes the first predistorter, which is not limited here.

[0164] It should be noted that the number of the first pre-distorters is N, where N is an integer greater than or equal to 1. The following will exemplarily describe different implementations of the value of N in conjunction with more implementation examples.

[0165] In one possible implementation, as shown in the example implementation of FIG5a, the value of N can be the same as the value of M, that is, N predistorters (denoted as first predistorter_1, first predistorter_2...first predistorter_N in FIG5a) are used to perform predistortion compensation on M PAs based on N first sub-signals.

[0166] In another possible implementation, as shown in the implementation example of FIG5b, the value of N is 1, that is, one predistorter (denoted as the first predistorter in FIG5b) is used to perform predistortion compensation on the M PAs based on the first sub-signal.

[0167] In another possible implementation, in addition to the above implementation, the value of N may also be greater than 1 and less than M.

[0168] Optionally, when the value of N is greater than 1 and less than M, N predistorters may each perform predistortion compensation on N of the M PAs based on the N first sub-signals, while the remaining MN PAs do not require predistortion compensation, thereby reducing processing overhead. For example, the nonlinear information of the MN PAs may indicate that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the first nonlinear information of the MN PAs may be predistorted using other methods.

[0169] Optionally, when the value of N is greater than 1 and less than M, predistortion compensation is performed on M PAs based on N first sub-signals respectively through N predistorters, wherein at least one predistorter among the N predistorters performs predistortion compensation on two or more PAs based on the first sub-signal.

[0170] In one possible implementation, the first predistorter is configured to input the first sub-signal and output M first processing results to the M PAs, respectively. The M first processing results are obtained by performing predistortion processing on the first sub-signal. Specifically, after the signal processor in the signal processing device outputs the first sub-signal to the first predistorter, the first predistorter is configured to perform predistortion processing on the first sub-signal to obtain M first processing results, and output the M first processing results to the M PAs, respectively. This allows the M PAs to perform predistortion compensation for the first nonlinear information based on the M first processing results.

[0171] In one possible implementation, the third signal output by the signal processing device (to the PD module) includes M second sub-signals, which are used to compensate for the second nonlinear information of the M first signals. Specifically, the third signal obtained by the signal processor in the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals. The second nonlinear information may include different nonlinear information corresponding to the M first signals. Predistortion compensation of the second nonlinear information of the M first signals is performed using the M second sub-signals, thereby reducing the impact of the different nonlinear characteristics corresponding to the M PAs on the signal processing performance of the PAs.

[0172] It should be understood that the second nonlinear information of the M-channel first signals can be called the non-shared nonlinear information of the M-channel first signals, the different nonlinear information of the M-channel first signals, the different parts of the nonlinear information of the M-channel first signals, the non-shared parts of the nonlinear information of the M-channel first signals, or other descriptions, which are not limited here.

[0173] Optionally, the number of second sub-signals included in the third signal is denoted as K, where K is an integer greater than or equal to 1, and K may be less than M. That is, pre-distortion compensation is performed on K of the M PAs using K first sub-signals, while pre-distortion compensation is not required for the remaining MK PAs, thereby reducing processing overhead. For example, the nonlinear information of the MK PAs may indicate that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the second nonlinear information of the MK PAs may be pre-distortion compensated using other means.

[0174] For example, when the number K of second sub-signals included in the third signal is the same as M, the number K of second pre-distorters is also the same as M. The implementation process can be implemented as shown in FIG5c , i.e., the number K of second pre-distorters connected to the signal processor is equal to M. These second pre-distorters can be denoted as second pre-distorter_1, second pre-distorter_2, ..., first pre-distorter_K in FIG5c . Similarly, when the number K of second sub-signals included in the third signal is 1, the number of second pre-distorters is 1. The implementation process can be implemented as shown in FIG5d , i.e., the number of second pre-distorters connected to the signal processor is 1. This second pre-distorter can be denoted as the second pre-distorter in FIG5d .

[0175] In one possible implementation, the signal processor is specifically configured to output the M second sub-signals to M second pre-distorters, each of which is connected to the M PAs. Specifically, the third signal obtained by the signal processor in the signal processing device includes the M second sub-signals used to compensate for the second nonlinear information of the M first signals. Furthermore, the signal processor may further output the M second sub-signals to the M second pre-distorters connected to the M PAs, so that the M second pre-distorters can perform pre-distortion compensation on the M PAs based on the M second sub-signals.

[0176] Optionally, the signal processing device includes the second predistorter. Alternatively, the signal processing device does not include the second predistorter, that is, the signal processing device and the second predistorter are both independently provided parts in the communication device.

[0177] In one possible implementation, the M second predistorters are configured to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing on the second sub-signals. Specifically, after the signal processor in the signal processing device outputs the M second sub-signals to the M second predistorters, the M second predistorters are configured to perform predistortion processing on the second sub-signals to obtain M second processing results, and respectively output the M second processing results to the M PAs, so that the M PAs respectively perform predistortion compensation for the second nonlinear information based on the M second processing results.

[0178] It can be understood that, when the number of second sub-signals included in the third signal is K and K is less than M, the number of the second pre-distortion processors can be K to reduce processing overhead.

[0179] It should be noted that, in the implementation process of the above-mentioned signal processing device, the signal processing device may include the first predistorter but not the second predistorter, or the signal processing device may include the second predistorter but not the first predistorter, or the signal processing device may include the first predistorter and the second predistorter, which is not limited here.

[0180] Optionally, when the signal processing device may include a first predistorter and the signal processing device may include a second predistorter, the connection relationship between the first predistorter, the second predistorter, and the PA is not limited. For example, the first predistorter may be connected to the PA via the second predistorter, and the second predistorter may be connected to the PA via the first predistorter, or other implementations may be used, which are not described in detail here.

[0181] Optionally, the second predistorter and the first predistorter are implemented by the same predistorter, or the second predistorter is different from the first predistorter. For example, if the second predistorter is different from the first predistorter, the number of first predistorters is 1, and the number of second predistorters K is equal to M, the implementation process can be implemented as shown in FIG5e or FIG5f.

[0182] In the implementation example shown in FIG5 e , the first predistorter is connected to M PAs via K second predistorters.

[0183] In the implementation example shown in FIG5 f , K second pre-distorters are connected to M PAs through the first pre-distorter.

[0184] In one possible implementation, such as that shown in FIG5g , the signal processing device may further include a sampler; the combiner is connected to the signal processor via the sampler. Specifically, the combiner in the signal processing device is connected to the signal processor via the sampler, so that the signal of the combiner is sampled and processed by the sampler before being input to the signal processor for further processing.

[0185] Optionally, the signal processing device includes the sampler. Alternatively, the signal processing device does not include the sampler, that is, the signal processing device and the sampler are both independently provided parts in the communication device.

[0186] In one possible implementation, the sampler is used to input a fourth signal obtained based on the second signal, and output an under-sampling result of the fourth signal to the signal processor. Specifically, when the combiner in the signal processing device is connected to the signal processor via the sampler, the sampler is used to input a fourth signal obtained based on the second signal, and output an under-sampling result of the fourth signal to the signal processor, so that the signal processor determines a third signal for compensating for the nonlinear information of the M-way first signal based on the under-sampling result, thereby reducing the number of samples processed by the signal processor and reducing computational complexity. Accordingly, the signal processor is specifically used to output the third signal based on the under-sampling result of the fourth signal. Thus, when the combiner in the signal processing device is connected to the signal processor via the sampler, the signal processor can specifically output the third signal based on the under-sampling result of the fourth signal to reduce computational complexity.

[0187] In one possible implementation, taking the implementation scenario shown in FIG. 5e as an example, the signal processing device can also be implemented as shown in FIG. As shown in FIG. 5h , taking the input signals "x1, x2...xM" as baseband signals as an example, the signal processing device can further include at least one device such as an ADC, a filter, and an oscillator between the combiner and the sampler.

[0188] Optionally, the ADC is mainly used for conversion between analog signals and digital signals, so that the sampler can perform sampling based on the digital signal, thereby simplifying the operation.

[0189] Optionally, the filter is mainly used to filter a partial frequency band of the input signal other than that of interest.

[0190] Optionally, the oscillator is mainly used as an energy conversion device to convert direct current power into alternating current power with a certain frequency.

[0191] In one possible implementation, in the signal processing device of any of the foregoing embodiments, the M first signals input to the combiner each further include input signals of M PAs, and the signal processor is further configured to output a fifth signal to a third predistorter (or modulator) based on the input signals of the M PAs, where the fifth signal is used to compensate for an IQ error of the modulator. Specifically, to reduce interference of the modulator on the signal in the communication device, the signal processor is further configured to output a fifth signal to the third predistorter (or modulator) based on the input signals of the M PAs, where the fifth signal is used to compensate for the IQ error of the modulator. This facilitates the third predistorter (or modulator) to subsequently perform signal compensation processing based on the fifth signal, thereby further improving the processing performance of predistortion compensation based on the third signal.

[0192] Optionally, the fifth signal includes an IQ imbalance parameter and / or a compensation model parameter.

[0193] Optionally, the signal processing device includes the third predistorter (or modulator). Alternatively, the signal processing device does not include the third predistorter (or modulator), that is, the signal processing device and the third predistorter (or modulator) are both independently provided parts in the communication device.

[0194] Optionally, the third predistorter is the first predistorter, or the third predistorter is the second predistorter, or the third predistorter is different from the first predistorter and the third predistorter is different from the second predistorter.

[0195] In one possible implementation, the combiner is connected to the M PAs via M adjustable attenuators, each of which is configured to process the output signals of the M PAs. Specifically, the M first signals output by the combiner from the M PAs can be processed by the M adjustable attenuators before being input into the combiner for combined processing. This allows the combiner to obtain attenuated signals, reducing processing complexity and improving the accuracy of subsequent calculations.

[0196] Optionally, the signal processing device includes the adjustable attenuator. Alternatively, the signal processing device does not include the adjustable attenuator, that is, the signal processing device and the adjustable attenuator are both independently provided parts in the communication device.

[0197] In one possible implementation, the M adjustable attenuators are respectively used to process the input signals of the M PAs. Specifically, when the M first signals also include input signals of the M PAs, the M adjustable attenuators can also be respectively used to process the input signals of the M PAs, thereby reducing the processing complexity of the third predistorter (or modulator).

[0198] In one possible implementation, the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators. Specifically, when the combiner is connected to the M PAs via the M adjustable attenuators, the M adjustable attenuators may also be connected to the adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators, thereby adjusting the power configuration coefficients of the M first signals input to the combiner.

[0199] Optionally, the signal processing device includes the adjustable power factor configuration module. Alternatively, the signal processing device does not include the adjustable power factor configuration module, that is, the signal processing device and the adjustable power factor configuration module are both independently provided parts in the communication device.

[0200] Exemplarily, taking the schematic diagram of Figure 5h as an example, the communication device may also include one or more switches, which are used to control the input of the PA input signal or the PA output signal to the adjustable attenuator, so that the signal processor performs the aforementioned implementation process of determining the fifth signal when obtaining the PA input signal, and the signal processor performs the aforementioned implementation process of determining the third signal when obtaining the PA output signal.

[0201] Optionally, taking the schematic diagram of FIG5h as an example, the communication device may further include at least one of the following components:

[0202] DAC is mainly used for converting digital signals to analog signals.

[0203] Modulator (modulation, Mod) is mainly used to shift the signal spectrum.

[0204] Coupler, mainly used for signal power distribution.

[0205] The above describes the signal processing device provided by the present application. The following will further introduce the signal processing method provided by the present application.

[0206] Please refer to Figure 6, which is a schematic diagram of the signal processing method provided by this application. The method includes the following steps. It should be noted that the method shown in Figure 6 is performed by a communication device, or the method is performed by some components in the communication device (such as the signal processing device mentioned in any of the aforementioned embodiments, or the processor, chip or chip system in the communication device, etc.), or the method can also be implemented by a functional logic module or software that can implement the signal processing method. In the following embodiments, the communication method is described as being performed by a signal processing device.

[0207] S601. Obtain M first signals.

[0208] In this embodiment, the signal processing apparatus obtains M first signals in step S601 , where the first signals include output signals of a PA, and M is an integer greater than 2.

[0209] S602: Determine a second signal obtained by combining M first signals.

[0210] In this embodiment, after the signal processing apparatus obtains M first signals in step S601, the signal processing apparatus determines a second signal obtained by merging the M first signals in step S602.

[0211] S603. Output a third signal based on the second signal.

[0212] In this embodiment, the signal processing apparatus outputs a third signal based on the second signal determined in step S602 , where the third signal is used to compensate for nonlinear information of the M first signals.

[0213] Based on the technical solution shown in FIG6 , after the signal processing apparatus obtains M first signals including the PA output signal in step S601, the apparatus determines a second signal resulting from the combination of the M first signals in step S602. Furthermore, the apparatus outputs a third signal for compensating for the nonlinearity of the M first signals in step S603. In other words, the third signal obtained by the signal processing apparatus can be used to predistort the nonlinearity of the M first signals, reducing the impact of the PA's nonlinear characteristics on the PA's signal processing performance, thereby improving communication quality.

[0214] In addition, in this signal processing method, by implementing the merging process on M channels of first signals, the cost and power consumption can be reduced, and the complexity of nonlinear predistortion can be reduced.

[0215] In one possible implementation, the third signal output by the signal processing device in step S603 includes a first sub-signal, which is used to compensate for the first nonlinear information of the M first signals. Accordingly, the process of the signal processing device outputting the third signal based on the second signal in step S603 includes: the signal processing device outputting the first sub-signal to a first predistorter based on the second signal, the first predistorter being connected to the M PAs; wherein the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs, respectively, wherein the M first processing results are obtained by predistortion processing based on the first sub-signal. Specifically, the third signal obtained by the signal processing device includes a first sub-signal used to compensate for the first nonlinear information of the M first signals. The first nonlinear information may include the same nonlinear information corresponding to the M first signals, so that the first nonlinear information of the M first signals is predistorted and compensated for by the first sub-signal, thereby reducing the impact of the same nonlinear characteristics of the M PAs on the signal processing performance of the PAs.

[0216] It should be understood that the first nonlinear information of the M-path first signals can be called the common nonlinear information of the M-path first signals, the same nonlinear information of the M-path first signals, the same part of the nonlinear information of the M-path first signals, the common part of the nonlinear information of the M-path first signals, or other descriptions, which are not limited here.

[0217] Optionally, the signal processing device includes the first predistorter. Alternatively, the signal processing device does not include the first predistorter, that is, the signal processing device and the first predistorter are both independently provided parts in the communication device.

[0218] It should be noted that the number of the first pre-distorters is N, where N is an integer greater than or equal to 1.

[0219] Optionally, the value of N may be the same as the value of M, that is, N predistorters are used to perform predistortion compensation on M PAs based on N first sub-signals respectively.

[0220] Optionally, the value of N is 1, that is, predistortion compensation is performed on M PAs based on the first sub-signal through one predistorter.

[0221] Optionally, the value of N is greater than 1 and less than M, i.e., predistortion compensation is performed on N of the M PAs using N predistorters based on the N first sub-signals, while predistortion compensation is not required for the remaining MN PAs, thereby reducing processing overhead. For example, the nonlinear information of the MN PAs indicates that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the first nonlinear information of the MN PAs is predistorted using other methods.

[0222] Optionally, the value of N is greater than 1 and less than M, that is, predistortion compensation is performed on M PAs based on N first sub-signals respectively through N predistorters, wherein at least one predistorter among the N predistorters performs predistortion compensation on two or more PAs based on the first sub-signal.

[0223] In one possible implementation, the third signal output by the signal processing device in step S603 includes M second sub-signals, the M second sub-signals being used to compensate for the second nonlinear information of the M first signals. The process of the signal processing device outputting the third signal based on the second signal includes: the signal processing device outputting the M second sub-signals to M second predistorters based on the second signal, the M second predistorters being respectively connected to the M PAs; wherein the M second predistorters are respectively input with the M second sub-signals and outputting M second processing results to the M PAs, wherein the M second processing results are respectively obtained by predistortion processing based on the second sub-signals. Specifically, the third signal obtained by the signal processing device includes a second sub-signal used to compensate for the second nonlinear information of the M first signals. The second nonlinear information may include different nonlinear information corresponding to the M first signals, so that the second nonlinear information of the M first signals is predistortedly compensated by the M second sub-signals, thereby reducing the impact of the different nonlinear characteristics corresponding to the M PAs on the signal processing performance of the PAs.

[0224] It should be understood that the second nonlinear information of the M-channel first signals can be called the non-shared nonlinear information of the M-channel first signals, the different nonlinear information of the M-channel first signals, the different parts of the nonlinear information of the M-channel first signals, the non-shared parts of the nonlinear information of the M-channel first signals, or other descriptions, which are not limited here.

[0225] Optionally, the number of second sub-signals included in the third signal is denoted as K, where K is an integer greater than or equal to 1, and K may be less than M. That is, pre-distortion compensation is performed on K of the M PAs using K first sub-signals, while pre-distortion compensation is not required for the remaining MK PAs, thereby reducing processing overhead. For example, the nonlinear information of the MK PAs may indicate that the nonlinear characteristics of the MN PAs have little impact on signal processing performance, or the second nonlinear information of the MK PAs may be pre-distortion compensated using other means.

[0226] In one possible implementation, the process of the signal processing device outputting the third signal based on the second signal includes: the signal processing device outputting the third signal based on an undersampling result of the second signal. Specifically, in the process of outputting the third signal based on the second signal, the signal processing device may output the third signal based on the undersampling result of the second signal. That is, the signal processing device may determine the third signal for compensating for nonlinear information of the M first signals based on the undersampling result, thereby reducing the number of processed samples and lowering computational complexity.

[0227] In one possible implementation, the signal processing device determines the second signal after combining the M first signals, including: the signal processing device processes the output signals of the M PAs based on M adjustable attenuators, respectively, to determine the second signal. Specifically, the M first signals output by the combiner of the M PAs may be processed by the M adjustable attenuators before being input into the combiner for combining. This allows the combiner to obtain an attenuated signal, thereby reducing processing complexity and improving the accuracy of subsequent calculations.

[0228] In one possible implementation, the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators. Specifically, when the combiner is connected to the M PAs via the M adjustable attenuators, the M adjustable attenuators may also be connected to the adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators, thereby adjusting the power configuration coefficients of the M first signals input to the combiner.

[0229] It should be noted that, in the method shown in FIG6 , the signal processing device can also refer to the process performed by the signal processing device in any of the aforementioned embodiments and achieve corresponding technical effects, which will not be elaborated here.

[0230] The above describes the present application from the perspective of the method, and the following describes the communication device provided by the present application.

[0231] Referring to Figure 7, an embodiment of the present application provides a communication device 700. This communication device 700 can implement the functions of the communication device in the above method embodiment, and thus can also achieve the beneficial effects of the above method embodiment. In this embodiment of the present application, the communication device 700 can be a terminal device or a network device, or it can be an integrated circuit or component, such as a chip, within the terminal device or network device.

[0232] In one possible implementation, the device 700 includes a processing unit 701 and a transceiver unit 702; the transceiver unit 702 is used to obtain M first signals, where the first signal includes the output signal of the PA, and M is an integer greater than 2; the processing unit 701 is used to determine a second signal after the M first signals are merged; the processing unit 701 is also used to output a third signal based on the second signal, and the third signal is used to compensate for the nonlinear information of the M first signals.

[0233] In one possible implementation, the third signal includes a first sub-signal, where the first sub-signal is used to compensate for first nonlinear information of the M first signals; the processing unit 701 outputting the third signal based on the second signal includes: the processing unit 701 outputting the first sub-signal to a first predistorter based on the second signal, where the first predistorter is connected to the M PAs; wherein the first predistorter is used to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results are obtained by performing predistortion processing on the first sub-signal.

[0234] In one possible implementation, the third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals. The processing unit 701 outputs the third signal based on the second signal, including: the processing unit 701 outputs the M second sub-signals to M second pre-distorters based on the second signal, and the M second pre-distorters are respectively connected to the M PAs; wherein the M second pre-distorters are used to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing on the second sub-signals.

[0235] In a possible implementation, the processing unit 701 outputting the third signal based on the second signal includes: the processing unit 701 outputting the third signal based on an undersampling result of the second signal.

[0236] In a possible implementation, the processing unit 701 determines the second signal after the M first signals are combined, including: the processing unit 701 processes the output signals of the M PAs respectively based on M adjustable attenuators to determine the second signal.

[0237] In a possible implementation, the M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators.

[0238] It should be noted that, for details on the information execution process of the units of the above-mentioned communication device 700, please refer to the description in the method embodiment shown above in this application, and no further details will be given here.

[0239] Please refer to Fig. 8, which is another schematic structural diagram of a communication device 800 provided in this application. The communication device 800 at least includes an input and output interface 802. The communication device 800 may be a chip or an integrated circuit.

[0240] Optionally, the communication device further includes a logic circuit 801.

[0241] The transceiver unit 702 shown in FIG7 may be a communication interface, which may be the input / output interface 802 in FIG8 , which may include an input interface and an output interface. Alternatively, the communication interface may be a transceiver circuit, which may include an input interface circuit and an output interface circuit.

[0242] Optionally, when the communication device 800 is the communication device (or a component in the communication device) in the aforementioned embodiment, the input-output interface 802 is used to obtain M first signals, where the first signal includes the output signal of the PA, and M is an integer greater than 2; the logic circuit 801 is used to determine the second signal after the M first signals are merged; the logic circuit 801 is also used to output a third signal based on the second signal, and the third signal is used to compensate for the nonlinear information of the M first signals.

[0243] The logic circuit 801 and the input / output interface 802 may also execute other steps executed by the communication device in any embodiment and achieve corresponding beneficial effects, which will not be described in detail here.

[0244] In a possible implementation, the processing unit 701 shown in FIG. 7 may be the logic circuit 801 in FIG. 8 .

[0245] Optionally, the logic circuit 801 may be a processing device, and the functions of the processing device may be partially or entirely implemented by software. The functions of the processing device may be partially or entirely implemented by software.

[0246] Optionally, the processing device may include a memory and a processor, wherein the memory is used to store a computer program, and the processor reads and executes the computer program stored in the memory to perform corresponding processing and / or steps in any one of the method embodiments.

[0247] Alternatively, the processing device may include only a processor. A memory for storing the computer program is located outside the processing device, and the processor is connected to the memory via circuits / wires to read and execute the computer program stored in the memory. The memory and processor may be integrated or physically separate.

[0248] Optionally, the processing device may be one or more chips, or one or more integrated circuits. For example, the processing device may be one or more field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), system-on-chips (SoCs), central processor units (CPUs), network processors (NPs), digital signal processors (DSPs), microcontroller units (MCUs), programmable logic devices (PLDs), or other integrated chips, or any combination of the above chips or processors.

[0249] Please refer to Figure 9, which shows a communication device 900 involved in the above-mentioned embodiments provided in an embodiment of the present application. The communication device 900 can specifically be a communication device serving as a terminal device in the above-mentioned embodiments. The example shown in Figure 9 is that the terminal device is implemented through the terminal device (or a component in the terminal device).

[0250] Herein, a possible logical structure diagram of the communication device 900 is shown. The communication device 900 may include but is not limited to at least one processor 901 and a communication port 902 .

[0251] Further optionally, the device may also include at least one of a memory 903 and a bus 904. In an embodiment of the present application, the at least one processor 901 is used to control and process the actions of the communication device 900.

[0252] In addition, the processor 901 can be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, and so on. Those skilled in the art will clearly understand that for the convenience and brevity of description, the specific working processes of the systems, devices, and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0253] It should be noted that the communication device 900 shown in Figure 9 can be specifically used to implement the steps implemented by the terminal device in the aforementioned method embodiment and achieve the corresponding technical effects of the terminal device. The specific implementation methods of the communication device shown in Figure 9 can refer to the description in the aforementioned method embodiment and will not be repeated here.

[0254] Please refer to Figure 10, which is a structural diagram of the communication device 1000 involved in the above-mentioned embodiments provided in an embodiment of the present application. The communication device 1000 can specifically be a communication device as a network device in the above-mentioned embodiments. The example shown in Figure 10 is that the network device is implemented through the network device (or a component in the network device), wherein the structure of the communication device can refer to the structure shown in Figure 10.

[0255] The communication device 1000 includes at least one processor 1011 and at least one network interface 1014. Further optionally, the communication device also includes at least one memory 1012, at least one transceiver 1013 and one or more antennas 1015. The processor 1011, the memory 1012, the transceiver 1013 and the network interface 1014 are connected, for example, via a bus. In an embodiment of the present application, the connection may include various interfaces, transmission lines or buses, etc., which are not limited in this embodiment. The antenna 1015 is connected to the transceiver 1013. The network interface 1014 is used to enable the communication device to communicate with other communication devices through a communication link. For example, the network interface 1014 may include a network interface between the communication device and the core network device, such as an S1 interface, and the network interface may include a network interface between the communication device and other communication devices (such as other network devices or core network devices), such as an X2 or Xn interface.

[0256] Processor 1011 is primarily used to process communication protocols and communication data, control the entire communication device, execute software programs, and process software program data, for example, to support the communication device in performing the actions described in the embodiments. The communication device may include a baseband processor and a central processing unit. The baseband processor is primarily used to process communication protocols and communication data, while the central processing unit is primarily used to control the entire terminal device, execute software programs, and process software program data. Processor 1011 in Figure 10 may integrate the functions of both a baseband processor and a central processing unit. Those skilled in the art will appreciate that the baseband processor and the central processing unit may also be independent processors interconnected via a bus or other technology. Those skilled in the art will appreciate that a terminal device may include multiple baseband processors to accommodate different network standards, multiple central processing units to enhance its processing capabilities, and various components of the terminal device may be connected via various buses. The baseband processor may also be referred to as a baseband processing circuit or a baseband processing chip. The central processing unit may also be referred to as a central processing circuit or a central processing chip. The functionality for processing communication protocols and communication data may be built into the processor or stored in memory as a software program, which is executed by the processor to implement the baseband processing functionality.

[0257] The memory is primarily used to store software programs and data. Memory 1012 can exist independently and be connected to processor 1011. Alternatively, memory 1012 and processor 1011 can be integrated together, for example, within a single chip. Memory 1012 can store program code for executing the technical solutions of the embodiments of the present application, and execution is controlled by processor 1011. The various computer program codes executed can also be considered drivers for processor 1011.

[0258] Figure 10 shows only one memory and one processor. In an actual terminal device, there may be multiple processors and multiple memories. The memory may also be referred to as a storage medium or a storage device. The memory may be a storage element on the same chip as the processor, i.e., an on-chip storage element, or an independent storage element, which is not limited in the present embodiment.

[0259] The transceiver 1013 can be used to support the reception or transmission of radio frequency signals between the communication device and the terminal. The transceiver 1013 can be connected to the antenna 1015. The transceiver 1013 includes a transmitter Tx and a receiver Rx. Specifically, one or more antennas 1015 can receive radio frequency signals. The receiver Rx of the transceiver 1013 is used to receive the radio frequency signal from the antenna, convert the radio frequency signal into a digital baseband signal or a digital intermediate frequency signal, and provide the digital baseband signal or digital intermediate frequency signal to the processor 1011 so that the processor 1011 can further process the digital baseband signal or digital intermediate frequency signal, such as demodulation and decoding. In addition, the transmitter Tx in the transceiver 1013 is also used to receive a modulated digital baseband signal or digital intermediate frequency signal from the processor 1011, convert the modulated digital baseband signal or digital intermediate frequency signal into a radio frequency signal, and transmit the radio frequency signal through one or more antennas 1015. Specifically, the receiver Rx can selectively perform one or more stages of down-mixing and analog-to-digital conversion on the RF signal to obtain a digital baseband signal or a digital intermediate frequency signal. The order of the down-mixing and analog-to-digital conversion processes is adjustable. The transmitter Tx can selectively perform one or more stages of up-mixing and digital-to-analog conversion on the modulated digital baseband signal or digital intermediate frequency signal to obtain a RF signal. The order of the up-mixing and digital-to-analog conversion processes is adjustable. The digital baseband signal and the digital intermediate frequency signal may be collectively referred to as digital signals.

[0260] The transceiver 1013 may also be referred to as a transceiver unit 702, a transceiver, a transceiver device, etc. Optionally, a device in the transceiver unit 702 that implements a receiving function may be referred to as a receiving unit, and a device in the transceiver unit 702 that implements a transmitting function may be referred to as a transmitting unit. That is, the transceiver unit 702 includes a receiving unit and a transmitting unit. The receiving unit may also be referred to as a receiver, an input port, a receiving circuit, etc., and the transmitting unit may be referred to as a transmitter, a transmitter, or a transmitting circuit, etc.

[0261] It should be noted that the communication device 1000 shown in Figure 10 can be specifically used to implement the steps implemented by the network device in the aforementioned method embodiment, and to achieve the corresponding technical effects of the network device. The specific implementation methods of the communication device 1000 shown in Figure 10 can refer to the description in the aforementioned method embodiment, and will not be repeated here one by one.

[0262] An embodiment of the present application further provides a computer-readable storage medium storing one or more computer-executable instructions. When the computer-executable instructions are executed by a processor, the processor executes the method described in the possible implementation of the communication device in the aforementioned embodiment.

[0263] An embodiment of the present application also provides a computer program product storing one or more computers. When the computer program product is executed by the processor, the processor executes the method of the possible implementation of the above-mentioned communication device.

[0264] An embodiment of the present application also provides a chip system, which includes at least one processor for supporting a communication device to implement the functions involved in the possible implementation methods of the above-mentioned communication device. Optionally, the chip system also includes an interface circuit, which provides program instructions and / or data to the at least one processor. In one possible design, the chip system may also include a memory for storing program instructions and data necessary for the communication device. The chip system may be composed of a chip, or may include a chip and other discrete devices, wherein the communication device may specifically be the communication device in the aforementioned method embodiment.

[0265] An embodiment of the present application further provides a communication system, which includes the communication device in any of the above embodiments.

[0266] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0267] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0268] In addition, the functional units in the various embodiments of the present application can be integrated into a processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the various embodiments of the present application. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

Claims

1. A signal processing device, characterized in that: include: a combiner, configured to input M first signals and output a second signal obtained by combining the M first signals, wherein the M first signals respectively include output signals of M power amplifiers PA, where M is an integer greater than 2; A signal processor is configured to output a third signal based on the second signal, wherein the third signal is used to compensate for nonlinear information of the M channels of first signals.

2. The device according to claim 1, characterized in that The third signal includes a first sub-signal, and the first sub-signal is used to compensate for first nonlinear information of the M first signals.

3. The device according to claim 2, characterized in that The signal processor is specifically configured to output the first sub-signal to a first predistorter, and the first predistorter is connected to the M PAs.

4. The device according to claim 3, characterized in that The first predistorter is configured to input the first sub-signal and output M first processing results to the M PAs respectively, wherein the M first processing results are obtained by performing predistortion processing on the first sub-signal.

5. The device according to any one of claims 1 to 4, characterized in that The third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals.

6. The device according to claim 5, characterized in that The signal processor is specifically configured to output the M second sub-signals to M second pre-distorters, and the M second pre-distorters are respectively connected to the M PAs.

7. The device according to claim 6, characterized in that The M second predistorters are configured to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing based on the second sub-signals.

8. The device according to any one of claims 1 to 7, characterized in that The device also includes a sampler; The combiner is connected to the signal processor through the sampler.

9. The device according to claim 8, characterized in that The sampler is configured to input the fourth signal and output an under-sampling result of the fourth signal to the signal processor, wherein the fourth signal is obtained based on the second signal.

10. The device according to claim 9, characterized in that The signal processor is specifically configured to output the third signal based on an undersampling result of the fourth signal.

11. The device according to any one of claims 1 to 10, characterized in that The combiner is connected to the M PAs via M adjustable attenuators, and the M adjustable attenuators are respectively used to process output signals of the M PAs.

12. The device according to claim 11, characterized in that The M adjustable attenuators are connected to an adjustable power coefficient configuration module, and the adjustable power coefficient configuration module is used to adjust the power configuration coefficients of the M adjustable attenuators.

13. A signal processing method, characterized in that: include: Acquire M first signals, where the first signals include output signals of a power amplifier PA, and M is an integer greater than 2; Determine a second signal obtained by combining the M first signals; A third signal is output based on the second signal, where the third signal is used to compensate for nonlinear information of the M first signals.

14. The method according to claim 13, characterized in that The third signal includes a first sub-signal, and the first sub-signal is used to compensate for the first nonlinear information of the M-channel first signals; and outputting the third signal based on the second signal includes: The first sub-signal is output to a first predistorter based on the second signal, and the first predistorter is connected to the M PAs. The first predistorter is configured to input the first sub-signal and output M first processing results to the M PAs, respectively. The M first processing results are obtained by performing predistortion processing on the first sub-signal.

15. The method according to claim 13 or 14, characterized in that The third signal includes M second sub-signals, and the M second sub-signals are used to compensate for the second nonlinear information of the M first signals; and outputting the third signal based on the second signal includes: The M second sub-signals are output to M second pre-distorters based on the second signal, and the M second pre-distorters are respectively connected to the M PAs; wherein the M second pre-distorters are configured to respectively input the M second sub-signals and respectively output M second processing results to the M PAs, wherein the M second processing results are respectively obtained by performing predistortion processing based on the second sub-signal.

16. The method according to any one of claims 13 to 15, characterized in that Outputting a third signal based on the second signal includes: The third signal is output based on the undersampling result of the second signal.

17. The method according to any one of claims 13 to 16, characterized in that Determining the second signal after the M first signals are merged includes: After the output signals of the M PAs are processed respectively based on the M adjustable attenuators, the second signal is determined.

18. A chip, characterized in that: The chip includes a processor and a communication interface; The communication interface is coupled to the processor, and the processor is configured to execute a computer program or instruction to implement the method according to any one of claims 13 to 17.

19. A computer-readable storage medium, characterized in that The medium stores instructions, and when the instructions are executed by a processor, the method according to any one of claims 13 to 17 is implemented.

20. A computer program product, characterized in that The method comprises instructions which, when executed on a processor, implement the method according to any one of claims 13 to 17.

21. A communication device, characterized in that: comprising at least one processor coupled to a memory; The memory is used to store programs or instructions; The at least one processor is configured to execute the program or instruction to enable the communication device to implement the method according to any one of claims 13 to 17.

22. A communication device, characterized in that: The communication device includes the signal processing device according to any one of claims 1 to 12.

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