Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a plurality of data signal lines, a plurality of initialization signal lines and a plurality of pixel driving circuits. The pixel driving circuit includes a driving transistor. The data signal line is used for providing a data signal for the grid electrode of the driving transistor, and the initialization signal line is used for providing an initialization signal for the source electrode of the driving transistor. The working stage of the display panel comprises a discharging stage, and in the discharging stage, the voltage difference between the grid electrode of the driving transistor and the source electrode of the driving transistor is larger than 0V. Therefore, after the display panel is subjected to power-on inspection, the voltage difference between the grid electrode of the driving transistor and the source electrode of the driving transistor is set to be a positive value, so that the discharge efficiency can be improved, and residual charges existing in the pixel driving circuit can be quickly released in the discharge stage; and the phenomena such as poor horizontal stripe shape or poor splash screen caused by residual charges in the pixel driving circuit are avoided.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In the prior art, after the display panel is prepared, it is necessary to perform a power-on test on the display panel to detect whether the display panel can work normally. In addition, after the power-on test, the residual power supply voltage is discharged by applying a negative voltage to the gate-source voltage Vgs of the driving transistor. On the one hand, applying a negative voltage to the gate-source voltage Vgs of the driving transistor for a long time will reduce the electrical performance of the light-emitting element or shorten its life, thereby reducing the reliability of the light-emitting element. On the other hand, in the discharge stage, the negative voltage gate-source voltage Vgs has voltage offset in different directions during discharge, resulting in slow discharge efficiency, so that the residual charge in the pixel driving circuit cannot be released in time, and horizontal stripes or screen flickering are prone to occur when the display is turned on. Summary of the invention

[0003] The present invention provides a display panel and a display device. By setting the voltage difference between the gate and the source of a driving transistor in a discharge phase to be a positive value, the discharge efficiency can be improved, and the residual charge existing in a pixel driving circuit can be quickly released in the discharge phase, thereby avoiding the phenomenon of horizontal stripes or screen flickering caused by the residual charge in the pixel driving circuit.

[0004] In a first aspect, an embodiment of the present invention provides a display panel, including:

[0005] A plurality of data signal lines, a plurality of initialization signal lines and a plurality of pixel driving circuits;

[0006] The pixel driving circuit includes a driving transistor;

[0007] The data signal line is used to provide a data signal to the gate of the driving transistor, and the initialization signal line is used to provide an initialization signal to the source of the driving transistor;

[0008] The working phase of the display panel includes a discharge phase, and in the discharge phase, a voltage difference between the gate of the driving transistor and the source of the driving transistor is greater than 0V.

[0009] Optionally, in the discharge phase, a voltage difference Vgs between the gate of the driving transistor and the source of the driving transistor satisfies: 2V≤Vgs≤8V.

[0010] Optionally, in the discharge phase, the voltage provided by the data signal line to the gate of the driving transistor is 5V, and the initialization signal provided by the initialization signal line to the source of the driving transistor is 0V.

[0011] Optionally, the display panel further comprises a first power signal line, and the drain of the driving transistor is electrically connected to the first power signal line;

[0012] The working phase also includes a discharge holding phase;

[0013] The voltage of the gate of the driving transistor in the discharge holding stage is the same as the voltage of the gate of the driving transistor in the discharge stage, and the voltage of the source of the driving transistor in the discharge holding stage is the same as the voltage of the source of the driving transistor in the discharge stage;

[0014] In the discharge holding stage, the voltage of the drain of the driving transistor is 0V.

[0015] Optionally, the working stage also includes a discharge end stage;

[0016] At the end of the discharge, the voltages of the gate of the driving transistor, the source of the driving transistor, and the drain of the driving transistor are all 0V.

[0017] Optionally, the display panel further comprises a plurality of scanning signal lines, wherein the scanning signal lines are electrically connected to the pixel driving circuit and are used to provide scanning signals to the pixel driving circuit;

[0018] The discharge end stage includes a first sub-stage and a second sub-stage;

[0019] In the first sub-stage, the scanning signal provided by the scanning signal line is greater than 0V, and in the second sub-stage, the scanning signal provided by the scanning signal line is 0V.

[0020] Optionally, the display panel further includes a plurality of scanning signal lines;

[0021] The pixel driving circuit also includes a data writing transistor, an initialization transistor and a storage capacitor;

[0022] The data signal line is electrically connected to the source of the data writing transistor, and the drain of the data writing transistor is electrically connected to the gate of the driving transistor;

[0023] The initialization signal line is electrically connected to the source of the initialization transistor, and the drain of the initialization transistor is electrically connected to the source of the driving transistor;

[0024] The gate of the data writing transistor and the gate of the initialization transistor are both electrically connected to the scanning signal line;

[0025] The first plate of the storage capacitor is electrically connected to the drain of the data writing transistor, and the second plate of the storage capacitor is electrically connected to the source of the driving transistor.

[0026] Optionally, the display panel further includes a first power signal line, a second power signal line and a plurality of light emitting elements;

[0027] A plurality of the scanning signal lines and a plurality of the data signal lines are cross-arranged to form a mesh structure, and the pixel driving circuit and the light-emitting element are both located in meshes of the mesh structure;

[0028] The first power signal line is electrically connected to the drain of the driving transistor, the anode of the light emitting element is electrically connected to the source of the driving transistor, and the cathode of the light emitting element is electrically connected to the second power signal line.

[0029] Optionally, the display panel further includes a gate driving circuit, and the gate driving circuit is arranged in a frame area of ​​the display panel;

[0030] The gate driving circuit is electrically connected to the plurality of scanning signal lines and is used for providing scanning signals to the plurality of scanning signal lines.

[0031] In a second aspect, an embodiment of the present invention further provides a display device, comprising the display panel provided by any embodiment of the first aspect of the present invention.

[0032] The display panel provided by the embodiment of the present invention includes a plurality of data signal lines, a plurality of initialization signal lines and a plurality of pixel driving circuits. The pixel driving circuit includes a driving transistor. The data signal line is used to provide a data signal to the gate of the driving transistor, and the initialization signal line is used to provide an initialization signal to the source of the driving transistor. The working stage of the display panel includes a discharge stage, and in the discharge stage, the voltage difference between the gate of the driving transistor and the source of the driving transistor is greater than 0V. In this way, after the display panel is powered on and checked, by setting the voltage difference between the gate of the driving transistor and the source of the driving transistor to a positive value, the discharge efficiency can be improved, and the residual charge existing in the pixel driving circuit can be quickly released in the discharge stage, avoiding the phenomenon of horizontal stripe-shaped defects or screen flashing defects caused by the residual charge in the pixel driving circuit. In addition, since the voltage difference between the gate of the driving transistor and the source of the driving transistor is a positive value, and the positive voltage is applied to the light-emitting element for a long time, the performance and life of the light-emitting element are less affected, thereby improving the reliability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1It is a timing diagram of a pixel driving circuit provided in the prior art;

[0034] Figure 2 is a circuit diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0035] Figure 3 is a timing diagram of a pixel driving circuit provided by an embodiment of the present invention;

[0036] Figure 4 is a timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0037] Figure 5 is a timing diagram of another pixel driving circuit provided by an embodiment of the present invention;

[0038] Figure 6 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0039] Figure 7 It is a structural schematic diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be fully described below in combination with the drawings in the embodiments of the present invention through specific implementation methods. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work fall within the protection scope of the present invention.

[0041] Figure 1 This is a timing diagram of a pixel driving circuit provided in the prior art. Figure 1In the prior art, during the discharge process S1', a 0V data signal Data' (i.e., reduced from 2V in the display process to 0V in the discharge process) is provided to the pixel driving circuit through the data signal line, and an initialization signal Vref' of 2V (increased from 1V in the display process to 2V in the discharge process) is provided to the pixel driving circuit through the initialization signal line. At this time, in the pixel driving circuit, the gate voltage of the driving transistor is 0V, and the source voltage of the driving transistor is 2V, that is, during the discharge process S1', the gate-source voltage Vgs of the driving transistor (the voltage difference between the gate of the driving transistor and the source of the driving transistor) is -2V. The inventor has found that in the above scheme, on the one hand, applying a negative voltage to the gate-source voltage Vgs of the driving transistor for a long time will reduce the electrical performance of the light-emitting element or shorten its life, thereby reducing the reliability of the light-emitting element. On the other hand, during the discharge stage, the negative gate-source voltage Vgs has voltage cancellation in different directions during discharge, which leads to slower discharge efficiency, such as Figure 1 As shown, in the prior art, it takes nearly 1S to complete the release of residual charge (the positive power supply voltage signal EVDD' drops from 22V to 0V. In addition, during the entire discharge process S1', the scanning signal Scan' remains unchanged and is maintained at 18V). The residual charge in the pixel driving circuit cannot be released in time, and horizontal stripes or screen flickering are likely to occur when the display is turned on.

[0042] Figure 2 is a circuit diagram of a pixel driving circuit provided by an embodiment of the present invention, Figure 3 is a timing diagram of a pixel driving circuit provided by an embodiment of the present invention. Figure 2 and Figure 3 The display panel includes a plurality of data signal lines 10, a plurality of initialization signal lines 20, and a plurality of pixel driving circuits 30. The pixel driving circuit 30 includes a driving transistor T1. The data signal line 10 is used to provide a data signal Data to the gate of the driving transistor T1, and the initialization signal line 20 is used to provide an initialization signal Vref to the source of the driving transistor T1. The working phase of the display panel includes a discharge phase S1, in which the voltage difference between the gate of the driving transistor T1 and the source of the driving transistor T1 is greater than 0V.

[0043] Specifically, Figure 2 and Figure 3As shown, the pixel driving circuit 30 includes a driving transistor T1, which is arranged between the first power signal line 40 and the second power signal line 50, that is, the drain of the driving transistor T1 is electrically connected to the first power signal line 40, the source of the driving transistor T1 is electrically connected to the anode of the light emitting element 60, and the cathode of the light emitting element 60 is electrically connected to the second power signal line 50. In the light emitting stage, the driving transistor T1 generates a driving current under the action of the positive power signal EVDD provided by the first power signal line 40 and the data signal Data provided by the data signal line 10, and drives the light emitting element 60 to emit light. In the discharge stage S1, the residual charge (mainly the charge generated by the positive power signal EVDD) in the pixel driving circuit 30 is discharged through the driving transistor T1.

[0044] For example, Figure 2 and Figure 3 As shown, in the discharge stage S1, the data signal line 10 is set to provide a data signal Data of 3V to the gate of the driving transistor T1, and the initialization signal line 20 is set to provide an initialization signal Vref of 0V to the source of the driving transistor T1, then the voltage difference between the gate of the driving transistor T1 and the source of the driving transistor T1 is 3V, in other words, the gate-source voltage Vgs of the driving transistor T1 is 3V. In this way, after the display panel is powered on and checked, since the gate-source voltage Vgs of the driving transistor T1 is a positive value (3V), when the residual charge in the pixel driving circuit 30 is discharged, there is no voltage cancellation in different directions, thereby improving the discharge efficiency. Figure 3 As shown, when the positive power signal EVDD drops from 22V to 0V (discharge stage S1), it takes less than 500ms, which is less than 1S in the prior art. The discharge time is greatly reduced, and the residual charge in the pixel driving circuit 30 is quickly released in the discharge stage S1, avoiding the horizontal stripe defect or screen flickering defect caused by the residual charge in the pixel driving circuit 30. In addition, since the voltage difference between the gate of the driving transistor T1 and the source of the driving transistor T1 is positive, the positive voltage is applied to the light emitting element 60 for a long time, which has little effect on the performance and life of the light emitting element 60, thereby improving the reliability of the display panel.

[0045] It should be noted that Figure 3 In the figure, the data signal line 10 provides the gate of the driving transistor T1 with a data signal of 3V, and the initialization signal line 20 provides the source of the driving transistor T1 with an initialization signal Vref of 0V. However, the embodiment of the present invention is not limited to this. In other embodiments, the data signal Data and the initialization signal Vref can also be other values, as long as the voltage difference between the gate of the driving transistor T1 and the source of the driving transistor T1 is greater than 0V.

[0046] In summary, the display panel provided by the embodiment of the present invention includes a plurality of data signal lines, a plurality of initialization signal lines and a plurality of pixel driving circuits. The pixel driving circuit includes a driving transistor. The data signal line is used to provide a data signal to the gate of the driving transistor, and the initialization signal line is used to provide an initialization signal to the source of the driving transistor. The working stage of the display panel includes a discharge stage. In the discharge stage, the voltage difference between the gate of the driving transistor and the source of the driving transistor is greater than 0V. In this way, after the display panel is powered on and checked, by setting the voltage difference between the gate of the driving transistor and the source of the driving transistor to a positive value, the discharge efficiency can be improved, and the residual charge existing in the pixel driving circuit can be quickly released in the discharge stage, avoiding the phenomenon of horizontal stripes or screen flashing caused by the residual charge in the pixel driving circuit. In addition, since the voltage difference between the gate of the driving transistor and the source of the driving transistor is a positive value, and the positive voltage is applied to the light-emitting element for a long time, the performance and life of the light-emitting element are less affected, thereby improving the reliability of the display panel.

[0047] Optionally, based on the above embodiment, Figure 4 is a timing diagram of another pixel driving circuit provided by an embodiment of the present invention, see Figure 2 and Figure 4 In the discharge stage S1 , the voltage difference Vgs between the gate of the driving transistor T1 and the source of the driving transistor T1 satisfies: 2V≤Vgs≤8V.

[0048] Specifically, by setting the voltage difference Vgs between the gate of the driving transistor T1 and the source of the driving transistor T1 to be greater than 0V, that is, the gate-source voltage Vgs of the driving transistor T1 is a positive value, the discharge efficiency can be improved. And the inventors have found that when the gate-source voltage Vgs of the driving transistor T1 is set to satisfy 2V≤Vgs≤8V, the improvement effect of the discharge efficiency is more obvious. Therefore, by adjusting the data signal Data provided by the data signal line 10 to the gate of the driving transistor T1, and the initialization signal Vref provided by the initialization signal line 20 to the source of the driving transistor T1, the gate-source voltage Vgs of the driving transistor T1 satisfies 2V≤Vgs≤8V, so as to ensure the improvement effect of the discharge efficiency, and further avoid the horizontal stripe-shaped defect or the flickering screen defect caused by the residual charge in the pixel driving circuit 30.

[0049] It should be noted that when the voltage difference Vgs between the gate of the driving transistor T1 and the source of the driving transistor T1 is set to 5V, the effect of improving the discharge efficiency is most obvious. Figure 2 and Figure 4In the illustrated embodiment, in the discharge stage S1, the data signal line 10 provides a voltage of 5V for the gate of the driving transistor T1, and the initialization signal line 20 provides an initialization signal of 0V for the source of the driving transistor T1, that is, the gate-source voltage Vgs of the driving transistor T1 is 5V. At this time, the positive power supply signal EVDD drops the fastest, and it takes only about 250ms to drop from 22V to 0V. Compared with the discharge time of nearly 1S in the prior art, the discharge time is greatly reduced, and the residual charge in the pixel driving circuit 30 is quickly released in the discharge stage S1, thereby avoiding the horizontal stripe defect or screen flicker defect caused by the residual charge in the pixel driving circuit 30.

[0050] Understandably, Figure 4 In the figure, the data signal line 10 provides the gate of the driving transistor T1 with a data signal Data of 5V, and the initialization signal line 20 provides the source of the driving transistor T1 with an initialization signal Vref of 0V. However, the embodiment of the present invention is not limited to this. In other embodiments, the data signal Data and the initialization signal Vref can also be other values, as long as the voltage difference Vgs between the gate of the driving transistor T1 and the source of the driving transistor T1 is 5V.

[0051] Optionally, based on the above embodiment, continue to refer to Figure 2 and Figure 4 , the display panel also includes a first power signal line 40, the drain of the driving transistor T1 is electrically connected to the first power signal line 40, and then in the light-emitting stage, the positive power signal EVDD is provided to the drain of the driving transistor T1 through the first power signal line 40. The working stage of the display panel also includes a discharge holding stage S2, and the discharge holding stage S2 is located after the discharge stage S1 in timing and is adjacent to the discharge stage S1. Specifically, the voltage of the gate of the driving transistor T1 in the discharge holding stage S2 is the same as the voltage of the gate of the driving transistor T1 in the discharge stage S1, and the voltage of the source of the driving transistor T1 in the discharge holding stage S2 is the same as the voltage of the source of the driving transistor T1 in the discharge stage S1. That is, in the discharge stage S1 and the discharge holding stage S2, the data signal Data provided by the data signal line 10 to the gate of the driving transistor T1, and the initialization signal Vref provided by the initialization signal line 20 to the source of the driving transistor T1 remain unchanged. Then, the residual charge generated by the positive power signal EVDD in the pixel driving circuit 30 is discharged through the discharge stage S1, and the residual charge of other parts (except the residual charge generated by the positive power signal EVDD) is discharged through the discharge holding stage S2, so as to further avoid the horizontal stripe defect or screen flicker defect caused by the residual charge in the pixel driving circuit 30.

[0052] It can be understood that, in the discharge stage S1, the residual positive power signal EVDD drops from 22V to 0V, that is, the voltage of the drain of the driving transistor T1 drops from 22V to 0V, and in the discharge holding stage S2, the voltage of the drain of the driving transistor T1 is 0V, that is, before the discharge holding stage S2, the residual charge generated by the positive power signal EVDD has been discharged.

[0053] Optionally, based on the above embodiment, Figure 5 is a timing diagram of another pixel driving circuit provided by an embodiment of the present invention, see Figure 2 and Figure 5 , the working stage of the display panel also includes a discharge end stage S3. The discharge end stage S3 is located after the discharge holding stage S2 in timing and is adjacent to the discharge holding stage S2. In the discharge end stage S3, the voltages of the gate of the driving transistor T1, the source of the driving transistor T1 and the drain of the driving transistor T1 are all 0V, that is, the data signal Data provided by the data signal line 10 to the gate of the driving transistor T1, the initialization signal Vref provided by the initialization signal line 20 to the source of the driving transistor T1, and the residual charge generated by the positive power supply signal EVDD are all 0, so as to eliminate the voltage after the entire discharge process is completed, thereby ensuring the reliability of the entire discharge process.

[0054] Optionally, based on the above embodiment, continue to refer to Figure 2 and Figure 5 The display panel further includes a plurality of scan signal lines 70, which are electrically connected to the pixel driving circuit 30 and are used to provide a scan signal Scan to the pixel driving circuit 30. The discharge end stage S3 includes a first sub-stage S31 and a second sub-stage S32. In the first sub-stage S31, the scan signal Scan provided by the scan signal line 70 is greater than 0V, and in the second sub-stage S32, the scan signal Scan provided by the scan signal line 70 is 0V.

[0055] For details, see Figure 2 and Figure 5, the scanning signal line 70 is electrically connected to the pixel driving circuit 30, and is used to provide the pixel driving circuit 30 with a scanning signal Scan, and the scanning signal Scan can control the writing of the data signal Data and the initialization signal Vref. Exemplarily, when the voltage of the scanning signal Scan is greater than 0V, the data signal Data can be written into the gate of the driving transistor T1, and the initialization signal Vref can be written into the drain of the driving transistor T1. When the voltage of the scanning signal Scan is equal to 0V, the data signal Data cannot be written into the gate of the driving transistor T1, and the initialization signal Vref cannot be written into the drain of the driving transistor T1. Furthermore, on the basis of the above content, the discharge end stage S3 is also set to include a first sub-stage S31 and a second sub-stage S32. The first sub-stage S31 is before the second sub-stage S32 in terms of timing. In the first sub-stage S31, the scan signal Scan provided by the scan signal line 70 is greater than 0V, that is, in the first sub-stage S31, the data signal Data can be written into the gate of the driving transistor T1, and the initialization signal Vref can be written into the drain of the driving transistor T1. However, since the data signal Data and the initialization signal Vref are both 0, the voltages of the data signal line 10 and the initialization signal line 20 are eliminated through the first sub-stage S31. In the second sub-stage S31, the scan signal Scan provided by the scan signal line 70 is 0V, that is, the voltage of the scan signal line 70 is eliminated through the second sub-stage S31, further ensuring the reliability of the entire discharge process.

[0056] Optionally, based on the above embodiment, continue to refer to Figure 2 , the display panel further includes a plurality of scanning signal lines 70. The pixel driving circuit 30 further includes a data writing transistor T2, an initialization transistor T3 and a storage capacitor C. The data signal line 10 is electrically connected to the source of the data writing transistor T2, and the drain of the data writing transistor T2 is electrically connected to the gate of the driving transistor T1. The initialization signal line 20 is electrically connected to the source of the initialization transistor T3, and the drain of the initialization transistor T3 is electrically connected to the source of the driving transistor T1. The gate of the data writing transistor T2 and the gate of the initialization transistor T3 are both electrically connected to the scanning signal line 70. The first plate of the storage capacitor C is electrically connected to the drain of the data writing transistor T2, and the second plate of the storage capacitor C is electrically connected to the source of the driving transistor T1.

[0057] Specifically, Figure 2As shown, the scanning signal line 70 is electrically connected to the gate of the data writing transistor T2, the data signal line 10 is electrically connected to the source of the data writing transistor T2, the drain of the data writing transistor T2 is electrically connected to the gate of the driving transistor T1, and then under the control of the scanning signal line 70, the data writing transistor T2 is turned on, and the data signal provided by the data signal line 10 is written into the gate of the driving transistor T1. The initialization signal line 20 is electrically connected to the source of the initialization transistor T3, the drain of the initialization transistor T3 is electrically connected to the source of the driving transistor T1, and the gate of the initialization transistor T3 is electrically connected to the scanning signal line 70, and then under the control of the scanning signal line 70, the initialization transistor T3 is turned on, and the initialization signal provided by the initialization signal line 20 is written into the drain of the driving transistor T1. In this way, in the light-emitting stage, the data writing transistor T2 is used to write the data signal, and the driving transistor T1 is used to generate a driving current under the action of the positive power supply signal to drive the light-emitting element 60 to emit light. The storage capacitor C is arranged between the gate and source of the driving transistor T1, and is used to store the data signal provided by the data signal line 10, and maintain the gate voltage of the driving transistor T1 stable, so as to ensure that the pixel driving circuit 30 can work normally. In the initialization stage, the initialization transistor T3 is used to provide an initialization signal to the anode of the light-emitting element 60 to reset the anode of the light-emitting element 60. In the discharge stage, the data signal is provided to the gate of the driving transistor T1 through the data writing transistor T2, and the initialization signal is provided to the drain of the driving transistor T1 through the initialization transistor T3 to discharge the residual charge in the pixel driving circuit 30.

[0058] Optional, Figure 6 is a schematic diagram of the structure of a display panel provided by an embodiment of the present invention. Figure 2 and Figure 6 The display panel further includes a first power signal line 40, a second power signal line 50 and a plurality of light emitting elements 60. The plurality of scanning signal lines 70 and the plurality of data signal lines 10 are cross-arranged to form a mesh structure, and the pixel driving circuit 30 and the light emitting element 60 are both located in the mesh of the mesh structure. The first power signal line 40 is electrically connected to the drain of the driving transistor T1, the anode of the light emitting element 60 is electrically connected to the source of the driving transistor T1, and the cathode of the light emitting element 60 is electrically connected to the second power signal line 50.

[0059] Specifically, the first power signal line 40 is used to provide a positive power signal to the drain of the driving transistor T1, and the second power signal line 50 is used to provide a negative power signal to the cathode of the light emitting element 60, and then under the action of the positive power signal, the negative power signal and the data signal, the driving transistor T1 drives the light emitting element 60 to emit light. In addition, a plurality of scanning signal lines 70 and a plurality of data signal lines 10 are cross-arranged to form a mesh structure, and the pixel driving circuit 30 and the light emitting element 60 are both located in the mesh of the mesh structure, thereby ensuring a simple wiring connection method.

[0060] Optionally, based on the above embodiment, continue to refer to Figure 6 The display panel further includes a gate driving circuit 80, which is disposed in the frame area BB of the display panel. The gate driving circuit 80 is electrically connected to the plurality of scanning signal lines 70, and is used to provide scanning signals to the plurality of scanning signal lines 70.

[0061] Specifically, the display panel includes a display area AA and a border area BB. A plurality of light-emitting elements 60 and a corresponding pixel driving circuit 30 are provided in the display area AA. The light-emitting elements 60 and the pixel driving circuit 30 are electrically connected, and then the pixel driving circuit 30 provides a driving signal to the light-emitting elements 60 to realize the picture display of the display area AA. The border area BB is arranged around the display area AA. Exemplarily, the border area BB may include a left border area, a right border area, an upper border area and a lower border area. Among them, the gate driving circuit 80 may be arranged in the left border area. The gate driving circuit 80 is electrically connected to a plurality of scanning signal lines 70, and then the gate driving circuit 80 provides a scanning signal to the scanning signal line 70, thereby ensuring that the transmission method of the scanning signal is simple.

[0062] It should be noted that Figure 6 The gate drive circuit 80 can be set in the left border area for illustration only, but the embodiments of the present invention are not limited to this. In other embodiments, the gate drive circuit 80 can also be set in the right border area, or in both the left border area and the right border area. Those skilled in the art can set it as needed.

[0063] Based on the same inventive concept, an embodiment of the present invention further provides a display device. Figure 7 Schematic diagram of a display device provided by an embodiment of the present invention. Figure 7As shown, the display device includes the display panel 01 in the above embodiment. The display device includes the display panel 01 of any embodiment of the present invention. Therefore, the display device provided by the embodiment of the present invention has the corresponding beneficial effects of the display panel 01 provided by the embodiment of the present invention, which will not be repeated here. Exemplarily, the display device can be an electronic device such as a mobile phone, a computer, a smart wearable device (for example, a smart watch), and a vehicle-mounted display device, which is not limited in the embodiment of the present invention.

[0064] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: The display panel includes a plurality of data signal lines, a plurality of initialization signal lines and a plurality of pixel driving circuits; The pixel driving circuit includes a driving transistor; The data signal line is used to provide a data signal to the gate of the driving transistor, and the initialization signal line is used to provide an initialization signal to the source of the driving transistor; The working phase of the display panel includes a discharge phase, and in the discharge phase, a voltage difference between the gate of the driving transistor and the source of the driving transistor is greater than 0V.

2. The display panel according to claim 1, characterized in that: In the discharge phase, a voltage difference Vgs between the gate of the driving transistor and the source of the driving transistor satisfies: 2V≤Vgs≤8V.

3. The display panel according to claim 2, characterized in that: In the discharge phase, the voltage provided by the data signal line to the gate of the driving transistor is 5V, and the initialization signal provided by the initialization signal line to the source of the driving transistor is 0V.

4. The display panel according to claim 1, characterized in that: The display panel further comprises a first power signal line, and the drain of the driving transistor is electrically connected to the first power signal line; The working phase also includes a discharge holding phase; The voltage of the gate of the driving transistor in the discharge holding stage is the same as the voltage of the gate of the driving transistor in the discharge stage, and the voltage of the source of the driving transistor in the discharge holding stage is the same as the voltage of the source of the driving transistor in the discharge stage; In the discharge holding stage, the voltage of the drain of the driving transistor is 0V.

5. The display panel according to claim 4, characterized in that: The working stage also includes a discharge end stage; At the end of the discharge, the voltages of the gate of the driving transistor, the source of the driving transistor, and the drain of the driving transistor are all 0V.

6. The display panel according to claim 5, characterized in that: The display panel further comprises a plurality of scanning signal lines, wherein the scanning signal lines are electrically connected to the pixel driving circuit and are used to provide scanning signals to the pixel driving circuit; The discharge end stage includes a first sub-stage and a second sub-stage; In the first sub-stage, the scanning signal provided by the scanning signal line is greater than 0V, and in the second sub-stage, the scanning signal provided by the scanning signal line is 0V.

7. The display panel according to claim 1, characterized in that: The display panel also includes a plurality of scanning signal lines; The pixel driving circuit also includes a data writing transistor, an initialization transistor and a storage capacitor; The data signal line is electrically connected to the source of the data writing transistor, and the drain of the data writing transistor is electrically connected to the gate of the driving transistor; The initialization signal line is electrically connected to the source of the initialization transistor, and the drain of the initialization transistor is electrically connected to the source of the driving transistor; The gate of the data writing transistor and the gate of the initialization transistor are both electrically connected to the scanning signal line; The first plate of the storage capacitor is electrically connected to the drain of the data writing transistor, and the second plate of the storage capacitor is electrically connected to the source of the driving transistor.

8. The display panel according to claim 7, characterized in that: The display panel further includes a first power signal line, a second power signal line and a plurality of light emitting elements; A plurality of the scanning signal lines and a plurality of the data signal lines are cross-arranged to form a mesh structure, and the pixel driving circuit and the light-emitting element are both located in meshes of the mesh structure; The first power signal line is electrically connected to the drain of the driving transistor, the anode of the light emitting element is electrically connected to the source of the driving transistor, and the cathode of the light emitting element is electrically connected to the second power signal line.

9. The display panel according to claim 7, characterized in that: The display panel further comprises a gate driving circuit, and the gate driving circuit is arranged in a frame area of ​​the display panel; The gate driving circuit is electrically connected to the plurality of scanning signal lines and is used for providing scanning signals to the plurality of scanning signal lines.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 9.

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