A one-time programmable memory cell and memory array
By enabling data writing and reading through disconnection in the target area of the conductive structure, the problems of poor reliability and limited storage density of MRAM-based OTP memory under high temperature environment are solved, achieving stable data storage and efficient improvement of storage density.
Patent Information
- Application Number
- CN202510000707.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-02
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2045-01-02
AI Technical Summary
Existing MRAM-based OTP memories have poor reliability in high-temperature environments, unstable write states, and require additional reference bits to limit storage density.
A one-time programmable memory cell is provided, which breaks the circuit by applying a write voltage to a target region of a conductive structure and reads data by comparing the current values at the first and second ends of the conductive structure, thus avoiding the use of an additional reference cell.
It improves storage density and write stability, and the data remains in a fixed state after being written, unaffected by the environment or current, simplifying the manufacturing process and reducing costs.
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Figure CN119400226B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of integrated circuit design, and in particular to a one-time programmable storage unit and a storage array. BACKGROUND
[0002] With the development of integrated circuit technology, one-time programmable (OTP) memory has become a key device for non-volatile storage. The basic principle of OTP memory is to achieve permanent storage that cannot be changed by writing data once. OTP memory mainly includes traditional eFuse (electronic Fuse) OTP memory and MRAM (Magnetoresistive Random Access Memory) based OTP memory.
[0003] The principle of the traditional eFuse OTP memory is that in the writing stage, a group of selection circuits (usually decoders) are used to program a specific bit, and a high current flows through the metal line at this position, which is permanently fused. After fusion, the resistance of the position becomes infinite, so that its logic state is fixed as an irreversible "off" state. The eFuse OTP memory has the advantages of mature process and easy implementation, but its reliability in high temperature environment is poor, it cannot be programmed repeatedly, the writing current is large, and the manufacturing cost in advanced process nodes is also high, which further limits its application in the next generation of technology. MRAM is a non-volatile memory based on magnetic storage, which can be used to realize OTP function.
[0004] At present, OTP devices based on MRAM, such as STT-MRAM based on STT (Spin-Transfer Torque) effect, after the magnetic tunnel junction is broken down, as the writing current increases, the unit has the risk of open circuit, so that the state of the OTP unit after writing is greatly affected by the external environment or the size of the writing current, and cannot exist stably; and the OTP device needs a normal magnetic tunnel junction unit as a reference bit to determine the writing state of the OTP unit, which limits the storage density of the storage chip where the OTP unit is located. SUMMARY
[0005] The present application provides a one-time programmable storage unit and a storage array, which can improve the storage density of the storage chip where the one-time programmable storage unit is located and improve the writing stability.
[0006] In a first aspect, the present application provides a one-time programmable storage unit, comprising a storage structure, and a conductive structure arranged below the storage structure.
[0007] The conductive structure has a first end and a second end arranged oppositely, and the data write of the one-time programmable memory cell is realized by applying a write voltage to a write path between any one end of the conductive structure and the top of the storage structure to make the target region of the conductive structure open circuit.
[0008] After the target region is open circuit, the read of the written data is realized by applying a read voltage to the one-time programmable memory cell and comparing the current values of the first end and the second end.
[0009] In an optional embodiment, a write current is formed by the write voltage during the process of applying the write voltage to the write path, and the target region is a region through which the write current flows in the conductive structure.
[0010] In an optional embodiment, a first current value is measured at the first end and a second current value is measured at the second end by simultaneously applying a read voltage to a first read path between the top of the storage structure and the first end of the conductive structure, and a second read path between the top of the storage structure and the second end of the conductive structure.
[0011] Wherein, when the first current value is greater than the second current value, the one-time programmable memory cell reads as the first write data;
[0012] When the first current value is less than the second current value, the one-time programmable memory cell reads as the second write data.
[0013] The first write data and the second write data are different.
[0014] In an optional embodiment, the storage structure includes a metal pillar or a short-circuit processed magnetic tunnel junction.
[0015] Wherein, the short-circuit processed magnetic tunnel junction is a structure formed after a magnetic tunnel junction is short-circuited by applying a specific voltage to the magnetic tunnel junction to break down the potential barrier layer in the magnetic tunnel junction.
[0016] In an optional embodiment, the storage structure is a short-circuit processed magnetic tunnel junction, and the conductive structure is a spin-orbit torque structure.
[0017] The thickness of the potential barrier layer in the magnetic tunnel junction satisfies a preset thickness, so that the specific voltage is less than the open circuit voltage of the target region.
[0018] In an optional embodiment, the storage structure is a short-circuit processed magnetic tunnel junction, and the conductive structure has a first region and a second region, the first region is the target region, and the second region is other regions except the target region.
[0019] Wherein, the cross-sectional area of the first region is less than the cross-sectional area of the second region, so as to reduce the open circuit voltage of the target region.
[0020] In an alternative embodiment, the one-time programmable memory cell further comprises a first switch, an output of the first switch being connected to one end of the target region of the conductive structure;
[0021] During data writing, the first switch is turned on, and a write voltage is applied to the write path through the first switch, so that the target region is broken, thereby realizing data writing of the one-time programmable memory cell;
[0022] After the target region is broken, the first switch is turned off, and a read voltage is applied to the one-time programmable memory cell, and the current values of the first end and the second end are compared, thereby realizing reading of the written data.
[0023] In an alternative embodiment, the one-time programmable memory cell further comprises a second switch, an output of the second switch being connected to the top of the storage structure;
[0024] During data writing, the first switch is turned on, and a write voltage is applied to the write path through the first switch, so that the target region is broken, thereby realizing data writing of the one-time programmable memory cell;
[0025] After the target region is broken, the first switch is turned off, and a read voltage is applied to the one-time programmable memory cell, and the current values of the first end and the second end are compared, thereby realizing reading of the written data.
[0026] In a second aspect, the embodiments of the present application further provide a storage array, the storage array comprising a one-time programmable memory cell region, the one-time programmable memory cell region comprising a plurality of arrayed one-time programmable memory cells as in the first aspect;
[0027] By applying a write voltage to the write path between any one end of the conductive structure of the corresponding one-time programmable memory cell and the top of the storage structure, the target region of the conductive structure is broken, thereby realizing data writing of the corresponding one-time programmable memory cell;
[0028] After the target region is broken, a read voltage is applied to the corresponding one-time programmable memory cell, and the current values of the first end and the second end are compared, thereby realizing reading of the written data of the corresponding one-time programmable memory cell.
[0029] In an alternative embodiment, the storage array is entirely composed of arrayed one-time programmable memory cells.
[0030] In the technical solution, the one-time programmable storage unit comprises a storage unit and a conductive structure arranged below the storage unit. When data is written, a write current is applied to a write path between any one of a first end and a second end of the conductive structure and a top of the storage structure, so that a target region of the conductive structure is disconnected, to realize data writing of the one-time programmable storage unit. Then, a read voltage is applied to the storage unit, and data is read by comparing current values of the first end and the second end of the conductive structure. Based on this, the one-time programmable storage unit can read data by comparing current values of the first end and the second end of the conductive structure, and does not need to set an additional reference unit in a storage chip to realize data reading, so that the storage density of the storage chip in which the one-time programmable storage unit is located can be improved.
[0031] In addition, the one-time programmable storage unit in the application realizes data writing based on disconnection of a target region of a conductive structure, and data writing is based on change of the structure itself, so that the storage state of the one-time programmable storage unit is fixed, the state is stable after data writing, and is not affected by environment and current. BRIEF DESCRIPTION OF DRAWINGS
[0032] The accompanying drawings, which are incorporated into and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the application.
[0033] Figure 1 A schematic diagram of a structure of a one-time programmable storage unit according to an embodiment of the application;
[0034] Figure 2 A schematic diagram of a structure of another one-time programmable storage unit according to an embodiment of the application;
[0035] Figure 3 A schematic diagram of a data reading structure of a one-time programmable storage unit according to an embodiment of the application;
[0036] Figure 4 A schematic diagram of a data reading structure of another one-time programmable storage unit according to an embodiment of the application;
[0037] Figure 5 A schematic diagram of a data reading path of a one-time programmable storage unit according to an embodiment of the application;
[0038] Figure 6 A schematic diagram of a data reading path of another one-time programmable storage unit according to an embodiment of the application;
[0039] Figure 7A resistance curve diagram for applying a write voltage to the one-time programmable memory cell to break the target region;
[0040] Figure 8 A resistance curve diagram for applying a specific voltage to the one-time programmable memory cell to break the barrier layer;
[0041] Figure 9 A thickness comparison diagram of the barrier layer in the one-time programmable memory cell provided by the embodiment of the present application;
[0042] Figure 10 A corresponding relationship diagram between the thickness of the barrier layer and the breakdown voltage V BD and the breakdown voltage V Open of the target region provided by the embodiment of the present application;
[0043] Figure 11 A schematic diagram of the conductive structure in the one-time programmable memory cell provided by the embodiment of the present application;
[0044] Figure 12 A schematic diagram of the conductive structure in another one-time programmable memory cell provided by the embodiment of the present application;
[0045] Figure 13 A schematic diagram of the circuit connection structure of the one-time programmable memory cell provided by the embodiment of the present application;
[0046] Figure 14 A schematic diagram of the circuit connection structure of another one-time programmable memory cell provided by the embodiment of the present application;
[0047] Figure 15 A schematic diagram of the structure of the storage array in which the storage structure is a short-circuit-processed magnetic tunnel junction provided by the embodiment of the present application;
[0048] Figure 16 A schematic diagram of the structure of another storage array in which the storage structure is a short-circuit-processed magnetic tunnel junction provided by the embodiment of the present application;
[0049] Figure 17 A schematic diagram of the structure of the storage array in which the storage structure is a metal pillar provided by the embodiment of the present application.
[0050] The above figures have shown the specific embodiments of the present application, which will be described in more detail hereinafter. These figures and textual descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION
[0051] The exemplary embodiments will be described in detail herein with reference to the attached drawings. The following description is made with reference to the accompanying drawings in which like reference numerals designate identical or similar elements in the several figures. The implementations described in the following exemplary embodiments are not meant to represent all implementations consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with some aspects of the present application as detailed in the appended claims.
[0052] First, the terms involved in the present application are explained:
[0053] One-time programmable (OTP) memory: uses non-volatile storage technology, can long-term stable save data, not affected by power interruption or restart.
[0054] Magnetic random access memory (MRAM): uses the magnetic properties and magnetic resistance effect of magnetic materials to store data. In the storage unit, the direction of magnetism represents different storage bits, i.e. "0" and "1". This storage method makes MRAM able to retain data without loss in the case of power failure, and has non-volatility.
[0055] Magnetic tunnel junction (MTJ) is a kind of nano structure based on spin electronics, widely used in magnetic random access memory (MRAM) and sensors and other fields. The basic structure of MTJ is composed of two ferromagnetic layers and a thin barrier layer sandwiched between them.
[0056] The one-time programmable memory unit and the storage array in the technical scheme provided by the present application can be applied to a storage chip.
[0057] One-time programmable (OTP) memory has become a key component of secure and low-cost non-volatile storage. The basic principle of OTP memory is to achieve permanent storage that cannot be changed by writing data once.
[0058] Different OTP technology implementations are different, and currently mainly include traditional eFuse OTP and MRAM-based OTP. Traditional OTP technology mainly uses eFuse (electronic fuse), which works as follows: in the data writing stage, a group of selection circuits (usually decoders) are used to program a specific location, and a high current flows through the metal line at this location, permanently fusing it. After fusing, the resistance of this location becomes infinite, so that its logic state is fixed as an irreversible "off" state. The eFuse OTP has the advantages of mature process and easy implementation, but its reliability in high temperature environment is poor, it cannot be reprogrammed, and the write current is large, and the manufacturing cost of the eFuse structure is also high at advanced process nodes.
[0059] MRAM can be used to implement OTP function. An MRAM cell is usually composed of a magnetic tunnel junction (MTJ). The MTJ is composed of two layers of magnetic material sandwiching a barrier layer, one of which has a fixed magnetic pole direction, and the other of which can be switched by current control. The working principle of MRAM-based OTP is that when a voltage greater than the breakdown voltage of the magnesium oxide barrier layer is applied across the MTJ, the resistance state of the MTJ is in a short-circuit state, and irreversible one-time programming can be achieved.
[0060] Current MRAM device-based OTP cells have the following problems: 1. After the MTJ is broken down, as the write current increases, there is a risk of open circuit, so that the state after OTP writing cannot exist stably and is affected by the external environment or the size of the write current; 2. The OTP cell of the MRAM device needs a column of normal MTJ as a reference bit to determine the write state of the OTP cell, which limits the storage density of the storage chip where the OTP cell is located.
[0061] Based on this, the inventive concept of the present application is to provide a self-referenced one-time programmable storage cell that does not need to set an additional reference cell to achieve data reading, thereby improving the storage density of the storage chip. In addition, the one-time programmable storage cell in the present application is based on the open circuit of the target area of the conductive structure to achieve data writing, and the data writing is based on the change of the structure itself, so the storage state of the one-time programmable storage cell is fixed, and the state after data writing is stable and is not affected by the environment, current, etc.
[0062] The structure and principle of the technical solutions provided by the present application will be described in detail below with reference to the accompanying drawings.
[0063] Reference Figure 1 and Figure 2 In one embodiment, the one-time programmable storage cell provided includes a storage structure 20 and a conductive structure 10 arranged below the storage structure 20.
[0064] The conductive structure 10 has opposite first and second ends 101 and 102.
[0065] During data writing, a write voltage is applied to a write path between any one of the ends (the first end 101 or the second end 102) of the conductive structure 10 and the top of the storage structure 20, so that the target region of the conductive structure is broken to achieve data writing of the one-time programmable memory cell.
[0066] Based on this, the one-time programmable memory cell in this embodiment realizes data writing based on the breaking of the target region of the conductive structure 10, and the data writing is based on the change of the structure itself, so the storage state of the one-time programmable memory cell is fixed, and the state is stable after data writing and is not affected by the environment, current, etc.
[0067] After the target region is broken, a read voltage is applied to the one-time programmable memory cell, and the current values of the first and second ends are compared to achieve reading of the written data.
[0068] In one example, referring to Figure 3 and Figure 4 After the target region is broken, a read voltage is applied to the one-time programmable memory cell, the first end 101 and the second end 102 are connected to a sense amplifier, and the sense amplifier is used to compare the current values of the first end 101 and the second end 102 to achieve reading of the written data.
[0069] It should be understood that the first and second ends can also be compared by other suitable devices, structures or circuits in this embodiment, and this embodiment does not make special limitations.
[0070] The one-time programmable memory cell provided in this embodiment can read data by comparing the current values of the first and second ends of the conductive structure, and does not need to set an additional reference cell in the storage chip to achieve data reading, so the storage density of the storage chip in which the one-time programmable memory cell is located can be improved.
[0071] In addition, the one-time programmable memory cell in this embodiment realizes data writing based on the breaking of the target region of the conductive structure, and the data writing is based on the change of the structure itself, so the storage state of the one-time programmable memory cell is fixed, and the state is stable after data writing and is not affected by the environment, current, etc.
[0072] The position of the above-mentioned target region is explained as follows:
[0073] During the process of applying the write voltage to the write path, a write current is formed by the write voltage, and the target region is the region through which the write current flows in the conductive structure.
[0074] It can also be understood that the target region is related to any one end of the conductive structure 10 forming the write path.
[0075] For example, referring to Figure 1 When the write path is formed between the first end 101 of the conductive structure 10 and the top of the storage structure 20, the write current formed by the write voltage flows through the region from the first end 101 of the conductive structure 10 to the top of the storage structure 20, and at this time, the target region is located near the first end 101 of the conductive structure 10.
[0076] For another example, referring to Figure 2 When the write path is formed between the second end 102 of the conductive structure 10 and the top of the storage structure 20, the write current formed by the write voltage flows through the region from the second end 102 of the conductive structure 10 to the top of the storage structure 20, and at this time, the target region is located near the second end 102 of the conductive structure 10.
[0077] It is worth mentioning that, Figure 1 and Figure 2 This is only an example to explain the target region, and does not mean that the target region is only the region shown in the figure; the target region can be any region in the conductive structure through which the write current flows, and the region is broken under the write voltage.
[0078] The data reading process of the one-time programmable memory cell in the embodiment will be described below:
[0079] Optionally, referring to Figure 5 and Figure 6 By applying the read voltage to the first read path between the top of the storage structure and the first end of the conductive structure, and the second read path between the top of the storage structure and the second end of the conductive structure, a first current value is measured at the first end 101, and a second current value is measured at the second end 102.
[0080] The detection of the first current value and the second current value can be realized by an inductive amplifier. The inductive amplifier is used to detect and amplify the first current signal and the second current signal in order to read the data.
[0081] When the first current value is greater than the second current value, the one-time programmable memory cell reads as the first write data. When the first current value is less than the second current value, the one-time programmable memory cell reads as the second write data; the first write data is different from the second write data.
[0082] It should be understood that corresponding to the different positions of the target region in the conductive structure 10, the read write data is also different.
[0083] In one example, referring to Figure 5If the target region is located in the first read path, the corresponding resistance in the first read path is infinite, so the first current value detected is almost 0, and the second current value is detected from the second end 102 due to the applied read voltage, so the second current value is greater than the first current value, and the one-time programmable storage unit reads the first written data, which can be "0" or "1".
[0084] In this example, the first end can be the reference end and the second end can be the data end, or the first end can be the data end and the second end can be the reference end. It should be understood that the reference end and the data end in this embodiment are relative concepts, which are used for comparison to realize the reading of the written data, so it is not necessary to limit which end as the fixed data end or the reference end.
[0085] Based on this, based on the self-reference function of the one-time programmable storage unit, the writing and reading of data can be realized in the one-time programmable storage unit.
[0086] In another example, referring to Figure 6 If the target region is located in the second read path, the corresponding resistance in the second read path is infinite, so the second current value detected is almost 0, and the first current value is detected from the first end 101 due to the applied read voltage, so the first current value is greater than the second current value, and the one-time programmable storage unit reads the second written data, which can be "1" or "0".
[0087] Similarly, in this example, the first end can be the reference end and the second end can be the data end, or the first end can be the data end and the second end can be the reference end. It should be understood that the reference end and the data end in this embodiment are relative concepts, which are used for comparison to realize the reading of the written data, so it is not necessary to limit which end as the fixed data end or the reference end.
[0088] Based on this, based on the self-reference function of the one-time programmable storage unit, the writing and reading of data can be realized in the one-time programmable storage unit.
[0089] The above describes the reading process of data, and the following describes the storage structure and the conductive structure.
[0090] Optionally, the storage structure includes a metal column or a short-circuit processed magnetic tunnel junction.
[0091] The short-circuit processed magnetic tunnel junction is a structure formed after the magnetic tunnel junction is short-circuited by applying a specific voltage to the magnetic tunnel junction to break down the potential barrier layer in the magnetic tunnel junction.
[0092] The metal column can be in any shape, such as a cylindrical metal column, a square metal column, a hexagonal metal column, and the like, and the embodiments of the present application do not make special limitations thereon.
[0093] The metal column can be made of one of copper, aluminum, tungsten, nickel, cobalt, and the like, and the embodiments of the present application do not make special limitations thereon.
[0094] The magnetic tunnel junction can also be in any shape, such as a cylindrical magnetic tunnel junction, a square columnar magnetic tunnel junction, a hexagonal columnar magnetic tunnel junction, and the like, and the embodiments of the present application do not make special limitations thereon.
[0095] In addition, the conductive structure in the embodiments has a size of 2-10 nanometers, and the size of the eFuse in the prior art eFuse OTP is generally micrometers, which is several tens to several hundreds of times the size of the conductive structure in the embodiments. The size herein is the size in the height direction. The conductive structure in the embodiments has a small size, and the open circuit is not easy to directly observe, and therefore, the storage information is more secure, and can be used to generate an OTP storage secret key to realize encrypted storage.
[0096] As a specific description, the short circuit processing of the magnetic tunnel junction can include applying a specific voltage to the tunnel junction, and the specific voltage needs to be greater than or equal to the open circuit voltage of the magnetic tunnel junction. Since the barrier layer in the magnetic tunnel junction has a dielectric breakdown effect, when the applied specific voltage is large enough, the barrier layer will be permanently broken down to form a short circuit.
[0097] Based on the above storage structure, it can be known that the resistance of the storage structure is relatively small, and at this time, a write voltage is applied to the one-time programmable through the write path, and the generated Joule heat will cause one end of the conductive structure to be open-circuited, thereby realizing data writing.
[0098] In an optional embodiment, when the storage structure is a magnetic tunnel junction after short circuit processing, the conductive structure can be a spin-orbit torque structure.
[0099] The thickness of the barrier layer in the magnetic tunnel junction satisfies a preset thickness, so that the specific voltage is less than the open circuit voltage of the target region.
[0100] According to the above description, when the magnetic tunnel junction is subjected to short circuit processing, a specific voltage needs to be applied to break down the barrier layer in the magnetic tunnel junction. If the specific voltage is greater than or equal to the open circuit voltage of the target region in the conductive structure, the target region will also be open-circuited, and the one-time programmable storage unit will lose the storage function. Therefore, the specific voltage needs to be less than the open circuit voltage of the target region.
[0101] It should be understood that the size of the specific voltage is related to the thickness of the barrier layer in the magnetic tunnel junction, and when the barrier layer is thicker, a larger specific voltage needs to be applied at the top and bottom of the magnetic tunnel junction to break down the barrier layer, but at this time the breakdown of the barrier layer and the open circuit of the target region may occur at the same time. Therefore, the thickness of the barrier layer can be adjusted to distinguish the breakdown voltage of the barrier layer and the open circuit voltage of the target region, so that the barrier layer breaks down first, and then the voltage is increased, and the open circuit of the target region occurs.
[0102] Therefore, the thickness of the barrier layer can be set to adjust the specific voltage, so that the specific voltage is less than the open circuit voltage of the target region.
[0103] In some examples, the open circuit voltage of the target region can be obtained according to experiments, and then the specific voltage can be set according to the open circuit voltage, and then the upper limit of the thickness of the barrier layer can be obtained by reverse deduction.
[0104] In practice, the thickness of the barrier layer can be set according to the need and the upper limit of the thickness of the barrier layer, so as to ensure that when the barrier layer is open at the specific voltage, the target region will not be open.
[0105] In an optional embodiment, referring to Figure 7 When the voltage applied at the top and bottom of the magnetic tunnel junction is V1, the breakdown of the barrier layer and the open circuit of the target region can occur. Referring to Figure 8 When the voltage applied at the top and bottom of the magnetic tunnel junction is V2, the breakdown of the barrier layer occurs, and the voltage applied continues to increase to V3, and the open circuit of the target region occurs.
[0106] According to the above voltage V2 and voltage V3, the size of the specific voltage is set, and then the thickness of the barrier layer is adjusted.
[0107] Referring to Figure 9 If the thickness of the barrier layer is thicker, resulting in the need to apply a specific voltage greater than or equal to the open circuit voltage of the target region, the thickness of the barrier layer can be reduced, so that the specific voltage needs to be applied. The open circuit voltage of the target region is less than.
[0108] Referring to Figure 10 It can be seen that when the thickness of the barrier layer is thicker, the breakdown voltage V BD of the barrier layer and the open circuit voltage V Open of the target region exist overlap, and with the decrease of the thickness of the barrier layer, the write voltage window of the breakdown voltage V BD of the barrier layer and the open circuit voltage V Open of the target region can be adjusted, and it can be seen that the thinner the barrier layer, the larger the write voltage window of the breakdown voltage V BD of the barrier layer and the open circuit voltage V Open of the target region.
[0109] Based on this, the embodiment can set the specific thickness of the barrier layer according to actual needs, and the embodiment does not specially limit this.
[0110] It should be understood that the breakdown voltage of the target region is related to the structure of the target region, and when the cross-sectional area of the target region decreases, the breakdown voltage of the target region also decreases. Based on this, the target region in the embodiment can be set.
[0111] In another optional implementation, the storage structure is a magnetic tunnel junction after short circuit processing, and the conductive structure has a first region and a second region, the first region is the target region, and the second region is other regions except the target region.
[0112] The cross-sectional area of the first region is smaller than that of the second region, so as to reduce the breakdown voltage of the target region.
[0113] In an example, referring to Figure 11 The cross-sectional area of the target region can be reduced by reducing the width of the target region.
[0114] In another example, referring to Figure 12 The cross-sectional area of the target region can be reduced by reducing the thickness of the target region.
[0115] The width of the target region and the thickness of the target region can be reduced by photolithography and etching.
[0116] It should be noted that although Figure 11 and Figure 12 both set the target region at the first end 101 and the second end 102 of the conductive structure, in actual application, the target region can be set at only the first end 101 or the second end 102 according to actual needs.
[0117] The above describes the storage structure and the conductive structure.
[0118] In the embodiment, referring to Figure 13 The one-time programmable storage unit can further include a first switch S1, and an output end of the first switch S1 is connected to one end where the target region of the conductive structure is located.
[0119] For example, referring to Figure 13 The target region is located at the second end 102 of the conductive structure, and the output end of the first switch S1 is connected to the second end 102 of the conductive structure.
[0120] It should be understood that the target region is located at the first end 101 of the conductive structure, and the output end of the first switch S1 is connected to the first end 101 of the conductive structure. Or, the target region is located at the first end 101 and the second end 102 of the conductive structure, and the output end of the first switch S1 is connected to the first end 101 and the second end 102 of the conductive structure.
[0121] For example, the first switch tube can be one of a bipolar transistor (BJT), a metal-oxide-semiconductor field-effect transistor (MOSFET), and an insulated gate bipolar transistor (IGBT), or other types of switch tubes, and the embodiments of the present application do not make special limitations.
[0122] During data writing, the first switch is turned on, and a write voltage is applied to the write path through the first switch, so that the target region is disconnected, so as to realize data writing of the one-time programmable memory cell.
[0123] After the target region is disconnected, the first switch is turned off, a read voltage is applied to the one-time programmable memory cell, and the current values of the first end and the second end are compared to realize reading of the written data.
[0124] Based on this, the writing and reading of data can be controlled by controlling the state of the first switch tube S1. Specifically, the control end of the first switch tube S1 is connected to the first control signal line, and the first control signal in the first control signal line is used to control the first switch tube S1 to be turned off. The input end of the first switch tube is connected to the write signal line, and is used to apply a write voltage to the write path when the first switch tube S1 is turned on.
[0125] Based on this, the controllability of the one-time programmable memory cell in the embodiment is increased; and only one switch tube is used in the structure, which can further save device area and be beneficial to integration.
[0126] Optionally, referring to Figure 14 The one-time programmable memory cell further includes a second switch S2, and the output end of the second switch S2 is connected to the top of the storage structure.
[0127] Exemplarily, the second switch tube can be one of a bipolar junction transistor (BJT), a metal-oxide-semiconductor field-effect transistor (MOSFET), and an insulated gate bipolar transistor (IGBT), or other types of switch tubes, and the embodiments of the present application do not make special limitations thereon.
[0128] During data writing, the first switch S1 is turned on, and the second switch S2 is turned on, the write voltage is applied to the write path through the first switch S1 and the second switch S2, so that the target region is disconnected, and data writing of the one-time programmable storage unit is realized.
[0129] After the target region is disconnected, the first switch S1 is turned off, and the second switch S2 is turned on, the read voltage is applied to the one-time programmable storage unit through the second switch S2, and the current values of the first end and the second end are compared to realize reading of the written data.
[0130] Based on this, the writing and reading of data can be controlled by controlling the states of the first switch tube S1 and the second switch tube S2. Specifically, the control end of the first switch tube S1 is connected to the first control signal line, the first control signal in the first control signal line is used to control the turn-on and turn-off of the first switch tube S1, and the input end of the first switch tube is connected to the write signal line. The control end of the second switch tube S2 is connected to the second control signal line, the second control signal in the second control signal line is used to control the turn-on and turn-off of the second switch tube S2, and the input end of the second switch tube is connected to the read signal line, which is used to apply the write voltage to the one-time programmable storage unit together with the write voltage end when the first switch tube S1 is turned on and the second switch tube S2 is turned on, and is used to apply the read voltage to the one-time programmable storage unit when the first switch tube S1 is turned off and the second switch tube S2 is turned on.
[0131] Based on this, the controllability of the one-time programmable storage unit in the embodiments is further increased, and the unit structure can also be compatible with the preparation process of the storage unit, and the one-time programmable storage unit is formed synchronously, thereby simplifying the manufacturing steps.
[0132] In a second aspect, the embodiments of the present application also provide a storage array, which includes a one-time programmable storage unit area, and the one-time programmable storage unit area includes a plurality of array-arranged one-time programmable storage units as in the first aspect.
[0133] The data write of the corresponding one-time programmable memory cell is realized by applying a write voltage between any one end of the conductive structure corresponding to the one-time programmable memory cell and the top of the storage structure, so that the target region of the conductive structure is disconnected.
[0134] After the target region is disconnected, the data write of the corresponding one-time programmable memory cell is read by comparing the current values of the first end and the second end of the conductive structure by applying a read voltage to the corresponding one-time programmable memory cell.
[0135] According to the above description, the one-time programmable memory cell can read data by comparing the current values of the first end and the second end of the conductive structure, and does not need to set an additional reference cell in the storage array to realize the reading of data, so that the storage density of the storage chip in which the one-time programmable memory cell is located can be improved. In addition, since the one-time programmable memory cell realizes data write based on the disconnection of the target region of the conductive structure, the data write is based on the change of the structure itself, so the storage state of the one-time programmable memory cell is fixed, and the state is stable after data write, and is not affected by the environment, current and the like.
[0136] In some examples, the storage array is entirely composed of the array arrangement of the one-time programmable memory cells. Based on this, the storage array is used to store key data, such as encryption key, firmware signature, serial number and error correction address and the like.
[0137] The structure of the above storage array is described below with specific embodiments.
[0138] The first example, referring to Figure 15 The storage array includes a storage region 2 and a one-time programmable memory cell region 1, and the one-time programmable memory cell region 1 is obtained by integrating one-time programmable memory cells 11, and the one-time programmable memory cell region 1 is arranged at the edge of the array. It should be understood that the one-time programmable memory cell region 1 can also be arranged at other positions of the storage array, and this embodiment does not specially limit it.
[0139] The short-circuit processed magnetic tunnel junction of the one-time programmable memory cell 11 in the storage array is a short-circuit processed magnetic tunnel junction, and the writing method is as follows: first, the first switch S1 and the second switch S2 of the writing path are turned on through the first control signal line and the second control signal line, a writing voltage is applied through the writing signal line and the reading signal line to make the target region of the conductive structure of the corresponding one-time programmable memory cell 11 be broken, and writing 0 or writing 1 is completed; then, the first switch S1 is turned off through the first control signal line, the second switch S2 is turned on through the second control signal line, and a reading voltage is applied to the corresponding one-time programmable memory cell 11 through the reading signal line to read the written data from the first end and the second end of the corresponding one-time programmable memory cell 11. This process does not need to set a reference bit MTJ to complete the reading operation, and can also be compatible with the preparation process of the storage area 2, synchronously form the one-time programmable memory cell area 1, and thus simplify the manufacturing steps.
[0140] In this example, before data writing, the second switch S2 is turned on through the second control signal line, and a specific voltage is applied to break down the barrier layer of all one-time programmable memory cells 11.
[0141] In the second example, referring to Figure 16 The storage array includes the storage area 2 and the one-time programmable memory cell area 1, and the one-time programmable memory cell area 1 is obtained by integrating the one-time programmable memory cells 11. The one-time programmable memory cell area 1 is arranged at the edge of the array, and it should be understood that the one-time programmable memory cell area 1 can also be arranged at other positions of the storage array, which is not specially limited in the embodiment.
[0142] The difference between this example and the first example is that the second switch S2 at the top of the magnetic tunnel junction is removed, and the array integration density is further improved. The data writing process of the one-time programmable memory cell 11 in the array is as follows: the first switch S1 is turned on through the first control signal line, a writing voltage is applied to the writing path through the writing signal line to make the target region be broken, and writing 0 or writing 1 is completed; then, a reading voltage is applied to the corresponding one-time programmable memory cell 11 through the reading signal line to read the written data from the first end and the second end of the corresponding one-time programmable memory cell. This process does not need to set a reference bit MTJ to complete the reading operation. In this example, before data writing, a specific voltage is applied to the top and bottom ends of the magnetic tunnel junction to break down the barrier layer of all one-time programmable memory cells 11.
[0143] In the third example, referring to Figure 17 The storage array includes the storage area 2 and the one-time programmable memory cell area 1, and the one-time programmable memory cell area 1 is obtained by integrating the one-time programmable memory cells 11. The one-time programmable memory cell area 1 is arranged at the edge of the array, and it should be understood that the one-time programmable memory cell area 1 can also be arranged at other positions of the storage array, which is not specially limited in the embodiment.
[0144] The difference between this example and the first example is that the storage structure of the one-time programmable memory cell 11 is a metal pillar. Compared with the first and second examples, this example omits the short-circuit processing procedure for the magnetic tunnel junction. The data writing procedure is as follows: the first switch S1 and the second switch S2 of the write path are turned on through the first control signal line and the second control signal line, a write voltage is applied through the write signal line and the read signal line to make the target region of the conductive structure of the corresponding one-time programmable memory cell 11 break the circuit, and the writing of 0 or 1 is completed. Then, the first switch S1 is turned off through the first control signal line, the second switch S2 is turned on through the second control signal line, and a read voltage is applied to the corresponding one-time programmable memory cell 11 through the read signal line to read the written data from the first end and the second end of the corresponding one-time programmable memory cell 11. This procedure does not need to set a reference bit MTJ to complete the reading operation.
[0145] It should be understood that, since the storage array includes the one-time programmable memory cell described above, the storage array has the same beneficial effects as the one-time programmable memory cell provided in the foregoing embodiments, which will not be described here again. Figures 1-14 The one-time programmable memory cell provided in the embodiments has the same beneficial effects as the one-time programmable memory cell provided in the foregoing embodiments, which will not be described here again.
[0146] Finally, it should be noted that: other embodiments of the application will be readily apparent to those skilled in the art with the consideration of the specification and practice of the application disclosed herein. The application is intended to cover any variations, uses, or adaptive changes of the application following the general principles of the application and including common knowledge or conventional technical means in the art which are not disclosed in the application, and is not limited to the precise structures described above and shown in the drawings, and various modifications and changes can be made without departing from the scope thereof. The scope of the application is only limited by the appended claims.
Claims
1. A one-time programmable memory cell, characterized by, The storage structure and the conductive structure arranged below the storage structure are provided; The conductive structure has oppositely arranged first and second ends, and the data writing of the one-time programmable memory cell is realized by applying a write voltage to a write path between any one end of the conductive structure and the top of the storage structure to cause the target region of the conductive structure to be open-circuited. After the target region is open-circuited, the read of the written data is realized by comparing the current values of the first and second ends by applying a read voltage to the one-time programmable memory cell.
2. The one-time programmable memory cell of claim 1, wherein, During the application of the write voltage to the write path, a write current is formed by the write voltage, and the target region is a region through which the write current flows in the conductive structure.
3. The one-time programmable memory cell of claim 1, wherein, The first current value is measured at the first end and the second current value is measured at the second end by simultaneously applying the read voltage to a first read path between the top of the storage structure and the first end of the conductive structure and a second read path between the top of the storage structure and the second end of the conductive structure. When the first current value is greater than the second current value, the one-time programmable memory cell reads the first written data. When the first current value is less than the second current value, the one-time programmable memory cell reads the second written data. The first written data is different from the second written data.
4. The one-time programmable memory cell of claim 1, wherein, The storage structure includes a metal pillar or a short-circuit processed magnetic tunnel junction. The short-circuit processed magnetic tunnel junction is a structure formed after a short circuit occurs in the magnetic tunnel junction by applying a specific voltage to the magnetic tunnel junction to cause the barrier layer in the magnetic tunnel junction to break down.
5. The one-time programmable memory cell of claim 4, wherein, The storage structure is the short-circuit processed magnetic tunnel junction, and the conductive structure is a spin-orbit torque structure. The thickness of the barrier layer in the magnetic tunnel junction satisfies a preset thickness, so that the specific voltage is less than the open-circuit voltage of the target region.
6. The one-time programmable memory cell of claim 4, wherein, The storage structure is the short-circuit processed magnetic tunnel junction, and the conductive structure has a first region and a second region, the first region being the target region and the second region being other regions except the target region. The cross-sectional area of the first region is less than that of the second region to reduce the open-circuit voltage of the target region.
7. The one-time programmable memory cell of claim 1, wherein The one-time programmable memory cell further includes a first switch, and an output end of the first switch is connected to one end where the target region of the conductive structure is located. During data writing, the first switch is turned on, and the write voltage is applied to the write path through the first switch to cause the target region to be open-circuited, thereby realizing the data writing of the one-time programmable memory cell. After the target region is open-circuited, the first switch is turned off, a read voltage is applied to the one-time programmable memory cell, and the current values of the first and second ends are compared to realize the read of the written data.
8. The one-time programmable memory cell of claim 7, wherein The one-time programmable memory cell further comprises a second switch, an output terminal of the second switch being connected to the top of the storage structure; During data writing, the first switch is turned on, the second switch is turned on, the write voltage is applied to the write path through the first switch and the second switch, so that the target region is disconnected, and data writing of the one-time programmable memory cell is realized; After the target region is disconnected, the first switch is turned off, the second switch is turned on, a read voltage is applied to the one-time programmable memory cell through the second switch, and the current values of the first terminal and the second terminal are compared, so that the read of the written data is realized.
9. A memory array comprising: The storage array comprises a one-time programmable memory cell region, the one-time programmable memory cell region comprising a plurality of arrayed one-time programmable memory cells as claimed in any one of claims 1-8; By applying a write voltage to a write path between any one end of the conductive structure corresponding to the one-time programmable memory cell and the top of the storage structure, the target region of the conductive structure is disconnected, and data writing corresponding to the one-time programmable memory cell is realized; After the target region is disconnected, by applying a read voltage to the one-time programmable memory cell, the current values of the first terminal and the second terminal are compared, so that the read of the written data corresponding to the one-time programmable memory cell is realized.
10. The storage array of claim 9, wherein, The storage array is entirely composed of the arrayed one-time programmable memory cells.