A fully automatic test method and system for the read and write functions of DRAM memory cells

Abstract

The present invention relates to the technical field of automated testing. The present invention discloses a fully automated DRAM memory cell read / write function testing method and system, including: an automatic memory cell construction module, an automatic memory cell entry module, a memory cell data acquisition module, a data correction condition judgment module, a high impedance state correction model establishment module, a low impedance state correction model establishment module, a corrected result output module, and a read / write function judgment module. The memory cells are arranged in a matrix form to construct an automatic memory matrix. Data is read from the memory cells by a reader, and the read data is compared with the standard data provided by the data source. A data correction condition judgment model is established to judge whether the data needs to be corrected, and high impedance state correction and low impedance state correction are performed. The difference between the high impedance state correction index and the low impedance state correction index of the memory cells is compared with a preset threshold value to judge whether the read / write function is normal, improving the reliability of the test results.

Description

Technical Field

[0001] The present invention relates to the technical field of automated testing, and more particularly to a fully automated read and write function testing method and system for DRAM memory cells. Background Art

[0002] With the continuous progress of information technology, the role of storage technology in computer systems has become increasingly prominent. As the core component for data storage and access, the performance and stability of memory cells directly affect the operating efficiency and data security of the entire system. Therefore, performing read and write function tests on memory cells has become a key link in ensuring the quality and performance of storage systems. As the main carrier for data storage and read / write operations, the performance and reliability of DRAM are directly related to the operating efficiency and stability of the entire system. Therefore, performing read and write function tests on DRAM memory cells is an important means to ensure their quality and performance.

[0003] During the long-term use of DRAM memory cells, due to the influence of various factors, the read and write functions may become abnormal. Traditional testing methods usually require manual intervention, which is not only inefficient but also prone to human errors. Due to reasons such as temperature changes, voltage fluctuations, aging effects, or manufacturing defects, the read and write performance of memory cells gradually deteriorates. To address these challenges, data correction and anomaly detection for the read and write functions of DRAM memory cells are required. Therefore, developing a fully automated read and write function testing system and method for DRAM memory cells can effectively improve testing efficiency and accuracy, and has important application value. Summary of the Invention

[0004] To overcome the above-mentioned defects of the prior art, the present invention provides a fully automated read and write function testing system for DRAM memory cells to solve the problems existing in the above-mentioned background art.

[0005] The present invention provides the following technical solution: A fully automated read and write function testing system for DRAM memory cells, comprising: an automatic memory cell construction module, an automatic memory cell entry module, a memory cell data acquisition module, a data correction condition judgment module, a high-impedance state correction model establishment module, a low-impedance state correction model establishment module, a corrected result output module, and a read and write function judgment module;

[0006] The automatic memory matrix construction module defines memory cells, arranges the memory cells in a matrix form to construct an automatic memory matrix, and obtains the address signals of the memory cells through an address decoder;

[0007] The automatic memory cell entry module obtains data from a data source, stores the data into the memory cells corresponding to the address signals according to the address signals of the data, and starts the data read function and data update function when receiving a data read request;

[0008] The storage unit data acquisition module starts the data reading function based on the automatic storage unit input module, reads data from the storage unit through a reader, and transmits the read data to the data correction condition judgment module;

[0009] The data correction condition judgment module receives the data read by the storage unit data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected;

[0010] The high-impedance state correction model establishment module receives the data correction requirements of the data correction condition judgment module, establishes a high-impedance state correction model to obtain a high-impedance state correction index, and transmits the high-impedance state correction index to the corrected result output module;

[0011] The low-impedance state correction model establishment module receives the data correction requirements of the data correction condition judgment module, establishes a low-impedance state correction model to obtain a low-impedance state correction index, and transmits the low-impedance state correction index to the corrected result output module;

[0012] The corrected result output module calculates the difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit, and transmits the result to the read / write function judgment module;

[0013] The read / write function judgment module compares the difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit with a preset threshold value to judge whether the read / write function is normal.

[0014] Preferably, in the automatic storage matrix construction module, the automatic storage matrix includes n storage units, i = 1, 2, 3,..., n, where i represents the numbers of the respective storage units.

[0015] Preferably, in the automatic storage unit input module, the address signal of the data is obtained through an address decoder, and the data is stored in the storage unit corresponding to the address signal of the data. After the data reading function is completed, the data update function is automatically started.

[0016] Preferably, in the storage unit data acquisition module, data is read from the storage unit through a reader. The data includes: the maximum load impedance of the storage unit, the minimum load impedance of the storage unit, the characteristic impedance value at the output end of the storage unit, the maximum load capacitance during the high-frequency movement process of the storage unit, the minimum load capacitance during the low-frequency movement process of the storage unit, and the rated capacitance value of the storage unit.

[0017] Preferably, in the data correction condition judgment module, the data read by the receiving storage unit data acquisition module and the standard data provided by the data source are received, and a data correction condition judgment model is established by comparing the data. The specific content of judging whether the data needs to be corrected is as follows:

[0018] Step S01: Read the data of n storage units twice, and perform the second data reading after the data is updated in the first data reading;

[0019] Step S02: The number of data read from each storage unit is m, and j = 1, 2, 3,... m; where j represents the data number read in each storage unit;

[0020] Step S03: The data set formed by the first data reading of each storage unit , where ; The data set formed by the second data reading of each storage unit , where ;

[0021] Step S04: Calculate the error index of the first data reading of each storage unit. The calculation formula is: , where represents the error index of the first data reading of each storage unit, represents the standard data set provided by the data source in each storage unit, represents the allowable error coefficient preset by the system;

[0022] Step S05: Calculate the error index of the second data reading of each storage unit. The calculation formula is: , where represents the error index of the second data reading of each storage unit;

[0023] Step S06: When the error index of the first data reading and the error index of the second data reading both meet the preset data reading error threshold, calculate the difference between the error index of the first data reading and the error index of the second data reading. The calculation formula is: , if is less than the preset data error fluctuation threshold, it is judged that the storage unit does not need to perform data correction, otherwise, the storage unit needs to perform data correction.

[0024] Preferably, in the high-impedance state correction model establishment module, the data correction requirement of the data correction condition judgment module is received, and the specific content of establishing the high-impedance state correction model to obtain the high-impedance state correction index is as follows:

[0025] Step S01: Calculate the high-impedance state reflection coefficient of the storage unit that needs to perform data correction. The calculation formula is: , where represents the high-impedance state reflection coefficient of the storage cell, represents the maximum value of the load impedance of the storage cell, represents the characteristic impedance value at the output end of the storage cell, and i represents the number of each storage cell;

[0026] Step S02: Calculate the high-impedance state correction index for the storage cells that need data correction. The calculation formula is , where represents the high-impedance state correction index of the storage cell, represents the maximum value of the load capacitance during the high-frequency movement process of the storage cell, represents the rated capacitance value of the storage cell.

[0027] Preferably, in the low-impedance state correction model establishment module, the data correction requirements of the data correction condition judgment module are received, and the specific content of establishing the low-impedance state correction model to obtain the low-impedance state correction index is as follows:

[0028] Step S01: Calculate the low-impedance state reflection coefficient for the storage cells that need data correction. The calculation formula is: , where represents the low-impedance state reflection coefficient of the storage cell, represents the minimum value of the load impedance of the storage cell, and i represents the number of each storage cell;

[0029] Step S02: Calculate the low-impedance state correction index for the storage cells that need data correction. The calculation formula is , where represents the low-impedance state correction index of the storage cell, represents the minimum value of the load capacitance during the low-frequency movement process of the storage cell, represents the rated capacitance value of the storage cell.

[0030] Preferably, the corrected result output module performs high-impedance state correction and low-impedance state correction on the data of the storage cells that need data correction respectively according to the high-impedance state correction index and the low-impedance state correction index, and calculates the difference between the high-impedance state correction index and the low-impedance state correction index of the n storage cells after correction. The calculation formula is: , where U represents the difference between the high-impedance state correction index and the low-impedance state correction index of the n storage cells after correction.

[0031] Preferably, the read / write function judgment module compares the difference U between the high-impedance state correction index and the low-impedance state correction index of the storage cell with the preset threshold If the difference U between the high-impedance state correction index and the low-impedance state correction index of the storage cell is greater than the preset threshold If so, it is determined that the read / write function is abnormal, and an early warning is displayed. If the difference U between the high-impedance state correction index and the low-impedance state correction index of the storage unit is less than or equal to a preset threshold it is determined that the read / write function is normal.

[0032] A fully automatic read / write function test method for DRAM storage units includes the following steps:

[0033] Step S1: Define the storage unit, and the storage units are arranged in a matrix form to construct an automatic storage matrix;

[0034] Step S2: Store the data into the storage unit corresponding to the address signal according to the address signal of the data;

[0035] Step S3: Read the data from the storage unit through a reader;

[0036] Step S4: Compare the read data with the standard data provided by the data source, establish a data correction condition judgment model, and judge whether the data needs to be corrected;

[0037] Step S5: Establish a high-impedance state correction model to obtain the high-impedance state correction index;

[0038] Step S6: Establish a low-impedance state correction model to obtain the low-impedance state correction index;

[0039] Step S7: Calculate the difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit.

[0040] Step S8: Compare the difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit with a preset threshold to judge whether the read / write function is normal.

[0041] The technical effects and advantages of the present invention:

[0042] The present invention is provided with an automatic storage unit construction module, an automatic storage unit input module, a storage unit data acquisition module, a data correction condition judgment module, a high-impedance state correction model establishment module, a low-impedance state correction model establishment module, a corrected result output module, and a read / write function judgment module. The storage units are arranged in a matrix form to construct an automatic storage matrix. The data is read from the storage unit through a reader, and the read data is compared with the standard data provided by the data source. A data correction condition judgment model is established to judge whether the data needs to be corrected, and high-impedance state correction and low-impedance state correction are performed. The difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit is compared with a preset threshold to judge whether the read / write function is normal, realizing a comprehensive test and correction of the read / write function of the DRAM storage unit. Compared with the traditional test method, the present invention not only improves the accuracy and efficiency of the test, but also can automatically identify and correct the read / write anomalies of the storage unit, ensuring the integrity and reliability of the data. Description of the Drawings

[0043] Figure 1 It is a flowchart of a full-automatic read / write function test system for DRAM memory cells.

[0044] Figure 2 It is a flowchart of a full-automatic read / write function test method for DRAM memory cells. Detailed Embodiments

[0045] Next, the technical solutions in the present invention will be clearly and completely described in conjunction with the accompanying drawings in the present invention. In addition, the forms of each structure described in the following embodiments are merely examples. A full-automatic read / write function test method and system related to the present invention are not limited to the structures described in the following embodiments. All other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0046] As Figure 1 shown, the present invention provides a full-automatic read / write function test system for DRAM memory cells, including: an automatic memory cell construction module, an automatic memory cell input module, a memory cell data acquisition module, a data correction condition judgment module, a high-impedance state correction model establishment module, a low-impedance state correction model establishment module, a corrected result output module, and a read / write function judgment module;

[0047] The automatic memory matrix construction module defines memory cells, constructs an automatic memory matrix with the memory cells arranged in a matrix form, and obtains the address signals of the memory cells through an address decoder;

[0048] The automatic memory cell input module obtains data from a data source, stores the data in the memory cells corresponding to the address signals according to the address signals of the data, and starts the data read function and the data update function when receiving a data read request;

[0049] The memory cell data acquisition module starts the data read function based on the automatic memory cell input module, reads data from the memory cells through a reader, and transmits the read data to the data correction condition judgment module;

[0050] The data correction condition judgment module receives the data read by the memory cell data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected;

[0051] The high-impedance state correction model establishment module receives the data correction requirements of the data correction condition judgment module, establishes a high-impedance state correction model to obtain a high-impedance state correction index, and transmits the high-impedance state correction index to the corrected result output module;

[0052] The low-impedance state correction model establishment module receives the data correction requirements of the data correction condition judgment module, establishes a low-impedance state correction model to obtain a low-impedance state correction index, and transmits the low-impedance state correction index to the corrected result output module;

[0053] The corrected result output module calculates the difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit, and transmits the result to the read / write function judgment module;

[0054] The read / write function judgment module compares the difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit with a preset threshold to judge whether the read / write function is normal.

[0055] In this embodiment, it should be specifically noted that in the automatic storage matrix construction module, the automatic storage matrix includes n storage units, where i = 1, 2, 3,..., n, and i represents the number of each storage unit.

[0056] In this embodiment, it should be specifically noted that in the automatic storage unit entry module, the address signal of the data is obtained through an address decoder, and the data is stored in the storage unit corresponding to the address signal of the data. After the data read function is completed, the data update function is automatically started.

[0057] In this embodiment, it should be specifically noted that in the storage unit data acquisition module, data is read from the storage unit through a reader. The data includes: the maximum load impedance of the storage unit, the minimum load impedance of the storage unit, the characteristic impedance value at the output end of the storage unit, the maximum load capacitance during the high-frequency movement process of the storage unit, the minimum load capacitance during the low-frequency movement process of the storage unit, and the rated capacitance value of the storage unit.

[0058] In this embodiment, it should be specifically noted that in the data correction condition judgment module, the data read by the storage unit data acquisition module and the standard data provided by the data source are received, and a data correction condition judgment model is established by comparing the data. The specific content of judging whether the data needs to be corrected is as follows:

[0059] Step S01: Read the data of n storage units twice, and perform the second data reading after the first data reading and data update;

[0060] Step S02: Each storage unit reads m pieces of data, where j = 1, 2, 3,... m; here, j represents the data number read from each storage unit.

[0061] Step S03: The first data reading of each storage unit forms a data set , where ; The second data reading of each storage unit forms a data set , where ;

[0062] Step S04: Calculate the error index of the first data reading of each storage unit. The calculation formula is: , where represents the error index of the first data reading of each storage unit, represents the standard data set provided by the data source in each storage unit, represents the allowable error coefficient preset by the system;

[0063] Step S05: Calculate the error index of the second data reading of each storage unit. The calculation formula is: , where represents the error index of the second data reading of each storage unit;

[0064] Step S06: When both the error index of the first data reading and the error index of the second data reading meet the preset data reading error threshold, calculate the difference between the error index of the first data reading and the error index of the second data reading. The calculation formula is: , if is less than the preset data error fluctuation threshold, it is determined that the storage unit does not need data correction; otherwise, the storage unit needs data correction.

[0065] In this embodiment, it should be specifically noted that in the high-impedance state correction model establishment module, the specific content of receiving the data correction requirement of the data correction condition judgment module and establishing the high-impedance state correction model to obtain the high-impedance state correction index is as follows:

[0066] Step S01: Calculate the high-impedance state reflection coefficient of the storage unit that needs data correction. The calculation formula is: , where represents the high-impedance state reflection coefficient of the storage unit, represents the maximum load impedance of the storage unit, represents the characteristic impedance value at the output end of the storage unit, and i represents the number of each storage unit;

[0067] Step S02: Calculate the high-impedance state correction index of the storage unit that needs data correction. The calculation formula is , where Represents the high-impedance state correction index of the storage unit, Represents the maximum value of the load capacitance during the high-frequency movement process of the storage unit, Represents the rated capacitance value of the storage unit.

[0068] In this embodiment, it should be specifically noted that in the low-impedance state correction model establishment module, the data correction requirements of the data correction condition judgment module are received, and the specific content of establishing the low-impedance state correction model to obtain the low-impedance state correction index is as follows:

[0069] Step S01: Calculate the low-impedance state reflection coefficient of the storage unit that needs to perform data correction. The calculation formula is: , where Represents the low-impedance state reflection coefficient of the storage unit, Represents the minimum value of the load impedance of the storage unit, and i represents the number of each storage unit;

[0070] Step S02: Calculate the low-impedance state correction index of the storage unit that needs to perform data correction. The calculation formula is , where Represents the low-impedance state correction index of the storage unit, Represents the minimum value of the load capacitance during the low-frequency movement process of the storage unit, Represents the rated capacitance value of the storage unit.

[0071] In this embodiment, it should be specifically noted that the corrected result output module performs high-impedance state correction and low-impedance state correction on the data of the storage unit that needs to perform data correction respectively according to the high-impedance state correction index and the low-impedance state correction index. The specific content is as follows:

[0072] Step S01: The calculation formula for performing high-impedance state correction on the first read data in the storage unit that needs to perform data correction is: , where Represents the first read data after high-impedance state correction of the storage unit that needs to perform data correction;

[0073] Step S02: The calculation formula for performing low-impedance state correction on the second read data in the storage unit that needs to perform data correction is: , where Represents the first read data after low-impedance state correction of the storage unit that needs to perform data correction;

[0074] Step S03: Calculate the data after high-impedance state correction and low-impedance state correction. The calculation formula is: , where Represents the data after high-impedance state correction and low-impedance state correction;

[0075] Step S04: Update the high-impedance state correction index and the low-impedance state correction index of the n memory cells according to the data after high-impedance state correction and low-impedance state correction, and calculate the difference between the high-impedance state correction index and the low-impedance state correction index of the n memory cells after correction. The calculation formula is: , where U represents the difference between the high-impedance state correction index and the low-impedance state correction index of the n memory cells after calculation and correction.

[0076] In this embodiment, it should be specifically noted that the read / write function judgment module compares the difference U between the high-impedance state correction index and the low-impedance state correction index of the memory cell with a preset threshold for comparison. If the difference U between the high-impedance state correction index and the low-impedance state correction index of the memory cell is greater than the preset threshold , it is determined that the read / write function is abnormal and an early warning is displayed. If the difference U between the high-impedance state correction index and the low-impedance state correction index of the memory cell is less than or equal to the preset threshold , it is determined that the read / write function is normal.

[0077] As Figure 2 shown, in this embodiment, it should be specifically noted that a full-automatic DRAM memory cell read / write function test method includes the following steps:

[0078] Step S1: Define the memory cells, and the memory cells are arranged in a matrix form to construct an automatic storage matrix;

[0079] Step S2: Store the data into the memory cells corresponding to the address signals according to the address signals of the data;

[0080] Step S3: Read the data from the memory cells through a reader;

[0081] Step S4: Compare the read data with the standard data provided by the data source, establish a data correction condition judgment model, and judge whether the data needs to be corrected;

[0082] Step S5: Establish a high-impedance state correction model to obtain the high-impedance state correction index;

[0083] Step S6: Establish a low-impedance state correction model to obtain the low-impedance state correction index;

[0084] Step S7: Calculate the difference between the high-impedance state correction index and the low-impedance state correction index of the memory cell.

[0085] Step S8: Compare the difference between the high-impedance state correction index and the low-impedance state correction index of the memory cell with a preset threshold to judge whether the read / write function is normal.

[0086] In this embodiment, it should be specifically noted that the main difference between this embodiment and the prior art is that this embodiment is provided with an automatic storage unit construction module, an automatic storage unit input module, a storage unit data acquisition module, a data correction condition judgment module, a high-impedance state correction model establishment module, a low-impedance state correction model establishment module, a corrected result output module, and a read / write function judgment module. The storage units are arranged in a matrix form to construct an automatic storage matrix. Data is read from the storage units through a reader, and the read data is compared with the standard data provided by the data source. A data correction condition judgment model is established to judge whether the data needs to be corrected, and high-impedance state correction and low-impedance state correction are performed. The difference between the high-impedance state correction index and the low-impedance state correction index of the storage unit is compared with a preset threshold to judge whether the read / write function is normal, realizing a comprehensive test and correction of the read / write function of the DRAM storage unit. Compared with the traditional test method, the present invention not only improves the accuracy and efficiency of the test, but also can automatically identify and correct the read / write anomalies of the storage unit, ensuring the integrity and reliability of the data.

[0087] Finally: The above are only the preferred embodiments of the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0088] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or replacements, which should all be covered by the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A fully automatic DRAM storage unit read and write function test system, characterized in that: include: Automatic storage unit construction module, automatic storage unit entry module, storage unit data acquisition module, data correction condition judgment module, high-resistance state correction model establishment module, low-resistance state correction model establishment module, correction result output module and read-write function judgment module; The automatic storage matrix construction module defines storage cells, the storage cells are arranged in a matrix form to construct an automatic storage matrix, and the address signals of the storage cells are obtained through an address decoder; The automatic storage matrix includes n storage units, i=1, 2, 3, ..., n, where i represents the number of each storage unit; The automatic storage unit entry module acquires data from a data source, stores the data in a storage unit corresponding to the address signal according to the address signal of the data, and starts a data reading function and a data updating function when receiving a data reading request; The storage unit data acquisition module starts the data reading function based on the automatic storage unit entry module, reads data from the storage unit through the reader, and transmits the read data to the data correction condition judgment module; The data correction condition judgment module receives the data read by the storage unit data acquisition module and the standard data provided by the data source, compares the data to establish a data correction condition judgment model, and judges whether the data needs to be corrected; The high-impedance correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a high-impedance correction model to obtain a high-impedance correction index, and transmits the high-impedance correction index to the corrected result output module; The low-resistance state correction model establishment module receives the data correction requirement of the data correction condition judgment module, establishes a low-resistance state correction model to obtain a low-resistance state correction index, and transmits the low-resistance state correction index to the corrected result output module; The post-correction result output module calculates the difference between the high-resistance correction index and the low-resistance correction index of the storage unit, and transmits the result to the read-write function judgment module; The read / write function determination module compares the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read / write function is normal.

2. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the automatic storage unit entry module, the address signal of the data is obtained through the address decoder, and the data is stored in the storage unit corresponding to the address signal of the data. After the data reading function is completed, the data updating function is automatically started.

3. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the storage unit data acquisition module, data is read from the storage unit through a reader, and the data includes: the maximum value of the load impedance of the storage unit, the minimum value of the load impedance of the storage unit, the characteristic impedance value of the output end of the storage unit, the maximum value of the load capacitance of the storage unit during high-frequency movement, the minimum value of the load capacitance of the storage unit during low-frequency movement, and the rated capacitance value of the storage unit.

4. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the data correction condition judgment module, the data read by the storage unit data acquisition module and the standard data provided by the data source are received, and the data are compared to establish a data correction condition judgment model, and the specific contents of judging whether the data needs correction are as follows: Step S01: reading data of n storage units twice, and performing the second data reading after the data of the first data reading is updated; Step S02: m pieces of data are read from each storage unit, where j=1, 2, 3, ...m; Where j represents the data number read in each storage unit; Step S03: Reading data from each storage unit for the first time to form a data set ,in ; Each storage unit reads data a second time to form a data set ,in ; Step S04: Calculate the data read error index of each storage unit, the calculation formula is: ,in Indicates the data read error index of each storage unit. Represents the standard data set provided by the data source in each storage unit. Indicates the preset allowable error coefficient of the system; Step S05: Calculate the secondary data read error index of each storage unit, the calculation formula is: ,in Represents the secondary data read error index of each storage unit; Step S06: When the primary data reading error index and the secondary data reading error index both meet the preset data reading error threshold, a difference calculation is performed on the primary data reading error index and the secondary data reading error index, and the calculation formula is: ,like If the data error fluctuation value is smaller than a preset data error fluctuation threshold, it is determined that the storage unit does not need to perform data correction; otherwise, the storage unit needs to perform data correction.

5. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the high-impedance correction model establishment module, the data correction requirements of the data correction condition judgment module are received, and the high-impedance correction model is established to obtain the specific contents of the high-impedance correction index as follows: Step S01: Calculate the high-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the high-resistance state reflection coefficient of the storage cell, Indicates the maximum load impedance of the storage unit, represents the characteristic impedance value of the output end of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the high impedance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the high-resistance correction index of the memory cell, Indicates the maximum value of the load capacitance during the high-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

6. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: In the low-resistance correction model establishment module, the data correction requirements of the data correction condition judgment module are received, and the low-resistance correction model is established to obtain the specific contents of the low-resistance correction index as follows: Step S01: Calculate the low-resistance state reflection coefficient of the storage unit that needs data correction, and the calculation formula is: ,in represents the low-resistance state reflection coefficient of the memory cell, represents the minimum value of the load impedance of the storage unit, and i represents the number of each storage unit; Step S02: Calculate the low-resistance correction index for the storage unit that needs data correction. The calculation formula is: ,in Represents the low resistance state correction index of the memory cell, Indicates the minimum value of the load capacitance during the low-frequency movement of the storage unit. Indicates the rated capacitance of the storage cell.

7. A fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: The correction result output module performs high-resistance correction and low-resistance correction on the data of the storage unit that needs data correction according to the high-resistance correction index and the low-resistance correction index, and calculates the difference between the high-resistance correction index and the low-resistance correction index of the n storage units after correction. The calculation formula is: , where U represents the difference between the high-resistance correction index and the low-resistance correction index of the n memory cells after calculation and correction.

8. The fully automatic DRAM storage unit read and write function test system according to claim 1, characterized in that: The read / write function judgment module compares the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is greater than the preset threshold , the read / write function is judged to be abnormal, and an early warning is displayed. If the difference U between the high-resistance correction index and the low-resistance correction index of the storage unit is less than or equal to the preset threshold , then it is judged that the reading and writing functions are normal.

9. A fully automatic DRAM storage unit read / write function test method, used for using a fully automatic DRAM storage unit read / write function test system as claimed in any one of claims 1 to 8, characterized in that: The following steps are involved: Step S1: define storage units, and arrange the storage units in a matrix form to construct an automatic storage matrix; Step S2: storing the data in a storage unit corresponding to the address signal according to the address signal of the data; Step S3: reading data from the storage unit through a reader; Step S4: Compare the read data with the standard data provided by the data source, establish a data correction condition judgment model, and judge whether the data needs to be corrected; Step S5: Establishing a high-impedance state correction model to obtain a high-impedance state correction index; Step S6: establishing a low-resistance state correction model to obtain a low-resistance state correction index; Step S7: Calculate the difference between the high-resistance correction index and the low-resistance correction index of the memory cell; Step S8: Compare the difference between the high-resistance correction index and the low-resistance correction index of the storage unit with a preset threshold value to determine whether the read and write functions are normal.

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