Dual-separation-source multi-level converter and power supply system

Abstract

The application relates to the field of new energy and energy-saving technology, in particular to a double-separated-source multi-level converter and a power supply system, which mainly comprises double-separated-source converter units and a switched capacitor unit arranged in parallel; the switched capacitor unit is used for controlling the charging process or the discharging process of a direct-current capacitor corresponding to a capacitor switch at different positions according to the state of an accessed direct-current power supply and the needs of a load, and outputting voltages of different levels; the double-separated-source converter unit is used for accessing two direct-current power supplies; the double-separated-source converter unit comprises two inverter loops which are arranged in correspondence with the direct-current power supplies and are used for rectifying and boosting the voltages of different levels to generate alternating voltages meeting the needs of the load. The converter can adapt to various different working scenes and load requirements, and the flexibility and adaptability of the system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of new energy and energy saving, and particularly relates to a double separated source multi-level converter and a power supply system. BACKGROUND

[0002] With the rapid development of the world industry, the large use of traditional energy and the corresponding carbon emissions are gradually causing an insurmountable impact on the environmental sustainability of the world. In order to cope with these challenges, people are paying more and more attention to renewable new energy technologies, such as energy storage batteries, photovoltaic (PV) systems and hydrogen fuel cells, which have been widely concerned in the industry for promoting the development of decarbonization.

[0003] However, there are still some technical challenges for most renewable new energy power generation units. For example, in the power grid system, due to the diversity and complexity of the power generation units and loads, the bus output voltage is usually low and fluctuates, which requires the deployment of high-performance boost inverters to ensure the stable voltage level to meet the diversified load / grid requirements. The direct current side voltage of the traditional single-pole DC-AC inverter is required to be greater than the alternating current side voltage, and such a circuit topology is not suitable for low-voltage new energy power generation units, so a boost DC-DC converter is integrated between the low-voltage new energy power generation unit and the DC-AC inverter direct current end. Although it has advantages, the actual voltage gain capability of the combination is limited. In addition, the two-stage power conversion process also increases the loss and system complexity. In view of the above problems, some people have designed a new type of topology combining DC-DC converter and DC-AC converter: Z-source converter and single separated source converter (DSSI).

[0004] The Z-source converter uses an impedance network, which includes four passive elements and a diode, as a boost-buck inverter. However, the inductance and capacitance parameters of the converter are different in different application scenarios, which increases the complexity of actual deployment. At the same time, the output current of the direct current source is intermittent in the stable working state of the converter, which will have a great impact on the service life of the direct current source.

[0005] The topology of the single isolated source converter (DSSI) can realize the continuous stability of the output current of the DC source, and completely solve the fatal problem of the Z-source converter, but the topology structure still has many challenges, such as the excessive voltage stress on the switch tube, the need for larger volume and numerical DC capacitors to weaken the double-frequency ripple, and the need for larger volume and numerical filter devices to eliminate PWM harmonics. In addition, in the actual new energy system deployment scenario, external environmental factors need to be considered, for example, in the case of partial shading in the operation of the photovoltaic panel, the energy conversion efficiency of the single isolated source converter (DSSI) will be reduced, and the overall reliability of the power generation unit will be reduced. Therefore, the combination of multiple new energy power generation units and converters needs to be considered to improve the overall system reliability and efficiency, and the connection between the new energy power generation unit and the power electronic converter is mostly one-to-one, which is insufficient to cope with sudden environmental changes. SUMMARY

[0006] The technical problem to be solved by the present application is to provide a dual isolated source multi-level converter and a power supply system to solve the technical problems of insufficient strain capacity and small application range of the current converter.

[0007] The purpose of the present application is achieved by the following technical solutions:

[0008] In a first aspect, the present application provides a dual isolated source multi-level converter, comprising a dual isolated source converter unit and a switched capacitor unit arranged in parallel;

[0009] The switched capacitor unit is used to control the charging process or discharging process of the DC capacitor corresponding to the different position capacitor switches according to the state of the accessed DC power supply and the load requirement, and output different levels of voltage.

[0010] The dual isolated source converter unit is used to access two DC power supplies; comprising two inverter loops, the inverter loop is arranged corresponding to the DC power supply, used to rectify and boost different levels of voltage to generate an alternating voltage meeting the load demand.

[0011] As a further improvement of the present application, the switched capacitor unit comprises a plurality of switched capacitor sub-modules arranged in parallel, the switched capacitor network sub-module comprises a capacitor, at least one capacitor switch connected in series across the capacitor, and one capacitor switch connected in parallel across the capacitor; the capacitor switch controls the DC power supply in the dual isolated source converter unit; the capacitor of the switched capacitor sub-module is arranged on another switched capacitor sub-module and connected in series with the capacitor switch connected in parallel.

[0012] As a further improvement of the present application, the switch capacitor sub-module comprises a capacitor and a first capacitor switch, a second capacitor switch and a third capacitor switch; the first capacitor switch is connected in series with the capacitor as a first line; the second capacitor switch and the third capacitor switch are connected in series as a second line, and the second line is connected in parallel across the capacitor.

[0013] As a further improvement of the present application, the dual separated source converter unit comprises a first inverter loop and a second inverter loop connected in parallel;

[0014] The first inverter loop comprises a first inductor, a first diode, a second diode, a first switch and a second switch; the anode of the first diode is connected to the switch capacitor unit through the first switch, the cathode of the first diode and the cathode of the second diode are connected in parallel in the same direction, and then connected to the DC power supply through the first inductor; the anode of the second diode is connected to the switch capacitor unit through the second switch;

[0015] The second inverter loop comprises a second inductor, a third diode, a fourth diode, a third switch and a fourth switch; the cathode of the third diode is connected to the switch capacitor unit through the third switch, and the anode of the fourth diode is connected in parallel in the same direction, and then connected to the DC power supply through the second inductor; the cathode of the fourth diode is connected to the switch capacitor unit through the fourth switch.

[0016] As a further improvement of the present application, a fifth switch is further arranged in the first inverter loop and the second inverter loop, and the fifth switch is connected in parallel between the anode of the first diode and the cathode of the third diode.

[0017] As a further improvement of the present application, the first capacitor switch, the second capacitor switch and the third capacitor switch are all field effect tubes, MOS tubes or IGBT tubes.

[0018] The first switch, the second switch, the third switch, the fourth switch and the fifth switch are all field effect tubes, MOS tubes or IGBT tubes.

[0019] As a further improvement of the present application, the switch capacitor unit of the converter comprises two parallel switch capacitor sub-modules; the converter is configured in a positive half cycle and a negative half cycle of a period to generate a first effective voltage level, a second effective voltage level, a third effective voltage level and a fourth effective voltage level; the voltage value of the first effective voltage level is equal to the voltage value of the AC side; the value of the second effective voltage level is twice the voltage value of the AC side; the third effective voltage level is three times the voltage value of the AC side; and the fourth effective voltage level is zero voltage value.

[0020] As a further improvement of the present application, when the output voltage is in the first active voltage level state, the second capacitor switch in each switched capacitor sub-module is in an open state, the first capacitor switch and the third capacitor switch are in a closed state, the voltage of the capacitor in each switched capacitor sub-module is balanced, and any switch in the first inverter loop and the second inverter loop is in an open state.

[0021] When the output voltage is in the second active voltage level state, the first capacitor switch and the third capacitor switch in the first switched capacitor sub-module are in an open state, the second capacitor switch is in a closed state, the second capacitor switch in the other switched capacitor sub-module is in an open state, the first capacitor switch and the third capacitor switch are in a closed state, and any switch in the first inverter loop and the second inverter loop is in an open state.

[0022] When the output voltage is in the third active voltage level state, the first capacitor switch and the third capacitor switch in each switched capacitor sub-module are in an open state, the second capacitor switch is in a closed state, and any switch in the first inverter loop and the second inverter loop is in an open state.

[0023] When the output voltage is in the fourth active voltage level state, the second capacitor switch in each switched capacitor sub-module is in an open state, the first capacitor switch and the third capacitor switch are in a closed state, and the double isolated source converter unit satisfies any of the following conditions: the first switch and the second switch in the first inverter loop are in an open state, and the third switch and the fourth switch in the second inverter loop are in a closed state; the first switch and the second switch in the first inverter loop are in a closed state, and the third switch and the fourth switch in the second inverter loop are in an open state; the first switch and the second switch in the first inverter loop are in a closed state; the fourth switch and the fifth switch in the second inverter loop are in an open state.

[0024] As a further improvement of the present application, the converter uses a level shift PWM method to control the switched capacitor unit and the double isolated source converter unit, the level shift PWM method uses a positive reference voltage signal, a negative reference voltage signal, and a zero reference voltage signal; the positive reference voltage signal and the negative reference voltage signal are placed between the peak values of the sinusoidal reference wave and the triangular carrier.

[0025] In a second aspect, the present application provides a power supply system, which comprises a double isolated source multi-level converter and two direct current power sources, one end of the converter is used to connect to the two direct current power sources, and the other end is used to connect to a load, and the converter uses the double isolated source multi-level converter described above.

[0026] The beneficial effects of the present application are as follows: the dual-isolated-source multi-level converter of the present application, in which the switch capacitor unit can accurately control the charging and discharging process of the DC capacitor corresponding to the capacitor switch at different positions according to the DC power supply state and load demand, thereby outputting different levels of voltage. This makes the converter of the present application adaptable to various different working scenarios and load requirements, improving the flexibility and adaptability of the system. The two inverter circuits in the dual-isolated-source converter unit can rectify and boost different levels of voltage to generate AC voltage that meets the load demand, and the two inverter circuits of the dual-isolated-source converter unit are independent of each other, which can improve the reliability and fault tolerance of the system. If one inverter circuit fails, the other inverter circuit can still work, ensuring normal power supply to the load. This multi-level conversion method can provide a smoother output voltage waveform, reduce voltage harmonic content, and improve power quality. The design of connecting two DC power supplies in the converter of the present application makes full use of energy from different sources, improving the overall energy utilization efficiency. The design of the switch capacitor unit can reduce the influence of voltage fluctuation of the DC power supply on the output voltage, improving the stability and reliability of the system. At the same time, the capacitor in the switch capacitor unit can play a filtering role, reducing the ripple in the output voltage and improving the power quality.

[0027] Further, the plurality of parallelly arranged switch capacitor sub-modules provide rich voltage regulation means for the system. By controlling the capacitor switches in different sub-modules, the charging and discharging state of the capacitor can be accurately adjusted, thereby outputting different levels of voltage to meet the needs of various loads.

[0028] Further, by controlling the state of the three capacitor switches, different circuit combinations can be realized. Different connection modes of the first and second lines can realize fine control of the charging and discharging process of the capacitor. According to actual needs, fast charging, slow discharging or other specific charging and discharging modes can be selected, improving the flexibility and adaptability of the system. The use of switch capacitor structure significantly improves the output voltage of the system, reduces harmonic content and voltage stress on the switch tube. BRIEF DESCRIPTION OF DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiment or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0030] Fig. 1(a) is a generalized N-level configuration diagram of the current of the dual-input isolated multi-level inverter in the embodiment of the present application;

[0031] Fig. 1(b) is a proposed 7-level configuration diagram of the current diagram of the double-input isolated multi-level inverter in the embodiment of the present application;

[0032] Fig. 2(a) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the first effective voltage level in the positive half cycle;

[0033] Fig. 2(b) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the first effective voltage level in the negative half cycle;

[0034] Fig. 2(c) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the second effective voltage level in the positive half cycle;

[0035] Fig. 2(d) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the second effective voltage level in the negative half cycle;

[0036] Fig. 2(e) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the third effective voltage level in the positive half cycle;

[0037] Fig. 2(f) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the third effective voltage level in the negative half cycle;

[0038] Fig. 2(g) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the fourth effective voltage level in the positive half cycle;

[0039] Fig. 2(h) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the fourth effective voltage level in the negative half cycle;

[0040] Fig. 2(i) is a circuit diagram of the converter topology provided by the embodiment of the present application when the output is the standard zero voltage level;

[0041] Figure 3 is a curve diagram of the improved phase-shifted PWM method of the topology provided by the embodiment of the present application;

[0042] Figure 4 is a steady-state waveform diagram of the upper and lower source voltages and the inductor current when the upper input source is working in the embodiment of the present application;

[0043] Figure 5 is a steady-state waveform diagram of the load voltage Vo, the AC side voltage, the load current io and the output inverter voltage Vab when the double-input source is working in the embodiment of the present application;

[0044] Figure 6 is a steady-state waveform diagram of the upper and lower source voltages and the inductor current when the upper input source is working in the embodiment of the present application;

[0045] Figure 7is a steady-state waveform diagram of the upper and lower source voltage and inductor current when the lower input operation is provided by the embodiment of the present application;

[0046] Figure 8 is a steady-state waveform of the load voltage Vo, AC side voltage, load current io and output inverter voltage Vab when only single input source works, provided by the embodiment of the present application;

[0047] Figure 9 is a voltage curve schematic diagram of the switching capacitors C1, C2 and C3, provided by the embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to make the purpose and technical solutions of the present application clearer and more convenient to understand, the present application will be further described in detail below in combination with the drawings and embodiments, and the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

[0049] Related term explanation:

[0050] Switching Capacitor Multilevel: Switching Capacitor Multilevel technology, mainly through the control of a series of switch and capacitor combination to realize different levels of output. Its basic principle is to use the charging and discharging of the capacitor to build multiple different voltage levels;

[0051] Dual Input Split Source Inverter: Dual Input Split Source Inverter;

[0052] PWM (Pulse Width Modulation): Pulse Width Modulation.

[0053] The technical solutions of the present application will be described clearly and completely below in combination with the drawings and specific embodiments, and the described embodiments are only a part of the embodiments of the present application, not all the embodiments.

[0054] Embodiment 1

[0055] As shown in FIG. 1- Figure 9 The present embodiment provides a dual split source multilevel converter, mainly including a series-connected dual split source converter unit and a switching capacitor unit;

[0056] The switching capacitor unit (Switching Capacitor Multilevel) is used to control the charging process or discharging process of the DC capacitor corresponding to the capacitor switch at different positions according to the state of the connected DC power supply and the needs of the load, and output different levels of voltage;

[0057] The dual input split source inverter is used for connecting two DC power sources; it includes two inverter loops, which are arranged corresponding to the DC power sources, for rectifying and boosting the voltage of different levels to generate AC voltage meeting the demand of the load. Each input DC source is defined by a set voltage or current standard.

[0058] The switch capacitor unit includes N (N≥2) switch capacitor sub-modules arranged in parallel, each of which includes a capacitor C, at least one capacitor switch S connected in series to the capacitor, and one capacitor switch arranged in parallel to the capacitor; the capacitor switches control the DC power sources in the dual input split source inverter. The capacitor in the switch capacitor sub-module is arranged in series to the capacitor switch in another switch capacitor sub-module. The switch capacitor sub-module is in the form of a switch capacitor network, and the structure scalability can be enhanced by gradually increasing the number of SC stages. According to the switch position, the DC capacitor can be arranged in series or in parallel to realize various output voltage levels. The output voltage levels and the required number of switches and capacitors are described in detail in the subsequent steps. The subsequent circuit is arranged in a 3-stage configuration.

[0059] The switch capacitor sub-module includes a capacitor C1 and first, second and third capacitor switches S 11 , S 12 and S 13 ; the first capacitor switch S 11 is arranged in series to the capacitor C T as a first line; the second capacitor switch S 12 and the third capacitor switch S 13 are arranged in series as a second line, and the second line is arranged in parallel to the capacitor C T at both ends. In this embodiment, the capacitor C2 in another switch capacitor sub-module is also arranged in parallel in the switch capacitor sub-module, one end of which is connected to the capacitor C1 through the first capacitor switch S 11 , and the other end is arranged between the second capacitor switch S 12 and the third capacitor switch S 13 . The other switch capacitor sub-modules in this embodiment are arranged in this way until the last capacitor CN is arranged between the second capacitor switch and the third capacitor switch in the adjacent switch capacitor sub-module and is connected to the capacitor in the adjacent switch capacitor sub-module through the first capacitor switch.

[0060] Specifically, there are three switch capacitor sub-modules in this embodiment, and the capacitor C2 in the second switch capacitor sub-module is arranged in series to the capacitor switch S 21 , and the capacitor switch S 22 , the capacitor switch S23 The line after being arranged in series, the capacitor C2 arranged in parallel, one end of the third capacitor C3 arranged between the capacitor switch S 22 , the capacitor switch S 23 , and the other end connected with the capacitor C2 through the capacitor switch S 21 .

[0061] The dual separated source converter unit comprises a first inverter loop and a second inverter loop arranged in parallel;

[0062] The first inverter loop comprises a first inductor L1, a first diode D 11 , a second diode D 12 , a first switch S3 and a second switch S4; the anode of the first diode D 11 is connected to the switch capacitor unit through the first switch S3, and the cathode of the first diode D 11 is arranged in parallel with the cathode of the second diode D 12 in the same direction, and is connected to the direct current power supply V in1 through the first inductor L1 after being arranged in parallel, and the anode of the second diode D 12 is connected to the switch capacitor unit through the second switch S4; wherein the first direct current power supply V in1 is also connected with the switch capacitor unit. At this time, the first direct current power supply V in1 , the first switch S3, the first diode D 11 and the first inductor L1 form a first boost circuit; the first direct current power supply V in1 , the second switch S4, the second diode D 12 and the first inductor L1 form a second boost circuit. The first direct current power supply V in1 composes a boost circuit through the first switch S3 (or the second switch S4), the inductor L1 and the diodes D 11 and D 12 .

[0063] The second inverter loop comprises a second inductor L2, a third diode D 21 , a fourth diode D 22 , a third switch S1 and a fourth switch S2; the cathode of the third diode D 21 is connected to the switch capacitor unit through the third switch S1, and the anode is arranged in parallel with the anode of the fourth diode D 22 in the same direction, and is connected to the direct current power supply V in2 through the second inductor after being arranged in parallel; the cathode of the fourth diode D 22 is connected to the switch capacitor unit through the fourth switch S2. Similarly, the second direct current power supply V in1 composes a boost circuit through the third switch S3 (or the second switch S4), the inductor L1 and the diodes D 11 and D 12To form a boost circuit.

[0064] Second DC power supply V in2 Third switch S1, third diode D 21 The second inductor L2 forms the third boost circuit; the second DC power supply V in2 Fourth switch S2, fourth diode D 22 And the second inductor L2 forms the fourth boost circuit.

[0065] The first inverter circuit and the second inverter circuit are also equipped with a fifth switch S5, which is connected in parallel with the first diode D. 11 anode and third diode D 21 Between the cathodes.

[0066] The load resistor is set at the output of the dual-source converter unit.

[0067] In this embodiment, the generalized N-stage configuration of the SC-DSSMLI topology is shown in Figure 1(a). This structure is carefully designed and comprises two basic parts: an improved dual-input split-source inverter (DSSI) and a generalized switched-capacitor (GSC) network. The primary branch of the DSSI employs a unique three-switch layout, while the secondary branch uses a two-switch structure. Power is supplied from two different input sources VS. in1 and V in2 For transmission, each input is defined by specific voltage and current standards. Furthermore, the number of these input sources is independent of the desired number of output levels, providing flexibility in system configuration without being limited by the number of output levels. The GSC network consists of multiple switched-capacitor (SC) units, and n SC units can be connected in the proposed topology to increase the output voltage level. Each SC unit consists of a series / parallel combination of capacitors and switches, specifically including one capacitor (CT) and three switches (S). T1 S T2 and S T3 The modularity of this architecture allows for a systematic expansion of the inverter's voltage levels by progressively increasing the number of stacked SC units. This inherent scalability and configuration flexibility are key features of the proposed topology, enabling the inverter to be customized to specific application requirements, whether increasing the voltage level or enhancing output accuracy. Figure 1(b) illustrates in detail the specific implementation of the 7-level configuration in the proposed SC-DSSMLI topology. This configuration, by including two SC units (n=2), demonstrates the modularity and adaptability of the system, highlighting the ease of topology expansion.

[0068] All capacitor switches and switches in this embodiment are made of field-effect transistors, MOSFETs, or IGBTs.

[0069] According to the structure of the converter in this embodiment, the converter's operating state is configured to generate a first effective voltage level, a second effective voltage level, a third effective voltage level, and a fourth effective voltage level within the positive half-cycle and negative half-cycle of one cycle. The voltage value of the first effective voltage level is equal to the AC side voltage value; the value of the second effective voltage level is twice the AC side voltage value; the value of the third effective voltage level is three times the AC side voltage value; and the value of the fourth effective voltage level is zero.

[0070] As shown in Figures 2(a) and 2(b), when the output voltage is at the first effective voltage level, the second capacitor switches in each switched capacitor submodule are all open, while the first and third capacitor switches are all closed. The voltage distribution of the capacitors in each switched capacitor submodule is balanced, and any switch in the first inverter circuit or the second inverter circuit is open. At this time, capacitors C1, C2, and C3 in each switched capacitor submodule are connected in parallel, so the voltages across each capacitor are equal, i.e., the voltage distribution across the capacitors is balanced. Therefore, the balanced capacitor voltage makes the AC side output voltage exactly equal to the voltage of the output inverter circuit, i.e., V. ab =±V cn This achieves the desired voltage state.

[0071] As shown in Figures 2(c) and 2(d), when the output voltage is at the second effective voltage level, the first and third capacitor switches in the first switched capacitor submodule are open, and the second capacitor switch is closed; and in the other switched capacitor submodule, the second capacitor switch is open, the first and third capacitor switches are closed, and any switch in the first and second inverter circuits is open; at this time, capacitor C2 in the second switched capacitor submodule and capacitor C3 in the third switched capacitor submodule are connected in parallel, and then connected in series with capacitor C1 in the first switched capacitor submodule. Therefore, the total voltage is {V C1 +(V C2 / / V C3 (Here, / / indicates parallel connection, and in the calculation process, it represents V) C1 +V C2 or V C1 +V C3 The final output inverter circuit voltage satisfies V ab =±2 V cn .

[0072] As shown in Figures 2(e) and 2(f), when the output voltage is at the third effective voltage level, the first and third capacitor switches in each switched capacitor submodule are open, the second capacitor switch is closed, and any switch in the first and second inverter circuits is open. At this time, capacitors C1, C2, and C3 in each switched capacitor submodule are connected in series. Therefore, the total equivalent voltage becomes {V C1 +V C2 +V C3 This allows the desired output voltage V to be achieved. ab =±3 V cn .

[0073] As shown in Figures 2(g), 2(h), and 2(i), when the output voltage is at the fourth effective voltage level, the second capacitor switch in each switched capacitor submodule is open, and the first and third capacitor switches are closed. The dual-source converter unit satisfies any of the following conditions: the first and second switches in the first inverter circuit are open, and the third and fourth switches in the second inverter circuit are closed; the first and second switches in the first inverter circuit are closed, and the third and fourth switches in the second inverter circuit are open; the first and second switches in the first inverter circuit are closed; and the fourth and fifth switches in the second inverter circuit are open. In the zero-voltage state, as shown in Figure 2(g), the DC capacitor is charged using a lower input voltage. As shown in Figure 2(h), the first DC power supply V... in1 To promote capacitor charging and achieve voltage balance among the capacitors, capacitors C1, C2, and C3 must be connected in parallel to ensure that each capacitor reaches an equal voltage level. Figure 2(i) shows the standard zero-voltage state. To further clarify the switching states, capacitor connections, and their corresponding effects on the inverter output voltage, Table 1 provides a detailed and comprehensive overview of the operation of this topology.

[0074] Table 1

[0075]

[0076] Table 1 shows the switching state, capacitor connection, and inverter output voltage of the 7-level SC-DSSMLI, where (↑) indicates charging, (↓) indicates discharging, and (-) indicates no effect.

[0077] like Figure 3As shown, this embodiment uses a level-shifted PWM method to control the switched capacitor unit and the dual-source converter unit. The level-shifted PWM method includes three reference signals and six triangular carrier waves. Specifically, the level-shifted PWM method uses a positive reference voltage signal, a negative reference voltage signal, and a zero reference voltage signal; the positive and negative reference voltage signals are placed between the peak values ​​of the sinusoidal reference wave and the triangular carrier waves. The design includes a voltage boosting strategy, where a constant positive reference voltage signal +V... const and negative reference voltage signal -V const In the sinusoidal reference wave V sine and triangular carrier V tri The peak values ​​are placed between these values. This configuration uses a fixed reference voltage +V. const and -V const With triangular carrier V tri The charging duty cycle D of the upper and lower inductors is controlled by comparison.

[0078] The simulation results were obtained after performing the simulation based on the converter topology described above. Figure 4 , Figure 5 The input voltage and current of the converter (SC-DSSMLI) in this embodiment are clearly shown, demonstrating its efficient and reliable design. The continuous curve of the input current highlights the inherent advantages of the efficient design and configuration of the SC-DSSMLI. Figures 4-7 The steady-state waveform is shown, illustrating the AC-side voltage generated by a carefully designed switched-capacitor circuit. Notably, the AC-side voltage waveform V... inv The circuit features a three-tiered configuration, with each tier corresponding to a different operational stage. The calculated input voltage is 30V, while the AC voltage amplitude is 450V, resulting in a boost factor of 15. This tiered configuration on the AC side affects the output inverter voltage V. ab This has been verified, as shown in the figure below. The reproduction of these steps in the output voltage curve indicates that the inverter employs a well-controlled switching strategy. When evaluating inverter performance, particular emphasis was placed on the output voltage V at unity power factor. o This is a key parameter for evaluating the efficiency of power conversion systems. During the voltage analysis, the output current i under steady-state conditions was also rigorously examined. o Synchronous analysis of voltage and current curves is crucial for a comprehensive understanding of inverter operation and its impact on overall power converter performance.

[0079] Furthermore, the SC-DSSMLI configuration offers a significant advantage due to its ability to operate with single or dual input sources as needed, utilizing top, bottom, or simultaneous inputs. Figure 6 , Figure 7 and Figure 8The main concepts of SC-DSSMLI are clearly demonstrated, showcasing its operational capabilities and performance in three different scenarios. This flexibility highlights the effectiveness of this configuration in various operating environments. In single-input operation, slight variations in the AC-side voltage occur, while the DC source current remains within the 8A limit, resulting in lower output power compared to the dual-input scenario.

[0080] Figure 9 Continuous monitoring of the switched capacitor voltage is shown. The results indicate that the voltage remains stable and balanced, with only slight fluctuations or voltage ripples. This stability is crucial for producing a stable and predictable output waveform. The system includes two distinct boost circuits that play a key role in maintaining voltage balance. These configurations are designed to ensure equal voltage during the switched capacitor charging process, which is essential for efficient system operation and prevents any single capacitor from being overcharged or undercharged relative to the others. By keeping the voltage of all capacitors equal, overall efficiency and reliability are improved, ensuring a regular and stable output waveform.

[0081] Example 2

[0082] This embodiment provides a power supply system, including a dual-source multilevel converter and two DC power sources. One end of the converter is used to connect to the two DC power sources, and the other end is used to connect to a load. The converter is the dual-source multilevel converter described in Embodiment 1 above. The DC power sources are new energy power generation units, such as photovoltaic power generation units, wind power generation units, etc.

Claims

1. A dual-source multilevel converter, characterized in that, This includes a dual-source converter unit and a switched capacitor unit connected in parallel; The switched capacitor unit is used to control the charging or discharging process of the DC capacitor corresponding to the capacitor switch at different positions according to the state of the connected DC power supply and the load requirements, and output different levels of voltage. The dual-source converter unit is used to connect to two DC power supplies; it includes two inverter circuits, which are set up corresponding to the DC power supplies to rectify and boost voltages of different levels to generate AC voltages that meet the load requirements. The switched capacitor unit includes several switched capacitor sub-modules, and each switched capacitor sub-module includes a capacitor, a first capacitor switch, a second capacitor switch, and a third capacitor switch. One end of the capacitor is used to connect to the drain of the third capacitor switch, and the other end is used to connect to the source of the first capacitor switch. It is also connected to the drain of the second capacitor switch. The drain of the first capacitor switch is connected to one end of the capacitor of the second switched capacitor submodule. The source of the second capacitor switch is connected to the other end of the capacitor of the second switched capacitor submodule; The source of the third capacitor switch is connected to the drain of the third capacitor switch of the second switched capacitor submodule; When the output voltage is at the first effective voltage level, the second capacitor switch in each switched capacitor submodule is in the open state, the first capacitor switch and the third capacitor switch are in the closed state, the voltage distribution of the capacitors in each switched capacitor submodule is balanced, and any switch in the first inverter circuit and the second inverter circuit is in the open state. When the output voltage is at the second effective voltage level, the first and third capacitor switches in the first switched capacitor submodule are in the open state, and the second capacitor switch is in the closed state; and the second capacitor switch in the other switched capacitor submodule is in the open state, the first and third capacitor switches are in the closed state, and any switch in the first inverter circuit and the second inverter circuit is in the open state. When the output voltage is at the third effective voltage level, the first capacitor switch and the third capacitor switch in each switched capacitor submodule are in the open state, the second capacitor switch is in the closed state, and any switch in the first inverter circuit and the second inverter circuit is in the open state. When the output voltage is at the fourth effective voltage level, the second capacitor switch in each switched capacitor submodule is in the open state, and the first and third capacitor switches are in the closed state. The dual-separated source converter unit satisfies any of the following conditions: the first and second switches in the first inverter circuit are in the open state, and the third and fourth switches in the second inverter circuit are in the closed state; the first and second switches in the first inverter circuit are in the closed state, and the third and fourth switches in the second inverter circuit are in the open state; the first and second switches in the first inverter circuit are in the closed state; and the fourth and fifth switches in the second inverter circuit are in the open state.

2. The dual-source multilevel converter according to claim 1, characterized in that, The dual-split source converter unit includes a first inverter circuit and a second inverter circuit connected in parallel. The first inverter circuit includes a first inductor, a first diode, a second diode, a first switch, and a second switch; one end of the first inductor is connected to the negative terminal of the DC power supply, and the other end is connected to the cathode of the first diode and the cathode of the second diode; the anode of the first diode is connected to the source of the first switch, the drain of the first switch is connected to the positive terminal of the DC power supply and also to the drain of the second switch, and the anode of the second diode is connected to the source of the second switch. The second inverter circuit includes a second inductor, a third diode, a fourth diode, a third switch, and a fourth switch; One end of the second inductor is connected to the positive terminal of the DC power supply, and the other end is connected to the anode of the third diode and the anode of the fourth diode. The cathode of the third diode is connected to the drain of the third switch, the source of the third switch is connected to the negative terminal of the DC power supply and also to the source of the fourth switch, and the cathode of the fourth diode is connected to the drain of the fourth switch.

3. The dual-source multilevel converter according to claim 2, characterized in that, A fifth switch is also provided in the first inverter circuit and the second inverter circuit. The fifth switch is connected in parallel between the anode of the first diode and the cathode of the third diode.

4. The dual-source multilevel converter according to claim 1, characterized in that, The first capacitor switch, the second capacitor switch, and the third capacitor switch all use field-effect transistors; The first, second, third, fourth, and fifth switches all use field-effect transistors.

5. The dual-source multilevel converter according to claim 4, characterized in that, The field-effect transistor is either a MOSFET or an IGBT.

6. The dual-source multilevel converter according to claim 1, characterized in that, The switched capacitor unit of the converter includes three switched capacitor sub-modules connected in parallel; the converter is configured to generate a first effective voltage level, a second effective voltage level, a third effective voltage level, and a fourth effective voltage level within the positive half-cycle and the negative half-cycle of one cycle. The voltage value of the first effective voltage level is equal to the AC side voltage value; The value of the second effective voltage level is twice the AC side voltage value; The third effective voltage level is three times the AC side voltage value; The fourth effective voltage level is zero voltage.

7. The dual-source multilevel converter according to claim 6, characterized in that, The converter uses a level-shifted PWM method to control the switched capacitor unit and the dual-source converter unit. The level-shifted PWM method uses a positive reference voltage signal, a negative reference voltage signal, and a zero reference voltage signal. The positive reference voltage signal and the negative reference voltage signal are placed between the peak values ​​of the sine reference wave and the triangular carrier wave.

8. A power supply system, characterized in that, The invention includes a dual-source multilevel converter and two DC power sources. One end of the converter is used to connect to the two DC power sources, and the other end is used to connect to a load. The converter is the dual-source multilevel converter as described in any one of claims 1 to 7.

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