Display substrate, manufacturing method thereof and display device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2024-11-29
- Publication Date
- 2026-08-07
AI Technical Summary
[0004]本发明实施例提供一种显示基板及其制作方法、显示装置,用于解决现有的拼接曝光方式难以满足全部大尺寸产品的拼接曝光需求的问题
[0025] In this embodiment of the invention, by setting the pattern of the second trace used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first trace used to connect the gate driving unit (Gate COF/GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, which improves the flexibility of splicing exposure and is suitable for more display products.
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Figure CN119414638B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of display technology, and in particular to a display substrate, a method for manufacturing the same, and a display device. Background Technology
[0002] Various display devices have become an indispensable part of our daily lives. Thin Film Transistor Liquid Crystal Displays (TFT-LCDs) are widely used due to their mature production technology, diverse product forms, and high reliability. In today's rapidly developing display technology, consumers have an increasingly strong demand for high-definition, large-size display devices. However, for G8.5 displays, the effective area of a conventional mask is only 1320*1108mm. To achieve large-size (≥65-inch) TFT-LCD displays, a splicing exposure method must be used.
[0003] Currently, the most common splicing exposure methods are Field Diaphragm Edge (FDE) + Variable Field Stop (VFS). The VFS baffle can move within a certain range to control the position of the splicing exposure area. However, since the coverage area of VFS is limited, it cannot meet the splicing exposure needs of all large-size products. Summary of the Invention
[0004] This invention provides a display substrate and its manufacturing method, as well as a display device, to solve the problem that existing splicing exposure methods cannot meet the splicing exposure requirements of all large-size products.
[0005] To solve the above-mentioned technical problems, the present invention is implemented as follows:
[0006] In a first aspect, embodiments of the present invention provide a display substrate, including a display area and a non-display area. The non-display area is provided with a plurality of gate driving units, a plurality of data driving units, and traces. The traces include a first trace for connecting the gate driving units and the data driving units, and a second trace for connecting different data driving units. The non-display area includes a plurality of non-stitched exposure areas and a stitched exposure area located between the non-stitched exposure areas. The traces in the non-stitched exposure areas are formed by a single exposure, and the traces in the stitched exposure areas are formed by multiple exposures. The pattern of the second trace in the stitched exposure area is the same as the pattern of the first trace.
[0007] Optionally, the second trace in the non-spliced exposure area is a single film layer.
[0008] Optionally, the second trace in the splicing exposure area is connected to the second trace in the non-splicing exposure area.
[0009] Optionally, the first trace includes at least one of the following: a clock signal CLK line, a frame start signal STV line, and a power supply VDD line;
[0010] and / or
[0011] The second trace is the common electrode COM trace.
[0012] In a second aspect, embodiments of the present invention provide a display device, including a display substrate as described in the first aspect above.
[0013] Thirdly, embodiments of the present invention provide a method for manufacturing a display substrate, the display substrate including a display area and a non-display area, the non-display area including a plurality of non-stitching exposure areas and a stitching exposure area located between the non-stitching exposure areas, the manufacturing method including:
[0014] Multiple gate driving units, multiple data driving units, and traces are formed in the non-display area. The traces include a first trace for connecting the gate driving units and the data driving units, and a second trace for connecting different data driving units.
[0015] The traces in the non-stitched exposure area are formed by a single exposure, while the traces in the stitched exposure area are formed by multiple exposures. The pattern of the second trace in the stitched exposure area is the same as the pattern of the first trace.
[0016] Optionally, forming traces in the non-display area includes:
[0017] Forming a metal film;
[0018] A photoresist layer is formed on the metal film layer;
[0019] The photoresist layer is exposed using a splicing exposure machine and a mask. The photoresist layer is spliced and exposed by moving the mask. The photoresist layer in the non-spliced exposure area is exposed once, and the photoresist layer in the spliced exposure area is exposed multiple times.
[0020] The exposed photoresist layer is developed to form a photoresist layer pattern;
[0021] The metal film layer not covered by the photoresist layer pattern is etched to form the second trace.
[0022] Optionally, the stitching exposure machine adopts a field aperture edge (FDE) and variable area masking (VFS) structure, and the stitching exposure area corresponds to the VFS.
[0023] Optionally, the second trace in the non-spliced exposure area is a single film layer.
[0024] Optionally, the second trace in the splicing exposure area is connected to the second trace in the non-splicing exposure area.
[0025] In this embodiment of the invention, by setting the pattern of the second trace used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first trace used to connect the gate driving unit (Gate COF / GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, which improves the flexibility of splicing exposure and is suitable for more display products. Attached Figure Description
[0026] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:
[0027] Figure 1 This is a schematic diagram of the structure of the splicing exposure machine according to an embodiment of the present invention;
[0028] Figure 2 This is a schematic diagram illustrating the exposure principle of the mask in an embodiment of the present invention.
[0029] Figure 3 This is a schematic diagram of a method for splicing and exposing a display substrate according to an embodiment of the present invention;
[0030] Figure 4 This is a schematic diagram of the circuit design for the non-display area of the display substrate in the relevant scheme;
[0031] Figure 5 This is a schematic diagram of the manufacturing method of the display substrate in the relevant scheme;
[0032] Figure 6 This is a schematic flowchart of a method for manufacturing a display substrate according to an embodiment of the present invention;
[0033] Figure 7 This is a schematic diagram of the structure of a display substrate according to an embodiment of the present invention;
[0034] Figure 8 This is a schematic diagram of the structure of a display substrate according to another embodiment of the present invention;
[0035] Figure 9 This is a schematic diagram illustrating a method for manufacturing a display substrate according to an embodiment of the present invention. Detailed Implementation
[0036] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0037] The principle of the splicing exposure machine will be explained below.
[0038] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of the splicing exposure machine according to an embodiment of the present invention. Several concepts related to the splicing exposure machine are introduced below:
[0039] Lens: Also known as a projection lens, a stitching exposure machine includes multiple lenses arranged in an array. Please refer to [reference needed]. Figure 1 The exposure machine includes 11 lenses (M1 to M11) arranged in two rows. Adjacent lenses in the same row are arranged with intervals. In lenses in different rows, the center of one lens and the center of the gap between two adjacent lenses in the other row are on a straight line.
[0040] Field Diaphragm Edge (FDE), such as Figure 1 As shown, the light intensity in the energy transition gray area at the edge of the lens gradually changes from 100% to 0% from the center of the lens outwards. When different energy transition gray areas of the lenses are superimposed, the light intensity at all locations is consistent with that at the center of the lens.
[0041] Variable Field Stop (VFS): The VFS is set on the blind, and its movable blocking area is located within a certain range near the center of M2 and M10 (the effective movement range of the VFS is 80mm); the light intensity of the VFS blocking area gradually changes from 0% to 100% from the center of the blind outwards; the VFS+FDE or VFS+VFS splicing exposure method can achieve the superposition of the light intensity of the two exposures, so that the light intensity is consistent with the center of the lens.
[0042] Blind: that is Figure 1 The X Blind and Y Blind in the diagram are used to control the exposure area.
[0043] Figure 2 This is a schematic diagram illustrating the exposure principle of the mask in an embodiment of the present invention. Figure 2 As can be seen, during exposure, the components from top to bottom are the Mask, Lens, and substrate (plate, such as a glass substrate). The exposure light is emitted by the equipment and projected onto the substrate through the Mask and Lens. Figure 2 As can be seen, the pattern on the substrate is formed through four splicing exposures.
[0044] Please refer to Figure 3 , Figure 3 This is a schematic diagram of a method for splicing and exposing a display substrate according to an embodiment of the present invention, wherein, Figure 3 On the left is the splicing exposure machine, in the middle is the photomask, and on the right is the pattern formed on the display substrate by exposure. (Example) Figure 3 As shown, the splicing line in the splicing exposure of this embodiment is not a single line, that is, it is not a seamless splicing in a geometric sense, but actually a region. Figure 3 The areas where 1 and 2 are located (in this embodiment of the invention) are also referred to as the splicing exposure area or the splicing gray area.
[0045] The splicing exposure area in this embodiment of the invention needs to meet the following conditions:
[0046] 1. The pattern at the bottom of region A is exactly the same as the pattern at the top of region B, that is, the patterns in each region 1 are the same, and the patterns in each region 2 are the same.
[0047] 2. After the lower end of region A and the upper end of region B are stitched together, the light intensity passing through the stitched exposure area is exactly the same as that of the non-stitched exposure area, thus achieving the uniformity of the effective pattern.
[0048] The design of the mask used for stitching exposures must meet the following requirements:
[0049] 1. Consider the display area (AA). Area C must be an integer multiple of the pixel setting area.
[0050] 2. Considering the GOA (Gate On Array, the gate driving area is integrated on the display substrate), the area C must be an integer multiple of the minimum period of the GOA.
[0051] 3. Considering the OLB (Outer Lead Bonding) pad and sector pattern on the data DP side, region C must be an integer multiple of COF (Chip On Flex, or Chip On Film). The DP side can also be described as the Data Pad side, i.e., the data line bonding area side.
[0052] like Figure 4 The diagram shows the circuit design of the non-display area of the display substrate in a related solution. The COF signal lines (i.e., PLG (Pattern line on Glass) traces in the left / right areas of the lower non-display area of the display substrate involve communication signals between the Data COF unit and the Gate COF / GOA unit, making the pattern design relatively complex. The traces between COFs in the middle area of the lower non-display area of the display substrate only involve communication signals between Data COFs (generally COM signal lines), and the pattern design is simpler (COM signal lines are generally made of a single piece of metal, which helps reduce the external COM resistance and ensures uniform COM voltage within the display area). Therefore, considering the inconsistency between the pattern designs of the left / right areas and the middle area, conventional splicing exposure requires the splicing exposure area to be located in the middle area; that is, the patterns at the bottom of area A and the top of area B must be exactly the same. This splicing exposure method has low flexibility and cannot achieve splicing exposure for all products. For example, if the VFS exposures are located in the left and middle areas respectively, splicing exposure cannot be performed. Furthermore, due to the limitations of the aforementioned splicing exposure area, the number of splicing exposures is relatively high, such as... Figure 5 As shown, taking the B10 86-inch product as an example, four vertical exposures are required to form a complete 86-inch display substrate. Figure 5 In the image, the left side shows the photomask, and the right side shows the pattern of the display substrate formed after four exposures.
[0053] To solve the above problems, please refer to... Figure 6 This invention provides a method for manufacturing a display substrate, the display substrate including a display area and a non-display area (please refer to...). Figure 7 The display substrate includes a display area 10 and a non-display area 20. The non-display area includes multiple non-splicing exposure areas and splicing exposure areas located between the non-splicing exposure areas. (Refer to...) Figure 3 , Figure 3 In the diagram, the areas containing regions 1 and 2 are the stitched exposure areas, while the other areas are the non-stitched exposure areas. The fabrication method includes:
[0054] Step S1: Form multiple gate driving units, multiple data driving units, and traces in the non-display area. The traces include a first trace for connecting the gate driving units and the data driving units, and a second trace for connecting different data driving units. The traces in the non-stitched exposure area are formed by a single exposure, and the traces in the stitched exposure area are formed by multiple exposures. The pattern of the second trace in the stitched exposure area is the same as the pattern of the first trace.
[0055] The gate driving unit can be a Gate COF / GOA, and the data driving unit can be a Data COF.
[0056] The first routing can be referenced. Figure 7 Optionally, the first trace includes at least one of the following: a clock signal (CLK) line, a frame start signal (STV) line, and a power supply (VDD) line.
[0057] Optionally, the second trace can be a common electrode (COM) trace.
[0058] In this embodiment of the invention, the pattern of the second trace in the splicing exposure area being the same as the pattern of the first trace includes: the line width, line spacing, and number of lines of the second trace in the splicing exposure area being the same as the line width, line spacing, and number of lines of the first trace.
[0059] In this embodiment of the invention, by setting the pattern of the second trace used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first trace used to connect the gate driving unit (Gate COF / GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, which improves the flexibility of splicing exposure and is suitable for more display products.
[0060] For example, taking the B10 75-inch display product as an example, the display substrate specifications are provided to the customer, and its splicing exposure area is located in the COF area on the left / right side. Because the pattern of the wiring in the conventional COF area is inconsistent with the pattern of the wiring in the middle COF area, the conventional splicing exposure method cannot achieve the desired exposure solution. In this embodiment of the invention, since the pattern of the wiring in the COF area is consistent with the pattern of the wiring in the middle COF area, the splicing exposure area can be set in the COF areas on the left and right sides of the non-display area, or it can be set in the middle COF area, which increases the compatibility of the display product and enables the diversification of splicing products.
[0061] Furthermore, conventional splicing exposure methods limit the splicing exposure area to the central COF portion, resulting in a smaller splicing area and requiring more exposure cycles for the same size. In contrast, the splicing exposure method in this invention is not limited by the COF, allowing the effective pattern to cover the entire mask's effective exposure area. This results in a larger splicing area and fewer exposure cycles required for products of the same size, increasing factory productivity. For example, an 85-inch B10 display product requires only 6 exposures, while conventional splicing exposure methods require 8, saving 25% in production capacity.
[0062] In this embodiment of the invention, optionally, forming traces in the non-display area includes:
[0063] Step S11: Form a metal film layer;
[0064] Step S12: Form a photoresist layer on the metal film layer;
[0065] Step S13: Expose the photoresist layer using a splicing exposure machine and a mask, wherein the photoresist layer is spliced and exposed by moving the mask, the photoresist layer in the non-spliced exposure area is exposed once, and the photoresist layer in the spliced exposure area is exposed multiple times;
[0066] Step S14: Develop the exposed photoresist layer to form a photoresist layer pattern;
[0067] Step S15: Etch the metal film layer that is not covered by the photoresist layer pattern to form the second trace.
[0068] In this embodiment of the invention, optionally, the first trace and the second trace can also be formed using the same metal film layer. In this case, in step S15 above, the metal film layer not covered by the photoresist layer pattern is etched to form the first trace and the second trace.
[0069] In this embodiment of the invention, optionally, the stitching exposure machine adopts a field aperture edge (FDE) and variable area masking (VFS) structure, and the stitching exposure area corresponds to the VFS.
[0070] In this embodiment of the invention, optionally, the second trace in the non-stitched exposure area is a single film layer, thereby ensuring that the resistance of the second trace is minimized. That is, in this embodiment of the invention, only the second trace in the stitched exposure area is grooved, and the second trace in the non-stitched exposure area is not grooved; the second trace in the non-stitched exposure area remains a single film layer.
[0071] In this embodiment of the invention, optionally, the second trace of the splicing exposure area is connected to the second trace of the non-splicing exposure area, so that the second traces of the splicing exposure area are all short-circuited in the non-splicing exposure area and connected to the same COM signal. When the second trace is a COM trace, the compensation effect of the COM electrode in the display area is effectively increased, ensuring the uniformity of the COM voltage in the display area and reducing the probability of defects caused by uneven COM voltage.
[0072] Please refer to Figure 7 and Figure 8 As shown, this embodiment of the invention also provides a display substrate, including a display area 10 and a non-display area 20, wherein the non-display area 20 is provided with a plurality of gate driving units (see...). Figure 8 GOA in the data), multiple data-driven units (see GOA in the data), and multiple data-driven units (see GOA in the data). Figure 8 The non-display area 20 includes a COF (Current Open Field) and traces, the traces including a first trace 31 for connecting the gate driving unit and the data driving unit, and a second trace 32 for connecting different data driving units; the non-display area 20 includes a plurality of non-stitched exposure areas 21 and a stitched exposure area 22 located between the non-stitched exposure areas 21, the traces of the non-stitched exposure areas 21 are formed by a single exposure, the traces of the stitched exposure areas 22 are formed by multiple exposures, and the pattern of the second trace 32 in the stitched exposure area 22 is the same as the pattern of the first trace 31.
[0073] It should be noted that, in the embodiments of the present invention Figure 7 and Figure 8 The splicing direction of the display panels is from left to right or from right to left.
[0074] In this embodiment of the invention, by setting the pattern of the second trace used to connect different data driving units in the splicing exposure area to be the same as the pattern of the first trace used to connect the gate driving unit (Gate COF / GOA) and the data driving unit (Data COF), the splicing exposure area can be set in the COF area on the left and right sides of the non-display area, or in the middle COF area, which improves the flexibility of splicing exposure and is suitable for more display products.
[0075] In this embodiment of the invention, optionally, the second trace 32 of the non-splicing exposure area 21 is a single film layer, thereby ensuring that the resistance of the second trace 32 is minimized.
[0076] In this embodiment of the invention, optionally, the second trace 32 of the splicing exposure area 22 is connected to the second trace 32 of the non-splicing exposure area 21, so that the second traces of the splicing exposure area are all short-circuited in the non-splicing exposure area and connected to the same COM signal. When the second trace is a COM trace, the compensation effect of the COM electrode in the display area can be effectively increased, ensuring the uniformity of the COM voltage in the display area and reducing the probability of defects caused by uneven COM voltage.
[0077] In this embodiment of the invention, optionally, the first trace includes at least one of the following: a clock signal (CLK) line, a frame start signal (STV) line, and a power supply (VDD) line.
[0078] In this embodiment of the invention, optionally, the second trace may be a common electrode (COM) trace.
[0079] In this embodiment of the invention, optionally, the width of the gray area of the device lens is generally 16.8mm (±8.4mm). Considering the fluctuations of the device, the width of the splicing exposure area is usually set to 30mm (±15mm).
[0080] This invention also provides a display device, including the display substrate from any of the above embodiments. The display device may be a display panel, or a display device including a display panel, such as a liquid crystal display device or an electronic paper display product.
[0081] The display substrate, manufacturing method, and display device described in the embodiments of the present invention have the following beneficial effects:
[0082] 1. By slotting the second trace between the intermediate COFs within the splicing exposure area, the splicing exposure area is no longer limited to the area of the intermediate COF. This effectively reduces the number of splicing exposures for large-size products, increasing factory capacity. Taking the B10 75-inch product as an example, only two exposures are needed to form a complete 75-inch display substrate (e.g., Figure 9 As shown, Figure 9 The image on the left is a photomask, and the image on the right is the pattern formed by splicing and exposing the display substrate. The final pattern is achieved through scan 1 and scan 2. Figure 9 In the middle, scan3 is just a mark used to form the display substrate.
[0083] 2. For some special products, conventional design methods cannot achieve the desired exposure. However, the method described in this embodiment of the invention can increase product compatibility and diversify the spliced products. Taking the B10 75-inch display as an example, the specifications of the display substrate are provided to the customer, and its splicing exposure area is located at the COF on the left / right side. Conventional splicing methods cannot achieve the desired exposure solution.
[0084] 3. In the design scheme of this invention embodiment, the second traces in the splicing exposure area are all given COM signals, and the second traces are short-circuited outside the splicing exposure area, which can effectively increase the compensation effect of the COM electrode in the display area and reduce the probability of defects caused by uneven COM voltage.
[0085] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of the present invention.
Claims
1. A display substrate, characterized in that, The system includes a display area and a non-display area. The non-display area is provided with multiple gate driving units, multiple data driving units, and traces. The traces include a first trace for connecting the gate driving units and the data driving units, and a second trace for connecting different data driving units. The non-display area includes multiple non-stitched exposure areas and stitched exposure areas located between the non-stitched exposure areas. The traces in the non-stitched exposure areas are formed by a single exposure, while the traces in the stitched exposure areas are formed by multiple exposures. The pattern of the second trace in the stitched exposure area is the same as the pattern of the first trace. The second trace in the non-stitched exposure area is a single film layer. The second trace in the stitched exposure area is connected to the second trace in the non-stitched exposure area. The first trace includes at least one of the following: a clock signal CLK line, a frame start signal STV line, and a power supply VDD line; and / or, the second trace is a common electrode COM trace.
2. A display device, characterized in that, Includes the display substrate as described in claim 1.
3. A method for manufacturing a display substrate, characterized in that, The display substrate includes a display area and a non-display area. The non-display area includes multiple non-stitched exposure areas and stitched exposure areas located between the non-stitched exposure areas. The manufacturing method includes: Multiple gate driving units, multiple data driving units, and traces are formed in the non-display area. The traces include a first trace for connecting the gate driving units and the data driving units, and a second trace for connecting different data driving units. The traces in the non-stitched exposure area are formed by a single exposure, while the traces in the stitched exposure area are formed by multiple exposures. The pattern of the second trace in the stitched exposure area is the same as the pattern of the first trace. Wherein, the second trace in the non-stitched exposure area is a single film layer; the second trace in the stitched exposure area is connected to the second trace in the non-stitched exposure area; The first trace includes at least one of the following: a clock signal CLK line, a frame start signal STV line, and a power supply VDD line; and / or, the second trace is a common electrode COM trace.
4. The method according to claim 3, characterized in that, Forming traces in the non-display area includes: Forming a metal film; A photoresist layer is formed on the metal film layer; The photoresist layer is exposed using a splicing exposure machine and a mask. The photoresist layer is spliced and exposed by moving the mask. The photoresist layer in the non-spliced exposure area is exposed once, and the photoresist layer in the spliced exposure area is exposed multiple times. The exposed photoresist layer is developed to form a photoresist layer pattern; The metal film layer not covered by the photoresist layer pattern is etched to form the second trace.
5. The method according to claim 4, characterized in that, The stitching exposure machine adopts a field aperture edge (FDE) and variable area masking (VFS) structure, and the stitching exposure area corresponds to the VFS.
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