Integrated circuit firmware upgrading method and device, equipment and medium

Abstract

The invention discloses an integrated circuit firmware upgrading method and device, equipment and a medium, and belongs to the technical field of servers. The method comprises the steps that an instruction for upgrading any signal enhancement integrated circuit firmware is received; determining a signal enhancement integrated circuit to be subjected to firmware upgrading according to the model information of the signal enhancement integrated circuit; loading a first firmware file from a storage medium corresponding to the signal enhancement integrated circuit to be subjected to firmware upgrading through the logic element; and obtaining a second firmware file, and writing the second firmware file into a storage medium corresponding to the signal enhancement integrated circuit to be subjected to firmware upgrading through the first substrate management controller and the logic element so as to replace the first firmware file. According to the method and the device, the time required for electrically loading the firmware on the signal enhancement integrated circuit is shortened, a new firmware upgrading way of the signal enhancement integrated circuit is provided, and the firmware upgrading efficiency of the integrated circuit is improved.

Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to an integrated circuit firmware upgrade method, device, equipment and medium. Background Art

[0002] With the rapid development of big data, artificial intelligence, cloud computing and other fields, the demand for high-speed hardware data interaction within the server has become increasingly urgent; the speed of information interaction between server hardware has jumped again, and the high-speed PCIe protocol has become the mainstream solution for the server bus. The performance, computing and functions of the server are all related to PCIe devices.

[0003] For firmware upgrades of signal booster ICs, such as Figure 1 As shown, the related technology is to upgrade the signal enhancement integrated circuit (Retimer) by upgrading the corresponding read-only memory through the I2C bus, and for the Retimer integrated circuits of different manufacturers, the baseboard management control device (BMC, Baseboard Management Controller) needs to develop and integrate different software development SDK tools to manage the Retimer integrated circuit, and the development cycle is long; and because there is no direct connection between the current server BMC and the electrically erasable programmable read-only memory (EEPROM), it is necessary to indirectly read and write the read-only memory through the Retimer integrated circuit, so it takes several hours to upgrade the firmware FW of multiple signal enhancement integrated circuits, which is time-consuming and high-risk, affecting the efficiency of production and customer use. Summary of the invention

[0004] In order to overcome the above technical defects, the purpose of the present application is to provide an integrated circuit firmware upgrade method, device, equipment and medium, the method comprising: receiving an instruction for upgrading the firmware of any signal enhancement integrated circuit; the instruction includes the model information of the signal enhancement integrated circuit to be upgraded; the logic element determines the signal enhancement integrated circuit to be upgraded according to the signal enhancement integrated circuit model information; loads a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the logic element; obtains a second firmware file, the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded; writes the second firmware file to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, and completes the firmware file upgrade of the signal enhancement integrated circuit to be upgraded. The present application shortens the time required for powering on the signal enhancement integrated circuit to load the firmware, provides a new way to upgrade the firmware of the signal enhancement integrated circuit, and improves the efficiency of the integrated circuit firmware upgrade.

[0005] The specific technical solutions provided by the embodiments of this application are as follows:

[0006] In a first aspect, the present application provides an integrated circuit firmware upgrade method, the method is applied to a firmware upgrade system, the firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element, and a plurality of storage media, the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of storage media, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond to the storage media one by one, the method includes:

[0007] The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0008] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0009] Loading a first firmware file from a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element;

[0010] Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0011] The second firmware file is written into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0012] In one embodiment, the firmware upgrade system includes a power module, the output end of the logic element is connected to the input end of the power module, the output end of the power module is connected to the input ends of the plurality of signal enhancement integrated circuits, and the first firmware file is loaded from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the logic element, including:

[0013] Powering on the signal enhancement integrated circuit to be upgraded with firmware by means of the power module;

[0014] The logic element creates a serial peripheral interface signal channel between the storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded according to the model information of the signal enhancement integrated circuit;

[0015] Loading the first firmware file through the signal enhancement integrated circuit to be upgraded, and reading the first firmware file in the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the serial peripheral interface signal channel;

[0016] Determining whether there is signal transmission in the serial peripheral interface signal channel;

[0017] If not, modify the register value of the logic element, and send the signal enhancement integrated circuit to be upgraded with the firmware to complete loading the first firmware file to the first baseboard management controller;

[0018] After sending the signal enhancement integrated circuit loading the first firmware file completion information to the first baseboard management controller, the method includes:

[0019] Monitoring, by means of the first baseboard management controller, whether the signal enhancement integrated circuit to be upgraded with firmware is powered on successfully;

[0020] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0021] In one embodiment, the firmware upgrade system includes a second baseboard management controller, the second baseboard management controller is connected to the first baseboard management controller, and the second firmware file is written into the storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element to replace the first firmware file, including:

[0022] Sending the second firmware file to the logic element through the second baseboard management controller and the first baseboard management controller;

[0023] Writing the second firmware file into a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element to replace the first firmware file;

[0024] Performing data verification on a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded by using the logic element;

[0025] The performing data verification on the storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element includes:

[0026] Determining whether a second firmware file written in a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded is consistent with a second firmware file sent to the logic element;

[0027] If so, the data verification result is displayed on the graphical user interface through the second baseboard management controller.

[0028] In one embodiment, the firmware upgrade system further includes a connector, a master device and a slave device.

[0029] The output end of the main device is connected to the input ends of the plurality of signal enhancement integrated circuits through the connector;

[0030] The output ends of the plurality of signal enhancement integrated circuits are connected to the input end of the slave device through the connector.

[0031] In one embodiment, after completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded, the method includes:

[0032] When a failure occurs in the firmware upgrade of the signal enhancement integrated circuit to be upgraded, the data of the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is re-verified through the logic element.

[0033] In one embodiment, the firmware upgrade system further includes a plurality of read-only memories, the signal enhancement integrated circuits are connected to the read-only memories in a one-to-one correspondence, and the method includes:

[0034] In response to a failure in writing the second firmware file into a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory;

[0035] The loading of the first firmware file through the read-only memory includes:

[0036] Creating a serial communication bus signal channel between the signal enhancement integrated circuit to be firmware upgraded and a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0037] Reading a first firmware file in a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0038] Sending the second firmware file to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0039] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded through the signal enhancement integrated circuit software development tool to replace the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0040] In one embodiment, the plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface;

[0041] The logic element is connected to the plurality of storage media via a serial peripheral interface;

[0042] The first baseboard management controller is connected to the logic element via a serial communication bus.

[0043] In a second aspect, the present application further provides an integrated circuit firmware upgrade device, the device is applied to a firmware upgrade system, the firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element and a plurality of storage media, the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of storage media, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond to the storage media one by one, and the device includes:

[0044] A receiving module, used to receive an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0045] An acquisition module, used for acquiring a second firmware file; the second firmware file is used for upgrading the signal enhancement integrated circuit to be upgraded;

[0046] A determination module, configured to determine a signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0047] A loading module, configured to load a first firmware file from a storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0048] An upgrade module is used to write the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0049] In a third aspect, an integrated circuit firmware upgrade device is also provided, comprising:

[0050] one or more processors;

[0051] A storage device for storing one or more programs;

[0052] When the one or more programs are executed by the one or more processors, the one or more processors implement the integrated circuit firmware upgrade method as described in any one of the first aspects.

[0053] In a fourth aspect, the present application further provides a computer device, the device comprising:

[0054] A memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the integrated circuit firmware upgrade method as described in any one of the first aspects.

[0055] In a fifth aspect, the present application further provides a computer program product, comprising a computer program, which, when executed by a processor, implements the steps of any integrated circuit firmware upgrade method described in the first aspect.

[0056] In a sixth aspect, the present application further provides a computer storage medium, the medium comprising:

[0057] A computer program is stored thereon, and when the computer program is executed by a processor, the steps of any integrated circuit firmware upgrade method described in the first aspect are implemented.

[0058] Compared with the prior art, the method described in the technical solution provided in the embodiment of the present application includes: the first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, the instruction includes the model information of the signal enhancement integrated circuit to be upgraded; the logic element determines the signal enhancement integrated circuit to be upgraded according to the model information of the signal enhancement integrated circuit; the first firmware file is loaded from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the logic element; the second firmware file is obtained, and the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded; the second firmware file is written into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, and the firmware file upgrade of the signal enhancement integrated circuit to be upgraded is completed. The present application shortens the time required for loading firmware on the signal enhancement integrated circuit by connecting the first baseboard management controller with the logic element and connecting the logic element with the plurality of storage media, provides a new way to upgrade the firmware of the signal enhancement integrated circuit, and improves the efficiency of the firmware upgrade of the integrated circuit.

[0059] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0060] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the storage medium (SPI Flash) selected in the present application has more choices and lower cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0062] Figure 1 A first structural diagram of an integrated circuit firmware upgrade system provided in Embodiment 1 of the present application;

[0063] Figure 2 A second structural diagram of the integrated circuit firmware upgrade system provided in the first embodiment of the present application;

[0064] Figure 3 A third structural diagram of the integrated circuit firmware upgrade system provided in Embodiment 2 of the present application;

[0065] Figure 4 A first flow chart of the integrated circuit firmware upgrade method provided in Embodiment 1 of the present application;

[0066] Figure 5 A second flow chart of the integrated circuit firmware upgrade method provided in the second embodiment of the present application;

[0067] Figure 6 A firmware power-on loading flow chart provided in Embodiment 2 of the present application;

[0068] Figure 7 A firmware upgrade flow chart provided in Example 2 of the present application;

[0069] Figure 8 A structural diagram of an integrated circuit firmware upgrade device provided in Embodiment 3 of the present application;

[0070] Fig. 9The exemplary system provided for Embodiment 7 of the present application can be used to implement the various embodiments described in the present application. DETAILED DESCRIPTION

[0071] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0072] It should be noted that, unless the context clearly requires otherwise, words such as “include”, “including” and similar words throughout the specification and claims should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is “including but not limited to”.

[0073] Furthermore, in the description of the present application, unless otherwise specified, “plurality” means two or more.

[0074] The PCIe signal enhancement integrated circuit (PCIe Retimer) is a hybrid device of digital + analog signals. It can extract the embedded clock in the input signal through its internal clock data recovery circuit, and then use the complete clock signal without attenuation and deformation to retransmit the data to fully recover the data signal and re-send it. This mode of recovering the data first and then resending the signal through the serial channel can effectively solve the problem of signal attenuation. The current mainstream solution is to add a PCIe retimer in the PCIe link to compensate for the loss and ensure device performance.

[0075] Nowadays, the configuration information of the Retimer integrated circuit is written offline to the corresponding read-only memory on the board to upgrade the Retimer integrated circuit. Since the I2C bus rate is usually relatively low, it takes a long time to power on and load the firmware FW on the Retimer integrated circuit on the board. In addition, the time required to load the firmware FW (firmware) on the Retimer integrated circuits of different manufacturers is different, which affects the timing and BMC management. If the BMC has access to the Retimer integrated circuit during the period when the Retimer is loading the firmware FW, the card will drop. At the same time, there is currently no special flag to determine whether the firmware FW loading of each Retimer integrated circuit is completed.

[0076] Embodiment 1

[0077] The present application embodiment provides a method for upgrading integrated circuit firmware. Figure 2 , 3As shown in , the method is applied to a firmware upgrade system, the firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element and a plurality of flash memories (storage media), the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of flash memories, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond to the flash memories one by one, and the method includes:

[0078] The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0079] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0080] Loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0081] Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0082] The second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0083] Specifically, the present application provides a novel PCIE signal enhancement integrated circuit firmware upgrade design, which optimizes the design of related hardware circuits for firmware FW upgrade and loading.

[0084] Design the Retimer integrated circuit to use flash memory (SPI flash) to store firmware files;

[0085] Since the read-only memory EEPROM only supports the I2C protocol, the speed in standard mode is only 100kbps, which is relatively low; the SPI protocol is usually faster than the I2C speed, and the SPI of some devices can reach 50Mbps; the current Retimer integrated circuit supports the use of some multiplexed GPIO PINs as SPI falsh related signals, so this solution no longer uses the traditional EEPROM design, but uses SPI flash to store the firmware file of the Retimer integrated circuit.

[0086] The design uses logic elements (CPLD, Complex Programmable Logic Device) to transparently transmit the SPI signal of the Retimer integrated circuit;

[0087] Since the compatible design of multiple Retimer integrated circuits is involved, the PIN pins reused as the SPIFlash function of each Retimer integrated circuit are different, and the functions corresponding to the same PIN pin are also inconsistent, and there is no unified specification definition. Therefore, it is impossible to be compatible with multiple designs simply by BOM switching and hardware routing; therefore, this solution connects the SPI-related signals of different Retimer integrated circuits to the logic element CPLD. The logic element distinguishes different Retimer integrated circuits through the ID of the Retimer integrated circuit, and transparently transmits the SPI signals of each Retimer integrated circuit to the corresponding flash memory SPI Flash.

[0088] At the same time, the baseboard management control device BMC can directly read and write CPLD related registers through I2C / JTAG signals to realize the remote FW refresh function of the Retimer integrated circuit.

[0089] The present application optimizes the design of the hardware circuits related to firmware FW upgrade and loading, and uses flash memory SPIFlash to replace the traditional read-only memory EEPROM design, solving the problems of long firmware FW loading time and slow FW upgrade of traditional PCIE Retimer integrated circuits.

[0090] Here, the flash memory SPI Flash is a non-volatile memory integrated circuit based on the serial peripheral interface (SPI) protocol.

[0091] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0092] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0093] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0094] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the present application replaces it with flash memory (SPI Flash) with more choices and lower cost.

[0095] Embodiment 2

[0096] The present application embodiment provides a method for upgrading integrated circuit firmware. Figure 5 As shown, the method is applied to a firmware upgrade system, the firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element, and a plurality of flash memories, the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of flash memories, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond to the flash memories one by one, and the method includes:

[0097] Step S01, the first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0098] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0099] Specifically, in the current solution, Retimer integrated circuits from different manufacturers require different BOMs for adaptation in external network lines, so it is necessary to additionally design multi-bit pull-up and pull-down resistors in hardware. The combination of multi-bit pull-up and pull-down resistors is used as the Retimer integrated circuit for CPLD to distinguish Retimer integrated circuits from different manufacturers.

[0100] Step S02: loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element.

[0101] Step S02 also includes:

[0102] Step S021, as Figure 6 As shown, the signal enhancement integrated circuit to be upgraded with firmware is powered on by the power module;

[0103] The logic element creates a serial peripheral interface signal channel between the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded according to the model information of the signal enhancement integrated circuit;

[0104] Load the first firmware file through the signal enhancement integrated circuit to be upgraded, and read the first firmware file in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the serial peripheral interface signal channel;

[0105] Determining whether there is signal transmission in the serial peripheral interface signal channel;

[0106] If not, modify the register value of the logic element, and send the signal enhancement integrated circuit to be upgraded with the firmware to complete loading the first firmware file to the first baseboard management controller;

[0107] After sending the signal enhancement integrated circuit loading the first firmware file completion information to the first baseboard management controller, the method includes:

[0108] Monitoring, by means of the first baseboard management controller, whether the signal enhancement integrated circuit to be upgraded with firmware is powered on successfully;

[0109] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0110] Specifically, after the board is powered on, the logic element CPLD first identifies the model of the Retimer integrated circuit on the board through the ID of the Retimer integrated circuit, and then selects to input different PINs for transparent transmission according to the Retimer ID, corresponding to the SPI signal from the Retimer integrated circuit to the SPI Flash; the CPLD monitors the SPI signal in real time. After the Retimer integrated circuit completes loading the first firmware file, the CPLD determines whether the SPI bus is idle. When there is no signal transmission, the value of the internal register is modified to inform the BMC that the Retimer integrated circuit has completed loading the FW; the BMC starts to monitor the temperature and other status information of the Retimer integrated circuit based on this judgment condition.

[0111] Step S03, the logic element obtains a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0112] The second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0113] Step S03 also includes:

[0114] Step S031, as Figure 7 As shown, the second firmware file is sent to the logic element through the second baseboard management controller and the first baseboard management controller;

[0115] Writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element to replace the first firmware file;

[0116] Performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element;

[0117] The step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element includes:

[0118] Determine whether the second firmware file written into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded is consistent with the second firmware file sent to the logic element;

[0119] If so, the data verification result is displayed on the graphical user interface through the second baseboard management controller.

[0120] Specifically, when it comes to the scenario where the Retimer integrated circuit needs to be upgraded, the customer remotely uploads the second firmware file FW to the second baseboard management controller (BMC0), BMC0 uploads the second firmware file FW to the first baseboard management controller (BMC1) on the board through a USB signal, the first baseboard management controller BMC1 passes FW to the CPLD through I2C / JTAG, the CPLD receives FW and performs read and write verification on the corresponding flash memory SPI Flash, and transmits the result back to the first baseboard management controller BMC1, and the second baseboard management controller BMC0 communicates with BMC1 to feedback the burning result in the GUI interface.

[0121] This process does not require the baseboard management control device BMC to develop and adapt different SDK integration tools for different Retimer integrated circuit manufacturers. It only needs to rewrite and adapt the current CPLD upgrade process to adapt to all subsequent Retimer integrated circuit manufacturers, greatly improving work efficiency.

[0122] Step S04, when a failure occurs in the firmware upgrade of the signal enhancement integrated circuit to be upgraded, data verification is performed again on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element.

[0123] Step S05, as Figure 1 As shown, in response to a failure in writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory;

[0124] The loading of the first firmware file through the read-only memory includes:

[0125] Creating a serial communication bus signal channel between the signal enhancement integrated circuit to be firmware upgraded and a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0126] Reading a first firmware file in a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0127] Sending the second firmware file to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0128] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded through the signal enhancement integrated circuit software development tool to replace the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0129] Specifically, the CPLD on the board controls the output of the power modules related to the eight Retimer integrated circuits, and the power modules provide the eight Retimer integrated circuits with the DC power required for their work; the first firmware file FW is written to the read-only memory EEPROM, and the eight Retimer integrated circuits communicate with their respective read-only memory EEPROMs through I2C signals to complete the loading of the first firmware file FW of the integrated circuit; the Retimer integrated circuit is connected to the master device RC (Root Complex) through the PCIe X16 signal upstream, and is connected to the slave device EP (End Point) through the PCIe X16 signal downstream.

[0130] The second firmware file FW of the Retimer integrated circuit is upgraded through the BMC through the I2C signal. The second baseboard management control device BMC0 of the upstream board communicates with the first baseboard management control device BMC1 on the board through the USB bus; BMC1 is connected to 8 Retimer integrated circuits through the I2C bus. Different software development SDK tools are integrated for the development of Retimer integrated circuits from different manufacturers to upgrade the FW of the Retimer integrated circuit.

[0131] It can be understood that when it comes to the scenario where the 8 Retimer integrated circuits FW on the board need to be remotely upgraded, BMC1 writes the second firmware FW file to the Retimer integrated circuit through I2C, and then the Retimer integrated circuit upgrades the corresponding read-only memory EEPROM through the I2C bus; that is, in response to the signal enhancement integrated circuit firmware upgrade failure through the first baseboard management controller and the logic element data transmission check to the firmware upgrade, a backup plan is added to reduce the risk of firmware upgrade.

[0132] This application proposes a new PCIE retimer integrated circuit firmware upgrade design, which can solve the problem that the traditional PCIE Retimer integrated circuit takes a long time to load FW and affects the timing design. In addition, when it comes to the scenario where the 8 Retimer integrated circuit FWs on the board need to be remotely upgraded, the BMC no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for the upgrade.

[0133] The technical solution of this application has the following improvements: the Retimer integrated circuit is designed to use flash memory SPI flash to store the firmware file FW; the logic element CPLD is designed to transparently transmit the serial peripheral interface SPI (Serial Peripheral Interface) signal of the Retimer integrated circuit; a new Retimer integrated circuit firmware FW upgrade path is provided.

[0134] In addition, the performing of data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element further includes:

[0135] Configure the logic element CPLD to adapt to the protocol of the serial peripheral interface SPI;

[0136] Initialize the SPI Flash and set the read / write mode;

[0137] Determine a data verification algorithm, wherein the data verification algorithm includes a cyclic redundancy check algorithm and a checksum algorithm;

[0138] Read firmware file data from SPI Flash via SPI protocol;

[0139] Calculate the check value of the firmware file data written into the flash memory by using the cyclic redundancy check algorithm;

[0140] Calculating a check value of the firmware file data received by the logic element by using the cyclic redundancy check algorithm;

[0141] comparing a check value of the firmware file data in the flash memory with a check value of the firmware file received by the logic element;

[0142] If the two values ​​match, the data is intact; if an error is detected, the error is logged, the user is alerted, and the data is recovered.

[0143] Here, CPLD can be effectively used to implement the firmware file data verification function of SPI Flash, thereby improving the reliability and stability of system firmware upgrades.

[0144] The integrated circuit firmware upgrade method provided in the embodiment of the present application may be improved and optimized without departing from the technical solution of the present application, and these improvements and optimizations should also be regarded as within the scope of protection of the present application.

[0145] This technical solution can also be used in various other types of server Retimer integrated circuit application scenarios and other product requirements. The technical solution provided in the embodiment of this application has the following beneficial effects:

[0146] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0147] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0148] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the present application uses flash memory (SPI Flash) with more choices and lower cost.

[0149] Embodiment 3

[0150] The present application provides an integrated circuit firmware upgrade device, such as Figure 8As shown, the device is applied to a firmware upgrade system, which includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element and a plurality of flash memories, the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of flash memories, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond one to one with the flash memories, and the device includes: a receiving module, an acquisition module, a determination module, a loading module, an upgrade module and a processing module.

[0151] In this embodiment, the receiving module is used to receive an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0152] An acquisition module, used for acquiring a second firmware file; the second firmware file is used for upgrading the signal enhancement integrated circuit to be upgraded;

[0153] A determination module, configured to determine a signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0154] A loading module, used for loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0155] The upgrade module is used to write the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0156] In one of the embodiments, a loading module is used to power on the signal enhancement integrated circuit to be firmware upgraded through the power module;

[0157] The logic element creates a serial peripheral interface signal channel between the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded according to the model information of the signal enhancement integrated circuit;

[0158] Load the first firmware file through the signal enhancement integrated circuit to be upgraded, and read the first firmware file in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the serial peripheral interface signal channel;

[0159] Determining whether there is signal transmission in the serial peripheral interface signal channel;

[0160] If not, modify the register value of the logic element, and send the signal enhancement integrated circuit to be upgraded with the firmware to complete loading the first firmware file to the first baseboard management controller;

[0161] After sending the signal enhancement integrated circuit loading the first firmware file completion information to the first baseboard management controller, the method includes:

[0162] Monitoring, by means of the first baseboard management controller, whether the signal enhancement integrated circuit to be upgraded with firmware is powered on successfully;

[0163] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0164] In one embodiment, the upgrade module is used to send the second firmware file to the logic element through the second baseboard management controller and the first baseboard management controller;

[0165] Writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element to replace the first firmware file;

[0166] Performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element;

[0167] The step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element includes:

[0168] Determine whether the second firmware file written into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded is consistent with the second firmware file sent to the logic element;

[0169] If so, the data verification result is displayed on the graphical user interface through the second baseboard management controller.

[0170] In one embodiment, the firmware upgrade system further includes a connector, a master device and a slave device.

[0171] The output end of the main device is connected to the input ends of the plurality of signal enhancement integrated circuits through the connector;

[0172] The output ends of the plurality of signal enhancement integrated circuits are connected to the input end of the slave device through the connector.

[0173] In one of the embodiments, the processing module is used to re-verify the data of the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element when a failure occurs in the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0174] In one of the embodiments, the processing module is used to load the first firmware file through the read-only memory in response to a failure in writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element;

[0175] The loading of the first firmware file through the read-only memory includes:

[0176] Creating a serial communication bus signal channel between the signal enhancement integrated circuit to be firmware upgraded and a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0177] Reading a first firmware file in a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0178] Sending the second firmware file to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0179] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded through the signal enhancement integrated circuit software development tool to replace the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0180] In one embodiment, the plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface;

[0181] The logic element is connected to the plurality of flash memories via a serial peripheral interface;

[0182] The first baseboard management controller is connected to the logic element via a serial communication bus.

[0183] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0184] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0185] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0186] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the present application uses flash memory (SPI Flash) with more choices and lower cost.

[0187] Embodiment 4

[0188] The present invention also provides an integrated circuit firmware upgrade device, comprising:

[0189] one or more processors;

[0190] A storage device for storing one or more programs;

[0191] When the one or more programs are executed by the one or more processors, the one or more processors execute the integrated circuit firmware upgrade method described below:

[0192] The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0193] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0194] Loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0195] Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0196] The second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0197] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0198] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0199] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0200] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the present application uses flash memory (SPI Flash) with more choices and lower cost.

[0201] Embodiment 5

[0202] The present application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following integrated circuit firmware upgrade method can be executed:

[0203] The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0204] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0205] Loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0206] Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0207] The second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0208] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0209] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0210] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0211] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the present application uses flash memory (SPI Flash) with more choices and lower cost.

[0212] Embodiment 6

[0213] The present application also provides a computer program product, including a computer program, which can implement the following integrated circuit firmware upgrade method when executed by a processor:

[0214] The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0215] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0216] Loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0217] Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0218] The second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0219] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0220] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0221] The technical solution provided in the embodiment of the present application can solve the problem that the traditional signal enhancement integrated circuit takes a long time to load the firmware FW, which affects the timing and management of the baseboard management control device. In addition, when it comes to the scenario where multiple Retimer integrated circuits on the board need to be remotely upgraded, the baseboard management control device no longer needs to develop and adapt the Retimer integrated circuits of different manufacturers separately, which can greatly shorten the time used for upgrading.

[0222] The technical solution provided in the embodiment of the present application provides a firmware FW loading completion flag applicable to all Retimer manufacturers, reducing design risks; at the same time, the large-capacity read-only memory of the traditional upgrade method has low procurement availability and high cost, while the present application uses flash memory (SPI Flash) with more choices and lower cost.

[0223] Embodiment 7

[0224] The present application provides a computer storage medium, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

[0225] The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded;

[0226] The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information;

[0227] Loading a first firmware file from a flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element;

[0228] Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded;

[0229] The second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0230] In one embodiment, the firmware upgrade system includes a power module, the output end of the logic element is connected to the input end of the power module, the output end of the power module is connected to the input ends of the plurality of signal enhancement integrated circuits, and the first firmware file is loaded from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the logic element, including:

[0231] Powering on the signal enhancement integrated circuit to be upgraded with firmware by means of the power module;

[0232] The logic element creates a serial peripheral interface signal channel between the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded according to the model information of the signal enhancement integrated circuit;

[0233] Load the first firmware file through the signal enhancement integrated circuit to be upgraded, and read the first firmware file in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the serial peripheral interface signal channel;

[0234] Determining whether there is signal transmission in the serial peripheral interface signal channel;

[0235] If not, modify the register value of the logic element, and send the signal enhancement integrated circuit to be upgraded with the firmware to complete loading the first firmware file to the first baseboard management controller;

[0236] After sending the signal enhancement integrated circuit loading the first firmware file completion information to the first baseboard management controller, the method includes:

[0237] Monitoring, by means of the first baseboard management controller, whether the signal enhancement integrated circuit to be upgraded with firmware is powered on successfully;

[0238] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0239] In one embodiment, the firmware upgrade system includes a second baseboard management controller, the second baseboard management controller is connected to the first baseboard management controller, and the second firmware file is written into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element to replace the first firmware file, including:

[0240] Sending the second firmware file to the logic element through the second baseboard management controller and the first baseboard management controller;

[0241] Writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element to replace the first firmware file;

[0242] Performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element;

[0243] The step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element includes:

[0244] Determine whether the second firmware file written into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded is consistent with the second firmware file sent to the logic element;

[0245] If so, the data verification result is displayed on the graphical user interface through the second baseboard management controller.

[0246] In one embodiment, the firmware upgrade system further includes a connector, a master device and a slave device.

[0247] The output end of the main device is connected to the input ends of the plurality of signal enhancement integrated circuits through the connector;

[0248] The output ends of the plurality of signal enhancement integrated circuits are connected to the input end of the slave device through the connector.

[0249] In one embodiment, after completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded, the method includes:

[0250] When a failure occurs in the firmware upgrade of the signal enhancement integrated circuit to be upgraded, the data of the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is re-checked through the logic element.

[0251] In one embodiment, the firmware upgrade system further includes a plurality of read-only memories, the signal enhancement integrated circuits are connected to the read-only memories in a one-to-one correspondence, and the method includes:

[0252] In response to a failure in writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory;

[0253] The loading of the first firmware file through the read-only memory includes:

[0254] Creating a serial communication bus signal channel between the signal enhancement integrated circuit to be firmware upgraded and a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0255] Reading a first firmware file in a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded;

[0256] Sending the second firmware file to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0257] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded through the signal enhancement integrated circuit software development tool to replace the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0258] In one embodiment, the plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface;

[0259] The logic element is connected to the plurality of flash memories via a serial peripheral interface;

[0260] The first baseboard management controller is connected to the logic element via a serial communication bus.

[0261] The present application shortens the time required to power on and load firmware on a signal-enhanced integrated circuit by connecting the first baseboard management controller to the logic element and connecting the logic element to the plurality of storage media, provides a new signal-enhanced integrated circuit firmware upgrade path, and improves the efficiency of integrated circuit firmware upgrades.

[0262] Fig. 9 An exemplary system provided for Embodiment 7 of the present application that can be used to implement various embodiments described in the present application;

[0263] like Fig. 9 As shown, in some embodiments, the system can be used as any of the above-mentioned devices for integrated circuit firmware upgrade in each of the described embodiments. In some embodiments, the system may include one or more computer-readable media (e.g., system memory or NVM / storage device) having results and one or more processors (e.g., (one or more) processors) coupled to the one or more computer-readable media and configured to execute the results to implement the module to perform the actions described in this application.

[0264] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0265] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0266] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for upgrading integrated circuit firmware, characterized in that: The method is applied to a firmware upgrade system, the firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element, and a plurality of storage media, the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of flash memories, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond to the flash memories one by one, and the method includes: The first baseboard management controller receives an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded; The logic element determines the signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information; Loading a first firmware file from a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element; Acquire a second firmware file, where the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded; The second firmware file is written into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file, thereby completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

2. The integrated circuit firmware upgrade method according to claim 1, characterized in that: The firmware upgrade system includes a power module, the output end of the logic element is connected to the input end of the power module, the output end of the power module is connected to the input ends of the plurality of signal enhancement integrated circuits, and the first firmware file is loaded from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the logic element, including: Powering on the signal enhancement integrated circuit to be upgraded with firmware by means of the power module; The logic element creates a serial peripheral interface signal channel between the storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded according to the model information of the signal enhancement integrated circuit; Loading the first firmware file through the signal enhancement integrated circuit to be upgraded, and reading the first firmware file in the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the serial peripheral interface signal channel; Determining whether there is signal transmission in the serial peripheral interface signal channel; If not, modify the register value of the logic element, and send the signal enhancement integrated circuit to be upgraded with the firmware to complete loading the first firmware file to the first baseboard management controller; After sending the signal enhancement integrated circuit loading the first firmware file completion information to the first baseboard management controller, the method includes: Monitoring, by means of the first baseboard management controller, whether the signal enhancement integrated circuit to be upgraded with firmware is powered on successfully; The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

3. The integrated circuit firmware upgrade method according to claim 1, characterized in that: The firmware upgrade system includes a second baseboard management controller, the second baseboard management controller is connected to the first baseboard management controller, and the second firmware file is written into the storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element to replace the first firmware file, including: Sending the second firmware file to the logic element through the second baseboard management controller and the first baseboard management controller; Writing the second firmware file into a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the logic element to replace the first firmware file; Performing data verification on a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded by using the logic element; The performing data verification on the storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded by the logic element includes: Determining whether a second firmware file written in a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded is consistent with a second firmware file sent to the logic element; If so, the data verification result is displayed on the graphical user interface through the second baseboard management controller.

4. The integrated circuit firmware upgrade method according to claim 1, characterized in that: The firmware upgrade system also includes a connector, a master device and a slave device. The output end of the main device is connected to the input ends of the plurality of signal enhancement integrated circuits through the connector; The output ends of the plurality of signal enhancement integrated circuits are connected to the input end of the slave device through the connector.

5. The integrated circuit firmware upgrade method according to claim 3, characterized in that: After completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded, the method includes: When a failure occurs in the firmware upgrade of the signal enhancement integrated circuit to be upgraded, the data of the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is re-verified through the logic element.

6. The integrated circuit firmware upgrade method according to claim 1, characterized in that: The firmware upgrade system further includes a plurality of read-only memories, the signal enhancement integrated circuits are connected to the read-only memories in a one-to-one correspondence, and the method includes: In response to a failure in writing the second firmware file into a storage medium corresponding to the signal enhancement integrated circuit to be firmware upgraded through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory; The loading of the first firmware file through the read-only memory includes: Creating a serial communication bus signal channel between the signal enhancement integrated circuit to be firmware upgraded and a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded; Reading a first firmware file in a read-only memory corresponding to the signal enhancement integrated circuit to be firmware upgraded; Sending the second firmware file to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller; The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded through the signal enhancement integrated circuit software development tool to replace the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

7. The integrated circuit firmware upgrade method according to claim 1, characterized in that: The plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface; The logic element is connected to the plurality of storage media via a serial peripheral interface; The first baseboard management controller is connected to the logic element via a serial communication bus.

8. An integrated circuit firmware upgrade device, characterized in that: The device is applied to a firmware upgrade system, the firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, a logic element, and a plurality of storage media, the first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic element, the logic element is connected to the plurality of storage media, the first baseboard management controller is connected to the logic element, the signal enhancement integrated circuits correspond to the storage media one by one, and the device includes: A receiving module, used to receive an instruction for upgrading the firmware of any signal enhancement integrated circuit, wherein the instruction includes model information of the signal enhancement integrated circuit to be upgraded; An acquisition module, used for acquiring a second firmware file; the second firmware file is used for upgrading the signal enhancement integrated circuit to be upgraded; A determination module, configured to determine a signal enhancement integrated circuit to be upgraded in firmware according to the signal enhancement integrated circuit model information; A loading module, configured to load a first firmware file from a storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the logic element; An upgrade module is used to write the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the integrated circuit firmware upgrade method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the integrated circuit firmware upgrade method according to any one of claims 1 to 7 are implemented.

Images