Task scheduling system and method based on thread bundle recombination

Abstract

The invention belongs to the field of control scheduling of GPU computing resources, and particularly relates to a task scheduling system and method based on thread bundle recombination, and the method comprises the steps: caching all thread blocks needing to be computed; reading and storing register file data corresponding to each thread bundle in the thread block; according to the active mark of the thread bundle mask information, active threads in the thread bundle are extracted, and thread bundle recombination is conducted on the extracted active threads; the recombined thread bundle is cached to a recombined thread bundle cache module; monitoring the reorganization thread bundle cache module in real time, reading the reorganization thread bundle in the reorganization thread bundle cache module when the reorganization thread bundle cache module is in a non-empty state, and sending the reorganization thread bundle to a subsequent execution unit; and after the execution of the recombined thread bundle is finished, when the register file is written back, according to the mask information of the original thread bundle, splitting the calculation result operand of the recombined thread bundle, and writing the calculation result operand back to the corresponding register file of the original thread bundle. Repeated read-write times of the thread bundle are reduced, and read-write efficiency is improved.

Description

Technical Field

[0001] The present invention belongs to the field of control and scheduling of GPU computing resources, and in particular relates to a task scheduling system and method based on thread warp reorganization. Background Art

[0002] With the vigorous development of artificial intelligence and big data computing, GPUs are playing an increasingly important role in multiple industries, and computing performance has become one of the main technical indicators for evaluating computing processors such as CPUs, GPUs, and FPGAs.

[0003] At present, the total single-chip computing power of GPU or AI computing devices from domestic and foreign manufacturers continues to increase. In order to maximize the computing power of computing devices, various manufacturers have optimized computing power scheduling, storage access methods, cache bandwidth and other aspects, and have achieved certain results.

[0004] However, in order to ensure the high parallel computing capability of the GPU, the GPU has reduced functions such as data prefetching and complex logic calculations. When processing branch jump calculations, there is a huge waste of computing power, which leads to the overall computing power utilization of the GPU in some application scenarios being at an extremely low level, seriously restricting the expansion of the application areas of the GPU. Summary of the invention

[0005] In view of the problem that there is a huge waste of computing power when processing branch jump calculations, which leads to extremely low overall computing power utilization of GPU in some application scenarios and seriously restricts the expansion of GPU application fields, the present invention provides a task scheduling system and method based on thread warp reorganization.

[0006] In the first aspect, the technical solution of the present invention also provides a task scheduling system based on thread warp reorganization, comprising a thread block scheduling module, an instruction execution pipeline, a first-level operand collector, a second-level operand collector, a distribution module, an execution module and a write-back module; the second-level operand collector is provided with a reorganized thread warp cache module; The thread block scheduling module caches all thread blocks that need to be calculated; each thread block contains a number of thread warps; the thread block scheduling module controls the instruction execution pipeline to extract the instructions corresponding to the same program counter of the current branch of the thread block for decoding; the instructions involve read and write operations on registers in the thread warp; The first-level operand collector reads the register file data corresponding to each thread warp in the thread block for storage, and sends all operands of the thread warp to the second-level operand collector; wherein the register file data is the operand required to execute the instruction; When polling different thread warps of a thread block, the second-level operand collector extracts active threads in the thread warp according to the active mark of the thread warp mask information, reorganizes the extracted active threads into thread warps, and caches them into the reorganized thread warp cache module; The distribution module monitors the reorganized thread bundle cache module in real time, and when the reorganized thread bundle cache module is in a non-empty state, reads the reorganized thread bundle in the reorganized thread bundle cache module and sends it to the subsequent execution module; After the reorganized thread warp is executed, when writing back to the register file, the write-back module splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the original thread warp.

[0007] As a further limitation of the technical solution of the present invention, after all branches are executed, during the execution of non-branch operations, the thread block scheduling module controls the second-level operand collector to bypass, so that the distribution module directly reads the operands of the first-level operand collector and sends them to the execution module.

[0008] As a further limitation of the technical solution of the present invention, the second-level operand collector is provided with an active thread extraction module; The active thread extraction module extracts active thread warps in the thread warps according to the active mark of the thread warp mask information, and rearranges the active threads in the thread warps in order from low to high to generate a reorganized thread number and stores it in the reorganized thread warp cache module.

[0009] As a further limitation of the technical solution of the present invention, the second-level operand collector is further provided with a thread warp mask cache module; The mask information corresponding to the warp in all the operands of the warp issued by the first-level operand collector is sequentially stored in the warp mask cache module.

[0010] As a further limitation of the technical solution of the present invention, the instruction execution pipeline is provided with an instruction decoding module, and the second-level operand collector is provided with a branch reorganization warp cache module; During branch calculation, when polling different thread bundles of the thread block, there is an idle cycle in the instruction decoding module. The thread block scheduling module uses the idle cycle to control the instruction execution pipeline to read the calculation instructions of other branches for decoding. The first-level operand collector sequentially reads the thread bundles of the thread block and reads the data of the register file corresponding to the thread bundle. After the first-level operand collector completes the operand collection, it is sent to the active thread extraction module to extract the active thread, reorganize the thread bundle into a new thread bundle, and send it to the branch reorganization thread bundle cache module.

[0011] As a further limitation of the technical solution of the present invention, the reorganized thread warp cache module monitors the barrier or merge instructions of branch execution according to the execution status of the instruction, marks the last group of valid reorganized thread warps, and sends it to the distribution module by way of status marking; at the same time, after the instruction execution pipeline obtains the branch barrier or merge instruction, it sends the status mark to the thread block scheduling module for control, and the thread block scheduling module controls the issuance of calculation instructions of other branches to the instruction execution pipeline, and starts to execute the calculation of the remaining other branches.

[0012] As a further limitation of the technical solution of the present invention, after the distribution module reads the last group of reorganized thread bundles in the reorganized thread bundle cache module, it monitors the branch reorganized thread bundle cache module and executes the thread bundle of the new branch; when the branch reorganized thread bundle cache module is in a non-empty state, it reads the reorganized thread bundle in the branch reorganized thread bundle cache module, and after the branch reorganized thread bundle cache module is read empty, it switches to the reorganized thread bundle cache module and reads the subsequent reorganized thread bundles of the new branch of the reorganized thread bundle cache module; the distribution module marks the branch reorganized thread bundle cache module as being in an empty state and sends it to the thread block scheduling module, the thread block scheduling module controls the data prefetching of other branches, or waits for the execution of all branches to be completed, and executes the instructions after the branch merge.

[0013] As a further limitation of the technical solution of the present invention, after the execution of the reorganized thread warp is completed, when writing back to the register file, the write-back module reads the thread warp mask cache module of the second-level operand collector, splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the original thread warp.

[0014] In a second aspect, the technical solution of the present invention provides a task scheduling method based on warp reorganization, comprising the following steps: Cache all thread blocks that need to be calculated; each thread block contains several thread warps; Take out the instruction corresponding to the same program counter of the current branch of each thread block for decoding, and read the register file data corresponding to each thread warp in the thread block for storage; When polling different thread warps of a thread block, active threads in the thread warp are extracted according to the active mark of the thread warp mask information, and the extracted active threads are reorganized into thread warps; and cached into the reorganized thread warp cache module; Monitor the reorganized thread bundle cache module in real time, and when the reorganized thread bundle cache module is in a non-empty state, read the reorganized thread bundle in the reorganized thread bundle cache module and send it to the subsequent execution unit; After the reorganized thread warp is executed, when writing back to the register file, the calculation result operands of the reorganized thread warp are split according to the mask information of the original thread warp and written back to the corresponding register file of the original thread warp.

[0015] As a further limitation of the technical solution of the present invention, the step of reorganizing the extracted active threads into thread warps includes: Active threads in each warp are extracted in sequence according to the warp number and stored in the reorganized warp. When the reorganized warp is fully loaded, the threads are automatically stored in the next reorganized warp. The number of threads in the reorganized warp is the same as the number of threads in the warp before reorganization.

[0016] As a further limitation of the technical solution of the present invention, the method further includes: The reorganized thread warp cache module monitors the barrier or merge instructions of branch execution according to the execution status of the instruction, marks the last group of valid reorganized thread warps, and sends them to the distribution module through the status mark; at the same time, after the instruction execution pipeline obtains the barrier or merge instruction of branch execution, it sends the status mark; Based on the status mark control, the instructions corresponding to the starting program counters of other branches are sent to the instruction execution pipeline to start the calculation of other branches.

[0017] As a further limitation of the technical solution of the present invention, the method further includes: During branch calculation, poll different thread warps of the thread block, and when there is an idle cycle, read instructions for other branch calculations, and sequentially read thread warps of the corresponding thread block, and read register files corresponding to the thread warps for storage; According to the active mark of the thread warp mask information, the active threads in the thread warp are extracted, and the extracted active threads are warp reorganized; and cached in the branch reorganization thread warp cache module.

[0018] As a further limitation of the technical solution of the present invention, the method further includes: After reading the last set of reorganized thread bundles in the reorganized thread bundle cache module, monitor the branch reorganization cache module and execute the thread bundles of the new branch; when the branch reorganization cache module is in a non-empty state, read the reorganized thread bundles in the branch reorganization cache module, and after reading empty, switch to the reorganization thread bundle cache module to read the subsequent reorganized thread bundles of the new branch.

[0019] As a further limitation of the technical solution of the present invention, the method further includes: After all branches are executed, during the execution of non-branch operations, the stored register file data is directly read and sent to the subsequent execution unit.

[0020] The beneficial effects of the technical solution of the present invention are: through a scheduling method based on thread warp polling within a thread block, all thread warps with branch operations are executed sequentially, the number of repeated reading and writing of thread warps is reduced, and the reading and writing efficiency of register files and operand collectors is improved; similar branch operation threads are collected by a second-level operand collector to form a fully loaded thread warp, thereby improving the effective utilization of the computing unit; the operands of other branch operations are pre-fetched by the second-level operand collector to achieve zero-delay switching of thread warps, thereby further improving the effective utilization of the computing unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solution of the present invention, the accompanying drawings required for use in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0022] Figure 1 Schematic diagram of a system provided by an embodiment of the present invention.

[0023] Figure 2 It is a schematic diagram of a reorganization method of a branch operation warp in an embodiment of the present invention.

[0024] Figure 3 A schematic diagram of a flow chart of a method provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The present invention mainly relates to a thread bundle scheduling management method for GPU hardware resources. The software generates instruction data for GPU execution and issues it, and sets a special thread bundle barrier instruction so that the GPU, during the execution process, preferentially executes the thread branch instruction and then stops executing, ensuring that all thread bundles of the same thread block enter the branch execution process after executing the barrier instruction. In order to make the purpose, features, and advantages of the present invention more obvious and easy to understand, the technical scheme of the present invention will be clearly and completely described below in conjunction with the drawings in this specific embodiment. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of this application.

[0026] like Figure 1 As shown, the technical solution of the present invention also provides a task scheduling system based on thread warp reorganization, including a thread block scheduling module, an instruction execution pipeline, a first-level operand collector, a second-level operand collector, a distribution module, an execution module and a write-back module; the second-level operand collector is provided with a reorganized thread warp cache module; The thread block scheduling module caches all thread blocks that need to be calculated; each thread block contains a number of thread warps; the thread block scheduling module controls the instruction execution pipeline to extract the instructions corresponding to the same program counter of the current branch of the thread block for decoding; the instructions involve read and write operations on registers in the thread warp; The first-level operand collector reads the register file data corresponding to each thread warp in the thread block for storage, and sends all operands of the thread warp to the second-level operand collector; wherein the register file data is the operand required to execute the instruction; When polling different thread warps of a thread block, the second-level operand collector extracts active threads in the thread warp according to the active mark of the thread warp mask information, reorganizes the extracted active threads into thread warps, and caches them into the reorganized thread warp cache module; The distribution module monitors the reorganized thread bundle cache module in real time, and when the reorganized thread bundle cache module is in a non-empty state, reads the reorganized thread bundle in the reorganized thread bundle cache module and sends it to the subsequent execution module; After the reorganized thread warp is executed, when writing back to the register file, the write-back module splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the original thread warp.

[0027] After all branches are executed, during the execution of non-branch operations, the thread block scheduling module controls the second-level operand collector to bypass, so that the distribution module directly reads the operands of the first-level operand collector and sends them to the execution module.

[0028] In some embodiments, the second-level operand collector is provided with an active thread extraction module; The active thread extraction module extracts active thread warps in the thread warps according to the active mark of the thread warp mask information, and rearranges the active threads in the thread warps in order from low to high to generate a reorganized thread number and stores it in the reorganized thread warp cache module.

[0029] In some embodiments, the second-level operand collector is further provided with a warp mask cache module; The mask information corresponding to the warp in all the operands of the warp issued by the first-level operand collector is sequentially stored in the warp mask cache module.

[0030] In some embodiments, the instruction execution pipeline is provided with an instruction decoding module, and the second-level operand collector is provided with a branch reorganization warp cache module; During branch calculation, when polling different thread bundles of the thread block, there is an idle cycle in the instruction decoding module. The thread block scheduling module uses the idle cycle to control the instruction execution pipeline to read the calculation instructions of other branches for decoding. The first-level operand collector sequentially reads the thread bundles of the thread block and reads the data of the register file corresponding to the thread bundle. After the first-level operand collector completes the operand collection, it is sent to the active thread extraction module to extract the active thread, reorganize the thread bundle into a new thread bundle, and send it to the branch reorganization thread bundle cache module.

[0031] In some embodiments, the reorganized thread warp cache module monitors the barrier or merge instructions of branch execution according to the execution status of the instruction, marks the last group of valid reorganized thread warps, and sends them to the distribution module by way of status marking; at the same time, after the instruction execution pipeline obtains the branch barrier or merge instruction, it sends the status mark to the thread block scheduling module for control, and the thread block scheduling module controls the issuance of calculation instructions of other branches to the instruction execution pipeline, and starts to execute the calculation of the remaining other branches.

[0032] In some embodiments, after the distribution module reads the last group of reorganized thread bundles in the reorganized thread bundle cache module, it monitors the branch reorganized thread bundle cache module and executes the thread bundle of the new branch; when the branch reorganized thread bundle cache module is in a non-empty state, it reads the reorganized thread bundles in the branch reorganized thread bundle cache module, and after the branch reorganized thread bundle cache module is read empty, it switches to the reorganized thread bundle cache module and reads the subsequent reorganized thread bundles of the new branch of the reorganized thread bundle cache module; the distribution module marks the branch reorganized thread bundle cache module as being in an empty state and sends it to the thread block scheduling module, and the thread block scheduling module controls the data prefetching of other branches, or waits for the execution of all branches to be completed and executes the instructions after the branch merge.

[0033] In some embodiments, after the reorganized thread warp is executed, when it is written back to the register file, the write-back module reads the thread warp mask cache module of the second-level operand collector, splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the original thread warp.

[0034] Based on the system provided by the embodiment of the present invention, the steps of performing task scheduling include: S1. The thread block scheduling module caches all thread blocks that need to be calculated. When determining the branch condition, the unidirectional conditional branch is fixedly executed. The thread block scheduling module controls the instruction pipeline, takes out the PC corresponding instruction of the current branch of a thread block for decoding, and reads the register file data corresponding to the thread warp of the thread block. After the first-level operand collector completes the operand collection, it directly sends all the operands of the thread warp to the second-level operand collector.

[0035] The active thread extraction module extracts the active thread bundles in the thread bundle according to the active mark of the mask of the thread bundle, and the active thread extraction module rearranges the active threads in the thread bundle in order from low to high. Figure 2 As shown, a single thread warp contains 8 threads, solid lines are active threads, and dotted lines are inactive threads. The thread warp 1 emitted by the first-level operand collector contains four active threads, which are extracted by the active thread extraction module and stored in the first four positions of the reorganized thread warp 1. In the same way, in the next cycle, the active threads ②, ③, ⑥, and ⑦ of the thread warp 2 are extracted and stored in the last four positions of the reorganized thread warp 1. In the third cycle, the active thread ⑧ of the thread warp 2 is stored in the first position of the reorganized thread warp 2; the active threads ② and ③ of the thread warp 3 are extracted and stored in the second and third positions of the reorganized thread warp 2; the active threads ①, ②, ③, ⑥, and ⑦ of the thread warp 4 are extracted and stored in the last five positions of the reorganized thread warp 2.

[0036] The reorganized thread bundles are stored in the reorganized thread bundle cache module, and the cache depth is set to 3, which not only maintains the reading and writing of the reorganized thread bundles, but also ensures that the thread bundles issued by the first-level operand collector can continue to be stored after a reorganized thread bundle is fully formed, thereby reducing the power consumption of re-reading the thread bundles.

[0037] At the same time, the mask corresponding to the thread warp issued by the first-level operand collector is sequentially stored in the thread warp mask cache module for data write-back operation; the depth of the thread warp mask cache module is N (the thread block allowed by the hardware contains the maximum number of thread warps), where N is the depth of the branch reorganization thread warp cache module; the thread block scheduling module, when processing the thread warp branch calculation, enables the thread warp polling scheduling within the thread block to provide active threads with the same program counter (PC) for the two-level operand collector.

[0038] After a single branch instruction jumps, before the branch ends directly, the masks corresponding to different PCs of the fixed warp are exactly the same. Therefore, the warp mask cache module only stores the warp mask when executing the first PC of the branch operation.

[0039] In the embodiment of the present invention, the depth of the reorganized warp cache module is adjustable; the total number of threads contained in a single warp is adjustable, and the 8 threads shown in the present invention are only for illustration; S2. During branch calculation, when polling different thread bundles of the thread block, there is an idle cycle in the instruction decoding module; the thread block scheduling module controls the reading of calculation instructions of other branches, and sequentially reads the low-order thread bundles of the thread block, reads the register file corresponding to the thread bundle, and after the first-level operand collector completes the operand collection, sends it to the active thread extraction module, extracts the active thread, reorganizes it into a new thread bundle according to the thread bundle reorganization mode of S1, and sends it to the branch reorganization thread bundle cache module; preferably, the active thread extraction module can be merged into one, and the thread bundle reorganization of the reorganization thread bundle cache module is executed first; S3, the distribution module monitors the reorganized thread bundle cache module in real time, and when the reorganized thread bundle cache module is in a non-empty state, reads the reorganized thread bundle and sends it to the subsequent execution module; The reorganized thread warp cache module monitors the barrier or merge instructions of branch execution according to the execution status of the instruction, marks the last group of valid reorganized thread warps, and sends them to the distribution module through the status mark; at the same time, after the instruction execution pipeline obtains the branch barrier or merge instruction, it sends the status mark to the thread block scheduling module for control, and the thread block scheduling module controls the sending of the starting PC of other branches to the instruction pipeline to start executing other branches; After the distribution module reads the last set of reorganized thread bundles, it monitors the branch reorganized thread bundle cache module and executes the thread bundles of the new branch; when the branch reorganized thread bundle cache module is in a non-empty state, it reads the reorganized thread bundles therein, and after reading empty, switches to the reorganized thread bundle cache module to read the subsequent reorganized thread bundles of the new branch; the distribution module marks the branch reorganized thread bundle cache module as being in an empty state and sends it to the thread block scheduling module, which controls the data prefetching of other branches, or waits for the execution of all branches to be completed and executes the instructions after the branch merge.

[0040] S4. After the reorganized thread warp is executed, when writing back to the register file, the write-back module reads the thread warp mask cache module of the second-level operand collector, splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the basic thread warp.

[0041] After all branches are executed, during the execution of non-branch operations, the thread block scheduling module controls the bypass function of the second-level operand collector, so that the distribution module directly reads the operands of the first-level operand collector and sends them to the subsequent execution module for execution.

[0042] The second-level operand collector collects the active branch threads issued by the first-level operand collector and reorganizes them into complete thread bundles adapted to the computing unit; the thread block scheduling module enables thread bundle polling scheduling within the thread block when processing thread bundle branch calculations, provides active threads with the same program counter (PC) for the two-level operand collectors, and sends instructions of another branch PC when decoding is idle, controlling the operand collector to pre-fetch data for the corresponding branch thread bundle; the bypass function of the second-level operand collector bypasses the second-level operand collector during non-branch calculations, and directly sends the data of the first-level operand collector to the distribution module to execute parallel computing tasks. The present invention minimizes the frequency of idle computing units and improves the computing power utilization of the GPU through the scheduling control method of thread bundle reorganization.

[0043] like Figure 3 As shown, an embodiment of the present invention provides a task scheduling method based on warp reorganization, comprising the following steps: Step 1: Cache all thread blocks that need to be calculated; each thread block contains several thread warps; Step 2: Take out the instruction corresponding to the same program counter of the current branch of each thread block for decoding, and read the register file data corresponding to each thread warp in the thread block for storage; Step 3: When polling different thread warps of the thread block, active threads in the thread warp are extracted according to the active flag of the thread warp mask information, and the extracted active threads are reorganized into thread warps; and cached in the reorganized thread warp cache module; Step 4: monitor the reorganized thread bundle cache module in real time. When the reorganized thread bundle cache module is in a non-empty state, read the reorganized thread bundle in the reorganized thread bundle cache module and send it to the subsequent execution unit; Step 5: After the reorganized thread warp is executed, when writing back to the register file, the calculation result operands of the reorganized thread warp are split according to the mask information of the original thread warp, and written back to the corresponding register file of the original thread warp.

[0044] In some embodiments, the step of reorganizing the extracted active threads into thread warps includes: Active threads in each warp are extracted in sequence according to the warp number and stored in the reorganized warp. When the reorganized warp is fully loaded, the threads are automatically stored in the next reorganized warp. The number of threads in the reorganized warp is the same as the number of threads in the warp before reorganization.

[0045] According to the active flag of the warp mask, the active warp in the warp is extracted, and the active threads in the warp are rearranged in order from low to high. Figure 2As shown, a single thread warp contains 8 threads, solid lines are active threads, and dotted lines are inactive threads. The thread warp 1 issued by the first-level operand collector contains four active threads, and the extracted active threads are stored in the first four positions of the reorganized thread warp 1. In the same way, in the next cycle, the active threads ②, ③, ⑥, and ⑦ of the thread warp 2 are extracted and stored in the last four positions of the reorganized thread warp 1. In the third cycle, the active thread ⑧ of the thread warp 2 is stored in the first position of the reorganized thread warp 2; the active threads ② and ③ of the thread warp 3 are extracted and stored in the second and third positions of the reorganized thread warp 2; the active threads ①, ②, ③, ⑥, and ⑦ of the thread warp 4 are extracted and stored in the last five positions of the reorganized thread warp 2.

[0046] In some embodiments, the method further comprises: The reorganized thread bundle cache module monitors the barrier or merge instructions of branch execution according to the execution status of the instructions, marks the last set of valid reorganized thread bundles, and sends them to the distribution module through status marking; at the same time, after the instruction execution pipeline obtains the barrier or merge instructions of branch execution, it sends the status mark; based on the status mark control, the instructions corresponding to the starting program counters of other branches are sent to the instruction execution pipeline to start executing the calculations of other branches.

[0047] During branch calculation, poll different thread warps of the thread block, and when there is an idle cycle, read instructions for other branch calculations, and sequentially read thread warps of the corresponding thread block, and read register files corresponding to the thread warps for storage; According to the active mark of the thread warp mask information, the active threads in the thread warp are extracted, and the extracted active threads are warp reorganized; and cached in the branch reorganization thread warp cache module.

[0048] In some embodiments, the method further comprises: After reading the last set of reorganized thread bundles in the reorganized thread bundle cache module, monitor the branch reorganization cache module and execute the thread bundles of the new branch; when the branch reorganization cache module is in a non-empty state, read the reorganized thread bundles in the branch reorganization cache module, and after reading empty, switch to the reorganization thread bundle cache module to read the subsequent reorganized thread bundles of the new branch.

[0049] After all branches are executed, during the execution of non-branch operations, the stored register file data is directly read and sent to the subsequent execution unit.

[0050] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A task scheduling system based on warp reorganization, characterized in that: It includes a thread block scheduling module, an instruction execution pipeline, a first-level operand collector, a second-level operand collector, a distribution module, an execution module and a write-back module; the second-level operand collector is provided with a reorganized thread bundle cache module; The thread block scheduling module caches all thread blocks that need to be calculated; each thread block contains a number of thread warps; the thread block scheduling module controls the instruction execution pipeline to extract the instructions corresponding to the same program counter of the current branch of the thread block for decoding; the instructions involve read and write operations on registers in the thread warp; The first-level operand collector reads the register file data corresponding to each thread warp in the thread block for storage, and sends all operands of the thread warp to the second-level operand collector; wherein the register file data is the operand required to execute the instruction; When polling different thread warps of a thread block, the second-level operand collector extracts active threads in the thread warp according to the active flag of the thread warp mask information, reorganizes the extracted active threads into thread warps, and caches them into the reorganized thread warp cache module; The distribution module monitors the reorganized thread bundle cache module in real time, and when the reorganized thread bundle cache module is in a non-empty state, reads the reorganized thread bundle in the reorganized thread bundle cache module and sends it to the subsequent execution module; After the reorganized thread warp is executed, when writing back to the register file, the write-back module splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the original thread warp.

2. The task scheduling system based on thread warp reorganization according to claim 1, characterized in that: After all branches are executed, during the execution of non-branch operations, the thread block scheduling module controls the second-level operand collector to bypass, so that the distribution module directly reads the operands of the first-level operand collector and sends them to the execution module.

3. The task scheduling system based on thread warp reorganization according to claim 2, characterized in that: The second-level operand collector is provided with an active thread extraction module; The active thread extraction module extracts active thread warps in the thread warps according to the active mark of the thread warp mask information, and rearranges the active threads in the thread warps in order from low to high to generate a reorganized thread number and stores it in the reorganized thread warp cache module.

4. The task scheduling system based on thread warp reorganization according to claim 3, characterized in that: The second-level operand collector is also provided with a warp mask cache module; The mask information corresponding to the warp in all the operands of the warp issued by the first-level operand collector is sequentially stored in the warp mask cache module.

5. The task scheduling system based on thread warp reorganization according to claim 4, characterized in that: The instruction execution pipeline is provided with an instruction decoding module, and the second-level operand collector is provided with a branch reorganization thread warp cache module; During branch calculation, when polling different thread bundles of the thread block, there is an idle cycle in the instruction decoding module. The thread block scheduling module uses the idle cycle to control the instruction execution pipeline to read the calculation instructions of other branches for decoding. The first-level operand collector sequentially reads the thread bundles of the thread block and reads the data of the register file corresponding to the thread bundle. After the first-level operand collector completes the operand collection, it sends it to the active thread extraction module, extracts the active thread, reorganizes the thread bundle into a new thread bundle, and sends it to the branch reorganization thread bundle cache module.

6. The task scheduling system based on warp reorganization according to claim 5, characterized in that: The reorganized thread warp cache module monitors the barrier or merge instructions of branch execution according to the execution status of the instructions, marks the last set of valid reorganized thread warps, and sends them to the distribution module through status marking; at the same time, after the instruction execution pipeline obtains the branch barrier or merge instruction, it sends the status mark to the thread block scheduling module control, and the thread block scheduling module controls the issuance of calculation instructions of other branches to the instruction execution pipeline and starts to execute the calculation of the remaining other branches.

7. The task scheduling system based on warp reorganization according to claim 6, characterized in that: After the distribution module reads the last group of reorganized thread bundles in the reorganized thread bundle cache module, it monitors the branch reorganized thread bundle cache module and executes the thread bundles of the new branch; when the branch reorganized thread bundle cache module is in a non-empty state, it reads the reorganized thread bundles in the branch reorganized thread bundle cache module, and after the branch reorganized thread bundle cache module is read empty, it switches to the reorganized thread bundle cache module and reads the subsequent reorganized thread bundles of the new branch of the reorganized thread bundle cache module; The distribution module marks the branch reorganization thread bundle cache module read empty state and sends it to the thread block scheduling module. The thread block scheduling module controls the data prefetching of other branches, or waits for the completion of all branches and executes the instructions after the branch merge.

8. The task scheduling system based on warp reorganization according to claim 7, characterized in that: After the reorganized thread warp is executed, when writing back to the register file, the write-back module reads the thread warp mask cache module of the second-level operand collector, splits the calculation result operands of the reorganized thread warp according to the mask information of the original thread warp, and writes them back to the corresponding register file of the original thread warp.

9. A task scheduling method based on thread warp reorganization, characterized in that: The steps include: Cache all thread blocks that need to be calculated; each thread block contains several thread warps; Take out the instruction corresponding to the same program counter of the current branch of each thread block for decoding, and read the register file data corresponding to each thread warp in the thread block for storage; When polling different thread warps of a thread block, active threads in the thread warp are extracted according to the active mark of the thread warp mask information, and the extracted active threads are reorganized into thread warps; And cache it to the reorganized thread warp cache module; Monitor the reorganized thread bundle cache module in real time, and when the reorganized thread bundle cache module is in a non-empty state, read the reorganized thread bundle in the reorganized thread bundle cache module and send it to the subsequent execution unit; After the reorganized thread warp is executed, when writing back to the register file, the calculation result operands of the reorganized thread warp are split according to the mask information of the original thread warp and written back to the corresponding register file of the original thread warp.

10. The task scheduling method based on warp reorganization according to claim 9, characterized in that: The steps of reorganizing the extracted active threads into thread warps include: Active threads in each warp are extracted in sequence according to the warp number and stored in the reorganized warp. When the reorganized warp is fully loaded, the threads are automatically stored in the next reorganized warp. The number of threads in the reorganized warp is the same as the number of threads in the warp before reorganization.

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