Display substrate and display screen

Abstract

Embodiments of the present application provide a display substrate and a display screen. A source driving chip includes a timing detection module. The timing detection module detects a VCC voltage signal and an STBYB signal to determine whether the display substrate meets an abnormal power-down condition. If it is determined that the display substrate is abnormally powered down, the source driving chip controls a clock signal to be turned on. The source driving chip continues to write a gate scanning signal to a gate line. Meanwhile, the source driving chip controls a data line and a common electrode to be connected to a low voltage signal. In this way, the low voltage signal output by the source driving chip can neutralize the residual charge in the display substrate, thereby solving the picture abnormality problem caused by abnormal power-down.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display substrate and a display screen. Background Art

[0002] LCD (Liquid Crystal Display) achieves its display effect by deflecting the liquid crystal through the electric field formed between the pixel electrode and the Com (common) electrode. When normally lit, each pixel unit inside the display substrate is filled with a certain amount of charge. However, when the external power supply device of the display substrate is suddenly disconnected (including power outages, direct unplugging, turning off the switch, etc.), the charge inside the display substrate is likely to remain, causing problems such as ghosting and screen flickering. Summary of the Invention

[0003] The purpose of the embodiments of the present application is to provide a display substrate and a display screen. The specific technical solutions are as follows:

[0004] In a first aspect, an embodiment of the present application provides a display substrate, the display substrate comprising gate lines, data lines, common electrodes, and a source driver chip; the source driver chip is connected to the data lines, the gate lines, and the common electrodes;

[0005] The source driver chip includes a timing detection module; the timing detection module includes a first terminal and a second terminal, the first terminal is connected to VCC, and the second terminal is connected to STBYB;

[0006] The timing detection module is used to determine whether the display substrate meets the abnormal power-off condition based on the VCC voltage signal and the STBYB signal. When the display substrate is in an abnormal power-off condition, the source driver chip controls the gate line to write a gate scan signal and controls the data line and the common electrode to access a low-level voltage signal.

[0007] In a possible implementation manner, the source driver chip is specifically used for:

[0008] When VCC and STBYB are powered off at the same time, or the power-off time of STBYB is earlier than the power-off time of VCC, and the interval between the power-off time of STBYB and the power-off time of VCC does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

[0009] In a possible implementation, the source driver chip further includes a first voltage stabilizing circuit module; the first voltage stabilizing circuit module includes a plurality of voltage stabilizing units, and the initial voltage signal corresponding to each of the voltage stabilizing units has a different extension time;

[0010] The source driver chip is also used for:

[0011] In a case where it is determined that the display substrate is in an abnormal power-off, a first time is obtained, the first time being a time during which the initial voltage signal needs to be prolonged;

[0012] A difference between the initial voltage signal prolongation time corresponding to each of the voltage stabilizing units and the first time is calculated, and a voltage stabilizing unit with the smallest difference is determined as a target voltage stabilizing unit;

[0013] The target voltage stabilizing unit is controlled to be connected with the initial voltage signal, and other voltage stabilizing units except the target voltage stabilizing unit are controlled not to be connected with the initial voltage signal.

[0014] In a possible implementation, each of the voltage stabilizing units is connected in series with the initial voltage signal through at least one selection switch; and the voltage stabilizing units are connected in parallel;

[0015] The source driving chip is configured to, in a case where it is determined that the display substrate is in an abnormal power-off, control all the selection switches corresponding to the target voltage stabilizing unit to be closed, and control at least one selection switch corresponding to other voltage stabilizing units to be opened.

[0016] In a possible implementation, the voltage stabilizing unit includes a diode and a first capacitor, and the diode and the first capacitor are connected in parallel.

[0017] In a possible implementation, the display substrate includes a voltage stabilizing selection button; and the voltage stabilizing selection button is configured to select whether to start the first voltage stabilizing circuit module.

[0018] The source driving chip is further configured to:

[0019] In a case where it is determined that the display substrate is in an abnormal power-off, a first time is obtained in response to an instruction of starting the first voltage stabilizing circuit module by a user, the first time being a time during which the initial voltage signal needs to be prolonged;

[0020] A difference between the initial voltage signal prolongation time corresponding to each of the voltage stabilizing units and the first time is calculated, and a voltage stabilizing unit with the smallest difference is determined as a target voltage stabilizing unit;

[0021] The target voltage stabilizing unit is controlled to be connected with the initial voltage signal, and other voltage stabilizing units except the target voltage stabilizing unit are controlled not to be connected with the initial voltage signal.

[0022] In a possible implementation, the source driving chip further includes a voltage detection module, and the voltage detection module includes a third terminal connected with a VDD voltage.

[0023] The source driving chip is configured to:

[0024] When the VDD voltage drops to a preset voltage threshold for a preset time, it is determined that the display substrate meets an abnormal power-off condition.

[0025] In a possible implementation, the display substrate further includes a peripheral voltage stabilization module;

[0026] The peripheral voltage stabilization module is connected to the initial voltage signal of the source driver chip.

[0027] In a possible implementation, the peripheral voltage stabilization module includes a second capacitor;

[0028] A first end of the second capacitor is connected to the initial voltage signal of the source driver chip, and a second end of the second capacitor is grounded.

[0029] In a second aspect, an embodiment of the present application provides a display screen comprising any display substrate described in the first aspect.

[0030] Beneficial effects of the embodiments of the present application:

[0031] In an embodiment of the present application, a display substrate and a display screen are provided. The source driver chip includes a timing detection module that determines whether the display substrate meets the abnormal power-off condition by detecting the VCC voltage signal and the STBYB signal. If it is determined that the display substrate has been abnormally powered off, the source driver chip controls the clock signal to be turned on, and the source driver chip continues to write the gate scan signal to the gate line. At the same time, the source driver chip controls the data line and the common electrode to be connected to the low-level voltage signal. In this way, the low-level voltage signal output by the source driver chip can neutralize the remaining charge inside the display substrate, thereby solving the problem of abnormal picture caused by abnormal power-off.

[0032] Of course, it is not necessary to achieve all the advantages described above at the same time when implementing any product or method of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0034] Figure 1 A first schematic diagram of a display substrate provided in an embodiment of the present application;

[0035] Figure 2 A second schematic diagram of a display substrate provided in an embodiment of the present application;

[0036] Figure 3A first schematic diagram of a first voltage stabilizing circuit module provided in an embodiment of the present application;

[0037] Figure 4 A second schematic diagram of the first voltage stabilizing circuit module provided in an embodiment of the present application;

[0038] Figure 5 A third schematic diagram of a display substrate provided in an embodiment of the present application;

[0039] Figure 6 A fourth schematic diagram of a display substrate provided in an embodiment of the present application;

[0040] Figure 7 A schematic diagram of a process flow of a display substrate provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field based on this application are within the scope of protection of this application.

[0042] like Figure 1 As shown, the present application provides a display substrate, which includes a gate line 110, a data line 120, and a source driver chip 130; the source driver chip 130 is connected to the data line 120 and the gate line 110;

[0043] The source driver chip 130 includes a timing detection module 131 ; the timing detection module 131 includes a first terminal and a second terminal, the first terminal is connected to VCC 140 , and the second terminal is connected to STBYB 150 ;

[0044] The timing detection module 131 is used to determine whether the display substrate meets the abnormal power-off condition based on the VCC140 voltage signal and the STBYB150 signal. When the display substrate is in an abnormal power-off condition, the source driver chip 130 controls the clock signal to be turned on. After the clock signal is turned on, it is used to indicate that a gate scan signal is written to the gate line 110, and controls the data line 120 and the common electrode 160 to be connected to a low-level voltage signal.

[0045] The display substrate of the LCD includes a plurality of gate lines 110 and a plurality of data lines 120. The gate lines 110 can be arranged along a row direction, and the data lines 120 are arranged along a column direction. The gate lines 110 and the data lines 120 are arranged in a cross manner to define a plurality of pixel regions. Each pixel region is provided with a TFT (Thin Film Transistor) and a pixel unit. The gate lines 110 are connected to the gate electrodes of a row of pixel TFTs, the data lines 120 are connected to the source electrodes of a column of pixel TFTs, the drain electrodes of the pixel TFTs are connected to one end of the pixel electrodes of the pixel units, and the other end of the pixel electrodes of the pixel units are connected to a common electrode.

[0046] The gate lines 110 control the opening and closing of the TFTs, and the data lines 120 control the display voltage of the pixel units. When driving the display substrate to display, a gate scanning signal can be written to the gate lines 110, and a data voltage signal can be written to each data line 120, so as to apply a pixel voltage to the pixel electrodes of the pixel units, and the pixel units in the display substrate are lit row by row.

[0047] The source driving chip 130 (Source IC) can write a gate scanning signal to the gate lines 110 row by row, so as to apply a voltage to the gate electrodes to turn on the thin film transistors, and write a data voltage signal to each data line 120, so as to apply a pixel voltage to the pixel electrodes of the pixel units through the source electrodes and the drain electrodes, so that the pixel units in the display panel are lit row by row.

[0048] The Source IC can generate an initial voltage signal (VGH), a clock signal, a data voltage signal, and a common electrode voltage signal. The data voltage signal generated by the Source IC is connected to the data lines, the common electrode voltage signal is connected to the common electrode, and the clock signal can be connected to the gate lines, so that the gate lines write a gate scanning signal to control the opening and closing of the TFTs.

[0049] The VCC 140 voltage is provided to the liquid crystal display driving circuit and the source driving chip 130, and the STBYB 150 is a standby voltage of the display substrate. It can be known from the STBYB 150 whether the display substrate is in a powered-on state or a powered-off state. For example, when the display substrate is powered on, the STBYB 150 is at a high level, and when the display substrate is powered off, the STBYB 150 is at a low level.

[0050] The timing detection module 131 is connected to the VCC 140 and the STBYB 150, and can detect the VCC 140 voltage signal and the STBYB 150 voltage signal. The timing detection module 131 determines whether the display substrate satisfies an abnormal power-down condition according to the VCC 140 voltage signal and the STBYB 150 voltage signal.

[0051] Abnormal power-off conditions can be determined based on the order in which the VCC 140 and STBYB 150 voltage signals are powered down. For example, if the power is directly disconnected, i.e., VCC 140 and STBYB 150 are powered down simultaneously, the display substrate is determined to have met the abnormal power-off condition. Alternatively, if the display substrate is hot-swapped, i.e., if the STBYB 150 is powered down earlier than the VCC 140, and the interval between the STBYB 150 and VCC 140 power-off times does not meet the preset power-off requirement, the display substrate is determined to have met the abnormal power-off condition.

[0052] Exemplarily, the timing detection module 131 connects to VCC 140 and STBYB 150, obtains voltage signals from VCC 140 and STBYB 150, and determines whether VCC 140 and STBYB 150 are powered off based on the magnitude of the voltage signals. Exemplarily, when the timing detection module 131 detects that the voltage value of VCC 140 and / or STBYB 150 is lower than a preset voltage value, for example, when the timing detection module 131 detects that the voltage value of VCC 140 and / or STBYB 150 is 0, it is determined that VCC 140 and / or STBYB 150 is powered off. The timing detection module 131 may also record the power-off time of VCC 140 and STBYB 150. Based on the preset abnormal power-off condition, it is determined whether the display substrate meets the abnormal power-off condition.

[0053] At the moment of abnormal power-off, the display substrate cannot release the residual charge in its display panel due to long-term operation. If it is determined that the display substrate is abnormally powered off, the source driver chip 130 controls the clock signal to turn on, and the source driver chip 130 continues to write the gate scan signal to the gate line 110. At the same time, the source voltage signal and the common electrode voltage output by the source driver chip 130 are low-level voltage signals, so that the data line and the common electrode are connected to the low-level voltage signal, for example, the data line and the common electrode are controlled to be grounded. Because the source driver chip 130 controls the clock signal to turn on, the pixel TFT is turned on, so the low-level voltage signal output by the source driver chip 130 can neutralize the remaining charge in the display substrate, thereby solving the problem of abnormal picture caused by abnormal power-off.

[0054] In a possible implementation, the source driver chip 130 is specifically configured to:

[0055] When VCC140 and STBYB150 are powered off at the same time, or the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

[0056] When VCC140 and STBYB150 are powered off simultaneously, a direct power outage can be detected. When STBYB150 powers off earlier than VCC140, and the interval between STBYB150 and VCC140 does not meet the preset power-off requirement, the display substrate is hot-swappable. The preset power-off requirement can be determined based on actual conditions and is not limited here. Based on these two conditions, abnormal power-off conditions for the display substrate can be determined. This allows for correcting screen anomalies caused by hot-swappable or direct power-off conditions, even if the display substrate is hot-swapped or loses power.

[0057] like Figure 2 As shown, in a possible implementation, the source driver chip 130 further includes a first voltage stabilizing circuit module 132; the first voltage stabilizing circuit module 132 includes multiple groups of voltage stabilizing units, and the initial voltage signal extension time corresponding to each of the voltage stabilizing units is different;

[0058] The source driver chip 130 is also used for:

[0059] When it is determined that the display substrate is abnormally powered off, obtaining a first time, where the first time is a time period during which the initial voltage signal needs to be extended;

[0060] Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit;

[0061] The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

[0062] A first voltage stabilizing circuit module 132 may be added to the source driver chip 130. The first voltage stabilizing circuit module may be composed of multiple groups of voltage stabilizing electrical elements. Each group of voltage stabilizing electrical elements corresponds to an initial voltage signal extension time. The initial voltage signal extension time corresponding to each voltage stabilizing unit is different. Figure 3 As shown, the first voltage stabilizing circuit module may have n groups of voltage stabilizing cells (voltage stabilizing unit 1321 , voltage stabilizing unit 1322 , . . . , voltage stabilizing unit 132n ).

[0063] The first time is determined based on the performance of the display substrate. Generally, the first time can be user-defined. The initial voltage signal is the VGH voltage signal, where VGH is the gate-on voltage of the TFT. Generally, the first time is determined based on the overall power consumption of the display substrate. The user obtains the overall power consumption of the display substrate to determine the first time.

[0064] The initial voltage signal extension time corresponding to each group of voltage-stabilizing elements can be stored inside the source driver chip 130. For example, the initial voltage signal extension time corresponding to each group of voltage-stabilizing elements can be stored inside the source driver chip 130 in the form of a table, and the source driver chip 130 can select the target voltage-stabilizing unit by looking up the table.

[0065] The source driver chip 130 can obtain the first time input by the user, then calculate the difference between the initial voltage signal extension time corresponding to each voltage stabilizing unit and the first time, and determine the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit. After determining the target voltage stabilizing unit, the target voltage stabilizing unit is connected to the initial voltage signal, and the other voltage stabilizing units are disconnected from the initial voltage signal. The first voltage stabilizing circuit module is used to store more charge, thereby slowing down the power-down speed of the initial voltage signal (VGH) and extending the output time of the initial voltage signal. In turn, this extends the on-time of the TFTs in the display substrate, ensuring that the TFTs are fully on.

[0066] In a possible implementation, each of the voltage stabilizing units is connected in series with the initial voltage signal via at least one selection switch; and each of the voltage stabilizing units is connected in parallel;

[0067] The source driver chip 130 is configured to control all selection switches corresponding to the target voltage stabilizing unit to be closed and control at least one selection switch corresponding to other voltage stabilizing units to be open when determining that the display substrate is abnormally powered off.

[0068] The voltage stabilizing units are connected in parallel, and each voltage stabilizing power supply is connected in series with the initial voltage signal through at least one selection switch. If the source driver chip 130 determines that the display substrate is abnormally powered off, it controls the target voltage stabilizing unit to be connected to the initial voltage signal by controlling the selection switch corresponding to the target voltage stabilizing unit, and controls the other voltage stabilizing units except the target voltage stabilizing unit to be disconnected from the initial voltage signal.

[0069] For example, Figure 4 As shown, the first voltage-stabilizing circuit module 132 includes four voltage-stabilizing units, each of which includes a diode and a first capacitor connected in parallel. For example, voltage-stabilizing unit 1 includes a diode D1 and a first capacitor C1, voltage-stabilizing unit 2 includes a diode D2 and a first capacitor C2, voltage-stabilizing unit 3 includes a diode D3 and a first capacitor C3, and voltage-stabilizing unit 4 includes a diode D4 and a first capacitor C4. If voltage-stabilizing unit 1 is selected, S0 and S1 are controlled to be closed, S1 Bar is controlled to be disconnected, at least one of S0 Bar and S2 Bar is controlled to be disconnected, and at least one of S0 Bar and S2 Bar is controlled to be disconnected. The selection switch can be used to control which voltage-stabilizing unit is connected to the initial voltage signal. GND is the ground signal.

[0070] In a possible implementation, the voltage stabilizing unit includes a diode and a first capacitor, and the diode and the first capacitor are connected in parallel.

[0071] The voltage stabilizing unit includes a voltage stabilizing diode and a voltage stabilizing capacitor. More charge is stored by the voltage stabilizing diode and the voltage stabilizing capacitor, thereby slowing down the power-down speed of the initial voltage signal (VGH), extending the output time of the initial voltage signal, and further extending the opening time of the TFT in the display substrate, so that the TFT is fully opened.

[0072] In a possible implementation, the display substrate includes a voltage stabilization selection button; the voltage stabilization selection button is used to select whether to turn on the first voltage stabilization circuit module;

[0073] The source driver chip 130 is also used for:

[0074] When it is determined that the display substrate is abnormally powered off, in response to a user's instruction to start the first voltage stabilizing circuit module, obtaining a first time, the first time being a time during which the initial voltage signal needs to be extended;

[0075] Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit;

[0076] The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

[0077] The display substrate may provide a voltage stabilization selection button, and the user may operate the voltage stabilization selection button to select whether to enable the first voltage stabilization circuit module. For example, the user operates the voltage stabilization selection button to enable the first voltage stabilization circuit module. When the source driver chip 130 determines that the display substrate is abnormally powered off, in response to the user's instruction to enable the first voltage stabilization circuit module, the first time is obtained, the difference between the initial voltage signal extension time corresponding to each voltage stabilization unit and the first time is calculated, and the voltage stabilization unit with the smallest difference is determined as the target voltage stabilization unit.

[0078] If the user chooses not to turn on the first voltage stabilization circuit module, the source driver chip 130 may choose not to turn on the voltage stabilization module corresponding to the first voltage stabilization circuit module when determining that the display substrate is abnormally powered off, or may choose other methods to extend the output time of the initial voltage signal, or may not perform voltage stabilization.

[0079] For example, Figure 4For example, three selection gears are set for the VGH voltage stabilizing unit, and the most suitable voltage stabilizing unit can be selected according to the overall power consumption of the display substrate. If the VGH voltage stabilizing function is not selected to be turned on, the DC gear can select a default value. The specific table is shown in Table 1.

[0080] Table 1

[0081]

[0082] In a possible implementation, the source driving chip 130 further includes a voltage detection module, and the voltage detection module includes a third terminal connected with the VDD voltage.

[0083] The source driving chip 130 is configured to:

[0084] In a case where the VDD voltage drops to a preset voltage threshold for a preset time, it is determined that the display substrate satisfies an abnormal power-down condition.

[0085] The VDD voltage is a positive power supply voltage provided by a transistor or the like in a GOA (Gate Driver on Array) circuit. The voltage detection module can detect the VDD voltage to determine whether the display substrate satisfies the abnormal power-down condition. If the VDD voltage drops to a preset voltage threshold for a preset time, for example, if it is detected that the VDD voltage drops to 2.4 V for a certain time, it is indicated that the display substrate satisfies the abnormal power-down condition. At this time, the source driving chip 130 sends a command to control the CLK signal to be fully turned on, so that all rows in the display substrate are turned on at the same time, and then the Source voltage signal and the VCOM signal are given to the GND signal. In this way, the low-level voltage signal output by the source driving chip 130 can neutralize the remaining charges in the display substrate, thereby solving the picture abnormality problem caused by abnormal power-down.

[0086] As Figure 5 shown, in a possible implementation, the display substrate further includes a peripheral voltage stabilizing module 170.

[0087] The peripheral voltage stabilizing module 170 is connected with the initial voltage signal of the source driving chip 130.

[0088] The peripheral voltage stabilizing module is not in the source driving chip 130. The source driving chip 130 outputs an initial voltage signal, and the peripheral voltage stabilizing module stores more charges through the initial voltage signal output by the source driving chip 130, so as to slow down the power-down speed of the initial voltage signal (VGH), prolong the output time of the initial voltage signal, and further prolong the opening time of the TFT in the display substrate, so that the TFT is fully opened.

[0089] As Figure 6 As shown, in a possible implementation, the peripheral voltage stabilization module includes a second capacitor C5;

[0090] A first end of the second capacitor is connected to the initial voltage signal of the source driver chip 130 , and a second end of the second capacitor is grounded.

[0091] The size of the second capacitor C5 can be determined based on actual conditions, for example, it can be 2.2 μF.

[0092] Based on the above embodiments, Figure 7 As shown, this application provides a workflow diagram for displaying a substrate, including:

[0093] S110, source driver chip power-off timing detection;

[0094] The timing detection module 131 is used to determine whether the display substrate meets the abnormal power-off condition according to the VCC 140 voltage signal and the STBYB 150 signal.

[0095] S120, determine whether the power-off sequence is abnormal; if yes, execute step S130, if not, execute step S160.

[0096] Abnormal power-off conditions can be determined based on the order in which the VCC 140 and STBYB 150 voltage signals are powered down. For example, if the power is directly disconnected, i.e., VCC 140 and STBYB 150 are powered down simultaneously, the display substrate is determined to have met the abnormal power-off condition. Alternatively, if the display substrate is hot-swapped, i.e., if the STBYB 150 is powered down earlier than the VCC 140, and the interval between the STBYB 150 and VCC 140 power-off times does not meet the preset power-off requirement, the display substrate is determined to have met the abnormal power-off condition.

[0097] When VCC140 and STBYB150 are powered off at the same time, or the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition, that is, the power-off timing is abnormal.

[0098] S130, start the abnormal power-off sequence.

[0099] The source driver chip controls the clock signal to turn on. After the clock signal is turned on, it is used to indicate that the gate scanning signal is written to the gate line, and controls the data line and the common electrode to access the low-level voltage signal.

[0100] S140, starting the internal voltage stabilization circuit of the source driver chip.

[0101] The display substrate may provide a voltage stabilization selection button, and the user may operate the voltage stabilization selection button to select whether to enable the first voltage stabilization circuit module. For example, the user operates the voltage stabilization selection button to enable the first voltage stabilization circuit module. When the source driver chip 130 determines that the display substrate is abnormally powered off, the source driver chip 130 responds to the user's instruction to enable the first voltage stabilization circuit module and activates the voltage stabilization circuit within the source driver chip.

[0102] S150, selecting a target voltage stabilizing unit.

[0103] The first time is obtained, the difference between the initial voltage signal extension time corresponding to each voltage stabilizing unit and the first time is calculated, and the voltage stabilizing unit with the smallest difference is determined as the target voltage stabilizing unit.

[0104] S160, start the normal power-off sequence.

[0105] An embodiment of the present application provides a display screen, comprising any of the display substrates described above.

[0106] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0107] Each embodiment in this specification is described in a related manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referenced to each other.

[0108] The above description is only a preferred embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application are included in the scope of protection of the present application.

Claims

1. A display substrate, characterized in that: The display substrate includes gate lines, data lines, common electrodes, and a source driver chip; the source driver chip is connected to the data lines, the gate lines, and the common electrodes; The source driver chip includes a timing detection module; the timing detection module includes a first terminal and a second terminal, the first terminal is connected to VCC, and the second terminal is connected to STBYB; The timing detection module is used to determine whether the display substrate meets the abnormal power-off condition according to the VCC voltage signal and the STBYB signal. When the display substrate is in the abnormal power-off condition, the source driver chip controls the gate line to write the gate scanning signal and controls the data line and the common electrode to connect to the low-level voltage signal; The source driver chip further includes a first voltage stabilizing circuit module; the first voltage stabilizing circuit module includes multiple groups of voltage stabilizing units, and the initial voltage signal extension time corresponding to each of the voltage stabilizing units is different; The source driver chip is also used for: When it is determined that the display substrate is abnormally powered off, obtaining a first time, where the first time is a time period during which the initial voltage signal needs to be extended; Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit; The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

2. The display substrate according to claim 1, wherein: The source driver chip is specifically used for: When the VCC and the STBYB are powered off at the same time, or the power-off time of the STBYB is earlier than the power-off time of the VCC, and the interval between the power-off time of the STBYB and the power-off time of the VCC does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

3. The display substrate according to claim 1, wherein Each of the voltage stabilizing units is connected in series with the initial voltage signal via at least one selection switch; each of the voltage stabilizing units is connected in parallel; The source driver chip is used to control all selection switches corresponding to the target voltage stabilizing unit to be closed and control at least one selection switch corresponding to other voltage stabilizing units to be open when it is determined that the display substrate is abnormally powered off.

4. The display substrate according to claim 1, wherein The voltage stabilizing unit includes a diode and a first capacitor, and the diode and the first capacitor are connected in parallel.

5. The display substrate according to claim 1, wherein The display substrate includes a voltage stabilization selection button; the voltage stabilization selection button is used to select whether to turn on the first voltage stabilization circuit module; The source driver chip is also used for: When it is determined that the display substrate is abnormally powered off, in response to a user's instruction to start the first voltage stabilizing circuit module, obtaining a first time, the first time being a time during which the initial voltage signal needs to be extended; Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit; The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

6. The display substrate according to claim 1, wherein: The source driver chip further includes a voltage detection module, the voltage detection module includes a third terminal, and the third terminal is connected to the VDD voltage; The source driver chip is used for: When the VDD voltage drops to a preset voltage threshold for a preset time, it is determined that the display substrate meets an abnormal power-off condition.

7. The display substrate according to claim 6, wherein: The display substrate further includes a peripheral voltage stabilization module; The peripheral voltage stabilization module is connected to the initial voltage signal of the source driver chip.

8. The display substrate according to claim 7, wherein: The peripheral voltage stabilization module includes a second capacitor; A first end of the second capacitor is connected to the initial voltage signal of the source driver chip, and a second end of the second capacitor is grounded.

9. A display screen, characterized in that: The display substrate comprises any one of claims 1 to 8.

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