Line adaptive fault ride-through method based on rapid gear zeroing of exciting transformer

By configuring a mutually exclusive thyristor group in a dual-core phase shift transformer and using an adaptive compensation algorithm, the impact of the dual-core phase shift transformer on line protection during the current adjustment process is solved, and more accurate fault judgment and action is achieved.

CN119419695AActive Publication Date: 2025-02-11NORTH CHINA ELECTRIC POWER UNIV
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Patent Information

Application Number
CN202411553329.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-01
Publication Date
2025-02-11
Estimated Expiration
2044-11-01

AI Technical Summary

Technical Problem

During the current regulation process, the dual-core phase shift transformer causes changes in the line impedance, voltage and current signals of the power system, affecting the accuracy of line distance protection and fault positioning.

Method used

By configuring a mutually exclusive thyristor group on the secondary side of the excitation transformer of a symmetrical double-core phase shift transformer, and using the control strategy and distance protection adaptive compensation algorithm in the event of line failure, the gear position of the excitation transformer is quickly adjusted, and the line distance is eliminated The impact of protection.

Benefits of technology

It effectively eliminates the impact of the access of the dual-core phase-shift transformer on line distance protection, improves the accuracy of line fault judgment and operation, and ensures the adaptability and flexibility of line protection.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a line adaptive fault ride-through method based on rapid gear zeroing of an exciting transformer, which comprises the following steps of: configuring a mutual exclusion thyristor group on a secondary side of the exciting transformer of a symmetrical double-core phase-shifting transformer, setting a monitoring point on a primary side, and when the monitoring point receives a line fault signal, setting the primary side of the exciting transformer of the symmetrical double-core phase-shifting transformer; applying a trigger pulse to the thyristor pair corresponding to the zero-gear tap of the exciting transformer to remove the trigger pulses of the other thyristor pairs; obtaining zero-gear equivalent impedance according to the nameplate parameters; compensating the measurement impedance of the current-level line according to the zero-gear equivalent impedance to obtain first impedance; compensating the measurement impedance of the adjacent line according to the zero-gear equivalent impedance to obtain second impedance; and judging and acting the line fault according to the first impedance and the second impedance. According to the invention, the influence of the access of the symmetric dual-core phase-shifting transformer on the line distance protection is eliminated by using the control strategy of the thyristor group and the distance protection adaptive compensation algorithm when the line fails.
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Description

Technical Field

[0001] The invention relates to the technical field of dual-core phase-shifting transformer protection, and in particular to a line adaptive fault ride-through method based on rapid zeroing of an excitation transformer gear position. Background Art

[0002] The power system needs to vigorously develop renewable energy power generation and integrate it into the power grid. However, a high proportion of renewable energy grid connection may bring a series of problems to the power system. Therefore, in order to ensure that the power system has high flexibility and regulation capabilities, corresponding measures must be taken. The application of power flow control equipment can effectively improve power flow distribution and increase the transmission capacity of the power grid, and is an important means of regulation of the power system. The double-core phase-shifting transformer is a device for power flow regulation. It consists of a series transformer and an excitation transformer. It can adjust the phase of the current and voltage of the transmission line to achieve the regulation of the line flow.

[0003] However, due to the phase-shifting function and equivalent impedance of the phase-shifting transformer itself, when adjusting the power flow at different gears, the original line impedance distribution, voltage and current signals in the power system will inevitably change to varying degrees. These signals are important configuration and setting basis for line distance protection. When a fault occurs, it may cause the protection to refuse to operate or malfunction, and may also have a certain impact on the location of the line fault.

[0004] In summary, as a device for power flow regulation, the phase-shifting transformer plays an important role. However, the adaptability of the line protection of the symmetrical double-core phase-shifting transformer still faces some challenges in engineering configuration and implementation, which requires further research and improvement, and the proposal of a new fault ride-through solution. Summary of the invention

[0005] In view of the problems existing in the prior art, the present invention provides a line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, which utilizes the control strategy of the thyristor group and the adaptive compensation algorithm of the distance protection when the line fault occurs, eliminates the influence of the access of the symmetrical double-core phase-shifting transformer on the line distance protection.

[0006] To achieve the above object, the technical solution adopted by the present invention is as follows: a line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, comprising the following steps:

[0007] A mutually exclusive thyristor group is configured on the secondary side of each phase of the excitation transformer of the symmetrical double-core phase-shifting transformer; the mutually exclusive thyristor group includes a plurality of thyristor pairs, and the thyristor pair includes two thyristors connected in reverse parallel; a plurality of gear taps are respectively arranged on the secondary winding of each phase of the excitation transformer, and the gear taps correspond to the thyristor pairs one by one; one end of the thyristor pair is connected to the corresponding gear tap, and the other end of the thyristor pair is connected to the output end of each phase of the excitation transformer; the gear taps include at least a zero gear tap;

[0008] The primary common terminal of each phase of the excitation transformer is grounded, and a monitoring point is respectively arranged between the primary common terminal of each phase of the excitation transformer and the grounding point;

[0009] When the monitoring point receives a line fault signal, a trigger pulse is applied to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer, and the trigger pulses of the remaining thyristor pairs are removed;

[0010] Obtain the nameplate parameters of the symmetrical double-core phase-shifting transformer; obtain the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters;

[0011] Based on the symmetrical double-core phase-shifting transformer, the current level line and the adjacent line are obtained;

[0012] Acquire the measured impedance of the current-stage line according to the current-stage line, and acquire the measured impedance of the adjacent line according to the adjacent line;

[0013] Compensating the measured impedance of the current-stage line according to the zero-range equivalent impedance to obtain a first impedance;

[0014] Compensating the measured impedance of the adjacent line according to the zero-range equivalent impedance to obtain a second impedance;

[0015] A line fault is identified and an action is taken according to the first impedance and the second impedance.

[0016] Furthermore, the nameplate parameters include the primary winding impedance of the series transformer, the secondary winding impedance of the series transformer and the transformation ratio of the series transformer.

[0017] Furthermore, a plurality of zero-crossing points are provided on the primary winding of each phase of the excitation transformer, and the zero-crossing points correspond one-to-one to the gear taps. When the primary side of any phase of the excitation transformer receives a line fault signal, a trigger pulse is applied to the corresponding thyristor pair at the zero-crossing point corresponding to the zero-gear tap.

[0018] Furthermore, the primary side and the secondary side of the series transformer of the symmetrical double-core phase-shifting transformer are respectively connected in a triangle.

[0019] Furthermore, the primary side and the secondary side of the excitation transformer of the symmetrical double-core phase-shifting transformer are respectively star-connected.

[0020] Furthermore, a gear tap is provided on each gear of the secondary winding of the excitation transformer of the symmetrical double-core phase-shifting transformer.

[0021] A fault ride-through protection circuit, used to implement the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, comprising the symmetrical double-core phase-shifting transformer and three mutually exclusive thyristor groups;

[0022] The symmetrical double-core phase-shifting transformer comprises a series transformer and an excitation transformer; each phase of the excitation transformer is provided with a mutually exclusive thyristor group on the secondary side, and each phase of the excitation transformer is provided with a plurality of gear taps on the secondary winding; the primary common end of each phase of the excitation transformer is grounded, and a monitoring point is provided between the primary common end of each phase of the excitation transformer and the grounding point;

[0023] The mutually exclusive thyristor group includes a plurality of thyristor pairs, and the gear taps correspond to the thyristor pairs one by one; the thyristor pair includes two thyristors connected in reverse parallel, one end of the thyristor pair is connected to the corresponding gear tap, and the other end of the thyristor pair is connected to the output end of each phase of the excitation transformer; the gear taps include at least a zero gear tap.

[0024] Further, the series transformer includes a first transformer, a second transformer and a third transformer, and the excitation transformer includes a fourth transformer, a fifth transformer and a sixth transformer;

[0025] The primary side of the first transformer is connected in series to the A-phase bus, the primary side of the second transformer is connected in series to the B-phase bus, and the primary side of the third transformer is connected in series to the C-phase bus;

[0026] A first tap is provided on the primary winding of the first transformer, a second tap is provided on the primary winding of the second transformer, and a third tap is provided on the primary winding of the third transformer;

[0027] The fourth transformer includes a first input terminal, a first common terminal, a first reference terminal and a first output terminal, the fifth transformer includes a second input terminal, a second common terminal, a second reference terminal and a second output terminal, and the sixth transformer includes a third input terminal, a third common terminal, a third reference terminal and a third output terminal;

[0028] The first tap is connected to the first input terminal, the second tap is connected to the second input terminal, and the third tap is connected to the third input terminal;

[0029] The first common terminal, the second common terminal and the third common terminal are grounded respectively, and one monitoring point is respectively set between the first common terminal and the grounding point, between the second common terminal and the grounding point, and between the third common terminal and the grounding point;

[0030] The first reference terminal, the second reference terminal and the third reference terminal are grounded respectively;

[0031] The first end of the secondary side of the first transformer and the tail end of the secondary side of the second transformer are respectively connected to the third output end, the first end of the secondary side of the second transformer and the tail end of the secondary side of the third transformer are respectively connected to the first output end, and the first end of the secondary side of the third transformer and the tail end of the secondary side of the first transformer are respectively connected to the second output end.

[0032] Furthermore, a plurality of the gear taps are evenly arranged between the zero gear and the full gear on the secondary winding of the excitation transformer.

[0033] An electronic device, used to implement the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, comprising a monitoring module, a control module, a calculation module and a fault determination module;

[0034] The monitoring module:

[0035] Used to receive a line fault signal from the monitoring point and generate a fault feedback signal to send to the control module;

[0036] The control module:

[0037] Used to receive the fault feedback signal;

[0038] Used to apply a trigger pulse to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer according to the line feedback signal, and remove the trigger pulses of the remaining thyristor pairs;

[0039] Used to send a control feedback signal to the computing module;

[0040] The computing module:

[0041] Used to calculate the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters of the symmetrical double-core phase-shifting transformer;

[0042] Used to obtain the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer;

[0043] Used to obtain the measured impedance of the current-level line according to the current-level line, and obtain the measured impedance of the adjacent line according to the adjacent line;

[0044] Used to receive the control feedback signal;

[0045] Used to compensate the measured impedance of the current-stage circuit according to the zero-gear equivalent impedance based on the control feedback signal to obtain a first impedance;

[0046] Used to compensate the measured impedance of the adjacent line according to the zero-gear equivalent impedance based on the control feedback signal to obtain a second impedance;

[0047] for sending the first impedance and the second impedance to the fault determination module;

[0048] The fault determination module.

[0049] Used to identify and take action on line faults based on the first impedance and the second impedance.

[0050] Compared with the prior art, the present invention has the following beneficial effects:

[0051] According to the structure of the symmetrical double-core phase-shifting transformer, the present invention installs a mutually exclusive thyristor group on the secondary side of the excitation transformer of the symmetrical double-core phase-shifting transformer, utilizes the control strategy of the thyristor group during line fault and the adaptive compensation algorithm of distance protection, thereby eliminating the influence of the access of the symmetrical double-core phase-shifting transformer on the line distance protection, and has guiding significance for the engineering application and promotion of the symmetrical double-core phase-shifting transformer. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 It is a flow chart of a line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to the present invention;

[0053] Figure 2 It is a schematic diagram of the main structure of the symmetrical double-core phase-shifting transformer of the present invention after connecting to a mutually exclusive thyristor group and a CT configuration diagram;

[0054] Figure 3 This is a structural schematic diagram of the excitation transformer of the present invention connected to a mutually exclusive thyristor group;

[0055] Figure 4 It is a single-phase equivalent circuit diagram of the symmetrical double-core phase-shifting transformer in the present invention;

[0056] Figure 5 A schematic diagram of a symmetrical double-core phase-shifting transformer connected to a double-terminal power supply system according to an embodiment of the present invention;

[0057] Figure 6 It is a schematic diagram of the principle structure of the electronic device of the present invention.

[0058] Among them, the figure markings are: 11, A phase bus; 12, B phase bus; 13, C phase bus; 201, series transformer; 202, excitation transformer; 21, first transformer; 211, first tap; 22, second transformer; 221, second tap; 23, third transformer; 231, third tap; 24, fourth transformer; 241, first input terminal; 242, first common terminal; 243, first reference terminal; 244, first output terminal; 25, fifth transformer; 251, second input terminal; 252, second common terminal; 253, second reference terminal; 254, second output terminal; 26, sixth transformer; 261, third input terminal; 262, third common terminal; 263, third reference terminal; 264, third output terminal; 27, mutually exclusive thyristor group; 271, thyristor pair; 272, gear tap; 28, monitoring point. DETAILED DESCRIPTION

[0059] It is worth noting that the methods used in the present invention are all conventional methods unless otherwise specified; the raw materials and devices used are all conventional commercially available products, and their sources are not specifically limited unless otherwise specified.

[0060] After the symmetrical double-core phase-shifting transformer is connected to the line, when the gear changes, the phase-shifting angle and the equivalent impedance of the symmetrical double-core phase-shifting transformer body will change accordingly, thereby affecting the measured impedance at the protection installation location to varying degrees.

[0061] See also Figure 1 A line adaptive fault ride-through method based on rapid zeroing of excitation transformer gear position comprises the following steps:

[0062] The excitation transformer 202 of the symmetrical double-core phase-shifting transformer is provided with a mutually exclusive thyristor group on the secondary side of each phase; the mutually exclusive thyristor group includes a plurality of thyristor pairs 271. Figure 3 K0, K1, ..., K6, K7, K8 are thyristor pairs 271, respectively, and the thyristor pairs 271 include two thyristors connected in reverse parallel; a plurality of gear taps 272 are provided on the secondary winding of each phase of the excitation transformer 202, and the gear taps 272 correspond to the thyristor pairs 271 one by one; one end of the thyristor pair 271 is connected to the corresponding gear tap 272, and the other end of the thyristor pair 271 is connected to the output end of each phase of the excitation transformer 202; the gear taps 272 include at least a zero gear tap; see Figure 3 The gear tap 272 corresponding to K0 is a zero gear tap;

[0063] Preferably, a gear tap 272 is provided on each gear of the secondary winding of the excitation transformer 202 of the symmetrical double-core phase-shifting transformer;

[0064] A plurality of zero-crossing points are provided on the primary winding of each phase of the excitation transformer 202, and the zero-crossing points correspond to the gear taps 272 one by one. When the primary side of any phase of the excitation transformer 202 receives a line fault signal, a trigger pulse is applied to the corresponding thyristor pair 271 at the zero-crossing point corresponding to the zero gear tap;

[0065] Those skilled in the art will know that the symmetrical double-core phase-shifting transformer includes a series transformer and an excitation transformer. Figure 2-4 , preferably, the primary side and the secondary side of the series transformer 201 of the symmetrical double-core phase-shifting transformer are respectively connected in a triangle;

[0066] The primary side and the secondary side of the excitation transformer 202 of the symmetrical double-core phase-shifting transformer are respectively star-connected;

[0067] The series transformer 201 includes a first transformer 21, a second transformer 22 and a third transformer 23, and the excitation transformer 202 includes a fourth transformer 24, a fifth transformer 25 and a sixth transformer 26;

[0068] The primary side of the first transformer 21 is connected in series to the A-phase bus 11, the primary side of the second transformer 22 is connected in series to the B-phase bus 12, and the primary side of the third transformer 23 is connected in series to the C-phase bus 13;

[0069] A first tap 211 is provided on the primary winding of the first transformer 21, a second tap 221 is provided on the primary winding of the second transformer 22, and a third tap 231 is provided on the primary winding of the third transformer 23;

[0070] The fourth transformer 24 includes a first input terminal 241, a first common terminal 242, a first reference terminal 243 and a first output terminal 244, the fifth transformer 25 includes a second input terminal 251, a second common terminal 252, a second reference terminal 253 and a second output terminal 254, and the sixth transformer 26 includes a third input terminal 261, a third common terminal 262, a third reference terminal 263 and a third output terminal 264;

[0071] The first tap 211 is connected to the first input terminal 241, the second tap 221 is connected to the second input terminal 251, and the third tap 231 is connected to the third input terminal 261. The first tap 211, the second tap 221 and the third tap 231 respectively provide excitation for the excitation transformer 202;

[0072] The first common terminal 242, the second common terminal 252 and the third common terminal 262 are grounded respectively, and a monitoring point 28 is respectively set between the first common terminal 242 and the grounding point, between the second common terminal 252 and the grounding point, and between the third common terminal 262 and the grounding point;

[0073] The first reference terminal 243, the second reference terminal 253 and the third reference terminal 263 are grounded respectively;

[0074] The secondary side head end of the first transformer 21 and the secondary side tail end of the second transformer 22 are respectively connected to the third output terminal 264, the secondary side head end of the second transformer 22 and the secondary side tail end of the third transformer 23 are respectively connected to the first output terminal 244, and the secondary side head end of the third transformer 23 and the secondary side tail end of the first transformer 21 are respectively connected to the second output terminal 254.

[0075] The primary common terminal of each phase of the excitation transformer 202 is grounded, and a monitoring point 28 is respectively arranged between the primary common terminal of each phase of the excitation transformer 202 and the grounding point, and the monitoring point 28 is used to collect the current of the primary side of the excitation transformer 202;

[0076] When the monitoring point 28 receives a line fault signal, a trigger pulse is applied to the thyristor pair 271 corresponding to each phase zero-shift tap of the excitation transformer 202, and the trigger pulses of the remaining thyristor pairs 271 are removed at the same time, so as to realize the shift zeroing, that is, to realize the phase shifting fast zeroing of the symmetrical double-core phase-shifting transformer, that is, the phase shift angle of the symmetrical double-core phase-shifting transformer is 0, and at this time, the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer is a constant value;

[0077] Obtain the nameplate parameters of the symmetrical double-core phase-shifting transformer; obtain the zero-gear equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters; the nameplate parameters include the primary winding impedance of the series transformer, the secondary winding impedance of the series transformer and the transformation ratio of the series transformer;

[0078] According to Figure 4 The equivalent circuit of the symmetrical double-core phase-shifting transformer shown in FIG. 1 can obtain the equivalent impedance of the symmetrical double-core phase-shifting transformer and the ideal phase-shifting angle of the symmetrical double-core phase-shifting transformer as shown in equations (1) and (2) respectively:

[0079]

[0080] In the formula, Z eq is the equivalent impedance of the symmetrical double-core phase-shifting transformer, Z AS is the impedance of the primary winding of the series transformer, Z A2 is the secondary winding impedance of the series transformer, Z ET1 is the primary winding impedance of the excitation transformer, Z ET2 is the secondary winding impedance of the excitation transformer, is the ideal phase shift angle of the symmetrical double-core phase-shifting transformer, j is the imaginary unit, n ET is the series transformer ratio, n ST is the series transformer ratio;

[0081] In the above formula (1) and formula (2), n ET and Z ET2 It will change according to the gear position;

[0082] When the gear is adjusted to zero, n ET Approximate diagnosis of infinity, excitation transformer secondary winding impedance Z ET2 is 0, at this time the ideal phase shift angle of the symmetrical double-core phase-shifting transformer is 0, then the zero-position equivalent impedance of the symmetrical double-core phase-shifting transformer is:

[0083]

[0084] In the formula, Z eq0 is the zero-position equivalent impedance of the symmetrical double-core phase-shifting transformer, Z AS is the impedance of the primary winding of the series transformer, Z A2 is the secondary winding impedance of the series transformer, n ST is the series transformer ratio;

[0085] Based on the symmetrical double-core phase-shifting transformer, obtain the current level line and adjacent lines, see Figure 5 ,For symmetrical double-core phase-shifting transformers, the line between protection 1 and protection 2 is the line of this level, and the line on the left side of protection 1 and the line on the right side of protection 2 are adjacent lines respectively;

[0086] Obtaining the measured impedance of the current-level line according to the current-level line, and obtaining the measured impedance of the adjacent line according to the adjacent line;

[0087] See also Figure 5 , E S and E r is the power supply voltage connected on both sides of the line, Z S and Z r Corresponding to the equivalent impedance of the power supply connected on both sides, Z L1 is the line impedance of line L1, Z L2 is the line impedance of line L2, is the ideal phase shift angle of the symmetrical double-core phase-shifting transformer, Z eq is the equivalent impedance of the symmetrical double-core phase-shifting transformer, is the input side voltage of the symmetrical double-core phase-shifting transformer, is the input side current of the symmetrical double-core phase-shifting transformer, is the output side voltage of the symmetrical double-core phase-shifting transformer, The output current of the symmetrical double-core phase-shifting transformer, is the bus voltage, I ris the bus current. For protection 2, when a single-phase grounding fault occurs at k1, since the fault circuit does not contain a symmetrical double-core phase-shifting transformer, the connection of the symmetrical double-core phase-shifting transformer has no effect on the distance protection stage I; when a phase A grounding fault occurs at k2, the measured impedance of protection 2 is:

[0088]

[0089] In the formula, Z AG2 is the measured impedance of protection 2 when phase A is grounded, U rA The measured voltage of protection 2, I rA To measure the current for protection 2, is the first intermediate value, is the second intermediate value, is the third intermediate value, U f2 is the voltage at the fault point k2, β is the ratio of the distance from the fault location to the protection installation to the total length of the line;

[0090] For the equivalent impedance of the symmetrical double-core phase-shifting transformer, when the gear of the symmetrical double-core phase-shifting transformer is adjusted, the equivalent impedance of the symmetrical double-core phase-shifting transformer changes, which will affect the protection measurement impedance. At the same time, due to the influence of the zero-sequence current, the zero-sequence compensation coefficient of the symmetrical double-core phase-shifting transformer will also change; for the fault point voltage, due to the influence of the phase shift angle of the symmetrical double-core phase-shifting transformer, the positive sequence and negative sequence voltages measured at the protection installation will be offset, and the offset will change with the adjustment of the gear. Therefore, the measured impedance will not reflect the specific location of the fault, and the distance protection will not work correctly. If the measured voltage and current are directly compensated for the phase, the section where the fault occurs cannot be determined. For protection 2, when the fault occurs at k2, direct compensation can work normally; when the fault occurs at k1, it can be seen from the above analysis that the measured impedance is not affected by the symmetrical double-core phase-shifting transformer and does not need to be compensated. If it is directly compensated, it will cause the distance protection to refuse to operate.

[0091] When the phase shift of the symmetrical double-core phase-shifting transformer is quickly adjusted to zero, it is equivalent to inserting a zero-position equivalent impedance Z in series at the output of protection 1. eq0 For the constant impedance of protection 2, no compensation is required for section I; for sections II and III of protection 2, only the corresponding measured impedance needs to be compensated. eq0 The compensation can avoid the influence of phase shift;

[0092] The first impedance is obtained by compensating the measured impedance of the current-level line according to the zero-range equivalent impedance;

[0093] The second impedance is obtained by compensating the measured impedance of the adjacent line according to the zero-range equivalent impedance;

[0094] According to the first impedance and the second impedance, the line fault is judged and acted; based on the distance protection algorithm of the first impedance and the second impedance obtained after compensation, the line fault is judged and acted, specifically, Figure 5 When a single-phase grounding fault occurs at k1, the simulation results of the measured impedance of the traditional distance protection method and the fault ride-through method proposed in the present disclosure at protection 1 are shown in Table 1:

[0095] Table 1 Simulation results of measured impedance at protection 1 using the traditional distance protection method and the fault crossing method proposed in this disclosure

[0096]

[0097] It can be seen that when a single-phase grounding fault occurs at line k1, due to the influence of the symmetrical double-core phase-shifting transformer, the measured impedance of the traditional distance protection at protection 1 is significantly different from the line positive-sequence impedance and cannot reflect the fault distance. The measured impedance may fall outside the distance protection section I action area, and the distance protection 1 cannot operate correctly. The fast zeroing line adaptive fault crossing method provided in the present disclosure measures impedance at protection 1 that is consistent with the line positive-sequence impedance and can correctly reflect the fault distance. The measured impedance at protection 1 falls within the distance protection section II action area, and the distance protection 1 can operate correctly.

[0098] See also Figure 2 , a fault ride-through protection circuit for realizing a line adaptive fault ride-through method based on rapid zeroing of an excitation transformer gear position, comprising a symmetrical double-core phase-shifting transformer and three mutually exclusive thyristor groups 27;

[0099] The symmetrical double-core phase-shifting transformer includes a series transformer 201 and an excitation transformer 202; each phase of the excitation transformer 202 is provided with a mutually exclusive thyristor group 27 on the secondary side, and each phase of the excitation transformer 202 is provided with a plurality of gear taps on the secondary side winding; the primary side common end of each phase of the excitation transformer 202 is grounded, and a monitoring point 28 is provided between the primary side common end of each phase of the excitation transformer 202 and the grounding point;

[0100] The mutually exclusive thyristor group 27 includes a plurality of thyristor pairs 271, and the gear taps 272 correspond to the thyristor pairs 271 one by one. The thyristor pair 271 includes two thyristors connected in reverse parallel, one end of the thyristor pair is connected to the corresponding gear tap 272, and the other end of the thyristor pair 271 is connected to the output end of each phase of the excitation transformer 202; the gear tap 272 includes at least a zero gear tap, see Figure 3 The gear tap 272 corresponding to K0 is a zero gear tap.

[0101] Preferably, a plurality of gear taps 272 are evenly arranged between the zero gear and the full gear on the secondary winding of the excitation transformer 202. The thyristor group 27 serves as an on-load tap changer of the excitation transformer 202, and can adjust the magnitude and direction of the phase shift. Figure 3 The gear tap 272 corresponding to K0 is a zero gear tap. When K0 is turned on and other thyristor pairs 271 are turned off, it is zero gear. When K8 is turned on and other thyristor pairs 271 are turned off, it is a positive full gear displacement phase, that is, a full gear.

[0102] See also Figure 6 , an electronic device for realizing a line adaptive fault ride-through method based on rapid zeroing of an excitation transformer gear position, comprising a monitoring module, a control module, a calculation module and a fault determination module;

[0103] Monitoring module:

[0104] Used to receive the line fault signal from the monitoring point 28 and generate a fault feedback signal to send to the control module;

[0105] Control Module:

[0106] Used to receive fault feedback signals;

[0107] for applying a trigger pulse to the thyristor pair 271 corresponding to the zero-shift tap of each phase of the excitation transformer 202 according to the line feedback signal, and removing the trigger pulses of the remaining thyristor pairs 271;

[0108] Used to send a control feedback signal to the computing module;

[0109] Compute module:

[0110] Used to calculate the zero-speed equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters of the symmetrical double-core phase-shifting transformer;

[0111] Used to obtain the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer;

[0112] Used to obtain the measured impedance of the current-level line according to the current-level line, and to obtain the measured impedance of the adjacent line according to the adjacent line;

[0113] Used to receive control feedback signals;

[0114] Used to compensate the measured impedance of the current level line according to the zero-gear equivalent impedance based on the control feedback signal to obtain the first impedance;

[0115] Used to compensate the measured impedance of the adjacent line according to the zero-gear equivalent impedance based on the control feedback signal to obtain a second impedance;

[0116] for sending the first impedance and the second impedance to a fault determination module;

[0117] Fault determination module.

[0118] Used to identify and act on line faults based on the first impedance and the second impedance.

[0119] Finally, it should be noted that the above content is only used to illustrate the technical solution of the present invention, rather than to limit the scope of protection of the present invention. Simple modifications or equivalent substitutions of the technical solution of the present invention by ordinary technicians in this field do not deviate from the essence and scope of the technical solution of the present invention.

Claims

1. A line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position, characterized in that: The following steps are involved: A mutually exclusive thyristor group is configured on the secondary side of each phase of the excitation transformer of the symmetrical double-core phase-shifting transformer; the mutually exclusive thyristor group includes a plurality of thyristor pairs, and the thyristor pair includes two thyristors connected in reverse parallel; a plurality of gear taps are respectively arranged on the secondary winding of each phase of the excitation transformer, and the gear taps correspond to the thyristor pairs one by one; one end of the thyristor pair is connected to the corresponding gear tap, and the other end of the thyristor pair is connected to the output end of each phase of the excitation transformer; the gear taps include at least a zero gear tap; The primary common terminal of each phase of the excitation transformer is grounded, and a monitoring point is respectively arranged between the primary common terminal of each phase of the excitation transformer and the grounding point; When the monitoring point receives a line fault signal, a trigger pulse is applied to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer, and the trigger pulses of the remaining thyristor pairs are removed; Obtain the nameplate parameters of the symmetrical double-core phase-shifting transformer; obtain the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters; Based on the symmetrical double-core phase-shifting transformer, the current level line and the adjacent line are obtained; Acquire the measured impedance of the current-stage line according to the current-stage line, and acquire the measured impedance of the adjacent line according to the adjacent line; Compensating the measured impedance of the current-stage line according to the zero-range equivalent impedance to obtain a first impedance; Compensating the measured impedance of the adjacent line according to the zero-range equivalent impedance to obtain a second impedance; A line fault is identified and an action is taken according to the first impedance and the second impedance.

2. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: The nameplate parameters include the primary winding impedance of the series transformer, the secondary winding impedance of the series transformer and the transformation ratio of the series transformer.

3. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: A plurality of zero-crossing points are provided on the primary winding of each phase of the excitation transformer, and the zero-crossing points correspond one-to-one to the gear taps. When the primary side of any phase of the excitation transformer receives a line fault signal, a trigger pulse is applied to the corresponding thyristor pair at the zero-crossing point corresponding to the zero-gear tap.

4. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: The primary side and the secondary side of the series transformer of the symmetrical double-core phase-shifting transformer are respectively connected in a triangle.

5. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: The primary side and the secondary side of the excitation transformer of the symmetrical double-core phase-shifting transformer are respectively star-connected.

6. The line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position according to claim 1 is characterized in that: A gear tap is provided on each gear of the secondary winding of the excitation transformer of the symmetrical double-core phase-shifting transformer.

7. A fault ride-through protection circuit, used to implement the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position as described in any one of claims 1 to 6, characterized in that: It includes the symmetrical double-core phase-shifting transformer and three mutually exclusive thyristor groups; The symmetrical double-core phase-shifting transformer comprises a series transformer and an excitation transformer; each phase of the excitation transformer is provided with a mutually exclusive thyristor group on the secondary side, and each phase of the excitation transformer is provided with a plurality of gear taps on the secondary winding; the primary common end of each phase of the excitation transformer is grounded, and a monitoring point is provided between the primary common end of each phase of the excitation transformer and the grounding point; The mutually exclusive thyristor group includes a plurality of thyristor pairs, and the gear taps correspond to the thyristor pairs one by one; the thyristor pair includes two thyristors connected in reverse parallel, one end of the thyristor pair is connected to the corresponding gear tap, and the other end of the thyristor pair is connected to the output end of each phase of the excitation transformer; the gear taps include at least a zero gear tap.

8. The fault ride-through protection circuit according to claim 7, characterized in that: The series transformer includes a first transformer, a second transformer and a third transformer, and the excitation transformer includes a fourth transformer, a fifth transformer and a sixth transformer; The primary side of the first transformer is connected in series to the A-phase bus, the primary side of the second transformer is connected in series to the B-phase bus, and the primary side of the third transformer is connected in series to the C-phase bus; A first tap is provided on the primary winding of the first transformer, a second tap is provided on the primary winding of the second transformer, and a third tap is provided on the primary winding of the third transformer; The fourth transformer includes a first input terminal, a first common terminal, a first reference terminal and a first output terminal, the fifth transformer includes a second input terminal, a second common terminal, a second reference terminal and a second output terminal, and the sixth transformer includes a third input terminal, a third common terminal, a third reference terminal and a third output terminal; The first tap is connected to the first input terminal, the second tap is connected to the second input terminal, and the third tap is connected to the third input terminal; The first common terminal, the second common terminal and the third common terminal are grounded respectively, and one monitoring point is respectively set between the first common terminal and the grounding point, between the second common terminal and the grounding point, and between the third common terminal and the grounding point; The first reference terminal, the second reference terminal and the third reference terminal are grounded respectively; The first end of the secondary side of the first transformer and the tail end of the secondary side of the second transformer are respectively connected to the third output end, the first end of the secondary side of the second transformer and the tail end of the secondary side of the third transformer are respectively connected to the first output end, and the first end of the secondary side of the third transformer and the tail end of the secondary side of the first transformer are respectively connected to the second output end.

9. The fault ride-through protection circuit according to claim 7, characterized in that: A plurality of the gear taps are evenly arranged between the zero gear and the full gear on the secondary winding of the excitation transformer.

10. An electronic device, used to implement the line adaptive fault ride-through method based on rapid zeroing of the excitation transformer gear position as described in any one of claims 1 to 6, characterized in that: It includes a monitoring module, a control module, a calculation module and a fault determination module; The monitoring module: Used to receive a line fault signal from the monitoring point and generate a fault feedback signal to send to the control module; The control module: Used to receive the fault feedback signal; Used to apply a trigger pulse to the thyristor pair corresponding to the zero-speed tap of each phase of the excitation transformer according to the line feedback signal, and remove the trigger pulses of the remaining thyristor pairs; Used to send a control feedback signal to the computing module; The computing module: Used to calculate the zero-shift equivalent impedance of the symmetrical double-core phase-shifting transformer according to the nameplate parameters of the symmetrical double-core phase-shifting transformer; Used to obtain the current level line and adjacent lines based on the symmetrical double-core phase-shifting transformer; Used to obtain the measured impedance of the current-level line according to the current-level line, and obtain the measured impedance of the adjacent line according to the adjacent line; Used to receive the control feedback signal; Used to compensate the measured impedance of the current-stage circuit according to the zero-gear equivalent impedance based on the control feedback signal to obtain a first impedance; Used to compensate the measured impedance of the adjacent line according to the zero-gear equivalent impedance based on the control feedback signal to obtain a second impedance; for sending the first impedance and the second impedance to the fault determination module; The fault determination module: Used to identify and take action on line faults based on the first impedance and the second impedance.

Citation Information

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