Inverter resonance optimization processing method and device
Through sampling, filtering and proportional integral control methods, the resonance points of the LCL-type grid-connected inverter are compensated, which solves the problem of high-frequency resonance in the inverter and improves the stability and performance of the system.
Patent Information
- Application Number
- CN202411470279.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-21
- Publication Date
- 2025-02-11
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
There are high-frequency resonance problems in LCL-type grid-connected inverters, which leads to the howling of inductors and degradation of system performance, affecting the user experience.
By sampling and filtering the power grid current, the filter value is sent to the proportional integration controller, the output result is obtained and superimposed on the current inner loop output, and the resonance point of the LCL filter is compensated according to the SPWM wave transmission control output.
Effectively suppress high-frequency noise, allow low-frequency signals to pass, alleviate or eliminate resonance phenomena, and improve the stability and performance of the system.
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Figure CN119420193A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of LCL type grid-connected inverters, and in particular to an inverter resonance optimization processing method and device. Background Art
[0002] The core module of the new energy power generation system is the grid-connected inverter. The LCL-type grid-connected inverter has been widely recognized for its superior high-frequency harmonic suppression capability. The three-phase grid-connected inverter uses an LCL filter, which has better high-frequency harmonic attenuation and better filtering effect, but the resonance suppression problem needs to be considered. Therefore, the current control strategy of the LCL-type grid-connected inverter can be divided into an indirect current control strategy of inverter-side inductor current control, a direct current control strategy, and a mixed control strategy of the two. In response to the high-frequency resonance problem of the LCL filter of the grid-connected inverter, passive damping control and active damping control are often used to suppress it.
[0003] However, in LCL grid-connected inverters, no matter what current control strategy is adopted, there will be two resonance peaks in the system, namely a low-frequency resonance peak and a high-frequency resonance peak. The fundamental reason is that at the engineering level, the line at the inverter end is inevitably long or too long, resulting in a large impedance, causing the inverter to resonate, and even causing the inductor to howl, causing the system machine to explode, seriously affecting the user experience of the LCL grid-connected inverter. Summary of the invention
[0004] Based on this, in order to solve the problem that the inevitable fluctuations of PV DC, inverter AC output, and grid voltage, current, and power in photovoltaic inverters will affect the FFT analysis results and thus cause false alarms of arc faults in arc detection devices, the embodiments of the present disclosure provide an inverter resonance optimization processing method and device.
[0005] The embodiment of the present disclosure provides an inverter resonance optimization processing method, comprising the steps of:
[0006] Sampling the grid current to obtain a sampling value;
[0007] Performing filtering on the sampled value to obtain a filtered value;
[0008] Sending the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller;
[0009] The output result is superimposed on the current inner loop output, and the resonance point of the LCL filter is compensated according to the SPWM wave control output corresponding to the current inner loop output.
[0010] The inverter resonance optimization processing method of the disclosed embodiment samples the grid current to obtain a sampled value, filters the sampled value to obtain a filtered value, sends the filtered value to a proportional-integral controller, obtains the output result of the proportional-integral controller, superimposes the output result to the current inner loop output, and compensates the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output. Based on this, high-frequency noise can be effectively suppressed, and while allowing low-frequency signals to pass, the resonance phenomenon can be reduced or eliminated.
[0011] As one of the optional embodiments, the process of sampling the grid current to obtain the sampled value includes the steps of:
[0012] The grid current is sampled at a set frequency to obtain a sampling value; wherein the set frequency is 10kHZ-30kHZ.
[0013] As one of the optional embodiments, the set frequency is 20 kHz.
[0014] As one of the optional embodiments, the process of filtering the sampled value to obtain the filtered value comprises the steps of:
[0015] The sampling values are subjected to multiple first-order low-pass filtering to obtain multiple corresponding filtering values.
[0016] As one of the optional embodiments, the process of performing multiple first-order low-pass filtering on the sampled values to obtain multiple corresponding filtered values includes the steps of:
[0017] The sampling values are respectively subjected to two first-order low-pass filtering to obtain two corresponding filtering values; wherein the cutoff frequencies of the two first-order low-pass filtering are respectively the first cutoff frequency and the second cutoff frequency; wherein the first cutoff frequency is less than 2kHZ, and the second cutoff frequency is 3kHZ-5kHZ.
[0018] As an optional embodiment, the first cut-off frequency is 1 kHz, and the second cut-off frequency is 4 kHz.
[0019] As one of the optional embodiments, the process of sending the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller is as follows:
[0020] PD output=KP*I_Filter_R+KD*(I_Filter_D-I_Filter_D_Last);
[0021] The PD output is the output result, the I_Filter_R represents the first cutoff frequency, the I_Filter_D represents the second cutoff frequency, and the I_Filter_D_Last represents the second cutoff frequency of the previous first-order low-pass filtering process of the I_Filter_D.
[0022] The embodiment of the present disclosure also provides an inverter resonance optimization processing device, including:
[0023] A current sampling module is used to sample the grid current and obtain a sampling value;
[0024] A filtering processing module, used for filtering the sampled value to obtain a filtered value;
[0025] A proportional output module, used for sending the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller;
[0026] The resonance compensation module is used to superimpose the output result on the current inner loop output, and compensate the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output.
[0027] The inverter resonance optimization processing device of the disclosed embodiment samples the grid current to obtain a sampled value, filters the sampled value to obtain a filtered value, sends the filtered value to a proportional-integral controller, obtains the output result of the proportional-integral controller, superimposes the output result to the current inner loop output, and compensates the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output. Based on this, high-frequency noise can be effectively suppressed, and the resonance phenomenon can be reduced or eliminated while allowing low-frequency signals to pass.
[0028] At least one embodiment of the present disclosure further provides a data control device, including:
[0029] one or more memories non-transitorily storing computer-executable instructions;
[0030] One or more processors are configured to run computer executable instructions, wherein the computer executable instructions, when executed by the one or more processors, implement the inverter resonance optimization processing method according to any embodiment of the present disclosure.
[0031] The above data control device samples the grid current to obtain a sampled value, filters the sampled value to obtain a filtered value, sends the filtered value to a proportional-integral controller, obtains the output result of the proportional-integral controller, superimposes the output result on the current inner loop output, and compensates the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output. Based on this, high-frequency noise can be effectively suppressed, and while allowing low-frequency signals to pass, the resonance phenomenon can be reduced or eliminated.
[0032] At least one embodiment of the present disclosure further provides a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, an inverter resonance optimization processing method according to any embodiment of the present disclosure is implemented.
[0033] The above non-transient computer-readable storage medium samples the grid current to obtain a sampled value, filters the sampled value to obtain a filtered value, sends the filtered value to a proportional-integral controller, obtains an output result of the proportional-integral controller, superimposes the output result to the current inner loop output, and compensates the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output. Based on this, high-frequency noise can be effectively suppressed, and while allowing low-frequency signals to pass, the resonance phenomenon can be reduced or eliminated. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 It is a flow chart of an inverter resonance optimization processing method of a disclosed embodiment;
[0035] Figure 2 This is a flow chart of an inverter resonance optimization processing method of a preferred embodiment;
[0036] Figure 3 A schematic diagram of output result processing of a disclosed embodiment;
[0037] Figure 4 A module structure diagram of an inverter resonance optimization processing device according to a disclosed embodiment;
[0038] Figure 5 A schematic block diagram of a data control device provided for at least one embodiment of the present disclosure;
[0039] Figure 6 A schematic diagram of a non-transitory computer-readable storage medium provided for at least one embodiment of the present disclosure. DETAILED DESCRIPTION
[0040] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0041] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0042] In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of some known functions and known components.
[0043] The embodiment of the present disclosure provides an inverter resonance optimization processing method.
[0044] Figure 1 FIG. 1 is a flow chart of an inverter resonance optimization processing method according to a disclosed embodiment. Figure 1 As shown, an inverter resonance optimization processing method of a disclosed embodiment includes steps S100 to S103:
[0045] S100, sampling the grid current to obtain a sampling value;
[0046] S101, filtering the sampled value to obtain a filtered value;
[0047] S102, sending the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller;
[0048] S103, superimposing the output result to the current inner loop output, and compensating the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output.
[0049] By means of current sampling, current sampling is performed on the power grid to which the LCL type grid-connected inverter is connected to obtain a sampling value.
[0050] As one of the preferred embodiments, Figure 2 FIG. 1 is a flow chart of an inverter resonance optimization processing method according to a preferred embodiment. Figure 2 As shown, the process of sampling the grid current and obtaining the sampled value in step S100 includes step S200:
[0051] S200, sampling the grid current at a set frequency to obtain a sampling value; wherein the set frequency is 10kHZ-30kHZ.
[0052] The grid current is sampled by setting the frequency, and the obtained sampling value is convenient for subsequent filtering processing. Among them, the setting frequency 10kHZ-30kHZ is the preferred value, which is compatible with the subsequent preferred value of the filter cutoff frequency.
[0053] Preferably, the set frequency is 20 kHz, which is an intermediate value and is suitable for selecting the cutoff frequency of various filtering processes.
[0054] According to the sampling value collected at the set frequency, the sampling value is filtered to obtain the filtered value, which can be used as the data basis of the proportional integral controller.
[0055] As one of the preferred embodiments, Figure 2 As shown, the process of filtering the sampled value in step S101 to obtain the filtered value includes step S201:
[0056] S201, performing multiple first-order low-pass filtering on the sampled values to obtain multiple corresponding filtered values.
[0057] According to the sampling value, first-order low-pass filtering is performed respectively to obtain corresponding filtering values. Among them, different first-order low-pass filtering corresponds to a corresponding filtering value. At the same time, there is an order for sampling the grid current, and multiple sampling values are generated according to the order. The sampling values of each order are respectively subjected to multiple first-order low-pass filtering to obtain multiple corresponding filtering values.
[0058] Preferably, the process of performing multiple first-order low-pass filtering on the sampled values in step S201 to obtain multiple corresponding filtered values comprises the steps of:
[0059] The sampling values are respectively subjected to two first-order low-pass filtering to obtain two corresponding filtering values; wherein the cutoff frequencies of the two first-order low-pass filtering are respectively the first cutoff frequency and the second cutoff frequency; wherein the first cutoff frequency is less than 2kHZ, and the second cutoff frequency is 3kHZ-5kHZ.
[0060] Preferably, the first cut-off frequency is 1 kHz, and the second cut-off frequency is 4 kHz.
[0061] The sampling values of the grid current are subjected to two first-order low-pass filters, with the cut-off frequencies being 1 Hz (represented by I_Filter_R) and 4 kHz (represented by I_Filter_D).
[0062] After determining the filtering value, the filtering value is sent to the proportional-integral controller to obtain the output result of the proportional-integral controller, and the output result is superimposed on the current inner loop output. The resonance point of the LCL filter is compensated according to the SPWM wave control output corresponding to the current inner loop output.
[0063] As one of the preferred embodiments, the process of sending the filtered value to a proportional-integral controller to obtain the output result of the proportional-integral controller is as follows:
[0064] PD output=KP*I_Filter_R+KD*(I_Filter_D-I_Filter_D_Last);
[0065] The PD output is the output result, the I_Filter_R represents the first cutoff frequency, the I_Filter_D represents the second cutoff frequency, and the I_Filter_D_Last represents the second cutoff frequency of the previous first-order low-pass filtering process of the I_Filter_D.
[0066] Figure 3 FIG. 1 is a schematic diagram of output result processing of a disclosed embodiment, such as Figure 3 As shown, the PD module outputs the PD output result, the current inner loop output, and the resonance point of the LCL filter is compensated according to the SPWM wave control output corresponding to the current inner loop output.
[0067] The inverter resonance optimization processing method of any embodiment of the present disclosure samples the grid current to obtain a sampled value, filters the sampled value to obtain a filtered value, sends the filtered value to a proportional-integral controller, obtains the output result of the proportional-integral controller, superimposes the output result to the current inner loop output, and compensates the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output. Based on this, high-frequency noise can be effectively suppressed, and the resonance phenomenon can be reduced or eliminated while allowing low-frequency signals to pass.
[0068] The disclosed embodiment also provides an inverter resonance optimization processing device.
[0069] Figure 4 FIG. 1 is a module structure diagram of an inverter resonance optimization processing device according to a disclosed embodiment. Figure 4As shown, an inverter resonance optimization processing device according to one embodiment includes:
[0070] The current sampling module 100 is used to sample the grid current and obtain a sampling value;
[0071] A filtering processing module 101 is used to filter the sampled value to obtain a filtered value;
[0072] A proportional output module 102, used to send the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller;
[0073] The resonance compensation module 103 is used to add the output result to the current inner loop output, and compensate the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output.
[0074] The inverter resonance optimization processing device of the disclosed embodiment samples the grid current to obtain a sampled value, filters the sampled value to obtain a filtered value, sends the filtered value to a proportional-integral controller, obtains the output result of the proportional-integral controller, superimposes the output result to the current inner loop output, and compensates the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output. Based on this, high-frequency noise can be effectively suppressed, and the resonance phenomenon can be reduced or eliminated while allowing low-frequency signals to pass.
[0075] At least one embodiment of the present disclosure further provides a data control device. Figure 5 A schematic block diagram of a data control device provided by at least one embodiment of the present disclosure. Figure 5 As shown, the data control device 20 may include one or more memories 200 and one or more processors 201. The memory 200 is used to store computer executable instructions non-transiently; the processor 201 is used to run the computer executable instructions, and when the computer executable instructions are run by the processor 201, the processor 201 may execute one or more steps in the inverter resonance optimization processing method according to any embodiment of the present disclosure.
[0076] The specific implementation and related explanation of each step of the inverter resonance optimization processing method can be found in the relevant content of the embodiment of the inverter resonance optimization processing method mentioned above, which will not be repeated here. It should be noted that Figure 5 The components of the data control device 20 shown are merely exemplary and non-limiting. The data control device 20 may also have other components according to actual application requirements.
[0077] In one embodiment, the processor 201 and the memory 200 can communicate with each other directly or indirectly. For example, the processor 201 and the memory 200 can communicate via a network connection. The network may include a wireless network, a wired network, and / or any combination of a wireless network and a wired network, and the present disclosure does not limit the type and function of the network. For another example, the processor 201 and the memory 200 can also communicate via a bus connection. The bus may be a peripheral component interconnect standard (PCI) bus or an extended industrial standard architecture (EISA) bus, etc. For example, the processor 201 and the memory 200 may be arranged at a remote data server end (cloud) or a distributed energy system end (local end), or may be arranged at a client end (e.g., a mobile device such as a mobile phone). For example, the processor 201 may be a device having data processing capability and / or instruction execution capability such as a central processing unit (CPU), a tensor processor (TPU), or a graphics processor GPU, and may control other components in the data prediction device 20 to perform desired functions. The central processing unit (CPU) may be an X86 or ARM architecture, etc.
[0078] In one embodiment, the memory 200 may include any combination of one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. Volatile memory may include, for example, random access memory (RAM) and / or cache memory (cache), etc. Non-volatile memory may include, for example, read-only memory (ROM), hard disk, erasable programmable read-only memory (EPROM), portable compact disk read-only memory (CD-ROM), USB memory, flash memory, etc. One or more computer executable instructions may be stored on the computer-readable storage medium, and the processor 201 may execute the computer executable instructions to implement various functions of the data prediction device 20. Various applications and various data, as well as various data used and / or generated by the application, etc. may also be stored in the memory 200.
[0079] It should be noted that the data control device 20 can achieve technical effects similar to those of the aforementioned inverter resonance optimization processing method, and the repeated parts will not be repeated.
[0080] At least one embodiment of the present disclosure also provides a non-transitory computer-readable storage medium. Figure 6 A schematic diagram of a non-transitory computer-readable storage medium provided for at least one embodiment of the present disclosure. Figure 6As shown, one or more computer executable instructions 301 may be non-transiently stored on a non-transient computer readable storage medium 30. For example, when the computer executable instructions 301 are executed by a computer, the computer may execute one or more steps in the inverter resonance optimization processing method according to any embodiment of the present disclosure.
[0081] In one embodiment, the non-transitory computer-readable storage medium 30 may be applied to the above-mentioned data control device 20 , for example, it may be the memory 200 in the data control device 20 .
[0082] In one embodiment, the description of the non-transitory computer-readable storage medium 30 may refer to the description of the memory 200 in the embodiment of the data control device 20, and the repeated parts will not be repeated.
[0083] It should be noted that the memory 200 stores different non-transiently stored computer executable instructions, and the data control device 20 corresponds to a firmware upgrade device. When the computer executable instructions are executed by the processor 201, the processor 201 can execute one or more steps in the inverter resonance optimization processing method according to any embodiment of the present disclosure.
[0084] There are a few points to note about this disclosure:
[0085] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.
[0086] (2) For the sake of clarity, the thickness and size of layers or structures are exaggerated in the drawings used to describe the embodiments of the present invention. It is understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element, or there may be intervening elements.
[0087] (3) In the absence of conflict, the embodiments of the present disclosure and the features in the embodiments may be combined with each other to obtain new embodiments. The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto. The protection scope of the present disclosure shall be subject to the protection scope of the claims.
[0088] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0089] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.
Claims
1. An inverter resonance optimization processing method, characterized in that: Includes steps: Sampling the grid current to obtain a sampling value; Performing filtering on the sampled value to obtain a filtered value; Sending the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller; The output result is superimposed on the current inner loop output, and the resonance point of the LCL filter is compensated according to the SPWM wave control output corresponding to the current inner loop output.
2. The inverter resonance optimization processing method according to claim 1, characterized in that: The process of sampling the grid current to obtain the sampled value comprises the steps of: The grid current is sampled at a set frequency to obtain a sampling value; wherein the set frequency is 10kHZ-30kHZ.
3. The inverter resonance optimization processing method according to claim 2, characterized in that: The set frequency is 20 kHz.
4. The inverter resonance optimization processing method according to claim 1, characterized in that: The process of filtering the sampled values to obtain filtered values comprises the steps of: The sampling values are subjected to multiple first-order low-pass filtering to obtain multiple corresponding filtering values.
5. The inverter resonance optimization processing method according to claim 4, characterized in that: The process of performing multiple first-order low-pass filtering on the sampled values to obtain multiple corresponding filtered values comprises the steps of: The sampling values are respectively subjected to two first-order low-pass filtering to obtain two corresponding filtering values; wherein the cutoff frequencies of the two first-order low-pass filtering are respectively the first cutoff frequency and the second cutoff frequency; wherein the first cutoff frequency is less than 2kHZ, and the second cutoff frequency is 3kHZ-5kHZ.
6. The inverter resonance optimization processing method according to claim 5, characterized in that: The first cut-off frequency is 1 kHz, and the second cut-off frequency is 4 kHz.
7. The inverter resonance optimization processing method according to claim 5, characterized in that: The process of sending the filtered value to the proportional-integral controller to obtain the output result of the proportional-integral controller is as follows: PD output=KP*I_Filter_R+KD*(I_Filter_D-I_Filter_D_Last); The PD output is the output result, the I_Filter_R represents the first cutoff frequency, the I_Filter_D represents the second cutoff frequency, and the I_Filter_D_Last represents the second cutoff frequency of the previous first-order low-pass filtering process of the I_Filter_D.
8. An inverter resonance optimization processing device, characterized in that: include: A current sampling module is used to sample the grid current and obtain a sampling value; A filtering processing module, used for filtering the sampled value to obtain a filtered value; A proportional output module, used for sending the filtered value to a proportional-integral controller to obtain an output result of the proportional-integral controller; The resonance compensation module is used to superimpose the output result on the current inner loop output, and compensate the resonance point of the LCL filter according to the SPWM wave control output corresponding to the current inner loop output.
9. A non-transitory computer-readable storage medium, characterized in that: The non-transitory computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the inverter resonance optimization processing method as described in any one of claims 1 to 7 is implemented.
10. A data control device, characterized in that: include: one or more memories non-transitorily storing computer-executable instructions; One or more processors are configured to run computer executable instructions, wherein the computer executable instructions, when executed by the one or more processors, implement the inverter resonance optimization processing method as described in any one of claims 1 to 7.