A digitally controlled electrically adjustable notch filter and a digital selection control method

Abstract

The present invention proposes a digitally controlled electrically adjustable trap filter and a number selection control method, belonging to the technical field of trap filter modulation. The method comprises a digital control circuit for generating a drive signal; at least one trap circuit for receiving the drive signal generated by the digital control circuit and performing trap processing on an input radio frequency signal; a vector network analyzer electrically connected to an output end of the at least one trap circuit and configured to perform frequency sweep processing on the output radio frequency signal of the at least one trap circuit after trap processing and output trap frequency information; a personal computer (PC) communicatively connected to the vector network analyzer and configured to set a frequency sweep range of the vector network analyzer and obtain a relationship between the drive signal and the trap frequency information; and a host computer communicatively connected to the PC and, based on the relationship between the drive signal and the trap frequency obtained by the PC, obtains a drive signal adapted to the trap frequency band and feeds the signal back to the digital control circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of notch filter adjustment, and in particular to a digitally controlled electrically adjustable notch filter and a number selection control method. Background Art

[0002] A notch filter is a band-stop filter that blocks signals of a specified frequency. By adjusting its parameters, it can remove or attenuate signals within a specific frequency band. Resonance, which amplifies a specific frequency, attenuates signals within the specified frequency band while maintaining signals outside of the specified frequency band. Notch filters have found applications in communications, signal processing, and other fields, including photovoltaics.

[0003] While conventional single-pole digitally controlled, electrically adjustable notch filters offer low passband insertion loss, their notch depth is also relatively low, and their 3dB bandwidth is narrow, making them less suitable for use. When addressing multiple spurious signals within a multi-band, multiple notch filters often need to be cascaded to remove them. Furthermore, multiple notch filters can interfere with each other, making selection difficult with existing notch filters.

[0004] Based on the above problems, a digitally controlled electrically adjustable notch filter and a selection control method are proposed, which has a good notch depth and can better trap multiple spurious signals, which is very necessary. Summary of the Invention

[0005] In view of this, the present invention proposes a digitally controlled electrically adjustable notch filter and a selection control method thereof, which has high integration, good scalability, and can notch multiple frequency bands or increase the notch depth of the same notch frequency band.

[0006] In one aspect, the present invention provides a digitally controlled electrically adjustable trap filter, comprising:

[0007] A digital control circuit for generating a driving signal;

[0008] at least one notch circuit, receiving the driving signal generated by the digital control circuit and performing notch processing on the input radio frequency signal;

[0009] a vector network analyzer electrically connected to the output end of the at least one trap circuit, configured to perform frequency sweep processing on the output RF signal after trap processing by the at least one trap circuit, and output trap frequency information;

[0010] A PC is connected to the vector network analyzer for setting a frequency sweep range of the vector network analyzer and obtaining a relationship between a driving signal and notch frequency information;

[0011] The host computer is connected to the PC for communication, and obtains a driving signal adapted to the notch frequency band according to the relationship between the driving signal obtained by the PC and the notch frequency, and feeds it back to the CNC circuit.

[0012] On the basis of the above technical solution, preferably, the digital control circuit includes a single-chip microcomputer and several operational amplifier units, the single-chip microcomputer is communicatively connected to the host computer, and the single-chip microcomputer has several DAC output terminals; the several DAC output terminals are electrically connected to the input terminals of several operational amplifier units in a one-to-one correspondence, and the output terminals of the several operational amplifier units are electrically connected to the bias terminal of at least one trap circuit.

[0013] Preferably, the operational amplifier unit includes an operational amplifier, a tenth inductor L10, a third capacitor C3, a fourth capacitor C4, a seventh resistor R7, an eighth resistor R8 and a ninth resistor R9; the DAC output end is electrically connected to the non-inverting input end of the operational amplifier, the power supply VBB is electrically connected to one end of the third capacitor C3 and one end of the tenth inductor L10 respectively, the other end of the tenth capacitor L10 is electrically connected to one end of the fourth capacitor C4 and the power supply end of the operational amplifier respectively, and the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are grounded; the output end of the operational amplifier is electrically connected to one end of the seventh resistor R7 and one end of the eighth resistor R8 respectively, the other end of the eighth resistor is electrically connected to one end of the ninth resistor R9 and the inverting input end of the operational amplifier respectively, and the other end of the ninth resistor R9 is grounded; the other end of the seventh resistor R7 serves as the output end of the operational amplifier unit.

[0014] Further preferably, the at least one trap circuit includes a first inductor L1, a first resistor R1, a fourth inductor L4, a main trap unit and a branch trap unit; the main trap unit includes a first varactor diode VT1, a first capacitor C1, a second inductor L2, a second resistor R2, a first diode D1 and a second diode D2, one end of the first inductor L1 is electrically connected to the input RF signal, the other end of the first inductor L1 is respectively electrically connected to one end of the second inductor L2 and one end of the first capacitor C1, the other end of the first capacitor C1 is respectively electrically connected to the cathode of the first diode D1, the cathode of the second diode D2 and one end of the second resistor R2, the other end of the second resistor R2 is electrically connected to the anode of the first varactor diode VT1, the cathode of the first varactor diode VT1 is grounded, the other end of the second inductor L2 is respectively electrically connected to the anode of the first diode D1, the anode of the second diode D2, one end of the first resistor R1, the branch trap unit and one end of the fourth inductor L4. The other end of the first resistor R1 is grounded, and the other end of the fourth inductor L4 serves as the output end of the trap circuit to output the RF signal. The branch trap unit includes a second varactor diode VT2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a third resistor R3, and a third inductor L3. The anode of the third diode D3 and the anode of the fifth diode D5 are respectively electrically connected to the non-grounded end of the first resistor R1. The cathode of the third diode D3 is respectively electrically connected to the cathode of the fifth diode D5, the cathode of the fourth diode D4, the cathode of the sixth diode D6, and one end of the third resistor R3. The other end of the third resistor R3 is electrically connected to the anode of the second varactor diode VT2. The anode of the fourth diode and the anode of the sixth diode D6 are electrically connected to one end of the third inductor L3. The other end of the third inductor L3 is grounded. The bias ends of the first varactor diode VT1 and the second varactor diode VT2 are respectively electrically connected to the output ends of different operational amplifier units.

[0015] More preferably, in the at least one trap circuit, the trap frequencies of the main trap unit and the branch trap unit are the same or different.

[0016] On the other hand, the present invention provides a digital controlled electric notch filter and a selection control method, comprising the following steps:

[0017] S1: Configure the above-mentioned digitally controlled electronically adjustable notch filter;

[0018] S2: Start the digital control circuit, so that the digital control circuit outputs different DAC signals to drive at least one trap circuit respectively;

[0019] S3: The digital control circuit generates a first drive signal DAC1, which is amplified by the operational amplifier unit and drives the main notch unit of at least one notch circuit to perform independent notch processing on the notch frequency band of the input RF signal. The digital control circuit generates a second drive signal DAC2, which is amplified by the operational amplifier unit and drives the branch notch unit of at least one notch circuit to move the notch frequency point to outside the frequency band of the input RF signal.

[0020] S4: Start the vector network analyzer, obtain the frequency of the main notch unit of at least one notch circuit during frequency sweep and the magnitude of the first drive signal DAC1, and save them to form a frequency point F1-DAC1 signal pair; send the frequency point F1-DAC1 signal pair to the PC;

[0021] S5: The DAC2 signal generated by the digital control circuit causes the branch notch unit of at least one notch circuit to perform notch processing on the notch frequency band of the input RF signal, and at the same time causes DAC1 to drive the notch frequency point of the main notch unit of at least one notch circuit to move to outside the frequency band of the input RF signal; using a vector network analyzer, respectively obtain the frequency of the branch notch unit of at least one notch circuit during frequency sweep and the magnitude of the second drive signal DAC2 and save them to form a frequency point F2-DAC2 signal pair, and send the frequency point F2-DAC2 signal pair to the PC;

[0022] S6: After the PC obtains the frequency-DAC1 signal pair and the frequency-DAC2 signal pair, it performs a segmented number selection operation to obtain the frequency and DAC1 and DAC2 signals that meet the notch depth requirements when the main notch unit and the branch notch unit of at least one notch circuit perform notch processing simultaneously.

[0023] Preferably, the specific content of step S6 is:

[0024] S60: Perform function fitting on the frequency point F1-DAC1 signal pair and the frequency point F2-DAC2 signal pair respectively to obtain a function F1(DAC1) between the notch frequency point and DAC1 when the main notch unit of at least one notch circuit performs independent notch processing; and a function F2(DAC2) between the notch frequency point and DAC2 when the branch notch unit of at least one notch circuit performs independent notch processing;

[0025] S61: Divide the set notch frequency band S of the digital control electronic notch filter into several continuous sub-notch frequency bands S1, S2, ... S n-1 ;

[0026] S62: For each sub-notch frequency band, obtain the DAC1 signal corresponding to the frequency point with the deepest notch depth of the function F1 (DAC1) between the starting position and the ending position of the sub-notch frequency band and its neighborhood, and record it as DAC11, DAC12, ..., DAC1n Similarly, for each sub-notch frequency band, obtain the DAC2 signal corresponding to the frequency point with the deepest notch depth in the neighborhood of the starting position and the ending position of the function F2 (DAC2), respectively, and record it as DAC21, DAC22, ..., DAC2 n ;

[0027] S63: In each sub-notch frequency band, simultaneously enable the main notch unit and the branch notch unit of at least one notch circuit to perform joint notch processing, and find the center frequency value closest to the starting position and the ending position of the sub-notch frequency band and with the deepest notch depth according to the current center frequency value of the joint notch processing, and record the DAC1 and DAC2 signals corresponding to the center frequency of each sub-notch frequency band under the joint notch processing as DAC1 respectively. S ={DAC1 1’ DAC1 2’ ,……,DAC1 n’} and DAC2 S ={DAC2 1’ DAC2 2’ ,……,DAC2 n’}; then:

[0028] DAC1 S＝ =DAC1-△DAC1={DAC11-△DAC11, DAC12-△DAC12,…, DAC1 n -

[0029] △DAC1 n};

[0030] DAC2 S =DAC2+△DAC2={DAC21+△DAC21, DAC22+△DAC22,…, DAC2 n +

[0031] △DAC2 n}; △DAC1 and △DAC2 correspond to the deviation values ​​between the center frequency of the joint notch processing of each sub-notch frequency band and the intermediate frequency point when each sub-notch frequency band is acted upon by the main notch unit or the branch notch unit of at least one notch circuit alone;

[0032] S64: Constructing a relationship between a center frequency F obtained by simultaneous notching of the main notch unit and the branch notch unit of at least one notch circuit, and a second frequency point F1 (DAC1) when the main notch unit of the at least one notch circuit operates independently and a second frequency point F2 (DAC2) when the branch notch unit operates independently;

[0033] F=W1×F1(DAC1-△DAC1)+W2×F2(DAC2+△DAC2)=W1×F1(DAC1 S )

[0034] +W2×F2(DAC2 S ), W1 and W2 are weight coefficients, and the value range of W1 and W2 is [0,1].

[0035] Further preferably, if the starting frequency and ending frequency of the notch band S are both integer multiples of 10 and 100 and can be equally divided, the frequency span range of each sub-notch band is made equivalent; if the starting frequency or ending frequency of the notch band S is not an integer multiple of 10 and 100, or the starting frequency or ending frequency is an integer multiple of 10 and 100 but cannot be equally divided, the frequency span ranges of each sub-notch band at a non-head or end position are set to be equivalent, and the remaining part is used as the head sub-notch band and the end sub-notch band.

[0036] Further preferably, the number of frequency-DAC1 signal pairs and frequency-DAC2 signal pairs is no less than 4096.

[0037] Further preferably, when the number of the trap circuits exceeds one, the trap frequency bands S of different trap circuits are the same or different.

[0038] The present invention provides a digitally controlled electrically adjustable trap filter and a number selection control method, which have the following beneficial effects compared to the prior art:

[0039] (1) The present invention provides a notch circuit for a digitally controlled electrically adjustable notch filter, wherein the main notch unit and the branch notch unit of the circuit respectively achieve resonance to achieve notch of two different specific frequency signals. The main notch unit and the branch notch unit of the same notch circuit can also resonate at the same frequency to achieve adjustment of the notch depth of the same frequency.

[0040] (2) The present invention also provides a number selection control method, that is, a method for screening out the appropriate resonant frequency of the notch circuit. By biasing the varactor diode, the corresponding relationship between the input DAC signal and the output frequency is obtained, and the optimal notch depth when the main notch unit and the branch notch unit work simultaneously is obtained, thereby improving the depth and reliability of the notch filter. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0042] Figure 1 A schematic structural diagram of an embodiment of a digitally controlled electrically adjustable trap filter and a number selection control method according to the present invention;

[0043] Figure 2 for Figure 1 The structural diagram of the trap circuit;

[0044] Figure 3 It is a structural schematic diagram of another embodiment of a digitally controlled electrically adjustable notch filter and a number selection control method of the present invention;

[0045] Figure 4 for Figure 3 The structural diagram of the trap circuit;

[0046] Figure 5 The present invention provides a circuit diagram of an operational amplifier unit for a digitally controlled electrically adjustable notch filter and a number selection control method. DETAILED DESCRIPTION

[0047] The following will be combined with the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0048] Example 1: Figure 1 、 Figure 2 and Figure 5 As shown, the present invention provides a digitally controlled electrically adjustable trap filter, comprising:

[0049] A digital control circuit for generating a driving signal;

[0050] At least one trap circuit receives the driving signal generated by the digital control circuit and performs trap processing on the input radio frequency signal; in this embodiment, only one trap circuit is used. Figure 2 shown.

[0051] a vector network analyzer electrically connected to the output end of the at least one trap circuit, configured to perform frequency sweep processing on the output RF signal after trap processing by the at least one trap circuit, and output trap frequency information;

[0052] A PC is connected to the vector network analyzer for setting a frequency sweep range of the vector network analyzer and obtaining a relationship between a driving signal and notch frequency information;

[0053] The host computer is connected to the PC for communication, and obtains a driving signal adapted to the notch frequency band according to the relationship between the driving signal obtained by the PC and the notch frequency, and feeds it back to the CNC circuit.

[0054] like Figure 1 As shown in the block diagram, the digital control circuit includes a single-chip microcomputer and several operational amplifier units. The single-chip microcomputer is in communication with a host computer and has several DAC output terminals. These DAC output terminals are electrically connected to the input terminals of several operational amplifier units in a one-to-one correspondence. The output terminals of the several operational amplifier units are electrically connected to the bias terminal of at least one trap circuit. The single-chip microcomputer outputs DAC analog signals to drive the trap circuit to perform trap processing.

[0055] like Figure 5 As shown, the operational amplifier unit includes an operational amplifier, a tenth inductor L10, a third capacitor C3, a fourth capacitor C4, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The DAC output terminal is electrically connected to the non-inverting input terminal of the operational amplifier. The power supply VBB is electrically connected to one end of the third capacitor C3 and one end of the tenth inductor L10, respectively. The other end of the tenth capacitor L10 is electrically connected to one end of the fourth capacitor C4 and the power supply terminal of the operational amplifier, respectively. The other end of the third capacitor C3 and the other end of the fourth capacitor C4 are grounded. The output terminal of the operational amplifier is electrically connected to one end of the seventh resistor R7 and one end of the eighth resistor R8, respectively. The other end of the eighth resistor is electrically connected to one end of the ninth resistor R9 and the inverting input terminal of the operational amplifier, and the other end of the ninth resistor R9 is grounded. The other end of the seventh resistor R7 serves as the output terminal of the operational amplifier unit. The operational amplifier unit constitutes a non-inverting proportional amplifier, and the amplification factor is determined by the ratio of the eighth resistor R8 to the ninth resistor R9.

[0056] like Figure 2As shown, the trap circuit includes a first inductor L1, a first resistor R1, a fourth inductor L4, a main trap unit and a branch trap unit; the main trap unit includes a first varactor VT1, a first capacitor C1, a second inductor L2, a second resistor R2, a first diode D1 and a second diode D2, one end of the first inductor L1 is electrically connected to the input RF signal, the other end of the first inductor L1 is respectively electrically connected to one end of the second inductor L2 and one end of the first capacitor C1, the other end of the first capacitor C1 is respectively electrically connected to the cathode of the first diode D1, the cathode of the second diode D2 and one end of the second resistor R2, the other end of the second resistor R2 is electrically connected to the anode of the first varactor VT1, the cathode of the first varactor VT1 is grounded, the other end of the second inductor L2 is respectively electrically connected to the anode of the first diode D1, the anode of the second diode D2, one end of the first resistor R1, the branch trap unit and one end of the fourth inductor L4, the first inductor L1 is electrically connected to the anode of the first diode D1, the anode of the second diode D2, one end of the first resistor R1, the branch trap unit and one end of the fourth inductor L4, The other end of the resistor R1 is grounded, and the other end of the fourth inductor L4 serves as the output end of the trap circuit to output the RF signal. The branch trap unit includes a second varactor diode VT2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a third resistor R3, and a third inductor L3. The anode of the third diode D3 and the anode of the fifth diode D5 are respectively electrically connected to the non-grounded end of the first resistor R1. The cathode of the third diode D3 is respectively electrically connected to the cathode of the fifth diode D5, the cathode of the fourth diode D4, the cathode of the sixth diode D6, and one end of the third resistor R3. The other end of the third resistor R3 is electrically connected to the anode of the second varactor diode VT2. The anode of the fourth diode and the anode of the sixth diode D6 are electrically connected to one end of the third inductor L3. The other end of the third inductor L3 is grounded. The bias ends of the first varactor diode VT1 and the second varactor diode VT2 are respectively electrically connected to the output ends of different operational amplifier units. The single chip microcomputer modulates the first varactor diode VT1 and / or the second varactor diode VT2 through the output signal of the operational amplifier unit, so that the main path trap unit and the branch path trap unit resonate respectively.

[0057] Figure 2 The dotted box in the upper left corner includes the first inductor L1, the first resistor R1, the fourth inductor L4, and the main channel trap unit. This is an independent trap input and output structure. The devices at both ends of the second inductor L2, the first capacitor C1, the first diode D1, the second diode D2, the second resistor R2 and the first varactor diode VT1 together constitute an equivalent capacitor C10, that is, the equivalent capacitor C10 and the second inductor L2 constitute a resonant trap circuit in which the equivalent capacitor C10 is connected in parallel with the first inductor L1; the first inductor L1 and the second inductor L2 are both matching inductors of the equivalent capacitor C10, used to adjust the input impedance. Figure 2The components within the dashed box in the upper right corner—the third diode D3, fourth diode D4, fifth diode D5, sixth diode D6, third resistor R3, and second varactor VT2—collectively form an equivalent capacitor C20. This represents a resonant trap circuit connected in series with the third inductor L3 and connected to the side of the first resistor R1 away from the ground terminal. In the figure, first resistor R1 connects to the reference ground of the first varactor VT1, preventing direct signal leakage to ground. A higher resistance reduces circuit insertion loss, but it also affects the charge and discharge time of the first varactor VT1, increasing tuning time. Therefore, an appropriate value is necessary. Second resistor R2 and third resistor R3, respectively, connect to the varactor diodes, preventing signal leakage from the bias circuit and also affecting tuning time.

[0058] In the trap circuit of this embodiment, the main trap unit and the branch trap unit have the same or different trap frequencies. If the main trap unit and the branch trap unit have the same trap frequency, a deeper trap depth is achieved; if the main trap unit and the branch trap unit have different trap frequencies, the circuit has the ability to trap two different frequencies.

[0059] Example 2: Figure 3 and Figure 4 As shown, the difference between this embodiment and embodiment 1 is that: in this embodiment, two trap circuits are used. Figure 4 The first two dashed boxes correspond to the first trap circuit. Figure 4 The last two dashed boxes correspond to the second trap circuit. The structures of the two trap circuits are identical. From left to right, the structures and equivalent circuits of the first and third dashed boxes are identical. The structures and equivalent circuits of the second and fourth dashed boxes are identical, with only the numbering of the circuit components being different. They both form parallel resonant trap circuits and series resonant trap circuits.

[0060] A sixth inductor L6 is also provided between the output of the first trap circuit and the input of the second trap circuit for impedance matching. When there are more than one trap circuit, the trap frequency bands S of the different trap circuits may be the same or different: the trap frequencies of the main trap units in two different trap circuits may be the same or different; and the trap frequencies of the branch trap units may be the same or different. In other words, there can be at least one trap frequency and at most four trap frequencies.

[0061] Example 3: The present invention provides a digitally controlled electrically adjustable trap filter and a selection control method, comprising the following steps:

[0062] S1: Configure the digitally controlled electrically adjustable trap filter described in Example 1 or Example 2.

[0063] S2: Start the digital control circuit to enable the digital control circuit to output different DAC signals to drive at least one trap circuit respectively.

[0064] S3: The digital control circuit generates a first drive signal DAC1 which is amplified by the operational amplifier unit and drives the main notch unit of at least one notch circuit to perform independent notch processing on the notch frequency band of the input RF signal. The digital control circuit generates a second drive signal DAC2 which is amplified by the operational amplifier unit and drives the branch notch unit of at least one notch circuit to move the notch frequency point to outside the frequency band of the input RF signal.

[0065] S4: Start the vector network analyzer, obtain the frequency of the main notch unit of at least one notch circuit during frequency sweep and the magnitude of the first drive signal DAC1 and save them to form a frequency point F1-DAC1 signal pair; send the frequency point F1-DAC1 signal pair to the PC.

[0066] S5: The DAC2 signal generated by the digital control circuit causes the branch notch unit of at least one notch circuit to perform notch processing on the notch frequency band of the input RF signal, and at the same time causes DAC1 to drive the notch frequency point of the main notch unit of at least one notch circuit to move to the outside of the frequency band of the input RF signal; using a vector network analyzer, respectively obtain the frequency of the branch notch unit of at least one notch circuit during frequency sweeping and the size of the second drive signal DAC2 and save them to form a frequency point F2-DAC2 signal pair, and send the frequency point F2-DAC2 signal pair to the PC; for example, the single-chip microcomputer drives DAC1 and the operational amplifier unit to output a 0-22V bias signal to obtain the relationship between the notch frequency and the DAC1 value, and the relationship between the notch frequency and the DAC1 value.

[0067] S6: After the PC obtains the frequency-DAC1 signal pair and the frequency-DAC2 signal pair, it performs a segmented number selection operation to obtain the frequency and DAC1 and DAC2 signals that meet the notch depth requirements when the main notch unit and the branch notch unit of at least one notch circuit perform notch processing simultaneously.

[0068] The specific content of step S6 is:

[0069] S60: Perform function fitting on the frequency point F1-DAC1 signal pair and the frequency point F2-DAC2 signal pair respectively to obtain a function F1(DAC1) between the notch frequency point and DAC1 when the main notch unit of at least one notch circuit performs independent notch processing; and a function F2(DAC2) between the notch frequency point and DAC2 when the branch notch unit of at least one notch circuit performs independent notch processing;

[0070] S61: Divide the set notch frequency band S of the digital control electronic notch filter into several continuous sub-notch frequency bands S1, S2, ... S n-1 ;

[0071] If the starting frequency and ending frequency of the notch frequency band S are both integer multiples of 10 and 100 and can be equally divided, the frequency span range of each sub-notch frequency band is made equivalent; if the starting frequency or ending frequency of the notch frequency band S is not an integer multiple of 10 and 100, or the starting frequency or ending frequency is an integer multiple of 10 and 100 but cannot be equally divided, the frequency span range of each sub-notch frequency band at a non-head or end position is set to be equivalent, and the remaining part is used as the head sub-notch frequency band and the end sub-notch frequency band.

[0072] For example, the 225-678MHz notch filter band cannot be divided into 100 equal parts. Therefore, the notch can be divided into five segments: 225-300MHz, 300-400MHz, 400-500MHz, 500-600MHz, and 600-678MHz. The middle sub-notch has a bandwidth of 100MHz, while the sub-notches at the ends are 75MHz and 78MHz, respectively.

[0073] S62: For each sub-notch frequency band, obtain the DAC1 signal corresponding to the frequency point with the deepest notch depth of the function F1 (DAC1) between the starting position and the ending position of the sub-notch frequency band and its neighborhood, and record it as DAC11, DAC12, ..., DAC1 n Similarly, for each sub-notch frequency band, obtain the DAC2 signal corresponding to the frequency point with the deepest notch depth in the neighborhood of the starting position and the ending position of the function F2 (DAC2), respectively, and record it as DAC21, DAC22, ..., DAC2 n ;

[0074] As a preferred implementation manner, the number of frequency-DAC1 signal pairs and frequency-DAC2 signal pairs is no less than 4096.

[0075] S63: In each sub-notch frequency band, simultaneously enable the main notch unit and the branch notch unit of at least one notch circuit to perform joint notch processing, and find the center frequency value closest to the starting position and the ending position of the sub-notch frequency band and with the deepest notch depth according to the current center frequency value of the joint notch processing, and record the DAC1 and DAC2 signals corresponding to the center frequency of each sub-notch frequency band under the joint notch processing as DAC1 respectively. S ={DAC1 1’ DAC1 2’ ,……,DAC1 n’} and DAC2 S ={DAC2 1’ DAC2 2’ ,……,DAC2 n’}; then:

[0076] DAC1 S =DAC1-△DAC1={DAC11-△DAC11, DAC12-△DAC12,…, DAC1 n -

[0077] △DAC1 n};

[0078] DAC2 S =DAC2+△DAC2={DAC21+△DAC21, DAC22+△DAC22,…, DAC2 n +

[0079] △DAC2 n}; △DAC1 and △DAC2 correspond to the deviation values ​​between the center frequency point of the joint notch processing of each sub-notch frequency band and the intermediate frequency point when each sub-notch frequency band is acted upon by the main notch unit or the branch notch unit of at least one notch circuit alone.

[0080] S64: Constructing a relationship between a center frequency F obtained by simultaneous notching of the main notch unit and the branch notch unit of at least one notch circuit, and a second frequency point F1 (DAC1) when the main notch unit of the at least one notch circuit operates independently and a second frequency point F2 (DAC2) when the branch notch unit operates independently;

[0081] F=W1×F1(DAC1-△DAC1)+W2×F2(DAC2+△DAC2)=W1×F1(DAC1 S )

[0082] +W2×F2(DAC2 S ), W1 and W2 are weight coefficients, and the value range of W1 and W2 is [0,1].

[0083] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A digitally controlled electrically adjustable notch filter, characterized in that: include: A digital control circuit for generating a driving signal; at least one notch circuit, receiving the driving signal generated by the digital control circuit and performing notch processing on the input radio frequency signal; a vector network analyzer electrically connected to the output end of the at least one trap circuit, configured to perform frequency sweep processing on the output RF signal after trap processing by the at least one trap circuit, and output trap frequency information; A PC is connected to the vector network analyzer for setting a frequency sweep range of the vector network analyzer and obtaining a relationship between a driving signal and notch frequency information; The host computer is connected to the PC and obtains the driving signal adapted to the notch frequency band based on the relationship between the driving signal obtained by the PC and the notch frequency, and feeds it back to the CNC circuit; The at least one trap circuit includes a first inductor L1, a first resistor R1, a fourth inductor L4, a main trap unit and a branch trap unit; the main trap unit includes a first varactor diode VT1, a first capacitor C1, a second inductor L2, a second resistor R2, a first diode D1 and a second diode D2, one end of the first inductor L1 is electrically connected to the input RF signal, the other end of the first inductor L1 is electrically connected to one end of the second inductor L2 and one end of the first capacitor C1, and the other end of the first capacitor C1 is electrically connected to the first diode D1 and the second diode D2. 1, the cathode of the second diode D2 and one end of the second resistor R2 are electrically connected, the other end of the second resistor R2 is electrically connected to the anode of the first varactor diode VT1, the cathode of the first varactor diode VT1 is grounded, the other end of the second inductor L2 is electrically connected to the anode of the first diode D1, the anode of the second diode D2, one end of the first resistor R1, the branch trap unit and one end of the fourth inductor L4, respectively, the other end of the first resistor R1 is grounded, and the other end of the fourth inductor L4 serves as an output end of the trap circuit to output the RF signal; The branch trap unit includes a second varactor diode VT2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a third resistor R3, and a third inductor L3. The anode of the third diode D3 and the anode of the fifth diode D5 are respectively electrically connected to the non-grounded end of the first resistor R1, the cathode of the third diode D3 is respectively electrically connected to the cathode of the fifth diode D5, the cathode of the fourth diode D4, the cathode of the sixth diode D6, and one end of the third resistor R3, and the other end of the third resistor R3 is electrically connected to the anode of the second varactor diode VT2; the anode of the fourth diode and the anode of the sixth diode D6 are electrically connected to one end of the third inductor L3, and the other end of the third inductor L3 is grounded; the bias ends of the first varactor diode VT1 and the second varactor diode VT2 are respectively electrically connected to the output ends of different operational amplifier units.

2. The digitally controlled electrically adjustable notch filter according to claim 1, characterized in that: The digital control circuit includes a single-chip microcomputer and several operational amplifier units. The single-chip microcomputer is communicatively connected to a host computer. The single-chip microcomputer has several DAC output terminals. The several DAC output terminals are electrically connected to the input terminals of the several operational amplifier units in a one-to-one correspondence. The output terminals of the several operational amplifier units are electrically connected to the bias terminal of at least one trap circuit.

3. The digitally controlled electrically adjustable trap filter according to claim 2, characterized in that: The operational amplifier unit includes an operational amplifier, a tenth inductor L10, a third capacitor C3, a fourth capacitor C4, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9; the DAC output end is electrically connected to the non-inverting input end of the operational amplifier, the power supply VBB is electrically connected to one end of the third capacitor C3 and one end of the tenth inductor L10 respectively, the other end of the tenth capacitor L10 is electrically connected to one end of the fourth capacitor C4 and the power supply end of the operational amplifier respectively, and the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are grounded; the output end of the operational amplifier is electrically connected to one end of the seventh resistor R7 and one end of the eighth resistor R8 respectively, the other end of the eighth resistor is electrically connected to one end of the ninth resistor R9 and the inverting input end of the operational amplifier respectively, and the other end of the ninth resistor R9 is grounded; the other end of the seventh resistor R7 serves as the output end of the operational amplifier unit.

4. The digitally controlled electrically adjustable trap filter according to claim 3, characterized in that: In the at least one trap circuit, the trap frequencies of the main trap unit and the branch trap unit are the same or different.

5. A method for selecting a digital control circuit for a digitally controlled electric notch filter, characterized in that: The steps include: S1: Configure a digitally controlled electrically adjustable notch filter as described in any one of claims 1 to 4; S2: Start the digital control circuit, so that the digital control circuit outputs different DAC signals to drive at least one trap circuit respectively; S3: The digital control circuit generates a first drive signal DAC1, which is amplified by the operational amplifier unit and drives the main notch unit of at least one notch circuit to perform independent notch processing on the notch frequency band of the input RF signal. The digital control circuit generates a second drive signal DAC2, which is amplified by the operational amplifier unit and drives the branch notch unit of at least one notch circuit to move the notch frequency point to outside the frequency band of the input RF signal. S4: Start the vector network analyzer, obtain the frequency of the main notch unit of at least one notch circuit during frequency sweep and the magnitude of the first drive signal DAC1, and save them to form a frequency point F1-DAC1 signal pair; send the frequency point F1-DAC1 signal pair to the PC; S5: The DAC2 signal generated by the digital control circuit causes the branch notch unit of at least one notch circuit to notch the notch frequency band of the input RF signal, and at the same time causes DAC1 to drive the main notch unit of at least one notch circuit to move the notch frequency point to outside the frequency band of the input RF signal; Using a vector network analyzer, respectively obtain the frequency of at least one branch trap unit of the trap circuit during frequency sweep and the magnitude of the second drive signal DAC2 and save them to form a frequency point F2-DAC2 signal pair, and send the frequency point F2-DAC2 signal pair to a PC; S6: After the PC obtains the frequency point F1-DAC1 signal pair and the frequency point F2-DAC2 signal pair, it performs a segmented number selection operation to obtain the frequency points and DAC1 and DAC2 signals that meet the notch depth requirements when the main notch unit and the branch notch unit of at least one notch circuit perform notch processing simultaneously.

6. The method for selecting a digital control signal for a digitally controlled electrically adjustable trap filter according to claim 5, wherein: The specific content of step S6 is: S60: Perform function fitting on the frequency point F1-DAC1 signal pair and the frequency point F2-DAC2 signal pair respectively to obtain a function F1(DAC1) between the notch frequency point and DAC1 when the main notch unit of at least one notch circuit performs independent notch processing; and a function F2(DAC2) between the notch frequency point and DAC2 when the branch notch unit of at least one notch circuit performs independent notch processing; S61: Divide the set notch frequency band S of the digital control electronic notch filter into several continuous sub-notch frequency bands S1, S2, ... S n-1 ; S62: For each sub-notch frequency band, obtain the DAC1 signal corresponding to the frequency point with the deepest notch depth of the function F1 (DAC1) between the starting position and the ending position of the sub-notch frequency band and its neighborhood, and record it as DAC11, DAC12, ..., DAC1 n Similarly, for each sub-notch frequency band, obtain the DAC2 signal corresponding to the frequency point with the deepest notch depth in the neighborhood of the starting position and the ending position of the function F2 (DAC2), respectively, and record it as DAC21, DAC22, ..., DAC2 n ; S63: In each sub-notch frequency band, simultaneously enable the main notch unit and the branch notch unit of at least one notch circuit to perform joint notch processing, and find the center frequency value closest to the starting position and the ending position of the sub-notch frequency band and with the deepest notch depth according to the current center frequency value of the joint notch processing, and record the DAC1 and DAC2 signals corresponding to the center frequency of each sub-notch frequency band under the joint notch processing as DAC1 respectively. S ={DAC1 1’ DAC1 2’ ,……,DAC1 n’ } and DAC2 S ={DAC2 1’ DAC2 2’ ,……,DAC2 n’ }; then: DAC1 S＝ =DAC1-△DAC1={DAC11-△DAC11,DAC12-△DAC12,…,DAC1 n - △DAC1 n }; DAC2 S =DAC2+△DAC2={DAC21+△DAC21,DAC22+△DAC22,…,DAC2 n + △DAC2 n }; △DAC1 and △DAC2 correspond to the deviation values ​​between the center frequency of the joint notch processing of each sub-notch frequency band and the intermediate frequency point when each sub-notch frequency band is acted upon by the main notch unit or the branch notch unit of at least one notch circuit alone; S64: Constructing a relationship between a center frequency F obtained by simultaneous notching of the main notch unit and the branch notch unit of at least one notch circuit, and a second frequency point F1 (DAC1) when the main notch unit of the at least one notch circuit operates independently and a second frequency point F2 (DAC2) when the branch notch unit operates independently; F=W1×F1(DAC1-△DAC1)+W2×F2(DAC2+△DAC2)=W1×F1(DAC1 S )+W2×F2(DAC2 S ), W1 and W2 are weight coefficients, and the value range of W1 and W2 is [0,1].

7. The method for selecting a digital control signal for a digitally controlled electrically adjustable trap filter according to claim 6, wherein: The content of step S61 is that if the starting frequency and the ending frequency of the notch frequency band S are both integer multiples of 10 and 100 and can be equally divided, then the frequency span range of each sub-notch frequency band is made equivalent; if the starting frequency or the ending frequency of the notch frequency band S is not an integer multiple of 10 and 100, or the starting frequency or the ending frequency is an integer multiple of 10 and 100 but cannot be equally divided, then the frequency span ranges of each sub-notch frequency band at a non-head or end position are set to be equivalent, and the remaining part is used as the head sub-notch frequency band and the end sub-notch frequency band.

8. The method for selecting a digital control signal for a digitally controlled electrically adjustable trap filter according to claim 5, wherein: The number of frequency-DAC1 signal pairs and frequency-DAC2 signal pairs shall be no less than 4096.

9. The method for selecting a digital control signal for a digitally controlled electrically adjustable trap filter according to claim 5, wherein: When the number of the trap circuits exceeds one, the trap frequency bands S of different trap circuits are the same or different.

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