Image rotation circuit, image processing circuit, image rotation method, and chip

Abstract

The embodiment of the invention provides an image rotation circuit, an image processing circuit, an image rotation method and a chip, and is used for rotating a to-be-rotated image by a preset angle, the to-be-rotated image comprises N image blocks, each image block comprises X * Y pixels, and the image rotation circuit comprises a write-in module, a processing module and a control module, the write-in module is used for circularly writing image blocks into the first storage area and the second storage area; the reading module is used for circularly reading the image blocks from the second storage area and the first storage area; the second storage area is read when the first storage area is written, and the first storage area is read when the second storage area is written; the division mode of the N image blocks in the to-be-rotated image and the writing and reading modes of the N image blocks are both related to the preset angle. According to the embodiment of the invention, the image rotation speed and efficiency can be improved, and energy consumption and resource occupation are reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of image processing, and in particular to an image rotation circuit, an image processing circuit, an image rotation method and a chip. Background Art

[0002] Objects exist in nature. Under the influence of their own surface properties and light, they are captured by the human visual system and become scenes in the brain. With the rapid development of electronic technology, especially computer processing technology and integrated circuit technology, the popularization of mobile display devices (such as mobile phones, tablets), and the application of large high-definition display screens, the world that humans see when they open their eyes is no longer the original world. It is more derived from the original data obtained by the photoelectric conversion of the image acquisition part of the monitoring equipment through the complementary metal oxide semiconductor (CMOS) sensor, and then the image is processed to obtain an image that is more in line with the sensory experience of the human visual system. At the same time, in some intelligent devices and military fields, as an important support for machine vision technology, digital image processing technology can also complete advanced and complex applications such as target recognition and target tracking. Basic transformations in digital image processing technology such as image compression, sharpening, scaling, rotation, and segmentation can not only provide preprocessing operations for the above complex applications, but also can be used as a system implementation algorithm to obtain higher image quality and provide a better visual experience.

[0003] In digital image processing, it is often necessary to rotate the image, which is very common in image processing software. However, using software processing in real-time image display systems will inevitably increase the burden on the central processing unit, so in order to rotate the image smoothly, the requirements for the central processing unit will be greatly increased. However, in fields such as embedded design or some sophisticated image display systems, the cost of the system often needs to be considered, and the software implementation solution is not very suitable at this time. Summary of the invention

[0004] Embodiments of the present disclosure provide an image rotation circuit, an image processing circuit, an image rotation method, and a chip.

[0005] In a first aspect, an embodiment of the present disclosure provides an image rotation circuit for rotating an image to be rotated by a preset angle, wherein the image to be rotated includes N image blocks, the image blocks include X×Y pixels, X is the number of rows of pixels in the image blocks, Y is the number of columns of pixels in the image blocks, and N, X, and Y are all positive integers; the image rotation circuit includes:

[0006] A writing module, used for cyclically writing the N image blocks into the first storage area and the second storage area;

[0007] A reading module, configured to cyclically read the N image blocks from the second storage area and the first storage area;

[0008] wherein the second storage area is read when the first storage area is written, and the first storage area is read when the second storage area is written;

[0009] The division method of the N image blocks in the image to be rotated and the method of writing and reading the N image blocks are all related to the preset angle; the method of writing and reading the N image blocks includes at least one of the following: the writing order of the N image blocks, the writing order and reading order of X rows in each of the N image blocks, the writing order and reading order of Y columns in each of the N image blocks, the writing order and reading order of Y pixels in each row, and the writing order and reading order of X pixels in each column.

[0010] In a second aspect, an embodiment of the present disclosure provides an image processing circuit, characterized in that it includes M image rotation circuits as in the first aspect, and the M image rotation circuits are cascaded, and M is 2 or 3; wherein:

[0011] In the case of M=2, the two image rotation circuits both rotate the received image by 90°; or the two image rotation circuits respectively rotate the received image by 90° and 180°; or the two image rotation circuits respectively rotate the received image by 180° and 90°;

[0012] When M=3, the three image rotation circuits all rotate the received image by 90°.

[0013] In a third aspect, an embodiment of the present disclosure provides an image rotation method for rotating an image to be rotated by a preset angle, wherein the image to be rotated includes N image blocks, the image blocks include X×Y pixels, X is the number of rows of pixels in the image blocks, Y is the number of columns of pixels in the image blocks, and N, X, and Y are all positive integers; the method includes:

[0014] Circularly writing the N image blocks into the first storage area and the second storage area;

[0015] Circularly reading the N image blocks from the second storage area and the first storage area;

[0016] wherein the second storage area is read when the first storage area is written, and the first storage area is read when the second storage area is written;

[0017] The division method of the N image blocks in the image to be rotated and the method of writing and reading the N image blocks are all related to the preset angle; the method of writing and reading the N image blocks includes at least one of the following: the writing order of the N image blocks, the writing order and reading order of X rows in each of the N image blocks, the writing order and reading order of Y columns in each of the N image blocks, the writing order and reading order of Y pixels in each row, and the writing order and reading order of X pixels in each column.

[0018] In a third aspect, an embodiment of the present disclosure provides a chip, including an image rotation circuit as in the first aspect, or including an image processing circuit as in the second aspect.

[0019] The disclosed embodiments provide an image rotation circuit, an image processing circuit, an image rotation method and a chip. The hardware circuit is used to perform image rotation. On the one hand, the processing speed and efficiency of image rotation can be improved. Since image processing is a computationally intensive task, especially for real-time applications, a large amount of computational work needs to be completed within a limited time. Hardware acceleration technology can use hardware parallelism and dedicated hardware circuits to accelerate image processing tasks, thereby improving processing speed and efficiency. On the other hand, energy consumption and resource occupation can be reduced. In traditional software implementation, image processing usually consumes a large amount of central processing unit (CPU) and memory resources, and at the same time generates high energy consumption. Hardware acceleration technology can perform image processing tasks through dedicated hardware circuits, and can usually complete more computational work under lower energy consumption and resource occupation. On the other hand, complex algorithms and high-resolution image processing can also be implemented. Some complex image processing algorithms and high-resolution image processing tasks may be subject to performance limitations in software implementation and cannot be completed under real-time requirements. Hardware acceleration technology can make full use of hardware parallelism and dedicated hardware circuits, and can more efficiently implement these complex algorithms and the needs of processing large-scale high-resolution images. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of the structure of an image rotation circuit provided in an embodiment of the present disclosure;

[0021] Figure 2 A schematic diagram of pixel distribution of an image to be rotated provided in an embodiment of the present disclosure;

[0022] Figure 3 A schematic diagram showing a comparison between an image to be rotated and an image after rotation when the preset angle is 90° provided in an embodiment of the present disclosure;

[0023] Figure 4A schematic diagram showing a comparison between an image to be rotated and an image after rotation when the preset angle is 180° provided in an embodiment of the present disclosure;

[0024] Figure 5 A schematic diagram showing a comparison between an image to be rotated and an image after rotation when the preset angle is 270° provided in an embodiment of the present disclosure;

[0025] Figure 6 A schematic diagram of the structure of an image processing circuit provided by an embodiment of the present disclosure;

[0026] Figure 7 A schematic diagram of the overall structure of an image rotation circuit provided by an embodiment of the present disclosure;

[0027] Figure 8 A partial structural schematic diagram of an image rotation circuit provided in an embodiment of the present disclosure;

[0028] Fig. 9 A schematic diagram of the rotation effect of rotating a selected image by 90° provided in an embodiment of the present disclosure;

[0029] Fig.10 A schematic diagram of pixel distribution of an image to be rotated written into DDR provided in an embodiment of the present disclosure;

[0030] Fig.11 A schematic diagram of rotating an image read from a DDR according to an embodiment of the present disclosure;

[0031] Fig.12 A schematic diagram of image block division provided in an embodiment of the present disclosure;

[0032] Fig.13 A schematic diagram of the image rotation process provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0033] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than to limit the disclosure. It should also be noted that, for the convenience of description, only the parts related to the relevant disclosure are shown in the drawings.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0035] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0036] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present disclosure are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.

[0037] Image rotation technology refers to rotating an image to change its direction or perspective. This technology has a wide range of applications in many fields, such as image processing, computer vision, image editing, etc.

[0038] The following are some technical knowledge related to image rotation:

[0039] 1. Basic knowledge of image processing: An image is a two-dimensional array composed of pixels, and each pixel contains the color and brightness information of the image. In image rotation technology, the pixels of the image need to be rearranged to achieve the rotation operation. Therefore, understanding the basic structure and processing methods of images is the basis for understanding image rotation technology.

[0040] 2. Coordinate transformation and geometric transformation: Image rotation involves transforming the coordinates of the image. In mathematics, a rotation matrix can be used to represent the rotation transformation of an image. The image can be rotated by linearly transforming the coordinates of each pixel in the image. Therefore, understanding the principles of coordinate transformation and geometric transformation is crucial to understanding image rotation technology.

[0041] 3. Interpolation algorithm: During the image rotation process, since the position of the pixel will change, an interpolation algorithm is needed to estimate the value of the rotated pixel. Commonly used interpolation algorithms include nearest neighbor interpolation, bilinear interpolation, and bicubic interpolation. These interpolation algorithms can maintain the clarity and quality of the image during the rotation process.

[0042] 4. Hardware acceleration technology: Image rotation is a computationally intensive task, especially in real-time applications, which requires the image rotation operation to be completed quickly. Therefore, hardware acceleration technologies such as modern image processors and field programmable gate arrays (FPGA) are widely used in image rotation technology to improve processing speed and efficiency.

[0043] With the development of image processing technology and microelectronics technology, more and more image processing can be realized in real time in hardware systems. For large amounts of image or video stream data, the hardware implementation of image processing algorithms must require the hardware system to have extremely strong large data processing capabilities. In particular, with the application of high-resolution, high-frame rate sensors and high-definition display devices, the high-rate processing pressure faced by real-time systems has greatly increased. Generally speaking, simplifying image processing algorithms or upgrading the hardware platform for algorithm implementation are the two main means to improve image processing speed.

[0044] As far as simplifying image processing algorithms is concerned, thanks to the efforts of a large number of scientific researchers, the basic image operation algorithms have become very mature and concise, and the time complexity and space complexity of their calculations have been relatively fixed. It is very difficult to change the image processing algorithms while ensuring accuracy.

[0045] As for the hardware platform for implementing the upgraded algorithm, with the continuous improvement of integrated circuit design and manufacturing technology, the amount of resources contained in a single chip has increased rapidly, and the processing difficulty and amount of algebraic operations that can be completed have also continued to increase. In view of the characteristics of large image data volume and repetitive operations, dedicated chips (also known as graphics processing units, GPUs) and application-specific integrated circuits (Application Specific Integrated Circuits, ASICs) have been developed. FPGA chips are also widely used in many digital image processing fields due to their excellent parallel computing capabilities and short development cycles.

[0046] The disclosed embodiment provides an image rotation circuit, which directly utilizes a hardware circuit to realize digital image rotation, can greatly speed up the image rotation speed and achieve the purpose of making the image rotation speed independent of processor performance.

[0047] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0048] In one embodiment of the present disclosure, an image rotation circuit is provided, which is used to rotate an image to be rotated by a preset angle, wherein the image to be rotated includes N image blocks, the image blocks include X×Y pixels, X is the number of rows of pixels in the image blocks, Y is the number of columns of pixels in the image blocks, and N, X, and Y are all positive integers; see Figure 1 , which shows a schematic diagram of the composition structure of an image rotation circuit 10 provided in an embodiment of the present disclosure, such as Figure 1 As shown, the image rotation circuit 10 includes a writing module 101, a reading module 102 and a ping-pong storage module 103, and the ping-pong storage module 103 includes a first storage area 1031 and a second storage area 1032; wherein:

[0049] A writing module 101, used for cyclically writing N image blocks into a first storage area 1031 and a second storage area 1032;

[0050] The reading module 102 is used to cyclically read N image blocks from the second storage area 1032 and the first storage area 1031;

[0051] Wherein, when the first storage area 1031 is written, the second storage area 1032 is read, and when the second storage area 1032 is written, the first storage area 1031 is read;

[0052] The division method of the N image blocks in the image to be rotated and the method of writing and reading the N image blocks are all related to the preset angle; the method of writing and reading the N image blocks includes at least one of the following: the writing order of the N image blocks, the writing order and reading order of X rows in each of the N image blocks, the writing order and reading order of Y columns in each of the N image blocks, the writing order and reading order of Y pixels in each row, and the writing order and reading order of X pixels in each column.

[0053] It should be noted that the image rotation circuit 10 provided in the embodiment of the present disclosure is used to rotate the image to be rotated by a preset angle. The image rotation circuit 10 is a hardware circuit. By dividing the image to be rotated into blocks and writing and reading the image blocks in rows or columns, the image can be rotated by 90°, 180° or 270° (here all refer to the clockwise rotation angle).

[0054] It can be understood that a pixel is a basic unit constituting an image, and each pixel contains specific information such as color and brightness. In the embodiment of the present disclosure, the image to be rotated is composed of X×Y pixels.

[0055] It should also be noted that, in the process of writing and reading image blocks, the embodiment of the present disclosure adopts a ping-pong storage method, that is, the ping-pong storage module 103 (also known as a ping-pong buffer module, Rotation Buffer, rotation buffer, etc.) includes two storage areas: a first storage area 1031 (or ping-pong storage module, ping-pong buffer module, etc.) and a second storage area 1032 (or pong storage module, pong buffer module, etc.). In the process of rotating the image, one of the two storage areas is in a writing state and the other is in a reading state, thereby avoiding data loss and conflict and achieving efficient data transmission.

[0056] That is to say, the way in which the writing module 101 and the reading module 102 cyclically write and read the image blocks is a "ping-pong operation". Here, "cyclic" writing means alternately writing image blocks to two storage areas, and "cyclic" reading means alternately reading image blocks from two storage areas. For example, assuming that N=4, the four image blocks are respectively recorded as image blocks 1 to image blocks 4; the ping-pong operation process is as follows:

[0057] (1) The writing module 101 writes the image block 1 into the first storage area 1031, and the reading module 102 has no readable image block and does not perform a reading operation (i.e., when writing the first image block, only the first storage area 1031 is written but the second storage area 1032 is not read);

[0058] (2) The writing module 101 writes the image block 2 into the second storage area 1032, and the reading module 102 reads the image block 1 from the first storage area 1031 (i.e., the first storage area 1031 is read when the second storage area 1032 is written);

[0059] (3) The writing module 101 writes the image block 3 into the first storage area 1031, and the reading module 102 reads the image block 2 from the second storage area 1032 (i.e., the second storage area 1032 is read when the first storage area 1031 is written);

[0060] (4) The writing module 101 writes the image block 4 into the second storage area 1032, and the reading module 102 reads the image block 3 from the first storage area 1031 (i.e., the first storage area 1031 is read when the second storage area 1032 is written);

[0061] (5) The reading module 102 reads the image block 4 from the second storage area 1032 (ie, when reading the last image block, only the second storage area 1032 is read but the first storage area 1031 is not written).

[0062] It can be understood that when a certain image block needs to be read, the premise is that the image block has been written, so in the embodiment of the present disclosure, the order of reading the image blocks is the same as the order of writing the image blocks, that is, the image blocks written first are read first, and the image blocks written later are read later. Here, the first storage area 1031 and the second storage area 1032 can specifically be a random access memory (Random Access Memory, RAM).

[0063] Assume that the size of the image to be rotated is X×Y, and is divided into N image blocks, where X represents the number of rows of the image to be rotated (i.e., the number of pixels in one column), Y represents the number of columns of the image to be rotated (i.e., the number of pixels in one row), and X, Y, and N are all integers greater than 0. It should be noted that the embodiment of the present disclosure adopts a ping-pong storage method to improve efficiency, that is, while writing one image block, another image block is also read, so N is usually an integer greater than 1.

[0064] In the embodiment of the present disclosure, to facilitate the implementation of reading and writing, the division methods of the N image blocks may include but are not limited to the following two methods:

[0065] The first division method is: the number of rows remains unchanged and the division is by columns. Column as an image block, here, if If it is not divisible, it can be rounded up. In the embodiments of the present disclosure, for the convenience of description, it is considered that it is divisible. In this way, the size of each image block is Y≤N;

[0066] The second division method is: the number of columns remains unchanged and the division is by rows. Row as an image block, here, if If it is not divisible, it can be rounded up. In the embodiments of the present disclosure, for the convenience of description, it is considered that it is divisible. In this way, the size of each image block is X≤N.

[0067] The specific division method during rotation is related to the preset angle.

[0068] For the first division method, in order from column 1 to column Y, each The columns form one image block, which is recorded as the 1st image block to the Nth image block. When writing N image blocks, if they are written from the 1st to the Nth, the writing order is recorded as sequential writing, and if they are written from the Nth to the 1st, the writing order is recorded as reverse writing.

[0069] For the second division method, in order from row 1 to column X, each Rows form an image block, which are recorded in sequence as the 1st image block to the Nth image block; when writing N image blocks, if they are written from the 1st to the Nth, the writing order is recorded as sequential writing, and if they are written from the Nth to the 1st, the writing order is recorded as reverse writing.

[0070] It can be seen that no matter which division method is used, the writing order of the image blocks can be divided into: writing in the order of image blocks (writing from the 1st to the Nth in sequence) and writing in the reverse order of image blocks (writing from the Nth to the 1st in sequence). In the embodiment of the present disclosure, the order of reading the image blocks follows the order of writing the image blocks.

[0071] Figure 2 A schematic diagram of a 6×8 image to be rotated provided in an embodiment of the present disclosure, assuming that N=1, then Figure 2 The image block is shown in Figure 1. Figure 2 Taking as an example to illustrate the reading and writing methods of each image block, there are the following writing / reading methods (these methods include the writing order and reading order of X rows in each image block in N image blocks, the writing order and reading order of Y columns in each image block in N image blocks, the writing order and reading order of Y pixels in each row, and the writing order and reading order of X pixels in each column, and " / " means "or"):

[0072] There are four ways to write / read rows:

[0073] Row write / read mode 1: Write / read in row order and pixel order in each row. Write / read from row 1 to row 6 in sequence, and write / read from pixel 1 to pixel 8 in each row (for example, pixel 11 to pixel 18 in row 1);

[0074] Row writing / reading mode 2: Write / read in row order and in reverse order of each row of pixels. Write / read from row 1 to row 6 in sequence, and write / read from pixel 8 to pixel 1 in each row (for example, pixel 18 to pixel 11 in row 1);

[0075] Row writing / reading method 3: Write / read in reverse order of rows and in order of pixels in each row. Write / read from row 6 to row 1, and write / read from pixel 1 to pixel 8 in each row;

[0076] Row writing / reading method 4: Write / read in reverse order of rows and pixels in each row. Write / read sequentially from the 6th row to the 1st row, and write / read sequentially from the 8th pixel to the 1st pixel in each row.

[0077] There are four ways to write / read by column:

[0078] Column write / read mode 1: Write / read in column order and pixel order in each column. Write / read from column 1 to column 8 in sequence, and write / read from pixel 1 to pixel 6 in each column in sequence;

[0079] Column write / read mode 2: Write / read in column order and in reverse order of each column. Write / read from the 1st column to the 8th column in sequence, and write / read from the 6th pixel to the 1st pixel in each column in sequence;

[0080] Column write / read mode 3: Write / read in reverse order of columns and in order of pixels in each column. Write / read sequentially from the 8th column to the 1st column, and write / read sequentially from the 1st pixel to the 6th pixel in each column;

[0081] Column writing / reading method 4: Write / read in reverse order of columns and pixels in each column. Write / read sequentially from the 8th column to the 1st column, and write / read sequentially from the 6th pixel to the 1st pixel in each column.

[0082] The writing module 101 and the reading module 102 may be pre-installed with operation modes for three preset angles, so that they can work according to the corresponding operation modes according to the required rotation angles.

[0083] Combine the following Figures 2 to 5 Detailed descriptions are respectively given for the rotation angles (ie, preset angles) of 90°, 180°, and 270° clockwise.

[0084] by Figure 2 For example, assuming that X×Y=6×8 (the actual image is often larger, such as 768×1280, and 6×8 is used as an example here), the image to be rotated includes 6 rows and 8 columns of pixels, and the coordinates xy of each pixel indicate that the pixel is located in the xth row and yth column of the image to be rotated. For example, pixel 45 is located in the 4th row and 5th column of the image to be rotated. It can be understood that x is an integer greater than or equal to 1 and less than or equal to X, and y is an integer greater than or equal to 1 and less than or equal to Y.

[0085] When the preset angle is 90°, the rows and columns of the image to be rotated need to be swapped, and the yth column of the image to be rotated is used as the yth row of the rotated image, and the xth pixel of the yth column of the image to be rotated is used as the (X-x+1)th pixel of the yth row of the rotated image. For example, the 1st pixel of the 1st column of the image to be rotated is used as the last pixel of the 1st row of the rotated image.

[0086] Therefore, for a rotation angle of 90°, the N image blocks in the image to be rotated are divided as follows: the number of rows X of the image blocks is the same as the number of rows of the image to be rotated, and the number of columns Y of the image blocks is less than the number of columns of the image to be rotated; the writing order of the N image blocks is: from the first image block to the last image block; the way to read the image blocks is: reading by column (reading column by column, that is, reading one column of pixels first and then reading the next column of pixels, until all X×Y pixels of the image block are read, and the same applies to writing by column). That is, when dividing the image into blocks, the integrity of each column of pixels is maintained, and the integrity of each row of pixels is destroyed. The number of rows of each image block is still X rows, and the number of columns is less than Y. Exemplarily, in Figure 2 On the basis of Figure 3 As shown, the image to be rotated is evenly divided into 4 image blocks, and the size of each image block is 6 × 2. Among them, the 1st column and the 2nd column form image block 1, the 3rd column and the 4th column form image block 2, the 5th column and the 6th column form image block 3, and the 5th column and the 6th column form image block 4.

[0087] Here, evenly dividing into 4 image blocks is only an example, and it can also be divided into 2 6×4 image blocks, or uneven division, which is not specifically limited. Among them, the size of the image block can be configured by a register. In addition, even division is conducive to reducing circuit complexity and is a preferred division method.

[0088] The writing method of the image block can be any of the above methods, and the reading method of the image block corresponds to the writing method. Assuming that the writing method of the image block is to write in row order and each row of pixels is written in sequence (row writing method 1), during the image rotation process, in the order from image block 1 to image block 4, the writing module 101 first writes image block 1 to the first storage area 1031, first writes pixel 11 and pixel 12 of the first row in sequence, and then writes pixel 21 and pixel 22 of the second row in sequence, until the writing of the entire image block 1 is completed, as shown in the diagram Figure 3 The writing arrow in the figure indicates (since the image block is first written into the storage area and then read, it is only necessary to ensure that the image block has been written when reading, so it can be written in rows or columns, in order or in reverse order. Usually, the circuit implementation of writing in rows is more common). Then, the image block 2 is written into the second storage area 1032. At the same time, the reading module 102 reads the image block 1. The corresponding reading method is to read in column order and each column of pixels in reverse order (column reading method 2), as shown in FIG. Figure 3 As shown, first, pixel 11 is read from pixel 61 in column 1, and then pixel 12 is read from pixel 62 in column 2. After each column is read out, it is arranged in a row in sequence, as shown in FIG. Figure 3The read arrow in the figure indicates that the image block is cleared from the storage area after being read so that there is enough storage space for storing subsequent image blocks. Then the writing module 101 writes the image block 3 into the first storage area 1031, and at the same time, the reading module 102 reads the image block 2 from the second storage area 1032; then the writing module 101 writes the image block 4 into the second storage area 1032, and at the same time, the reading module 102 reads the image block 3 from the first storage area 1031; finally, the reading module 102 reads the image block 4 from the second storage area 1032. The effect after rotating 90° is as follows: Figure 3 shown.

[0089] When the preset angle is 180°, it is necessary to reverse the order of each row and then each column of the image to be rotated, or reverse the order of each column and then each row of the image to be rotated. That is, the pixels of the xth row and yth column of the image to be rotated become the pixels of the (X-x+1)th row and (Y-y+1)th column of the rotated image. In this case, the row and column attributes of the rotated image do not change, but the position and order change.

[0090] Therefore, for a rotation angle of 180°, the N image blocks in the image to be rotated are divided as follows: the number of columns Y of the image blocks is the same as the number of columns of the image to be rotated, and the number of rows X of the image blocks is less than the number of rows of the image to be rotated; the writing order of the N image blocks is from the last image block to the first image block; the way to read the image blocks is to read by row (read row by row, that is, read one row of pixels first and then read the next row of pixels, until all X×Y pixels of the image block are read, and the same applies to writing by row). That is, when dividing the image into blocks, the integrity of each row of pixels is maintained, and the integrity of each column of pixels is destroyed. The number of columns of each image block is still Y columns, and the number of rows is less than X. Exemplarily, in Figure 2 On the basis of Figure 4 As shown, the image to be rotated is evenly divided into 3 image blocks, and the size of each image block is 2×8. Among them, the 1st and 2nd rows form image block 1, the 3rd and 4th rows form image block 2, and the 5th and 6th rows form image block 3.

[0091] Here, evenly dividing into three image blocks is only an example, and it can also be divided into two 3×8 image blocks, or unevenly divided, which is not specifically limited. Among them, the size of the image block can be configured by a register. In addition, even division is conducive to reducing circuit complexity and is a preferred division method.

[0092] The writing method of the image block can be any of the above methods, and the reading method of the image block corresponds to the writing method. Assuming that the writing method of the image block is to write in reverse order of rows and each row of pixels in sequence (row writing method 3), during the image rotation process, in the order from image block 3 to image block 1, the writing module 101 first writes the image block 3 into the first storage area 1031, first writes pixels 61 to pixel 68 in sequence, and then writes pixels 51 to pixel 58 in sequence, until the writing of the entire image block 3 is completed, as shown in the diagram Figure 4 Then, the image block 2 is written into the second storage area 1032. At the same time, the reading module 102 reads the image block 3 from the first storage area 1031. The corresponding reading method is to read the pixels in reverse order in row order (row reading method 2). Figure 4 As shown, first, pixels 68 to 61 are read sequentially, and then pixels 58 to 51 are read sequentially, as shown in FIG. Figure 4 The image block is pointed by the read arrow in the figure. After being read, the image block is cleared from the storage area so that there is enough storage space for storing subsequent image blocks. Then the writing module 101 writes the image block 1 into the first storage area 1031, and at the same time, the reading module 102 reads the image block 2 from the second storage area 1032; finally, the reading module 102 reads the image block 1 from the first storage area 1031. The effect after rotating 180° is as follows: Figure 3 shown.

[0093] When the preset angle is 270°, the rows and columns of the image to be rotated need to be swapped, and the y-th column of the image to be rotated is used as the Y-y+1-th row of the rotated image, and the x-th pixel of the y-th column of the image to be rotated is used as the x-th pixel of the Y-y+1-th row of the rotated image, for example, the 1st pixel of the 1st row of the image to be rotated is used as the 1st pixel of the last row of the rotated image.

[0094] Therefore, for a rotation angle of 270°, the N image blocks in the image to be rotated are divided as follows: the number of rows X of the image blocks is the same as the number of rows of the image to be rotated, and the number of columns Y of the image blocks is less than the number of columns of the image to be rotated; the writing order of the N image blocks is from the last image block to the first image block; and the method of reading the image blocks is to read by column.

[0095] When the preset angle is 270°, the block division method is the same as that of 90°, which will not be described in detail.

[0096] The writing method of the image block can be any of the above methods, and the reading method of the image block corresponds to the writing method. Assuming that the writing method of the image block is to write in row order and each row of pixels is written in sequence (row writing method 1), during the image rotation process, in the order from image block 4 to image block 1, the writing module 101 first writes the image block 4 into the first storage area 1031, first writes the pixels 17 and 18 of the first row in sequence, and then writes the pixels 27 and 28 of the second row in sequence, until the writing of the entire image block 4 is completed, as shown in the diagram Figure 5 Then, the image block 3 is written into the second storage area 1032. At the same time, the reading module 102 reads the image block 4 from the first storage area 1031. The corresponding reading method is to read the pixels in reverse order of each column (column reading method 3). Figure 5 As shown, first read from pixel 18 in the 8th column to pixel 68, and then read from pixel 17 in the 7th column to pixel 67, as shown in FIG. Figure 5 The read arrow in the figure indicates that the image block is cleared from the storage area after being read so that there is enough storage space for storing subsequent image blocks. Then the writing module 101 writes the image block 2 into the first storage area 1031, and at the same time, the reading module 102 reads the image block 3 from the second storage area 1032; then the writing module 101 writes the image block 1 into the second storage area 1032, and at the same time, the reading module 102 reads the image block 2 from the first storage area 1031; finally, the reading module 102 reads the image block 1 from the second storage area. The effect after rotating 270° is as follows Figure 3 shown.

[0097] Furthermore, a rotation of 180° is equivalent to a rotation of 90° twice; a rotation of 270° is equivalent to a rotation of 90° three times, or a rotation of 90° and then 180°, or a rotation of 180° and then 90°. Therefore, the disclosed embodiment also provides an image processing circuit, which can also achieve rotation effects at different angles. The image processing circuit includes M of the aforementioned image rotation circuits, M=1, 2 or 3. When M=1, the image processing circuit is the aforementioned image rotation circuit, which is not described here. When M=2 or 3, the M image rotation circuits are cascaded, which are described below respectively.

[0098] When M=2, there are three further implementations:

[0099] (1) Both image rotation circuits rotate the received image by 90°. That is, the first image rotation circuit receives the image to be rotated, rotates it by 90°, and then outputs it; the second image rotation circuit receives the image rotated by 90° output by the first image rotation circuit, rotates it by 90° again, and then outputs an image rotated by 180° relative to the image to be rotated. In this implementation, the preset angle can only be set to 90° or 180°. When the preset angle is 90°, the image output by the first image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image; when the preset angle is 180°, the image output by the second image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image.

[0100] (2) Two image rotation circuits rotate the received image by 90° and 180° respectively. That is, the first image rotation circuit receives the image to be rotated, rotates it by 90° and then outputs it; the second image rotation circuit receives the image output by the first image rotation circuit after being rotated by 90°, rotates it by 180° and then outputs it, which is 270° rotated relative to the image to be rotated. In this implementation, the preset angle can be set to 90°, 180°, and 270°. When the preset angle is 90°, the image to be rotated is input to the first image rotation circuit, and the image output by the first image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image; when the preset angle is 180°, the image to be rotated is input to the second image rotation circuit (the first rotation circuit does not work at this time), and the image output by the second image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image; when the preset angle is 270°, the image to be rotated is input to the first image rotation circuit, and the image output by the second image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image.

[0101] (3) The two image rotation circuits rotate the received images by 180° and 90° respectively. That is, the first image rotation circuit receives the image to be rotated, rotates it by 180° and then outputs it; the second image rotation circuit receives the image output by the first image rotation circuit after being rotated by 180°, and rotates it by 90° to output an image that is rotated by 270° relative to the image to be rotated. In this implementation, the preset angle can be set to 90°, 180°, and 270°. When the preset angle is 90°, the image to be rotated is input to the second image rotation circuit (the first rotation circuit does not work at this time), and the image output by the second image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image; when the preset angle is 180°, the image to be rotated is input to the first rotation circuit, and the image output by the first rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image; when the preset angle is 270°, the image to be rotated is input to the first image rotation circuit, and the image output by the second image rotation circuit is continuously transmitted to the subsequent circuit to obtain the final output image.

[0102] When M=3, the three image rotation circuits all rotate the received image by 90°. Figure 6 As shown:

[0103] A first image rotation circuit 21 is used for rotating the image to be rotated by 90° to obtain a first rotated image which is rotated by 90° relative to the image to be rotated;

[0104] The second image rotation circuit 22 is used for rotating the first rotated image by 90° to obtain a second rotated image which is rotated by 180° relative to the image to be rotated;

[0105] The third image rotation circuit 23 is used for rotating the second rotated image by 90° to obtain a third rotated image which is rotated by 270° relative to the image to be rotated.

[0106] In this way, each rotation circuit only needs to work in the aforementioned 90° rotation mode, so that although the number of overall circuits becomes three times, each circuit only needs to be configured with one working mode. At the same time, a first temporary buffer module 31 can be included between the first rotation circuit 21 and the second rotation circuit 22, which is used to temporarily buffer the first rotated image rotated 90° output by the first rotation circuit 21, and clear it after the second rotation circuit 22 reads the first rotated image to store the next first rotated image; similarly, a second temporary buffer module 32 can be included between the second rotation circuit 22 and the third rotation circuit 23, which is used to temporarily buffer the second rotated image rotated 180° output by the second rotation circuit 22, and clear it after the third rotation circuit 23 reads the second rotated image to store the next second rotated image. At the same time, the image rotation circuit may also include a selector (not shown in the figure), the selector includes three input terminals, respectively receiving the first / second / third rotated image, the control terminal of the selector receives a control signal (the control signal may be a signal indicating a preset angle), if the preset angle is 90°, the first rotated image is output, shielding the other two; if the preset angle is 180°, the second rotated image is output, shielding the other two; if the preset angle is 270°, the third rotated image is output, shielding the other two. When M=2, a similar method can also be used for selection, which will not be repeated here.

[0107] like Figure 7 As shown, in some embodiments, the image rotation circuit 10 further includes a register module 104;

[0108] The register module 104 is used to send the size and preset angle of the image block to the writing module 101 and the reading module 102;

[0109] A writing module 101, used to perform an operation of writing an image block according to the size of the image block and a preset angle;

[0110] The reading module 102 is used to read the image block according to the size of the image block and a preset angle.

[0111] It should be noted that, when performing an image rotation operation, the preset rotation (angle) and the size of the image block are configured by the register module 104. The register module 104 can receive relevant configuration information from the host, and then configure the writing module 101 and the reading module 102. At the same time, the register module 104 will also configure the address of reading / writing the image to be rotated, the address of reading / writing the image block, the starting pixel / ending pixel of reading / writing the image block, etc.

[0112] It should also be noted that the size of the image block includes a horizontal size (Vsize) and a vertical size (Hsize), the horizontal size is the number of columns Y of the image block, and the vertical size is the number of rows X of the image block. Figure 3 For example, the preset rotation is 90°, the horizontal size is 2, and the vertical size is 6. Then the writing module 101 and the reading module 102 will perform the writing and reading operations of the image block according to the working mode corresponding to 90°.

[0113] More specifically, assuming that the working mode is 90°, the writing module 101 writes the image block according to the row writing method 1, first writing to the first storage area 1031 and then writing to the second storage area 1032 (or vice versa, there is no specific limitation on this), the writing starting pixel of the image block 1 is pixel 11, and two pixels are written in a row starting from pixel 11, and then turning to the next row to continue writing two pixels until the second pixel of the 6th row is written. The writing starting pixel of image block 2 is the writing starting pixel of image block 1 plus the horizontal size, that is, pixel 13. Starting from pixel 13, image block 2 is written into the second storage area 1032 in the same manner as image block 1. At the same time, the reading module 102 reads image block 1 from the first storage area 1031, and reads in column order and in reverse order of each column of pixels (column reading method 2). The reading starting pixel of image block 1 is pixel 61, and the vertical size is 6. Starting from pixel 61 in the first column, 6 pixels to pixel 11 are read, and then the next column is turned to read. The horizontal size is 2. After reading pixel 12 in the second column, the reading of image block 1 is terminated, thereby realizing the reading of image block 1 from the first storage area 1021 and rotating it 90°.

[0114] In some embodiments, Figure 7 As shown, the image rotation circuit 10 may further include an address mapping module 105, wherein:

[0115] An address mapping module 105, used to determine a target address of an image block to be read in the first storage area 1031 or the second storage area 1032;

[0116] The reading module 103 is used to read and output the image block from the target address of the first storage area 1031 or the second storage area 1032 .

[0117] It should be noted that the address of the image block in the ping-pong storage module 103 can also be calculated by the address mapping module 105 (Address remap) for addressing by the reading module. At the same time, the reading module 103 can also send the target address to other circuits not involved in the embodiment of the present disclosure for use.

[0118] In some embodiments, Figure 7 As shown, the image rotation circuit 10 may further include a VDMA module 106; wherein:

[0119] The VDMA module 106 is used to read the image to be rotated from the preset storage area when the writing module 101 performs the operation of writing the image block, and transmit the image block to the first storage area 1031 or the second storage area 1032 through the writing module 101.

[0120] It should be noted that direct memory access (DMA) is a method of high-speed data transmission, and data can be directly transmitted between memory or input and output devices from a channel without being processed by the CPU. In the embodiment of the present disclosure, DMA is used to achieve high-speed transmission of video images (each frame image in the video is an image to be rotated), so the circuit that executes DMA is recorded as a video direct memory access (video DMA, VDMA) module 106. Among them, the preset storage area can be a double rate memory (Double rate, DDR), and the video or image obtained from the camera is first stored in the DDR, and then during the image rotation process, it is moved to the ping-pong storage module 103 by the VDMA module 106. In this process, the write module 101 can send a related signal to the VDMA module 106 to write the image block.

[0121] In some embodiments, in the image rotation circuit 10 , data transmission between modules complies with the Advanced eXtensible Interface (AXI) bus protocol.

[0122] It should be noted that AXI is a bus protocol, which is an on-chip bus for high performance, high bandwidth, and low latency. Its address / control and data phases are separated, supporting unaligned data transmission. At the same time, in burst transmission, only the first address is needed, and the read and write data channels are separated, and burst transmission access and out-of-order access are supported, and timing convergence is easier. It can meet the needs of ultra-high performance and complex on-chip system design. In the disclosed embodiment, the data transmission between the modules inside the image rotation circuit 10 complies with the AXI bus protocol, and the circuits of each module are designed according to the AXI bus protocol, so that the processing speed of image rotation can be effectively improved.

[0123] It should also be noted that the image rotation circuit 10, as a partial structure of an image processing circuit, may also involve other protocols. In this case, protocol conversion is required. Figure 7 As shown, the image rotation circuit 10 may further include a protocol conversion module 107 for converting the configuration information sent by the host from the format of other protocols into a format supported by the AXI bus protocol and then sending the format to the register module 104 .

[0124] For example, if the host configuration information complies with the Advanced Peripheral Bus (APB) protocol, the protocol conversion module 107 converts it from the APB protocol to the AXI protocol and sends it to the register module 104, and then the register module 104 configures the image rotation circuit 10 (image block size, preset angle, address, etc.) accordingly.

[0125] Further, such as Figure 8 As shown, in some embodiments, the image rotation circuit 10 may further include a first-in first-out module 108;

[0126] The reading module 101 is used to output a row of pixels read in rows or a column of pixels read in columns as a row of pixels, and send the read image blocks to the first-in-first-out module 108 in sequence;

[0127] The first-in-first-out module 108 is used to receive and temporarily store the image blocks sent by the reading module, where the N image blocks sent by the reading module from the same image to be rotated constitute the rotated image;

[0128] The first-in-first-out module 108 is also used to output the rotated images in the order in which they were stored.

[0129] It should be noted that the first-in first-out module 108 (First Input First Output, FIFO, in the present embodiment, since video image frames are transmitted, it is also recorded as video FIFO), as the name suggests, the image that enters the module first also goes out first. It can be used as a temporary storage unit for the image and outputs the rotated images in sequence.

[0130] Further, such as Figure 8 As shown, in some embodiments, the image rotation circuit 10 may further include a timing control module 109 for controlling the timing of the first-in-first-out module 109 outputting the image to be rotated.

[0131] Here, the timing control module may be a video timing controller (VTC) for generating a standard timing logic for video output. The FIFO module 108 controls the output of data according to the logic generated by the VTC so that the output video data format meets specific specifications.

[0132] like Figure 8 As shown in FIG. 1 , in an actual project, the image to be rotated can be divided into two parts, the upper and lower parts, and the upper and lower parts can be collected by two cameras, camera 0 and camera 1, respectively (for example, for a vehicle-mounted camera scene, two cameras may be used to collect videos; here, two cameras collect videos / images only for example, and no specific limitation is made to this). The image to be rotated and the image after being rotated by 90° are shown in FIG. Fig. 9 As shown, it means "horizontal screen vertical display".

[0133] Figure 7 This is an overall structural diagram of the image rotation circuit provided in the embodiment of the present disclosure. In simple terms, the workflow is: obtain image data (i.e., the image to be rotated) from the camera, cache the image data in the DDR, and then read the image through the display driver module and display it on the display screen. The data in the DDR (i.e., image data) is read using the AXI protocol. Data is written from the camera to the DDR, read from the DDR and transmitted to the display module, all using AXI transmission. Among them, the display driver module is the post-stage circuit of the image rotation circuit, which is used to read the rotated image into the display module, and the display module is the display screen.

[0134] like Figure 7 As shown, the image rotation process is described as follows:

[0135] The image data acquired by the camera is written into DDR (write DDR) through the AXI interface, the image data in DDR is read (read DDR) through the VDMA module 106, the read image data is transferred to the ping-pong storage module 103 through the write module 101 (also called the write port, write port) for image rotation processing, and finally output and display through the axi_stream_out port. Among them, the register module 104 can be abbreviated as the Reg module (i.e. Register), which is used to configure the image rotation circuit 10.

[0136] right Figure 7 The modules and interfaces involved are explained as follows:

[0137] s0_axi4_lite is the AXI configuration bus interface of each module, which is used to configure or read the parameters or working status of each module, mainly to configure the VDMA module 106 here; m_axi4_mm2s is the interface of the VDMA module 106 to read data from the DDR; frame_ptr_in and frame_ptr_out are pointers for the VDMA module 106 to read and write video image frames, which are used to indicate which frame of the video the current image to be rotated is, and act on the VDMA module 106 itself and the external circuit respectively; axi_stram_out is the flow direction interface of the AXI bus, which is used in the output direction here, indicating that the video data stream is output to the next module. It should be noted that axi_stram_out is not the output interface of the ping-pong storage module 103, but the final output interface of the image processing circuit to which the image rotation circuit 10 belongs. s1_axi4_lite is the AXI receiving interface of the module, which is used to receive the configuration information sent by the host or respond to the read information of the host, and apb_bus is the APB bus. axi_stream_but is the image data transferred from the DDR to the ping-pong memory module 103 by the VDMA module 106. If it is transferred as a single pixel, it is one pixel. If it is transferred as a row or a column of pixels, it is one row or a column of pixels.

[0138] The register module 104 is used to configure the working modules such as the writing module 101 and the reading module 102. The configuration information includes at least: the horizontal size of the image block, the vertical size of the image block, the preset angle (i.e., the rotation angle), the address (the address of the image to be rotated in the DDR, the address of writing the image block to the ping-pong storage module 103, etc.), and also includes the read / write starting pixel, the video frame start flag, etc.

[0139] The address mapping module 105 is an address remapping module, which is used to calculate the address of the rotated image in the ping-pong storage module 103, and output the video according to the address, so that the obtained image is the rotated image.

[0140] The protocol conversion module 107 (for the conversion between AXI and APB, it can be written as AXI-APB bridge) is a converter from AXI bus protocol to APB bus protocol. Because some modules in the system are APB configuration interfaces, conversion is required.

[0141] The specific process is as follows Figure 8 As shown, the image data acquired by the two cameras are written into the DDR, the data in the DDR is read by the VDMA module 106 and put into the ping-pong storage module 103, and the new frame data is stored in the first-in first-out module 108 after the image is rotated. The first-in first-out module 108 is controlled by the timing control module 109, and finally the rotated image is output from the output port (out_port). Among them, new_frame0 indicates that a new frame of image is taken out from the DDR, indicating that the new frame of image to be rotated needs to be rotated.

[0142] In this way, since the amount of data required for a complete image transmission is too large, the disclosed embodiment divides the image into several blocks for transmission to save RAM resources. At the same time, compared with rotating a single pixel, burst transmission of a block of data using the AXI bus protocol can increase the conversion speed. For a rotation angle of 90°, the disclosed embodiment completes the image rotation operation by writing rows first and reading columns first when using ping-pong storage operations. Furthermore, through hardware design, 90°, 180°, and 270° rotations can be quickly completed, which can improve processing speed and efficiency, and achieve the independence of image rotation speed from processor performance.

[0143] It should also be noted that in the embodiments of the present disclosure, each circuit module can be designed and implemented by existing reading modules, writing modules, storage modules, etc., and its specific circuit structure is not limited.

[0144] In summary, the disclosed embodiment uses hardware acceleration technology to realize image rotation, which has at least the following advantages: on the one hand, it improves processing speed and efficiency; image processing is a computationally intensive task, especially for real-time applications, which requires a large amount of computing work to be completed within a limited time. Hardware acceleration technology can use hardware parallelism and dedicated hardware circuits to accelerate image processing tasks, thereby improving processing speed and efficiency. On the other hand, it reduces energy consumption and resource occupation; in traditional software implementation, image processing usually consumes a large amount of CPU and memory resources, and also generates high energy consumption. Hardware acceleration technology can perform image processing tasks through dedicated hardware circuits, and can usually complete more computing work with lower energy consumption and resource occupation. On the other hand, it realizes complex algorithms and high-resolution image processing; some complex image processing algorithms and high-resolution image processing tasks may be subject to performance limitations in software implementation and cannot be completed under real-time requirements. Hardware acceleration technology can make full use of hardware parallelism and dedicated hardware circuits, and can more efficiently realize these complex algorithms and the needs of processing large-scale high-resolution images.

[0145] In another embodiment of the present disclosure, there is also provided an image rotation method, comprising:

[0146] S201: cyclically write N image blocks into the first storage area and the second storage area.

[0147] S202: cyclically reading N image blocks from the second storage area and the first storage area.

[0148] The second storage area is read when the first storage area is written, and the first storage area is read when the second storage area is written.

[0149] The process of rotating an image by 90° is illustrated by taking two cameras capturing images as an example.

[0150] 1. The camera acquires the image to be rotated and writes it to DDR

[0151] First, the raw image data acquired by the camera is written and mapped into DDR, such as Fig.10 As shown. The image to be rotated is scanned and written into the DDR in a row-first order, that is, all pixels in the first row are written first, then all pixels in the second row, and so on. Here, there are two cameras, and they are written synchronously by row. Among them, the unfilled part is the image data obtained by camera 0, and the dot-filled part is the image data obtained by camera 2. The arrows indicate the order in which the pixels are written into the DDR.

[0152] 2. VDMA reads DDR data into the ping-pong storage module 103, and then performs image rotation operation

[0153] The image data in the DDR is read into the ping-pong storage module 103 via the AXI bus, and the image data is stored in two spaces using a ping-pong operation.

[0154] like Fig.11 As shown, the horizontal solid arrows represent the order of writing the pixels in the image block into the ping-pong storage module 103, and the vertical hollow arrows represent the order of reading the pixels of the image block from the ping-pong storage module 103. Fig.11 In the shown portion, the first column and the second column form an image block, the third column and the fourth column form an image block, and the fifth column and the sixth column form an image block.

[0155] Another example Fig.12 As shown, for a 768×1280 image to be rotated, the image is divided into 8 blocks (each image block has a size of 768×160), and the leftmost image block of the image is first read into the ping-pong storage module 103, followed by the second block, and so on. Here, the division into 8 blocks is only an example, and it can also be divided into 16, 32 blocks, etc. In this way, the transmission by image block can be performed using the burst transmission of AXI, which effectively improves the image conversion speed compared to the reading of single pixel data.

[0156] 3. Ping-Pong Operation Reading and Writing

[0157] like Fig.13 As shown, the pixel data written into the ping-pong storage module 103 is written into the buffer (the first storage area 1031 or the second storage area 1032) in the order of row priority, that is, the pixel writing of one row is completed first, and then the pixel writing of the next row is written. When the ping-pong storage module 103 is read, the pixel data is read in the order of column priority, that is, the pixel data of one column is read first, and then the pixel data of the next column is read. Ping-pong buffering is a double buffer technology, which consists of two buffers. When one buffer is written with data, the other buffer can be read at the same time and then switched in the next cycle. This method can avoid data loss and conflict and realize efficient data transmission. Finally, the read data is combined and stored in the first-in first-out module for output display, and the display effect is that the image is rotated 90 degrees, that is, "horizontal screen vertical display".

[0158] like Fig.13As shown, except when writing the first image block and reading the last image block, one storage area is empty. During the rest of the time of rotating the image, while one image block is being written into the first storage area 1031 by row, another image block is being read from the second storage area 1032 by column; while one image block is being read from the first storage area 1031 by column, another image block is being written into the second storage area 1032 by row. The unidirectional solid arrows indicate the order of writing / reading pixels, and the bidirectional dashed arrows indicate the size of the image blocks.

[0159] It can be understood that in order to ensure that the read image block has been written into the ping-pong storage module 103, during the image rotation process, at least one image block will be cached in the ping-pong storage module 103 to ensure normal execution of the image reading.

[0160] Please refer again Fig.11 ,like Fig.11 As shown by the arrow after rotation in , the unfilled part represents the image block read from the first storage area 1031, and the dotted filled part represents the image block read from the second storage area 1032. Here, frame_start is the starting address of a new frame of image to be rotated. Each rotation is for a new frame of image. The actual address mark can avoid confusion in image rotation. "Synchronization header" is a mark defined inside the algorithm to indicate the beginning of a new frame of image, so that the rotation operation can identify the place where the rotation starts. These can all be configured by the register module 104, so that the reading module 101 and the writing module 102 can work smoothly.

[0161] It should be noted that the image rotation method provided in the embodiment of the present disclosure is implemented by the aforementioned image rotation circuit 10. For details not disclosed in the embodiment of the present disclosure, please refer to the description of the aforementioned embodiment for understanding, and no further details will be given here.

[0162] In summary, the disclosed embodiment provides a method for directly using hardware circuits to realize digital image rotation, which can greatly speed up the image rotation speed and achieve the purpose of making the image rotation speed independent of processor performance. Since the amount of image data in DDR is too large, in order to save RAM resources, the disclosed embodiment divides the image into blocks for reading operations. For example, if the size of the image to be rotated is 768×1280, it can be divided into blocks according to the size of the image to be rotated. Fig.12As shown, it is divided into 8 blocks (768×160), and can also be divided into 16, 32 blocks, etc. Block transmission can be performed using AXI burst transmission, which effectively improves the image conversion speed compared to reading single pixel data. The image rotation operation is completed by writing rows first and reading columns first. The ping-pong operation allows the data in the first storage area and the second storage area to be read alternately. When an image block is written to the first storage area, the second storage area is used for reading, so that continuous data reading can be achieved and read and write conflicts can be avoided.

[0163] In yet another embodiment of the present disclosure, an image processing circuit is provided, comprising the image rotation circuit 10 in the aforementioned embodiment.

[0164] In another embodiment of the present disclosure, a chip is provided, including the image rotation circuit 10 or the image processing circuit in the above-mentioned embodiment, wherein the chip may be an FPGA chip or the like.

[0165] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.

[0166] It should be noted that in the present disclosure, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0167] The serial numbers of the above-mentioned embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0168] The methods disclosed in several method embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0169] The features disclosed in several product embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments.

[0170] The features disclosed in several method or device embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0171] The above description is only a specific implementation mode of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure.

Claims

1. An image rotation circuit, characterized in that: Used to rotate the image to be rotated by a preset angle, the image to be rotated includes N image blocks, the image blocks include X×Y pixels, X is the number of rows of pixels in the image blocks, Y is the number of columns of pixels in the image blocks, and N, X, and Y are all positive integers; The image rotation circuit comprises: A writing module, used for cyclically writing the N image blocks into the first storage area and the second storage area; A reading module, configured to cyclically read the N image blocks from the second storage area and the first storage area; wherein the second storage area is read when the first storage area is written, and the first storage area is read when the second storage area is written; The division method of the N image blocks in the image to be rotated and the method of writing and reading the N image blocks are all related to the preset angle; the method of writing and reading the N image blocks includes at least one of the following: the writing order of the N image blocks, the writing order and reading order of X rows in each of the N image blocks, the writing order and reading order of Y columns in each of the N image blocks, the writing order and reading order of Y pixels in each row, and the writing order and reading order of X pixels in each column.

2. The image rotation circuit according to claim 1, characterized in that: The image rotation circuit also includes a register module; The register module is used to send the X, Y and the preset angle to the writing module and the reading module; The writing module is used to perform an operation of writing an image block according to the X, the Y and the preset angle; The reading module is used to perform an operation of reading an image block according to the X, the Y and the preset angle.

3. The image rotation circuit according to claim 1, characterized in that: The image rotation circuit also includes a video direct memory read VDMA module; The VDMA module is used to read the image to be rotated from a preset storage area when the writing module performs an operation of writing an image block, and transmit the image block to the first storage area or the second storage area through the writing module.

4. The image rotation circuit according to claim 1, characterized in that: The image rotation circuit also includes a first-in first-out module; The reading module is used to output a row of pixels read in rows or a column of pixels read in columns as a row of pixels, and send the read image blocks to the first-in-first-out module in sequence; The first-in-first-out module is used to receive and temporarily store the image blocks sent by the reading module, where the N image blocks sent by the reading module from the same image to be rotated constitute a rotated image; The first-in first-out module is also used to output the rotated images in the order in which they are stored.

5. The image rotation circuit according to any one of claims 1 to 4, characterized in that: In the image rotation circuit, data transmission between modules complies with the advanced extensible interface AXI bus protocol.

6. The image rotation circuit according to any one of claims 1 to 4, characterized in that: When the preset angle is 90°, the N image blocks in the image to be rotated are divided in the following manner: X is the same as the number of rows of the image to be rotated, and Y is less than the number of columns of the image to be rotated; the writing order of the N image blocks is from the first image block to the last image block; and the manner of reading the image blocks is reading by column.

7. The image rotation circuit according to any one of claims 1 to 4, characterized in that: When the preset angle is 180°, the N image blocks in the image to be rotated are divided in the following manner: Y is the same as the number of columns of the image to be rotated, and X is less than the number of rows of the image to be rotated; the writing order of the N image blocks is from the last image block to the first image block; and the manner of reading the image blocks is reading by row.

8. The image rotation circuit according to any one of claims 1 to 4, characterized in that: When the preset angle is 270°, the N image blocks in the image to be rotated are divided in the following manner: X is the same as the number of rows of the image to be rotated, and Y is less than the number of columns of the image to be rotated; the writing order of the N image blocks is from the last image block to the first image block; and the manner of reading the image blocks is reading by column.

9. An image processing circuit, characterized in that: The device comprises M image rotation circuits according to any one of claims 1 to 5, wherein the M image rotation circuits are cascaded, and M is 2 or 3; wherein: In the case of M=2, the two image rotation circuits both rotate the received image by 90°; or the two image rotation circuits respectively rotate the received image by 90° and 180°; or the two image rotation circuits respectively rotate the received image by 180° and 90°; When M=3, the three image rotation circuits all rotate the received image by 90°.

10. An image rotation method, characterized in that: The method is used to rotate an image to be rotated by a preset angle, wherein the image to be rotated includes N image blocks, and the image blocks include X×Y pixels, where X is the number of rows of pixels in the image blocks, and Y is the number of columns of pixels in the image blocks, and N, X, and Y are all positive integers. The method includes: Circularly writing the N image blocks into the first storage area and the second storage area; Circularly reading the N image blocks from the second storage area and the first storage area; wherein the second storage area is read when the first storage area is written, and the first storage area is read when the second storage area is written; The division method of the N image blocks in the image to be rotated and the method of writing and reading the N image blocks are all related to the preset angle; the method of writing and reading the N image blocks includes at least one of the following: the writing order of the N image blocks, the writing order and reading order of X rows in each of the N image blocks, the writing order and reading order of Y columns in each of the N image blocks, the writing order and reading order of Y pixels in each row, and the writing order and reading order of X pixels in each column.

11. A chip, characterized in that: The image rotation circuit comprises the image rotation circuit as claimed in any one of claims 1 to 8, or the image processing circuit as claimed in claim 9.

Images