Current synthesizer

Abstract

A current synthesizer for a switching converter, the switching converter comprising an energy storage element and a first pass device, the switching converter configured to receive an input voltage and provide an output voltage, the current synthesizer configured to determine one or more first properties of a first current path of the switching converter, the first current path includes a first pass device and an energy storage element, calculates a current flowing through the energy storage element using the determined one or more first attributes, and generates a digitized current signal that is a digital representation of the calculated current flowing through the energy storage element.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Patent Application No. 63 / 516,266, filed on July 28, 2023. The entire disclosure of U.S. Patent Application No. 63 / 516,266 is incorporated herein by reference. background

[0004] The present disclosure relates to a current synthesizer for generating a digitized current signal. In particular, the present disclosure relates to a current synthesizer for a switching converter.

[0005] FIG. 1( a ) is a diagram including a switch M HS 、M LS , inverting driver 102, non-inverting driver 104; inductor L, resistor R L Schematic diagram of a buck converter 100 with a capacitor C.

[0006] If HS=1 (due to the inverting level shifter 102), the control signal HS causes M HS The driver 102 is inverting, and M HS is a PMOS, which is turned on when its gate is at a low level. Similarly, if LS = 1, the control signal LS makes M LS This drives node SW to V IN or grounded.

[0007] Due to the filter formed by L and C, the output voltage V OUT will be a filtered version of the voltage at SW with low ripple. R L is the resistance including the inductor resistance and the routing resistance. In general, the drivers 102, 104 may not need to be V IN or grounded rails to obtain their power. Switch M HS and M LS They are not activated simultaneously during operation.

[0008] FIG1( b ) is a schematic diagram of a buck converter 106. Buck converter 106 is an alternative embodiment of buck converter 100 and includes drivers 107 and 109. Buck converter 106 uses an NMOS high-side switch M HS This is usually done using a voltage V BOOT For gate drive, the voltage V BOOT It is usually generated by a bootstrap circuit, although it can be taken from any other voltage source.

[0009] FIG1(c) is a schematic diagram of a digital buck converter 108 including a power stage 110, analog-to-digital converters (ADCs) 112, 114, 116, and a controller 118. The power stage 110 includes switches 120, 122, an inductor 124, and a capacitor 126. During operation, the switching converter receives an input voltage V IN And generate output voltage V OUT .

[0010] While the power stage 110 and passive components (inductor 124 and capacitor 126) remain the same as for the analog buck converter (e.g., as shown in FIGS. 1(a) and 1(b)), the ADC 116 converts the output voltage V OUT Optionally, the inductor current IL of the inductor 124 and the input voltage V IN It is also possible to convert from analog to digital according to the digital control method.

[0011] We distinguish:

[0012] ● The switching frequency (FSW) of the buck converter 108 is, for example, 2 MHz. FSW is equal to 1 / TSW, where TSW is the switching period of the buck converter 108. FSW is the frequency of the power stage.

[0013] ● The processing frequency (FS) of the digital controller 118 is, for example, about 100 MHz. FS is equal to 1 / TS, where TS is the processing period of the controller 118. Alternatively, FS may also be the sampling frequency of the ADC 116.

[0014] A digital system, such as the digital buck converter 108, may use a digital signal representing the current flowing through the energy storage element during operation. For example, a controller may require a digitized current signal to control the switching operation of a digital switching converter.

[0015] In the present example, the digitized current signal is the digitized inductor current DIL as provided by the ADC 112 which converts an analog current signal indicative of the inductor current IL into a digital format.

[0016] The digitized inductor current DIL is provided to the controller 118, which uses information about the inductor current IL to control the switching operation of the power switches 120, 122. The control scheme's dependence on the inductor current means that such a system may be referred to as a current mode converter using current mode control.

[0017] Overview

[0018] It is desirable to provide a system for providing a digitized current signal, for example, for use in switching converter control.

[0019] According to a first aspect of the present disclosure, a current synthesizer for a switching converter is provided, the switching converter comprising an energy storage element and a first pass device, the switching converter being configured to receive an input voltage and provide an output voltage, the current synthesizer being configured to: determine one or more first properties of a first current path of the switching converter, the first current path comprising a first pass device and the energy storage element; calculate a current flowing through the energy storage element using the determined one or more first properties; and generate a digitized current signal, the digitized current signal being a digital representation of the calculated current flowing through the energy storage element.

[0020] Optionally, the switching converter is one of a buck converter, a boost converter or a buck-boost converter.

[0021] Optionally, the energy storage element comprises an inductor.

[0022] Optionally, the first pass device is a first power switch or a first diode.

[0023] Optionally, the first power switch includes a first transistor.

[0024] Optionally, the first transistor is a first metal oxide semiconductor field effect transistor (MOSFET).

[0025] Optionally, the first MOSFET is a p-type MOSFET or an n-type MOSFET.

[0026] Optionally, the one or more first properties of the first current path include a first current path resistance, a first current path voltage and / or an inductance of an energy storage element, wherein the energy storage element includes an inductor.

[0027] Optionally, the first current path resistance comprises an equivalent series resistance of the inductor and a first pass device resistance of the first pass device.

[0028] Optionally, the first pass device is a first power switch or a first diode.

[0029] Optionally, the one or more first properties of the first current path include a first current path resistance, a first current path voltage and / or an inductance of an energy storage element, wherein the energy storage element includes an inductor.

[0030] Optionally, the first current path resistance includes an equivalent series resistance of the inductor and a first power switch resistance of the first power switch.

[0031] Optionally, the first power switch resistance is an on resistance of the first power switch or a body diode resistance of the first power switch.

[0032] Optionally, the first current path voltage includes an output voltage and a first node voltage.

[0033] Optionally, the switching converter comprises a voltage detector configured to detect the output voltage and the first node voltage.

[0034] Optionally, the voltage detector includes a first analog-to-digital converter configured to detect the first node voltage and a second analog-to-digital converter configured to detect the output voltage.

[0035] Optionally, the first node voltage is an input voltage or a ground voltage.

[0036] Optionally, the current synthesizer comprises a memory storage element comprising a look-up table for storing calibration data, wherein at least a portion of the calibration data is used to determine at least one of the first current path resistance and the inductance of the inductor.

[0037] Optionally, the current synthesizer is configured to determine the inductance of the inductor by selecting at least a portion of the calibration data based on the digitized current signal.

[0038] Optionally, the switching converter comprises a current sensor configured to sense a current flowing through the inductor.

[0039] Optionally, the current synthesizer is configured to determine the inductance of the inductor by selecting at least a portion of the calibration data based on a sensed current flowing through the inductor.

[0040] Optionally, the current synthesizer is configured to determine the inductance of the inductor by interpolation using the calibration data.

[0041] Optionally, the current synthesizer is configured to determine the first current path resistance using one or both of the gate drive voltage and a temperature value.

[0042] Optionally, the current synthesizer is configured to determine one or more first properties of a first current path of the switching converter at a first time step, calculate a current flowing through the energy storage element at a second time step using the one or more properties determined at the first time step, and generate a digitized current signal comprising a digital representation of the calculated current flowing through the energy storage element at the second time step.

[0043] Optionally, the one or more first properties of the first current path include a first current path resistance, a first current path voltage and / or an inductance of an energy storage element, wherein the energy storage element includes an inductor.

[0044] Optionally, the current synthesizer is configured to calculate the current flowing through the energy storage element at the second time step in the following manner: determine a first variable by multiplying the first current path resistance at the first time step by the current flowing through the energy storage element at the first time step, determine a second variable by subtracting the first variable from the first current path voltage at the first time step, determine a third variable by multiplying the second variable by a time step difference between the second time step and the first time step and dividing by the inductance, and determine the current flowing through the energy storage element at the second time step by adding the current flowing through the energy storage element at the first time step to the third variable.

[0045] Optionally, the current synthesizer is configured to generate a digitized current signal when the switching converter is in at least one of a magnetization phase, a demagnetization phase and / or a shutdown phase.

[0046] Optionally, the digitized current signal has a linear distribution or a non-linear distribution during the magnetization phase and / or the demagnetization phase.

[0047] Optionally, the switching converter includes a second power switch, and the current synthesizer is configured to determine one or more first properties of a first current path of the switching converter during a first phase, use the determined one or more properties during the first phase to calculate the current flowing through the energy storage element, and use the calculated current during the first phase to generate a first portion of the digitized current signal during the first phase, determine one or more second properties of a second current path of the switching converter during a second phase, the second path includes a second power switch and an energy storage element, use the determined one or more second properties to calculate the current flowing through the energy storage element, and use the calculated current during the second phase to generate a second portion of the digitized current signal during the second phase.

[0048] Optionally, the current synthesizer is configured to generate a digitized current signal when the switching converter is in at least one of a magnetization phase, a demagnetization phase and / or a shutdown phase.

[0049] Optionally, the digitized current signal has a linear distribution or a non-linear distribution during the magnetization phase and / or the demagnetization phase.

[0050] Optionally, the switching converter includes a controller configured to provide a second control signal to the second power switch, and when the second power switch is in the first configuration, the switching converter operates in a first phase, and when the second power switch is in the second configuration, the switching converter operates in a second phase.

[0051] Optionally, one or more first properties of the first current path include a first current path resistance, a first current path voltage and / or an inductance of an energy storage element, wherein the energy storage element includes an inductor; and one or more second properties of the second current path include a second current path resistance, a second current path voltage and / or an inductance of the energy storage element.

[0052] Optionally, the first current path resistance comprises an equivalent series resistance of the inductor and a first pass device resistance of the first pass device, and the second current path resistance comprises an equivalent series resistance of the inductor and a second power switch resistance of the second power switch.

[0053] Optionally, the first pass device is a first power switch or a first diode.

[0054] Optionally, the switching converter includes a controller configured to provide a first control signal to the first power switch and a second control signal to the second power switch, and when the first power switch and the second power switch are in a first configuration, the switching converter operates in a first phase, and when the first power switch and the second power switch are in a second configuration, the switching converter operates in a second phase.

[0055] Optionally, the first control signal and / or the second control signal are each a pulse width modulation (PWM) signal.

[0056] Optionally, the current synthesizer is configured to detect at least one of the first control signal and the second control signal and use the first control signal and / or the second control signal to determine one or more of the first properties and / or one or more of the second properties and / or to determine whether the switching converter is operating in the first phase or the second phase.

[0057] Optionally, one or more first properties of the first current path include a first current path resistance, a first current path voltage and / or an inductance of an energy storage element, wherein the energy storage element includes an inductor; and one or more second properties of the second current path include a second current path resistance, a second current path voltage and / or an inductance of the energy storage element.

[0058] Optionally, the first current path resistance includes an equivalent series resistance of the inductor and a first power switch resistance of the first power switch, and the second current path resistance includes an equivalent series resistance of the inductor and a second power switch resistance of the second power switch.

[0059] Optionally, the first power switch resistance is an on-resistance of the first power switch or a body diode resistance of the first power switch, and / or the second power switch resistance is an on-resistance of the second power switch or a body diode resistance of the second power switch.

[0060] Optionally, the first current path voltage includes the output voltage and the first node voltage, and / or the second current path voltage includes the output voltage and the second node voltage.

[0061] Optionally, the switching converter comprises a voltage detector configured to detect the output voltage and the first node voltage.

[0062] Optionally, the voltage detector includes a first analog-to-digital converter configured to detect the first node voltage and a second analog-to-digital converter configured to detect the output voltage.

[0063] Optionally, the first node voltage is an input voltage, and the second node voltage is a ground voltage.

[0064] Optionally, the current synthesizer comprises a memory storage element comprising a lookup table for storing calibration data, wherein at least a portion of the calibration data is used to determine at least one of the first current path resistance, the second current path resistance and the inductance of the inductor.

[0065] Optionally, the current synthesizer is configured to determine the inductance of the inductor by selecting at least a portion of the calibration data based on the digitized current signal.

[0066] Optionally, the switching converter comprises a current sensor configured to sense a current through the inductor.

[0067] Optionally, the current synthesizer is configured to determine the inductance of the inductor by selecting at least a portion of the calibration data based on a sensed current flowing through the inductor.

[0068] Optionally, the current synthesizer is configured to determine the inductance of the inductor by interpolation using the calibration data.

[0069] Optionally, the current synthesizer is configured to determine at least one of the first current path resistance and the second current path resistance using one or both of a gate drive voltage and a temperature value.

[0070] Optionally, the digitized current signal is used for switching converter regulation, telemetry, load transient detection, and / or load line modification.

[0071] According to a second aspect of the present disclosure, a power converter system is provided, comprising a current synthesizer and a switching converter, the switching converter comprising an energy storage element and a first pass device, the switching converter being configured to receive an input voltage and provide an output voltage, wherein the current synthesizer is configured to determine one or more first properties of a first current path of the switching converter, the first current path comprising a first pass device and the energy storage element, calculate a current flowing through the energy storage element using the determined one or more first properties, and generate a digitized current signal, the digitized current signal being a digital representation of the calculated current flowing through the energy storage element.

[0072] Optionally, the first pass device is a first power switch or a first diode.

[0073] It should be understood that the power converter system of the second aspect may include features of the current synthesizer of the first aspect, and may include other features as described herein, according to the understanding of those skilled in the art.

[0074] According to a third aspect of the present disclosure, there is provided a method for generating a digitized current signal using a current synthesizer for a switching converter, the switching converter comprising an energy storage element and a first pass device, the switching converter being configured to receive an input voltage and provide an output voltage, the method comprising determining one or more first properties of a first current path of the switching converter, the first current path comprising a first pass device and an energy storage element, calculating a current flowing through the energy storage element using the determined one or more first properties, and generating a digitized current signal, the digitized current signal being a digital representation of the calculated current flowing through the energy storage element.

[0075] Optionally, the first pass device is a first power switch or a first diode.

[0076] It will be understood that, according to the understanding of a person skilled in the art, the method of the third aspect may include providing and / or using the features set forth in relation to the first aspect and / or the second aspect, and may include other features as described herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0078] The present disclosure is described in more detail below by way of example and with reference to the accompanying drawings, in which:

[0079] FIG. 1( a ) is a schematic diagram of a buck converter; FIG. 1( b ) is a schematic diagram of another buck converter; and FIG. 1( c ) is a schematic diagram of a digital buck converter;

[0080] FIG2(a) is a schematic diagram of an apparatus including a current synthesizer for a switching converter according to a first embodiment of the present disclosure, FIG2(b) is a schematic diagram of a specific embodiment of an apparatus including a specific embodiment of a current synthesizer according to a second embodiment of the present disclosure, FIG2(c) is a schematic diagram of a specific embodiment of an apparatus according to a third embodiment of the present disclosure, wherein the apparatus is a digital buck converter system including a switching converter and a current synthesizer, FIG2(d) is a graph of the variation of an inductor current IL over time during operation of the buck converter of FIG2(c) for an ideal inductor, FIG2(e) is a schematic diagram of another digital buck converter system including a switching converter and a current synthesizer according to a fourth embodiment of the present disclosure, and FIG2(f) is a schematic diagram of an apparatus including a specific embodiment of a current synthesizer according to a fifth embodiment of the present disclosure;

[0081] FIG3(a) is a current-voltage graph showing a nonlinear relationship between a voltage and a current of a diode, FIG3(b) is a current-inductance graph showing inductor saturation, FIG3(c) is a current graph showing how an interpolated 1 / L current is applied to different currents, and FIG3(d) is a graph showing a current of a switching waveform;

[0082] Figure 4 is a schematic diagram of an apparatus including a specific embodiment of a current synthesizer according to a sixth embodiment of the present disclosure; and

[0083] Figure 5(a) is a schematic diagram of a specific embodiment of an apparatus according to the seventh embodiment of the present disclosure, wherein the apparatus is a digital boost converter system including a switching converter and a current synthesizer, Figure 5(b) is a schematic diagram of a specific embodiment of an apparatus according to the eighth embodiment of the present disclosure, wherein the apparatus is an inverting buck-boost converter system including a switching converter and a current synthesizer, Figure 5(c) is a schematic diagram of a specific embodiment of an apparatus according to the ninth embodiment of the present disclosure, wherein the apparatus is a positive buck-boost converter system including a switching converter and a current synthesizer, and Figure 5(d) is a schematic diagram of a specific embodiment of an apparatus 200 according to the tenth embodiment of the present disclosure, wherein the apparatus is a buck converter system. Detailed Description

[0085] 2(a) is a schematic diagram of an apparatus 200 including a current synthesizer 202 for a switching converter 204 according to a first embodiment of the present disclosure. The switching converter 204 includes an energy storage element 206 and a pass device 207. During operation, the switching converter 204 receives an input voltage V IN And provide output voltage V OUT The current synthesizer 202 may be referred to as a digital current synthesizer. The pass device 207 may be, for example, a power switch or a diode.

[0086] The switching converter 204 may be, for example, a buck converter, a boost converter, or a buck-boost converter. The energy storage element 206 may include an inductor. The power switch 208 may include a transistor, such as a metal oxide semiconductor field effect transistor (MOSFET). The MOSFET may be, for example, a p-type MOSFET or an n-type MOSFET. In a particular embodiment, the switching converter 204 may include two or more power switches, each of which includes a transistor.

[0087] Current synthesizer 202 is configured to determine one or more first properties of a current path 210 of switching converter 204. Current path 210 includes power switch 208 and energy storage element 206.

[0088] The one or more first properties of the current path may include, for example, a current path resistance of the current path 210 , a current path voltage of the current path 210 , and / or an inductance of the energy storage element 206 , wherein the energy storage element 206 is an inductor.

[0089] The current path resistance may include an equivalent series resistance DCR of the energy storage element 206 and a through device resistance of the through device 207 , where the energy storage element is an inductor.

[0090] For a specific embodiment where the pass device 207 is a power switch, the current path resistance may include the equivalent series resistance DCR of the energy storage element 206, which is an inductor, and the power switch resistance of the power switch 208. The power switch resistance may be, for example, the on-resistance of the power switch 208.

[0091] The current synthesizer 202 is further configured to calculate a current flowing through the energy storage element 206 using the determined one or more first properties.

[0092] The current synthesizer 202 is further configured to generate a digitized current signal DI. The digitized current signal is a digital representation of the calculated current flowing through the energy storage element 206.

[0093] The digitized current signal DI can be used to provide accurate, high-bandwidth inductor current information in a switching converter.

[0094] In certain embodiments, the digitized current signal DI may be used for one or more of: regulation of the switching converter 204 , telemetry, load transient detection, and / or load line modification.

[0095] In a particular embodiment, the current synthesizer 202 may be configured to determine one or more first properties of the current path 210 at a first time step, and then use the determined one or more properties at the first time step to calculate the current flowing through the energy storage element 206 at a second time step, where the second time step is subsequent to the first time step. The current synthesizer 202 may also be configured to generate a digitized current signal DI based on the calculation, the digitized current signal DI including a digital representation of the current flowing through the energy storage element 206 at the second time step.

[0096] The current synthesizer 202 may be configured to repeat the process for subsequent time steps such that one or more first properties are determined for an initial time step and then used to calculate and then generate the next time step, and then repeat to sequentially construct the digitized current signal DI such that it varies over time.

[0097] 2( b ) is a schematic diagram of a specific embodiment of an apparatus 200 including a specific embodiment of a current synthesizer 202 according to a second embodiment of the present disclosure. In this embodiment, the energy storage element 206 is an inductor 212 and the pass device 207 is a power switch 208 .

[0098] Current synthesizer 202 includes a memory storage element 214 for storing a lookup table of calibration data. Current synthesizer 202 is configured to determine the current path resistance of current path 210 and / or the inductance of inductor 212 using at least a portion of the calibration data stored in memory storage element 214.

[0099] The calibration data may include an inductance value for the current flow, such that the current synthesizer 202 may then select the necessary calibration data from the lookup table based on the digitized current signal DI to determine the inductance of the inductor 212. In certain embodiments, the determination of the inductance of the inductor 212 may be accomplished by interpolating between two or more data points within the calibration data.

[0100] In certain embodiments, the current synthesizer 202 includes a current sensor 216 configured to sense a current IL , which is a current flowing through the inductor 212 .

[0101] In certain embodiments, the measured current IL may be used to perform background calibration on the composite current DI.

[0102] In certain embodiments, the calibration data may include an inductance value for the measured current, such that the current synthesizer 202 may then select the necessary calibration data from a lookup table based on the sensed current IL to determine the inductance of the inductor 212. In certain embodiments, the determination of the inductance of the inductor 212 may be accomplished by interpolating between two or more data points within the calibration data.

[0103] In further embodiments, the current synthesizer 202 may be configured to determine the current path resistance of the current path 210 using one or both of the gate drive voltage and the temperature value in addition to the calibration data.

[0104] 2(c) is a schematic diagram of a specific embodiment of an apparatus 200 according to the third embodiment of the present disclosure, wherein the apparatus is a digital buck converter system including a switching converter 204 and a current synthesizer 202. In this embodiment, the switching converter 204 is a buck converter.

[0105] In this example, the digitized current signal DI is a digitized inductor current DIL, which is a digital representation of the current IL flowing through the inductor 212. The current synthesizer 202 may generate the digitized inductor current DIL by calculating the current IL flowing through the inductor 212.

[0106] The switching converter 204 includes a switch 218 and a capacitor 220. The switching converter also includes a controller 222 for driving the switching operations of the switches 208 and 218 using a control signal GP and a control signal GN, respectively. The control signals GP, GN may be pulse width modulation (PWM) signals.

[0107] The switches 208, 218 may be referred to as pass devices. Both switches 208, 218 may be open during operation (eg, for PFM / DCM or diode braking), but being on at the same time may damage the devices.

[0108] During operation, the controller 222 provides PWM switching signals to the switching devices 208, 218 alternately through a driver (not shown). The driver is used to provide signals GP, GN of sufficient strength and voltage level to quickly and safely turn on / off the pass devices 208, 218. The signals GP and GN may be referred to as "gate drive voltages".

[0109] The buck converter converts the input voltage V IN Converts to a lower output voltage V OUT This is accomplished by alternately connecting the SW node to either the input voltage node or ground, and then using inductor 212 and capacitor 220 to filter the resulting ripple.

[0110] When switches 208 , 218 are in the first configuration, switching converter 204 operates in a first phase, and when switches 208 , 218 are in the second configuration, switching converter 204 operates in a second phase.

[0111] In this embodiment, current path 210 and current path 224 including switch 218 and inductor 212 are shown. Current path 210 is a path for current to flow when switch 208 is closed and switch 218 is open during a magnetization phase of operation of switching converter 204. Current path 224 is a path for current to flow when switch 218 is closed and switch 208 is open during a demagnetization phase of operation of switching converter 204.

[0112] In certain embodiments, the first property determined by the current synthesizer 202 during operation may be a current path voltage of one of the current paths 210, 224. The current path voltage includes the output voltage V OUT and a node voltage, where the node voltage is the input voltage V of the current path 210 IN and the ground voltage PGND of the current path 224 .

[0113] The switching converter 204 includes a voltage detector configured to detect the output voltage V OUT and the node voltage, which in this example is the input voltage V IN The voltage detector includes a circuit configured to detect an input voltage V IN The analog-to-digital converter (ADC) 226 is configured to detect the output voltage V OUT Analog-to-digital converter (ADC) 228.

[0114] The digitized current signal DI may be generated in the following situations: when the switching converter 204 is in the magnetization phase, for example, by determining the current path voltage of the current path 210; when the switching converter 204 is in the demagnetization phase, for example, by determining the current path voltage of the current path 224; or when the switching converter 204 is in the shutdown phase.

[0115] The digitized current signal DI may have a linear distribution or a non-linear distribution during the magnetization phase and / or the demagnetization phase.

[0116] In certain embodiments, the current synthesizer 202 may be configured to generate a digitized current signal DI during a first phase (e.g., a magnetization phase) by determining and calculating based on one or more properties of the current path 210. The current synthesizer 202 may be configured to continue to generate a digitized current signal DI during a second phase (e.g., a demagnetization phase) by determining and calculating based on one or more properties of the current path 224. This process may then be repeated when the switching converter 204 switches between the magnetization phase and the demagnetization phase.

[0117] One of the one or more properties of the current path 210 used for current calculation during the magnetization phase may be a current path resistance, which includes an equivalent series resistance DCR of the inductor 212 and a power switch resistance of the power switch 208. The power switch resistance may be, for example, an on-resistance of the power switch 208.

[0118] Another of the one or more properties of the current path 210 used for current calculation during the magnetization phase may be a current path voltage of the current path 210, which includes the output voltage V OUT and input voltage V IN .

[0119] One of the one or more properties of the current path 224 used for current calculation during the demagnetization phase may be a current path resistance, which includes an equivalent series resistance DCR of the inductor 212 and a power switch resistance of the power switch 218. The power switch resistance may be, for example, an on-resistance of the power switch 218.

[0120] Another of the one or more properties of the current path 224 used for current calculation during the demagnetization phase may be a current path voltage of the current path, which includes the output voltage V OUT and ground voltage PGND.

[0121] It should be understood that although the present embodiment relates to the generation of a digitized current signal DI during operation of a buck converter, according to the understanding of those skilled in the art, other embodiments of the current synthesizer 202 may be applied to other switching converters and during the operating stages of these other switching converters.

[0122] FIG2(d) is a graph 230 of the inductor current IL over time during operation of the buck converter of FIG2(c). During operation, the inductor 212 is coupled to the input voltage V via the switch 208. IN (magnetization phase, labeled with numeral 232) and coupled to ground PGND via switch 218 (demagnetization phase, labeled with numeral 234).

[0123] It will be appreciated that FIG. 2( d ) is for an ideal inductor, and that real inductors (eg, having a ferromagnetic core) may exhibit different variations.

[0124] The graph shows a first trace 236 showing an ideal inductor current. The inductor current IL may have an ideal shape consisting of a straight line, as used in US9419627B2 and US9667260B2. The graph also shows a second trace 238 showing a more realistic current profile, where the slope of each stage has a non-linear shape (exponential decay for the falling slope).

[0125] Note that the timing diagrams are continuous in time and continuous in data to aid in clarity of interpretation.

[0126] It will be appreciated that in certain applications, inductor saturation may dominate relative to the exponential decay factor, such that traces 236, 238 will be "flipped" horizontally relative to the current FIG. 2(d).

[0127] For some switching converters, a straight-line approximation of the inductor current IL may be sufficient for an effective control scheme. However, it is desirable to have a more accurate, nonlinear, digitized inductor current DIL waveform, as this may ensure more accurate current control. Furthermore, the digitized inductor current DIL with improved accuracy may be used for additional applications besides regulation, for example, for overcurrent protection.

[0128] 2( e ) is a schematic diagram of another digital buck converter system including a switching converter 204 and a current synthesizer 202 according to a fourth embodiment of the present disclosure. In this embodiment, the switching converter 204 is a buck converter.

[0129] In this example, the digitized current signal DI is a digitized inductor current DIL, which is a digital representation of the current flowing through the inductor 212. The current synthesizer 202 may generate the digitized inductor current DIL by calculating the current IL flowing through the inductor 212.

[0130] In this example, drivers 240, 242 are shown for providing control signals GP, GN.

[0131] Depending on the application and the needs of the device, the power supply to the drivers 240, 242 can be, for example, an existing power supply (input voltage V IN and ground rail) or other intermediate rail.

[0132] It should be understood that although the switch 208 in this embodiment is a PMOS, it can also be an NMOS with a suitable driving circuit (eg, a bootstrap capacitor).

[0133] The current synthesizer 202 may include a memory storage element 214 (not shown in this figure) for storing a lookup table of calibration data. The current synthesizer 202 may be configured to determine the current path resistance of the current path 210 and / or the current path resistance of the current path 224 and / or the inductance of the inductor 212 using at least a portion of the calibration data stored in the memory storage element 214.

[0134] In further embodiments, current synthesizer 202 may be configured to use one or both of the gate drive voltage and the temperature value in addition to the calibration data to determine the current path resistance of current path 210 and / or the current path resistance of current path 224 .

[0135] The current path resistance of a given path may include the equivalent series resistance DCR of the inductor 212 in the path and the power switch resistance of the power switch. The power switch resistance may be, for example, the on-resistance of the power switch or the body diode resistance of the power switch.

[0136] In the present embodiment, the current synthesizer 202 is configured to detect at least one of the control signals GP, GN. The current synthesizer 202 can then determine the attributes used for current calculation based on the detected control signal. Additionally or alternatively, the current synthesizer 202 can use the detected control signal to determine the current operation phase of the switching converter 204. Additionally or alternatively, the current synthesizer 202 can receive information related to the switching state of one or both of the switches 208, 218 through a signal other than the control signals GP, GN from the controller 222. The current synthesizer 202 can also receive the voltage V through the corresponding ADC 226, 228 IN 、V OUT Using this information, the current synthesizer 202 can estimate the voltage observed across the currently active current paths 210, 224 at different points in time during a given phase, ie, the current path voltages as previously described.

[0137] In certain embodiments, as previously described, the voltage across inductor 212 (ie, the current path voltage) may be calculated based on knowledge of the voltages at various nodes in the circuit and knowledge of the pulse width modulation (PWM) signals applying control of switches 208 , 218 .

[0138] In a particular embodiment, the voltage V IN 、V OUT It may be measured by a separate ADC 226 , 228 , which may also be used for voltage regulation, and the PWM signal may also be known if it is generated by a modulator within the same system as the current synthesizer 202 .

[0139] In a particular embodiment, current synthesizer 202 can use the voltage currently present across inductor 212 and the values ​​of REQ and L together with the period of the calculation clock (TS) to calculate the synthesized current DI for each calculation step. In other embodiments, diode effects and / or time delays can also be considered in the calculation.

[0140] If the voltage across the current path is known, the current through inductor 212 is known in the discrete time domain (hence in terms of T S is the clock period, T S may be the processing cycle of the controller 222) can be calculated as follows:

[0141]

[0142] in:

[0143]

[0144] n represents the number of samples, such that DI[n] is the digitized current signal DI at the second time step, and DI[n-1] is the digitized current signal DI at the first time step, the second time step occurring after the first time step. S is the time step used for calculation, the T S may be a processing cycle of the controller 222 as previously described; V[n−1] is the current path voltage across the current path at the first time step; REQ is the current path resistance; and L is the inductance of the inductor 212 .

[0145] The current path resistance REQ may be the total resistance observed in the path, REQ including the resistance of the associated switches (the on-resistance of switch 208 when switch 208 is on, and the on-resistance of switch 218 when switch 218 is on), the DC resistance (DCR) of inductor 212, and other routing resistances in the current active path. Therefore, REQ will change depending on the state of switches 208, 218.

[0146] This estimate also takes into account the actual delays that may occur in the circuit. Such delays include delays in drivers 240, 242 and turn-on / off delays through devices 208, 218. Delays may be affected by drive voltage, process corners during manufacturing, and die temperature. The delay values ​​used can be generated from a lookup table using data available during factory trimming, and can be generated from voltage and temperature sensors on the device. Interpolation can also be used to determine values ​​between measurement points.

[0147] Using the voltage across the inductor 212, the current value of the current DI[n-1], the values ​​of REQ and L, and the calculated interval T SWith knowledge of , the value of the next current DI[n] can be calculated. In certain embodiments of the present disclosure, this allows the current synthesizer 202 to predict the value of the current with any resolution (both time and amplitude) and without latency.

[0148] ADC 216 acts as a current sensing ADC and can give a measure of the current in switch 218 at a given sampling rate. This can be used for calibration of parameters REQ and L.

[0149] Although the present embodiment shows low-side current sensing, high-side current sensing may also be used to measure the current through the switch 208 .

[0150] Alternatively or additionally, separate current sensing may be used, where a small resistor in series with the inductor 212 is used to measure the current through the inductor 212 .

[0151] Depending on the direction of the current, if both switches 208, 218 are off, the body diodes of switches 208, 218 may conduct. This will add an additional voltage to the forward voltage of the diodes, as well as a diode equivalent resistance in place of the switch resistance. The specific diode that will appear in the current path will depend on the direction of the current. If the current is flowing toward V OUT , the body diode of switch 218 is turned on, and in other cases the body diode of switch 208 is turned on. The forward voltage and forward resistance of path 210 can be expressed as V DHS and R DHS , and the forward voltage and forward resistance of path 224 can be expressed as V DLS and R DLS .

[0152] The current direction in all equations assumes that positive current flows from left to right in the buck circuit, i.e., toward V OUT .

[0153] V[n-1] in equation (1) means the analog voltage V at one calculation step before the current calculation. IN 、V OUT For simplicity, we assume that the voltages are stable, as they would be in a real steady-state situation.

[0154] For T S When τ is much smaller than τ, equation (1) can be simplified as follows: x Expanding , and omitting higher-order terms, we obtain:

[0155]

[0156] Equation (2) can be summarized as follows, where the current flowing through the inductor 212 at the second time step is calculated by:

[0157] The current path resistance REQ is multiplied by the current DI[n-1] flowing through the energy storage element to provide DI[n-1]REQ.

[0158] DI[n-1]REQ is subtracted from the current path voltage V[n-1] to provide V[n-1]-DI[n-1]REQ.

[0159] V[n-1]-DI[n-1]REQ is equal to the time step difference between the second time step and the first time step (i.e., T S ) and divided by the inductor L to provide (V[n-1]-DI[n-1]REQ)T S / L.

[0160] The current DI[n-1] flowing through the energy storage element is divided into (V[n-1]-DI[n-1]REQ)T S / L are added to provide equation (1).

[0161] Note that the current path resistance REQ depends on the current path during a given phase. During the magnetization phase, the current path resistance can be represented as RMAG, and during the demagnetization phase, the current path resistance can be represented as RDEMAG. The variable terms RMAG and RDEMAG can be nonlinear corrections to the ideal slopes of the magnetization phase and the demagnetization phase, respectively.

[0162] During the magnetization phase, when switch 208 is turned on, equation (2) can be written as:

[0163]

[0164] And during the demagnetization phase, when the switch 218 is turned on, equation (2) can be written as:

[0165]

[0166] V in equations (3) and (4) IN and V OUT The ADCs 226 , 228 may be digital signals that are digital versions of their respective voltages acquired by their respective ADCs 226 , 228 and provided to the current synthesizer 202 .

[0167] As can be observed by equations (3) and (4), the estimated voltage across inductor 212 is calculated based on the state of switches 208, 218. If switch 208 is on, then V[n-1] = (V IN -V OUT), in other cases, if the switch 218 is turned on, V[n-1]=(-V OUT ). Both switches 208 and 218 may be opened in DCM mode.

[0168] The current path resistance of path 210 (i.e., the current path resistance during the magnetization phase and denoted as “RMAG”) may include the equivalent series resistance DCR of inductor 212 and the power switch resistance (denoted as “R HS ”), and can be written as follows:

[0169] RMAG=DCR+R HS +R HS迹线 (5)

[0170] Where R HS迹线 Represents all trace resistance associated with the high side.

[0171] The current path resistance of path 224 (i.e., the current path resistance during the demagnetization phase and denoted as “RDEMAG”) may include the equivalent series resistance DCR of inductor 212 and the power switch resistance (denoted as “R LS ”), and can be written as follows:

[0172] RDEMAG=DCR+R LS +R LS迹线 (6)

[0173] Where R LS迹线 Represents all trace resistance associated with the low side.

[0174] The equivalent series resistance DCR is represented in the figure as R L , and can represent the remaining resistance shared by the two paths.

[0175] R HS and R LS The on-resistances of the switches 208 and 218 may be represented respectively.

[0176] In another embodiment, a single value of REQ may be provided for both phases, as opposed to the separate values ​​presented in equations (5) and (6). For a single value embodiment, REQ may be as follows:

[0177] REQ=DCR+D×R HS +(1-D)×R LS (7)

[0178] Where D is the duty cycle of the converter.

[0179] It will be appreciated that the digitized current signal DI may have a profile shown by trace 236, which is obtained using a straight line approximation for equations (3) and (4) by setting RMAG=RDEMAG=0. It will be appreciated that this is only valid when the inductor core is not saturated.

[0180] The current synthesizer 202 may be used to generate the digitized inductor current DIL using one or more of equations (1) to (7).

[0181] This embodiment relates to a buck converter. However, further embodiments may include a current synthesizer 202 for use with current mode switching regulators (of all types) that use digital loop control. Further embodiments of the current synthesizer 202 may also be used in conventional switching regulators to obtain a digitally synthesized version of the analog current, even if the current is not used in the regulation loop. This may be used to perform other operations such as telemetry, load transient detection, and load line modification.

[0182] 2(f) is a schematic diagram of an apparatus 244 including a specific embodiment of the current synthesizer 202 according to a fifth embodiment of the present disclosure. The apparatus 244 also includes a timing controller 246; analog front ends 248, 250; ADCs 252, 254; noise gates 256, 258; a summing circuit 260; an inverter 262; and a multiplexer 264. The analog front ends 248, 250 are optional and can be used for filtering and / or gain.

[0183] In certain embodiments, the input voltage V to the switching converter 204 may be measured using ADCs 252, 254 and optional analog front ends 248, 250. IN and output voltage V OUT There may be a noise gate 256, 258 after each ADC 252, 254 to filter samples that may be corrupted by the switching of the output stage. The noise gate 256, 258 will filter the samples from the ADC 252, 254 away from samples that are too close to the HS / LS switching using information provided by the timing controller 246, which derives this information from the HS (switch 208) and LS (switch 218).

[0184] In certain embodiments where the switching converter 204 undergoes an operating phase where both switches 208, 218 are in the off state, the above equation preferably includes a diode forward voltage drop and a series resistance that is different than the on resistance of each switch 208, 218 and will depend on the direction of the current flow.

[0185] The diode forward voltage will typically be related to the body diode through the device, such as switch 208 or switch 218. Alternatively, an external diode with a lower forward voltage and / or lower resistance than the body diode may be added, in which case the characteristics of the external diode are used.

[0186] Figure 3(a) is a current-voltage graph showing the nonlinear relationship between the voltage and current of a diode. This can be approximated as a voltage drop about a resistor, and for the case when both switches are open and the current in inductor 212 is non-zero, the above equation can be rewritten as shown below.

[0187] If the current is positive, the body diode of switch 218 will conduct and the current can be calculated as follows:

[0188]

[0189] Where R DLS is the body diode resistance of switch 218, V DLS is the voltage across the body diode of switch 218 .

[0190] Similarly, if the current is negative (i.e., the current is flowing toward V IN ), the current flows through the body diode of switch 208, and the current can be calculated as follows:

[0191]

[0192] Where R DHS is the body diode resistance of switch 208, V DHS is the voltage across the body diode of switch 208 .

[0193] Once the current reaches zero, it is assumed to stay there.

[0194] Inductors may saturate and their apparent inductance to small signal perturbations may decrease as current increases.

[0195] FIG3( b) is a current-inductance graph showing inductor saturation. Since the inductance is used in the form of 1 / L in the above equation, and since the effect is symmetrical, it is sufficient to store a piecewise linear form of half of 1 / L in the form of a lookup table and interpolate the values ​​for different currents. Such data can form the calibration data stored in the lookup table of any embodiment described herein and is consistent with the understanding of those skilled in the art.

[0196] FIG. 3( c ) is a graph of 1 / L current curves showing how interpolation can be applied to different currents.

[0197] In certain embodiments, the inductance L may be directly stored in a lookup table in the memory storage element 214 and then used to calculate its reciprocal within the current synthesizer 202, depending on which has the lower error for the entire current range.

[0198] For a given value of DI, the value of 1 / L used in the calculations to determine the digitized current signal can be calculated using the interpolation formula:

[0199]

[0200] In certain embodiments of the present disclosure, the inductance L of the inductor 212 may be determined using equation (10) and calibration data stored in a lookup table of the memory storage element 214, where the calibration data has the following format:

[0201] DI Offset Slope |OF| ​ 1 / L (original, non-derated) 0 a<=|IN| ​ <![CDATA[Offset a > <![CDATA[Slope a > b<=|IN| <![CDATA[Offset b > <![CDATA[Slope b >

[0202] where the offset and slope are obtained by linear interpolation from the offset and slope values ​​in the lookup table, e.g. in the example above there are only 2 points.

[0203] It can be seen that the normalized current increase per step increases as the absolute value of the current increases.

[0204] Figure 3(d) shows the current curve of the switching waveform. The values ​​of are interpolated using a lookup table and the current value of the current will be used. Therefore, the current switching waveform will show a curved line instead of an ideal triangle as shown in Figure 3(d).

[0205] The four equations for current in various modes (switch 208 on, switch 218 on, all positive current off, all negative current off) can be combined in a single equation to obtain the basis for a single calculation engine:

[0206]

[0207] The values ​​of the following items depend on the switch state and are given in the following table:

[0208]

[0209] As mentioned previously, FIG. 2( d ) is for an ideal inductor, while real inductors (eg, having a ferromagnetic core) may exhibit different variations, such as those shown in FIGS. 3( a ) to 3( d ).

[0210] Figure 44 is a schematic diagram of a device 400 including a specific embodiment of the current synthesizer 202 according to the sixth embodiment of the present disclosure. The current synthesizer 202 includes: a calculation engine 402 for performing the current calculation as described above; and a register 404 for storing and outputting a digitized current signal DI.

[0211] In this example, the timing controller 246 is a PWM generator that will generate the high-side HS and low-side LS control signals (previously labeled GP and GN, respectively), and will provide signals to other blocks in the device 400 .

[0212] The signal NG is output to the noise gates 256, 258 and will optionally blank away any portion of the measurement that occurs too close to a switching edge. In this case, the previously sampled data is retained. This helps minimize interference with the current calculation due to switching noise.

[0213] The signal STATE output from this block will control the current model, which uses the various input parameters to calculate the next value of the resultant current DI according to the set of equations mentioned above. The upcoming state of the HS / LS (the state to which the outputs will change) will be reflected in STATE, with both changes occurring together on the same CLK edge. This will ensure that current calculations on CLK edges arriving one cycle later will be able to use STATE to calculate the current at that point in time. The STATE signal is simply an encoding of the state of the HS / LS.

[0214] The control block 222 may use a timing setting that may include delays for the drivers and output switching devices.

[0215] Typically, the optional FRAC output will be necessary when the resolution of the edge generation of the HS or LS is greater than the resolution of the CLK, or when the delay needs to have a resolution greater than the CLK period.

[0216] The delay information can be used to delay changes in the STATE output, and / or to change the value of FRAC provided to the current synthesizer 202. This will reflect the time delay when the state changes through the devices 208, 218. STATE will reflect any changes that span an integer number of cycles, and FRAC will use fractional weighting to cover the effects of changes within a single cycle.

[0217] It can be assumed that the FRAC output provides a fractional value between 0 and 1. Then, the transition of state will occur at a time FRAC*TS after the CLK edge. If the FRAC output is not generated or used, the effect is equivalent to FRAC being 0.

[0218] For example, if the transition from HS on to LS on is delayed by FRAC*T from the CLK edge S , then the device equivalent resistance R DEV will be as follows,

[0219] R DEV =FRAC.R HS +(1-FRAC).R LS (12)

[0220] For all other items in the above table, similar expressions can be derived, which will be clear to those skilled in the art.

[0221] In certain embodiments, and as an extension of the above, if the signal changes multiple times during a calculation cycle, there may be additional FRAC values ​​from which weights may be derived.

[0222] In further embodiments, the scheme can be extended to multiple stages by expanding the controller, duplicating the drivers, switching devices, inductors and / or capacitors, adding a current sensing ADC per additional stage, and adding a current synthesizer per additional stage. The voltage ADC can be shared.

[0223] In other embodiments, the correction inputs to the model (e.g., 1 / L and all resistance terms) can be changed dynamically from cycle to cycle to allow correction of the resultant current. This is done by comparing the measured current from the current sense ADC 216 and comparing it to the resultant current and using the error to change parameters.

[0224] 5( a ) is a schematic diagram of a specific embodiment of an apparatus 200 according to the seventh embodiment of the present disclosure, wherein the apparatus is a digital boost converter system including a switching converter 204 and a current synthesizer 202. In this embodiment, the switching converter 204 is a boost converter.

[0225] In this embodiment, the boost converter uses a bootstrap power supply V BOOT The powered driver 240 powers the NMOS high-side switch (switch 208 ) to meet the overdrive requirement of the switch 208 .

[0226] In another embodiment, if the output voltage V OUT Must be 0, then a back-to-back high side switch can be provided.

[0227] Based on the discussion of the preceding embodiments including a buck converter, the operation of the present embodiment will be clear to those skilled in the art.

[0228] If only switch 218 is turned on:

[0229]

[0230] If only switch 208 is turned on:

[0231]

[0232] 5( b) is a schematic diagram of a specific embodiment of the apparatus 200 according to the eighth embodiment of the present disclosure, wherein the apparatus is an inverting buck-boost converter system including a switching converter 204 and a current synthesizer 202. In this embodiment, the switching converter 204 is an inverting buck-boost converter.

[0233] Based on the discussion of the preceding embodiments including a buck converter or a boost converter, the operation of the present embodiment will be clear to those skilled in the art.

[0234] Note that V OUT A resistive ladder in front of the ADC is optional and is used to bring negative output voltages into V OUT In this circuit, the positive current in the inductor is toward ground.

[0235] If only switch 208 is turned on:

[0236]

[0237] If only switch 218 is turned on:

[0238]

[0239] FIG5(c) is a schematic diagram of a specific embodiment of the apparatus 200 according to the ninth embodiment of the present disclosure, wherein the apparatus is a positive buck-boost converter system including a switching converter 204 and a current synthesizer 202. In this embodiment, the switching converter 204 is a positive buck-boost converter. The switching converter 204 includes a switch M HSA 、M HSB 、M LSA 、M LSB ; Drivers 500, 502, 504, 506 and current sensors 508, 510.

[0240] Those skilled in the art will appreciate that the positive buck-boost of the present embodiment is different from a negative buck-boost (such as the system of FIG. 5( b )), and that one is not merely a variation of the other.

[0241] The current in the inductor is defined as positive when it flows from SWA to SWB and can be calculated using the following equation:

[0242]

[0243]

[0244] In the above case the diode equation is not written down explicitly as there would be many such equations but they can all be derived from the step-down example which would be clear to a person skilled in the art.

[0245] FIG5(d) is a schematic diagram of a specific embodiment of the apparatus 200 according to the tenth embodiment of the present disclosure, wherein the apparatus is a buck converter system including a switching converter 204 and a current synthesizer 202. In this embodiment, the pass device 207 is a diode D LS .

[0246] In further embodiments and with respect to the above examples, a current sensing ADC may be placed with any pass device. In a particular embodiment, only one current sensing ADC may be provided for each buck, boost, and inverting buck-boost, and two current sensing ADCs may be provided for the positive buck-boost. However, due to duty cycle limitations, it is preferred to provide additional current sensing ADCs.

[0247] In summary, embodiments of the present disclosure may provide a topology-dependent current synthesizer that may calculate the current in an energy storage element (e.g., an inductor) of a switching converter based on available information / attributes, which may include PWM switching information, voltages at various nodes, knowledge of nominal REQ and inductance L, and may include inductance droop and thermal characteristics, body diode characteristics through the device, background calibration data, and fixed calibration data. Embodiments of the present disclosure may use piecewise linear modeling of inductor droop; inductor saturation and diode properties, such as diode properties associated with the body diode and including diode forward voltage and resistance; and gate drive voltage. It should be understood that inductor droop may also be referred to as inductor saturation.

[0248] Various improvements and modifications may be made to the above without departing from the scope of the present disclosure.

Claims

1. A current synthesizer for a switching converter, the switching converter comprising an energy storage element and a first pass device, the switching converter being configured to receive an input voltage and provide an output voltage, the current synthesizer being configured to: determining one or more first properties of a first current path of the switching converter, the first current path including the first pass device and the energy storage element; calculating a current flowing through the energy storage element using the determined one or more first properties; and A digitized current signal is generated that is a digital representation of the calculated current flowing through the energy storage element.

2. The current synthesizer according to claim 1, wherein: The one or more first properties of the first current path include: a first current path resistance; first current path voltage; and / or The inductance of the energy storage element, wherein the energy storage element comprises an inductor.

3. The current synthesizer according to claim 2, wherein: The first current path resistance includes an equivalent series resistance of the inductor and a first pass device resistance of the first pass device.

4. The current synthesizer according to claim 2, wherein: The first current path voltage includes the output voltage and a first node voltage; and The switching converter includes a voltage detector configured to detect the output voltage and the first node voltage.

5. The current synthesizer of claim 2, comprising a memory storage element, the memory storage element comprising: a lookup table for storing calibration data; in at least one of the first current path resistance and the inductance of the inductor is determined using at least a portion of the calibration data; and The current synthesizer is configured to determine an inductance of the inductor by selecting the at least a portion of the calibration data based on the digitized current signal.

6. The current synthesizer according to claim 1, wherein the current synthesizer is configured as follows: determining the one or more first properties of the first current path of the switching converter at a first time step; calculating a current flowing through the energy storage element at a second time step using the determined one or more properties at the first time step; generating the digitized current signal, the digitized current signal comprising a digital representation of the calculated current flowing through the energy storage element at the second time step; wherein: The one or more first properties of the first current path include: a first current path resistance; first current path voltage; and / or The inductance of the energy storage element, wherein the energy storage element comprises an inductor.

7. The current synthesizer according to claim 6, wherein the current synthesizer is configured to calculate the current flowing through the energy storage element at the second time step by: determining a first variable by multiplying the first current path resistance at the first time step by the current flowing through the energy storage element at the first time step; determining a second variable by subtracting the first variable from the first current path voltage at the first time step; determining a third variable by multiplying the second variable by a time step difference between the second time step and the first time step and dividing by the inductance; and The current flowing through the energy storage element at the second time step is determined by adding the current flowing through the energy storage element at the first time step to the third variable.

8. The current synthesizer according to claim 1, wherein: The switching converter includes a second power switch, and the current synthesizer is configured to: determining the one or more first properties of the first current path of the switching converter during a first phase; calculating a current flowing through the energy storage element using one or more properties determined during the first stage; generating a first portion of the digitized current signal during the first phase using the current calculated during the first phase; determining one or more second properties of a second current path of the switching converter during a second phase, the second path including the second power switch and the energy storage element; calculating a current flowing through the energy storage element using the determined one or more second properties; and A second portion of the digitized current signal during the second phase is generated using the current calculated during the second phase.

9. A power converter system comprising: Current synthesizer; and A switching converter, the switching converter comprising: an energy storage element and a first pass device, the switching converter being configured to receive an input voltage and provide an output voltage; wherein: The current synthesizer is configured as: determining one or more first properties of a first current path of the switching converter, the first current path including the first pass device and the energy storage element; calculating a current flowing through the energy storage element using the determined one or more first properties; and A digitized current signal is generated that is a digital representation of the calculated current flowing through the energy storage element.

10. A method for generating a digitized current signal using a current synthesizer for a switching converter, the switching converter comprising an energy storage element and a first pass device, the switching converter being configured to receive an input voltage and provide an output voltage, the method comprising: determining one or more first properties of a first current path of the switching converter, the first current path including the first pass device and the energy storage element; calculating a current flowing through the energy storage element using the determined one or more first properties; and The digitized current signal is generated and is a digital representation of the calculated current flowing through the energy storage element.

Images