Screen refresh rate control method, electronic equipment and related device

By adjusting the matching of frame rate and screen refresh rate in electronic devices, the problem of uneven screen frame during screen refresh rate switching is solved, resulting in a smoother display experience.

CN119440443APending Publication Date: 2025-02-14HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202310976433.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-03
Publication Date
2025-02-14

AI Technical Summary

Technical Problem

How can we achieve smooth frame switching when electronic devices switch screen refresh rates to balance power consumption and user experience?

Method used

After deciding to switch the screen refresh rate, the electronic device does not switch the screen refresh rate immediately. Instead, it adjusts the frame rate to match the frame rate of the screen frame, ensuring a smooth transition between frames.

Benefits of technology

By matching the frame rate and screen refresh rate, stuttering or jumps during frame switching are avoided, thus improving the display effect.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a screen refresh rate control method, electronic equipment and a related device. And after the first condition is met, the electronic equipment decides to switch from the first screen refresh rate to the second screen refresh rate. The electronic equipment obtains cached picture frames, the cached picture frames comprise a first cached picture frame and a second cached picture frame, under the condition that the first cached picture frame is determined at a first frame rate, the electronic equipment sends and displays the first cached picture frame at a first screen refresh rate through a synthesizer, and the first frame rate is equal to the first screen refresh rate. And under the condition that the second cache picture frame is determined at a second frame rate, the electronic equipment sends and displays the second cache picture frame at a second screen refresh rate through the synthesizer, and the second frame rate is equal to the second screen refresh rate. Therefore, after the electronic equipment decides to switch the screen refresh rate, the screen refresh rate cannot be switched immediately, so that the frame rate of the picture frame is matched with the screen refresh rate of the electronic equipment, and smooth transition of frame switching is ensured.
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Description

Technical Field

[0001] The present application relates to the field of terminal technology, and in particular to a screen refresh rate control method, electronic equipment and related devices. Background Art

[0002] As display technology improves, more and more manufacturers have launched electronic devices that support higher screen refresh rates. Higher screen refresh rates can support higher display frame rates, and higher display frame rates can make dynamic images display more smoothly. For example, increasing the display frame rate from 60 frames per second (FPS) to 90FPS can significantly reduce the motion blur of the human eye and bring a smoother experience.

[0003] However, when the screen refresh rate is increased, the power consumption of the electronic device also increases. In order to balance the power consumption and user experience of the electronic device, the electronic device can dynamically adjust the screen refresh rate so that the power consumption and user experience of the electronic device are both optimized. How to achieve smooth frame switching when the electronic device switches the screen refresh rate needs further research. Summary of the invention

[0004] The present application provides a screen refresh rate control method, an electronic device and related devices. After the electronic device decides to switch the screen refresh rate, the screen refresh rate will not be switched immediately, so that the frame rate of the picture frame matches the screen refresh rate of the electronic device, ensuring a smooth transition of frame switching.

[0005] In a first aspect, the present application provides a screen refresh rate control method, where the electronic device includes a synthesizer, and the method includes: determining a first screen refresh rate of the electronic device; determining a first screen frame according to a first frame rate, and displaying the synthesized first screen frame at the first screen refresh rate through the synthesizer, and the first frame rate is equal to the first screen refresh rate; after satisfying a first condition, determining a second screen refresh rate of the electronic device, and the second screen refresh rate is different from the first screen refresh rate; obtaining a cached screen frame, wherein the cached screen frame includes a first cached screen frame and a second cached screen frame, the first cached screen frame is determined at the first frame rate, the second cached screen frame is determined at the second frame rate, the second frame rate is equal to the second screen refresh rate, and the display progress of the first cached screen frame is before the second cached screen frame; displaying the synthesized first cached screen frame at the first screen refresh rate through the synthesizer, and displaying the synthesized second cached screen frame at the second screen refresh rate through the synthesizer.

[0006] Wherein, determining the first picture frame according to the first frame rate may be determining the image data contained in the first picture frame according to the first frame rate. The frame rate is used to determine the image data contained in the picture frame, and the determination of the image data contained in the picture frame based on the frame rate may be performed by an electronic device or by an application in the electronic device. When the playback speed of the picture frame is fixed, the larger the frame rate, the smaller the difference in the image data contained between two adjacent picture frames, and the smoother the picture frame playback. The smaller the frame rate, the larger the difference in the image data contained between two adjacent picture frames.

[0007] The screen refresh rate is used to indicate the number of times the display screen on the electronic device refreshes the display frame within a fixed time. The higher the screen refresh rate, the smoother the electronic device plays the picture frame. The step of determining the screen refresh rate of the electronic device can be determined by the electronic device. The electronic device can automatically determine the second screen refresh rate, and the electronic device can also receive a user operation to determine the second screen refresh rate.

[0008] Optionally, the cached picture frame is not limited to the first cached picture frame and the second cached picture frame, and the number of cached picture frames is related to the number of layer buffers in the electronic device. The more buffers there are, the more cached picture frames there are, and the fewer buffers there are, the fewer cached picture frames there are.

[0009] Through this method, after the electronic device decides to switch the screen refresh rate, the electronic device will not switch the screen refresh rate immediately. However, the electronic device will immediately switch the frame rate and determine the image data contained in the picture frame at the frame rate after the switch. When the electronic device sends the picture frame for display, it will determine whether the frame rate of the picture frame matches the screen refresh rate after the switch. If it matches, the electronic device will display the picture frame at the screen refresh rate after the switch. If it does not match, the electronic device will still display the picture frame at the screen refresh rate before the switch. In this way, the frame rate of the picture frame can be matched with the screen refresh rate of the electronic device, ensuring a smooth transition of frame switching.

[0010] In combination with the first aspect, in a possible implementation manner, determining the first picture frame according to the first screen refresh rate specifically includes: determining the first frame rate according to the first screen refresh rate; determining the first picture frame according to the first frame rate.

[0011] Among them, the frame rate is determined by the screen refresh rate. The value of the frame rate is equal to the value of the screen refresh rate. For example, when the screen refresh rate is the first screen refresh rate, the frame rate is equal to the first frame rate, and the value of the first frame rate is equal to the value of the first screen refresh rate. When the screen refresh rate is the second screen refresh rate, the frame rate is equal to the second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate. After the screen refresh rate of the electronic device changes, the frame rate will also change immediately, and the image data contained in the picture frame is determined at the switched frame rate.

[0012] In combination with the first aspect, in a possible implementation, the method also includes: in response to the first vysnc signal, determining a second cached screen frame at a second frame rate and rendering the second cached screen frame; in response to the second vysnc signal, determining a second screen frame at the second frame rate and rendering the second screen frame, wherein the display progress of the second screen frame is after the second cached screen frame; wherein the time difference between the second vysnc signal and the first vysnc signal is the inverse of the first screen refresh rate.

[0013] In the present application, the electronic device acquires and generates the current picture frame with the vysnc signal, and triggers the synthesizer to send the picture frame to the hardware layer for rendering. When receiving the first vsync signal, the electronic device determines the second cached picture frame at the second frame rate, and synthesizes the rendered third cached picture frame through the synthesizer. When receiving the second vsync signal, the electronic device determines the second picture frame at the second frame rate, and synthesizes the rendered second cached picture frame through the synthesizer.

[0014] The first vsync signal may be the first vsync signal after the electronic device decides to switch the screen refresh rate. Since the frame rate has been switched to the second frame rate at this time, when the first vsync signal is received, the image data included in the second cached picture frame is determined at the second frame rate.

[0015] The second vsync signal may be the second vsync signal after the electronic device decides to switch the screen refresh rate. Since the third cached picture frame cached by the electronic device is still determined at the first frame rate, the electronic device does not switch the screen refresh rate first, but still sends the display picture frame at the first screen refresh rate. The time difference between the second vysnc signal and the first vysnc signal is the reciprocal of the first screen refresh rate. This can avoid the occurrence of freezes or jumps when the electronic device displays the third cached picture frame.

[0016] In combination with the first aspect, in a possible implementation, the cached picture frame also includes a third cached picture frame, the third cached picture frame is determined by the first frame rate, the display progress of the third cached picture frame is before the second cached picture frame, and the display progress of the third cached picture frame is after the first cached picture frame; the electronic device also includes a hardware synthesizer; the method also includes: in response to the first vysnc signal, synthesizing the rendered third cached picture frame through the synthesizer, and refreshing and displaying the first cached picture frame on the display screen through the hardware synthesizer; in response to the second vysnc signal, refreshing and displaying the third cached picture frame on the display screen through the hardware synthesizer.

[0017] In the present application, when the electronic device receives the VYSNC signal, in addition to determining the output frame based on the frame rate, it also needs to send the display frame. When the first VYSNC signal is received, the first cached frame is refreshed and displayed on the display screen through the hardware synthesizer. When the second VYSNC signal is received, the third cached frame is refreshed and displayed on the display screen through the hardware synthesizer.

[0018] The time difference between the second VYSNC signal and the first VYSNC signal is the inverse of the first screen refresh rate. The third cached picture frame is also determined based on the first frame rate, and the frame rate of the third cached picture frame matches the screen refresh rate when the third cached picture frame is displayed. When the electronic device decides to switch the screen refresh rate, the electronic device does not switch the screen refresh rate immediately, thereby avoiding the occurrence of freezes or jumps when the electronic device displays the third cached picture frame, and improving the display effect of the picture frame when switching the screen refresh rate.

[0019] In combination with the first aspect, in a possible implementation manner, the method further includes: in response to a second vysnc signal, synthesizing a rendered second cached picture frame by a synthesizer.

[0020] In some embodiments, if the electronic device includes multiple front buffers, the multiple front buffers only store the rendered second cached picture frames and do not store other rendered picture frames, or the electronic device has only one front buffer and the one front buffer stores the rendered second cached picture frames, then the synthesizer can synthesize the rendered second cached picture frames in response.

[0021] In some embodiments, if the electronic device includes multiple front buffers, the multiple front buffers store not only the rendered second cached picture frames, but also other rendered picture frames. Then, in response to the second vysnc signal, the synthesizer needs to synthesize the other rendered picture frames, and in response to other vysnc signals after the second vysnc signal, synthesize the rendered second cached picture frames.

[0022] In combination with the first aspect, in a possible implementation, the method also includes: in response to a third VYSNC signal, synthesizing a rendered second picture frame through a synthesizer, and refreshing and displaying a second cached picture frame on a display screen through a hardware synthesizer; in response to a fourth VYSNC signal, determining a third picture frame at a second frame rate, and rendering the third picture frame; wherein the time difference between the third VYSNC signal and the fourth VYSNC signal is the inverse of the second screen refresh rate.

[0023] When the electronic device receives the third VYSNC signal, before the electronic device sends the second cached picture frame for display, the electronic device determines that the second cached picture frame is determined at the second frame rate. At this time, the electronic device can determine that the electronic device does not cache the picture frame determined at the first frame rate. Then the electronic device can switch the screen refresh rate to the third screen refresh rate. And send the second cached picture frame determined at the second frame rate at the third screen refresh rate, so that the frame rate of the second cached picture frame matches the screen refresh rate when the second cached picture frame is displayed, and the display duration of the second cached picture frame is the time difference between the third VYSNC signal and the fourth VYSNC signal. It avoids the occurrence of freezes or jumps when the electronic device displays the second cached picture frame, and improves the display effect of the picture frame when switching the screen refresh rate.

[0024] In combination with the first aspect, in a possible implementation manner, the first VYSNC signal and the second VYSNC signal are received after determining a second screen refresh rate of the electronic device.

[0025] In combination with the first aspect, in a possible implementation manner, the second vysnc signal and the third vysnc signal are adjacent vysnc signals or the second vysnc signal and the third vysnc signal are non-adjacent vysnc signals.

[0026] In this way, when receiving the first vysnc signal, the electronic device changes the frame rate from the first frame rate to the second frame rate, determines the image data included in the second cache picture frame based on the second frame rate, and renders the second cache picture frame.

[0027] When receiving the second vysnc signal, the electronic device determines the image data included in the second picture frame based on the second frame rate, and renders the second picture frame.

[0028] In combination with the first aspect, in a possible implementation, determining a second cached picture frame at a second frame rate specifically includes: determining the image data included in the second cached picture frame based on the second frame rate, the image data included in the first cached picture frame, and the playback speed of the picture frame.

[0029] In some embodiments, in a long page sliding scenario, the playback speed of the picture frames may be related to the speed at which the user slides the long page.

[0030] In other embodiments, such as a video playback scenario, the playback speed of the picture frame may be the playback speed of the video. In combination with the first aspect, in a possible implementation, determining the second cache picture frame at the second frame rate specifically includes: determining the progress of the second cache picture frame according to the second frame rate, the progress of the third cache picture frame, and the playback speed of the picture frame; and determining the image data included in the second cache picture frame based on the progress of the second cache picture frame.

[0031] In this way, the electronic device can determine the progress of the current image frame (or the image data contained in the current image frame) based on the progress of the previous image frame (or the image data contained in the previous image frame), the second frame rate and the playback speed of the image frame.

[0032] In combination with the first aspect, in a possible implementation, in response to a second vysnc signal, determining a second picture frame at a second frame rate and rendering the second picture frame specifically includes: in response to the second vysnc signal, when the progress of the second cached picture frame is less than or equal to the progress of the second vysnc signal, determining the second picture frame at the second frame rate and rendering the second picture frame.

[0033] In combination with the first aspect, in a possible implementation manner, the method further includes: in response to the second vysnc signal, when the progress of the second cached picture frame is greater than the progress of the second vysnc signal, not rendering the second picture frame.

[0034] During the switching of the screen refresh rate, the electronic device needs to determine whether the progress of the previous frame is greater than the progress of the current vysnc signal. If the progress of the previous frame is greater than the progress of the current vysnc signal, the electronic device needs to suspend rendering the frame within a vysnc cycle to avoid the situation where the frame is over-rendered and causes the frame to pile up.

[0035] When the progress of the previous frame is less than or equal to the progress of the current vysnc signal, there will be no accumulation of frames due to over-rendering, and the electronic device can render the frames normally without pausing the rendering of the frames.

[0036] When the progress of the previous frame is greater than or equal to the progress of the current vysnc signal, the frame will be over-rendered and piled up, and the electronic device needs to suspend rendering the frame.

[0037] For example, when switching from a high screen refresh rate to a low screen refresh rate, when receiving the first VYSNC signal, the electronic device determines the second cached screen frame at a second frame rate. When receiving the second VYSNC signal, the electronic device needs to determine the relationship between the progress of the second cached screen frame and the progress of the second VYSNC signal. Since the electronic device has switched to a low frame rate at this time, and the screen refresh rate has not changed, the progress of the second cached screen frame will be greater than the progress of the second VYSNC signal. Then, when the electronic device receives the second VYSNC signal, the electronic device first pauses rendering the second screen frame, and the second screen frame can be the next screen frame adjacent to the second cached screen frame. However, when receiving the second VYSNC signal, the electronic device can still synthesize the rendered second cached screen frame through a synthesizer. In this way, the situation where the screen frame is piled up due to excessive rendering of the screen frame can be avoided.

[0038] In combination with the first aspect, in a possible implementation manner, the method further includes: in response to a third vysnc signal, determining a second picture frame at a second frame rate, and rendering the second picture frame.

[0039] In a vysnc signal cycle, the electronic device pauses rendering the picture frame, and then when the next vysnc signal arrives, the electronic device can start rendering the picture frame.

[0040] Optionally, when receiving the third VYSNC signal, the electronic device may compare the progress of the second cached picture frame with the progress of the third VYSNC signal. When the progress of the second cached picture frame is greater than the progress of the third VYSNC signal, the electronic device may not render the second picture frame. When the progress of the second cached picture frame is less than the progress of the third VYSNC signal, the electronic device may render the second picture frame.

[0041] Optionally, in other embodiments, when receiving the second VYSNC signal, the electronic device may determine the second picture frame at the second frame rate, but does not render the second picture frame. When receiving the third VYSNC signal, the electronic device may no longer determine the second picture frame at the second frame rate, but directly render the second picture frame.

[0042] In some embodiments, when the third vysnc signal is received, whether SurfaceFlinger synthesizes the picture frame depends on whether there is a rendered picture frame cached in the buffer of the electronic device. If there is a rendered third picture frame in the buffer, when the first vysnc signal is received, the second cached picture frame can be determined and rendered. When the second vysnc signal is received, SurfaceFlinger can synthesize the third picture frame. When the third vysnc signal is received, the hardware synthesizer can send the third picture frame to the display screen, and SurfaceFlinger can synthesize the second cached picture frame. Then when the fourth vysnc signal is received, SurfaceFlinger can synthesize the second picture frame, and the hardware synthesizer can send the second cached picture frame to the display screen. When the fifth vysnc signal is received, the hardware synthesizer can send the second picture frame to the display screen.

[0043] Optionally, the third picture frame may be the first cached picture frame or the second cached picture frame or the third cached picture frame or more previous picture frames that fail to be synthesized, resulting in being cached in the buffer when the third vysnc signal is received.

[0044] In some embodiments, when the third vysnc signal is received, the rendered third frame does not exist in the buffer, and when the third vysnc signal is received, SurfaceFlinger cannot synthesize the frame. Then, when the fourth vysnc signal is received, the hardware synthesizer cannot refresh the frame to be displayed, and the hardware synthesizer needs to display the second frame within two vysnc cycles. When the fifth vysnc signal is received, the hardware synthesizer can send the second frame to the display.

[0045] In combination with the first aspect, in a possible implementation manner, the second screen refresh rate is greater than the first screen refresh rate, and the second frame rate is greater than the first frame rate.

[0046] In combination with the first aspect, in a possible implementation, the first condition includes any one or more of the following: the temperature of the electronic device is lower than a preset temperature, the power of the electronic device is higher than a preset power, the CPU occupancy rate of the electronic device's central processing unit is less than a specified occupancy rate, the user's page sliding speed is greater than a preset speed, and the picture frame is a picture frame in a game scene.

[0047] In combination with the first aspect, in a possible implementation manner, the second screen refresh rate is lower than the first screen refresh rate, and the second frame rate is lower than the first frame rate.

[0048] In combination with the first aspect, in a possible implementation, the first condition includes any one or more of the following: the temperature of the electronic device is higher than a preset temperature, the power of the electronic device is lower than a preset power, the CPU occupancy rate of the electronic device's central processing unit is greater than a specified occupancy rate, the user's page sliding speed is lower than a preset speed, and the picture frame is a picture frame in a game loading scene.

[0049] In a second aspect, the present application provides a screen refresh rate control device, the device including a synthesizer, a screen refresh rate decision module and a processing module, wherein the screen refresh rate decision module is used to determine a first screen refresh rate of the electronic device; the processing module is used to determine a first picture frame according to a first frame rate; the synthesizer is used to display the synthesized first picture frame at the first screen refresh rate, and the first frame rate is equal to the first screen refresh rate; the screen refresh rate decision module is also used to determine the second screen refresh rate of the electronic device after satisfying a first condition, and the second screen refresh rate is different from the first screen refresh rate; the synthesizer is also used to: obtain a cached picture frame, wherein the cached picture frame includes a first cached picture frame and a second cached picture frame, the first cached picture frame is determined at the first frame rate, the second cached picture frame is determined at the second frame rate, the second frame rate is equal to the second screen refresh rate, and the display progress of the first cached picture frame is before the second cached picture frame; display the synthesized first cached picture frame at the first screen refresh rate; display the synthesized second cached picture frame at the second screen refresh rate.

[0050] In combination with the second aspect, in a possible implementation manner, the processing module is specifically used to: determine a first frame rate according to a first screen refresh rate; and determine a first picture frame according to the first frame rate.

[0051] In combination with the second aspect, in a possible implementation method, the processing module is also used to respond to the first VYSNC signal, determine the second cached screen frame at the second frame rate, and render the second cached screen frame; the processing module is also used to respond to the second VYSNC signal, determine the second screen frame at the second frame rate, and render the second screen frame, wherein the display progress of the second screen frame is after the second cached screen frame; wherein the time difference between the second VYSNC signal and the first VYSNC signal is the inverse of the first screen refresh rate.

[0052] In combination with the second aspect, in a possible implementation, the cached picture frame also includes a third cached picture frame, the third cached picture frame is determined based on the first frame rate, the display progress of the third cached picture frame is before the second cached picture frame, and the display progress of the third cached picture frame is after the first cached picture frame; the electronic device also includes a hardware synthesizer; the method also includes: the synthesizer is also used to synthesize the rendered third cached picture frame in response to the first vysnc signal; the hardware synthesizer is used to refresh and display the first cached picture frame on the display screen in response to the first vysnc signal; the hardware synthesizer is also used to refresh and display the third cached picture frame on the display screen in response to the second vysnc signal.

[0053] In combination with the second aspect, in a possible implementation manner, the synthesizer is further configured to synthesize the rendered second cached picture frame in response to a second vysnc signal.

[0054] In combination with the second aspect, in a possible implementation, the synthesizer is further used to synthesize the rendered second picture frame in response to the third VYSNC signal; the hardware synthesizer is further used to refresh and display the second cached picture frame on the display screen in response to the third VYSNC signal; the processing module is further used to determine the third picture frame at the second frame rate and render the third picture frame in response to the fourth VYSNC signal; wherein the time difference between the third VYSNC signal and the fourth VYSNC signal is the inverse of the second screen refresh rate.

[0055] In conjunction with the second aspect, in a possible implementation manner, the first VYSNC signal and the second VYSNC signal are received after determining a second screen refresh rate of the electronic device.

[0056] In combination with the second aspect, in a possible implementation manner, the second vysnc signal and the third vysnc signal are adjacent vysnc signals or the second vysnc signal and the third vysnc signal are non-adjacent vysnc signals.

[0057] In combination with the second aspect, in a possible implementation method, the processing module is specifically used to determine the progress of the second cache picture frame based on the second frame rate, the progress of the third cache picture frame and the playback speed of the picture frame; and determine the image data included in the second cache picture frame based on the progress of the second cache picture frame.

[0058] In combination with the second aspect, in a possible implementation, the processing module is specifically configured to respond to the second vysnc signal and, when the progress of the second cached picture frame is less than or equal to the progress of the second vysnc signal, determine the second picture frame at a second frame rate and render the second picture frame.

[0059] In combination with the second aspect, in a possible implementation manner, the processing module is further configured to respond to the second vysnc signal and not render the second picture frame when the progress of the second cached picture frame is greater than the progress of the second vysnc signal.

[0060] In combination with the second aspect, in a possible implementation manner, the processing module is further configured to determine a second picture frame at a second frame rate and render the second picture frame in response to a third vysnc signal.

[0061] In combination with the second aspect, in a possible implementation manner, the second screen refresh rate is greater than the first screen refresh rate, and the second frame rate is greater than the first frame rate.

[0062] In combination with the second aspect, in a possible implementation method, the first condition includes any one or more of the following: the temperature of the electronic device is lower than a preset temperature, the power of the electronic device is higher than a preset power, the CPU occupancy rate of the electronic device's central processing unit is less than a specified occupancy rate, the user's page sliding speed is greater than a preset speed, and the picture frame is a picture frame in a game scene.

[0063] In combination with the second aspect, in a possible implementation manner, the second screen refresh rate is lower than the first screen refresh rate, and the second frame rate is lower than the first frame rate.

[0064] In combination with the second aspect, in a possible implementation method, the first condition includes any one or more of the following: the temperature of the electronic device is higher than a preset temperature, the power of the electronic device is lower than a preset power, the CPU occupancy rate of the electronic device's central processing unit is greater than a specified occupancy rate, the user's page sliding speed is lower than a preset speed, and the picture frame is a picture frame in a game loading scene.

[0065] In a third aspect, the present application provides an electronic device comprising: one or more processors and one or more memories; wherein the one or more memories are coupled to the one or more processors, and the one or more memories are used to store computer program code, and the computer program code includes computer instructions, and when the one or more processors execute the computer instructions, the electronic device executes a method in any possible implementation of any of the above aspects.

[0066] In a fourth aspect, the present application provides a chip system for use in an electronic device, the chip system comprising a processing circuit and an interface circuit, the interface circuit being used to receive instructions and transmit them to the processing circuit, the processing circuit being used to run instructions to execute a method in any possible implementation of any of the above aspects.

[0067] In a fifth aspect, the present application provides a computer-readable storage medium, comprising instructions, characterized in that when the instructions are executed on an electronic device, the method in any possible implementation of any of the above aspects is executed.

[0068] In a sixth aspect, an embodiment of the present application provides a computer program product, which, when executed on a computer, enables the computer to execute a method in any possible implementation of any of the above aspects.

[0069] The beneficial effects of the second and sixth aspects can refer to the beneficial effects of the first aspect and any possible implementation method of the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0070] Figure 1 A schematic diagram showing an application for determining different sub-pages in a long page;

[0071] Figure 2 A schematic diagram showing another application for determining different sub-pages in a long page;

[0072] Figure 3 A timing diagram of a picture frame from rendering to display provided in an embodiment of the present application is shown;

[0073] Figure 4 A schematic diagram of frame switching of an electronic device 100 switching from a screen refresh rate of 120 Hz to a screen refresh rate of 60 Hz is shown;

[0074] Figure 5 A schematic diagram of frame switching of an electronic device 100 when the screen refresh rate is switched from 60 Hz to 120 Hz is shown;

[0075] Figure 6A-6D A schematic diagram showing entering a game loading scene or a game match scene based on a first game application is shown;

[0076] Figure 7 A schematic diagram showing an application determining multiple picture frames when the screen refresh rate of the electronic device 100 switches from 120 Hz to 60 Hz;

[0077] Figure 8 A schematic diagram showing a display frame when the screen refresh rate of the electronic device 100 is switched from 120 Hz to 60 Hz;

[0078] Fig.9A A timing diagram of the picture frame from rendering to display before and after the screen refresh rate is switched is shown;

[0079] Fig. 9B Another timing diagram of the picture frame from rendering to display before and after the screen refresh rate is switched is shown;

[0080] Fig. 9CAnother timing diagram of the picture frame from rendering to display before and after the screen refresh rate is switched is shown;

[0081] Fig.10 A schematic diagram showing an application determining multiple picture frames when the screen refresh rate of the electronic device 100 switches from 60 Hz to 120 Hz;

[0082] Fig.11 A schematic diagram showing a display frame when the screen refresh rate of the electronic device 100 is switched from 60 Hz to 120 Hz;

[0083] Fig.12 A timing diagram of the picture frame from rendering to display before and after the screen refresh rate is switched is shown;

[0084] Fig.13 A flowchart of a screen refresh rate control method provided in this application;

[0085] Fig.14 A flowchart of another method for controlling screen refresh rate provided by the present application;

[0086] Fig.15 A schematic diagram of a device provided for this application;

[0087] Fig.16 A schematic diagram of the structure of an electronic device 100 provided in an embodiment of the present application is shown;

[0088] Fig.17 1 is a software structure block diagram of the electronic device 100 according to an embodiment of the present invention. DETAILED DESCRIPTION

[0089] The technical solutions in the embodiments of the present application will be described clearly and in detail below in conjunction with the accompanying drawings. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in the text is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0090] The term "user interface (UI)" in the following embodiments of the present application refers to a medium interface for interaction and information exchange between an application or operating system and a user, which realizes the conversion between the internal form of information and the form acceptable to the user. A common form of user interface is a graphical user interface (GUI), which refers to a user interface related to computer operation displayed in a graphical manner. It can be a visual interface element such as text, icons, buttons, menus, tabs, text boxes, dialog boxes, status bars, navigation bars, widgets, etc. displayed on the display screen of an electronic device.

[0091] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as suggesting or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features, and in the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0092] First, some concepts related to the rendering and display of picture frames in the embodiments of the present application are introduced.

[0093] 1. Screen refresh rate: It indicates the number of times the display screen on an electronic device refreshes the display frame within 1 second. Generally, the refresh rate of the display screen of an electronic device is related to the fixed parameters of the display screen and is a fixed value.

[0094] The electronic device may support multiple optional screen refresh rates, which may include at least a minimum screen refresh rate and a maximum screen refresh rate.

[0095] Optionally, the multiple optional screen refresh rates may have only two optional screen refresh rates, one being the highest screen refresh rate and the other being the lowest screen refresh rate. Exemplary: the two optional screen refresh rates are: 60 Hz and 90 Hz. Among them, 60 Hz is the lowest screen refresh rate among the multiple optional screen refresh rates, and 90 Hz is the highest screen refresh rate among the multiple optional screen refresh rates.

[0096] Optionally, the multiple optional screen refresh rates may also include more optional screen refresh rates. Exemplarily, three optional screen refresh rates are included: 60 Hz, 90 Hz, and 120 Hz. Among them, 60 Hz is the lowest screen refresh rate among the multiple optional screen refresh rates, and 120 Hz is the highest screen refresh rate among the multiple optional screen refresh rates.

[0097] Optionally, the multiple optional screen refresh rates may also include more optional screen refresh rates. Exemplarily, four optional screen refresh rates are included: 60 Hz, 90 Hz, 120 Hz, and 144 Hz. Among them, 60 Hz is the lowest screen refresh rate among the multiple optional screen refresh rates, and 120 Hz is the highest screen refresh rate among the multiple optional screen refresh rates.

[0098] Optionally, the multiple optional screen refresh rates may also include more optional screen refresh rates. Exemplarily, five optional screen refresh rates are included: 45 Hz, 60 Hz, 90 Hz, 120 Hz, and 240 Hz. Among them, 45 Hz is the lowest screen refresh rate among the multiple optional screen refresh rates, and 240 Hz is the highest screen refresh rate among the multiple optional screen refresh rates.

[0099] The period of the vsync signal is determined by the screen refresh rate, and the period of the vsync signal is the inverse of the screen refresh rate. For example, when the screen refresh rate is 120Hz, the period of the vsync signal may be 8.3ms, and when the screen refresh rate is 60Hz, the period of the vsync signal may be 16.6ms.

[0100] It is understandable that, according to actual needs, the multiple optional screen refresh rates may also include more screen refresh rates, and the optional screen refresh rates may also have more different options, which are not limited here.

[0101] 2. Frame rate: It is used by the application to determine the image data contained in the picture frame. The unit of frame rate is FPS.

[0102] The frame rate is equal to the screen refresh rate, which determines the difference in image data between two adjacent frames.

[0103] The higher the frame rate, the smaller the difference in image data between two adjacent frames.

[0104] The lower the frame rate, the greater the difference in image data between two adjacent frames.

[0105] For example, when the screen refresh rate is 120 Hz and the frame rate is 120 FPS, the image content between two adjacent frames differs by approximately 8.3 ms.

[0106] For example, when the screen refresh rate is 60 Hz and the frame rate is 60 FPS, the image content between two adjacent frames differs by approximately 16.6 ms.

[0107] Next, we will introduce how the application obtains the content of the screen frame based on the frame rate.

[0108] Exemplarily, the application may render in sequence to obtain frame E, frame A, frame B, frame C, and frame D. Frame E, frame A, frame B, frame C, and frame D may be different sub-pages in a long page. The electronic device 100 may display different sub-pages in the long page in sequence.

[0109] Figure 1 A schematic diagram showing an application for determining different sub-pages in a long page.

[0110] For example, the frame rate of the application may be 120 FPS.

[0111] like Figure 1 As shown, the starting position of the image frame A is the 0mm position in the long page, and the ending position of the image A is the 20mm position in the long page. The time for applying the rendering of the image frame A is between the time (t-8.3ms) and the time t.

[0112] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 8.3ms, then the starting position of frame B moves 8.3mm backward relative to the starting position of frame A, and the ending position of frame B also moves 8.3mm backward relative to the ending position of frame A. Then the starting position of frame B is 8.3mm in the long page, and the ending position of frame B is 28.3mm in the long page. The time for applying rendering frame B is between time t and time (t+8.3ms).

[0113] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 8.3ms, then the starting position of frame C moves 8.3mm backward relative to the starting position of frame B, and the ending position of frame C also moves 8.3mm backward relative to the ending position of frame B. Then the starting position of frame C is 16.6mm in the long page, and the ending position of frame C is 36.6mm in the long page. The time for applying rendering frame C is between (t+8.3ms) and (t+16.6ms).

[0114] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 8.3ms, then the starting position of the picture frame D moves 8.3mm backwards relative to the starting position of the picture frame C, and the ending position of the picture frame D also moves 8.3mm backwards relative to the ending position of the picture frame C. Then the starting position of the picture frame D is the 24.9mm position in the long page, and the ending position of the picture frame D is the 44.9mm position in the long page. The time for applying the rendering of the picture frame D is between (t+16.6ms) and (t+24.9ms).

[0115] If the moving speed of the long page is 1 ms and 1 mm, and the frame interval is 8.3 ms, then the starting position of frame E moves 8.3 mm backward relative to the starting position of frame D, and the ending position of frame E also moves 8.3 mm backward relative to the ending position of frame D. Then the starting position of frame E is 33.2 mm in the long page, and the ending position of frame E is 53.2 mm in the long page. The time for applying rendering frame E is between (t+24.9 ms) and (t+33.2 ms).

[0116] If the moving speed of the long page is 1mm per 1ms, and the frame interval is 8.3ms, then the starting position of frame F moves 8.3mm backwards relative to the starting position of frame E, and the ending position of frame F also moves 8.3mm backwards relative to the ending position of frame E. Then the starting position of frame F is 41.5mm in the long page, and the ending position of frame E is 61.5mm in the long page. The time for applying rendering frame F is between (t+33.2ms) and (t+41.5ms).

[0117] If the moving speed of the long page is 1mm per 1ms, and the frame interval is 8.3ms, then the starting position of the picture frame G moves 8.3mm backwards relative to the starting position of the picture frame F, and the ending position of the picture frame G also moves 8.3mm backwards relative to the ending position of the picture frame F. Then the starting position of the picture frame G is the 41.5mm position in the long page, and the ending position of the picture frame G is the 61.5mm position in the long page. The time for applying the rendering of the picture frame G is between (t+41.5ms) and (t+49.8ms).

[0118] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 8.3ms, then the starting position of the picture frame H moves 8.3mm backward relative to the starting position of the picture frame G, and the ending position of the picture frame H also moves 8.3mm backward relative to the ending position of the picture frame G. Then the starting position of the picture frame H is the 59.1mm position in the long page, and the ending position of the picture frame H is the 79.1m position in the long page. The time for applying rendering to the picture frame H is between (t+49.8ms) and (t+59.1ms).

[0119] Figure 2 A schematic diagram showing another application for determining different sub-pages in a long page.

[0120] For example, the frame rate of the application may be 60 FPS.

[0121] like Figure 1As shown, the starting position of the image frame A is the 0mm position in the long page, and the ending position of the image A is the 20mm position in the long page. The time for applying the rendering of the image frame A is between the time (t-16.6ms) and the time t.

[0122] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 16.6ms, then the starting position of frame B moves 16.6mm backward relative to the starting position of frame A, and the ending position of frame B also moves 16.6mm backward relative to the ending position of frame A. Then the starting position of frame B is the 16.6mm position in the long page, and the ending position of frame B is the 36.6mm position in the long page. The time for applying rendering frame B is between time t and time (t+16.6ms).

[0123] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 16.6ms, then the starting position of frame C moves 16.6mm backward relative to the starting position of frame B, and the ending position of frame C also moves 16.6mm backward relative to the ending position of frame B. Then the starting position of frame C is 33.2mm in the long page, and the ending position of frame C is 53.2mm in the long page. The time for applying rendering frame C is between (t+16.6ms) and (t+33.2ms).

[0124] If the moving speed of the long page is 1 ms and 1 mm, and the frame interval is 16.6 mm, then the starting position of the picture frame D moves backward by 16.6 mm relative to the starting position of the picture frame C, and the ending position of the picture frame D also moves backward by 16.6 mm relative to the ending position of the picture frame C. Then the starting position of the picture frame D is the 49.8 mm position in the long page, and the ending position of the picture frame D is the 69.8 mm position in the long page. The time for applying the rendering of the picture frame D is between (t+33.2 ms) and (t+49.8 ms).

[0125] If the moving speed of the long page is 1ms and 1mm, and the frame interval is 16.6ms, then the starting position of the picture frame E moves backward by 16.6mm relative to the starting position of the picture frame D, and the ending position of the picture frame E also moves backward by 16.6mm relative to the ending position of the picture frame D. Then the starting position of the picture frame E is the 66.4mm position in the long page, and the ending position of the picture frame E is the 86.4mm position in the long page. The time for applying rendering to the picture frame E is between (t+49.8ms) and (t+66.4ms).

[0126] from Figure 1 and Figure 2It can be seen that for long pages of the same length, the greater the frame rate, the greater the number of frames, the less the image content changes between two adjacent frames, the faster the switching speed between two adjacent frames, and the smoother the screen switching.

[0127] 3. Vertical synchronization (vsync) signal: Since the application needs to call the GPU to render the screen frame first, it can store the rendered screen frame in the layer buffer (buffer) and provide it to the layer synthesizer (SurfaceFlinger) for layer synthesis. After SurfaceFlinger takes out the rendered screen frame from the buffer for layer synthesis, it will send the screen frame after layer synthesis to the display screen for refresh display. When SurfaceFlinger sends the screen frame after layer synthesis to the display screen during the screen refresh process, it is easy for the two different screen frames before and after to overlap and display, causing the screen to tear (tearing) on ​​the display screen. Therefore, in order to prevent this screen tearing phenomenon, the hardware module corresponding to the display screen can generate a vsync signal with the same period as the refresh rate and give it to SurfaceFlinger. After receiving the vsync signal each time, SurfaceFlinger can take out the screen frame from the buffer for layer synthesis and send it to the display screen for refresh display.

[0128] Therefore, the vertical synchronization (vsync) signal is used to obtain and generate the current frame data on the one hand, and on the other hand, the vertical synchronization (vsync) signal is used to trigger the compositor to send the frame data to the hardware layer for rendering.

[0129] Figure 3 A timing diagram of the picture frame from rendering to display provided in an embodiment of the present application is shown.

[0130] For example, Figure 3 As shown, when the electronic device 100 refreshes and displays the picture frame at a screen refresh rate of 120hz, the electronic device 100 can display one picture frame in 8.3ms. The application can render the picture frame at a frame rate not greater than 120FPS. For example, when the application renders the picture frame at a frame rate of 120FPS, it takes 8.3ms for the application to render one picture frame.

[0131] like Figure 3As shown, the application can send rendering instructions to the GPU to render the screen frame, and after sending the rendering instructions, the application can send frame sending instructions to the GPU. After the GPU renders the screen frame, the GPU can store the screen frame in the buffer indicated by the rendering instruction, which can be called the front buffre. After the GPU obtains the frame sending instruction, it can obtain the front buffre of the screen frame. After the GPU fills the rendered screen frame in the front buffre of the screen frame, while waiting for the next vsync signal to arrive, the GPU can send a synthesis instruction to SurfaceFlinger, and after sending the synthesis instruction, the GPU can send a frame sending instruction to SurfaceFlinger. SurfaceFlinger can take the screen frame from the front buffre of the screen frame for layer synthesis, and store the synthesized screen frame in the buffer specified by the synthesis instruction, which can be called the back buffre. The HWC (hardware composer) can take the screen frame from the back buffre of the screen frame and send it to the display screen for refresh display while waiting for the next vsync signal to arrive.

[0132] For example, between vertical synchronization signal 0 (VSYNC0) and vertical synchronization signal 1 (VSYNC1), the application can send rendering instruction A to the GPU and frame instruction A1 to the GPU. After receiving rendering instruction A, the GPU can obtain the data of frame A and render frame A, and store the rendered frame A in the front buffer of frame A indicated by rendering instruction A.

[0133] like Figure 3 As shown, the time for applying rendering picture frame A is between the time (t-8.3ms) and the time tms. The duration of applying rendering picture frame A is 8.3ms.

[0134] After detecting that the front buffer of frame A is filled with rendered frame A, when VSYNC1 arrives, the GPU can send synthesis instruction A to SurfaceFlinger, and after sending synthesis instruction A, the GPU can send frame instruction A2 to SurfaceFlinger. Based on synthesis instruction A, SurfaceFlinger can take out frame A from the front buffer of frame A for layer synthesis, and store the synthesized frame A in the back buffer specified by synthesis instruction A.

[0135] Between vertical synchronization signal 1 (VSYNC1) and vertical synchronization signal 2 (VSYNC2), the application can send rendering instruction B to the GPU and frame instruction B1 to the GPU. After receiving rendering instruction B, the GPU can render frame B and store the rendered frame B in the front buffer of frame B indicated by rendering instruction B.

[0136] When vertical synchronization signal 2 (VSYNC2) arrives, SurfaceFlinger can send a display command to HWC. HWC can obtain frame A from the back buffer of frame A based on the display command and display frame A.

[0137] like Figure 3 As shown, the time for the application to display the picture frame A is between (t+8.3ms) and (t+16.6ms). The duration of the HWC display picture frame A is 8.3ms.

[0138] Between vertical synchronization signal 2 (VSYNC2) and vertical synchronization signal 3 (VSYNC3), the application can send rendering instruction C to the GPU and frame instruction C1 to the GPU. After receiving rendering instruction C, the GPU can render frame C and store the rendered frame C in the front buffer of frame C indicated by rendering instruction C.

[0139] Between vertical synchronization signal 2 (VSYNC2) and vertical synchronization signal 3 (VSYNC3), the GPU can send synthesis instruction B to SurfaceFlinger, and after sending synthesis instruction B, the GPU can send frame instruction B2 to SurfaceFlinger. Based on synthesis instruction B, SurfaceFlinger can take out frame B from the front buffer of frame B for layer synthesis, and store the synthesized frame B in the back buffer specified by synthesis instruction B.

[0140] When vertical synchronization signal 3 (VSYNC2) arrives, SurfaceFlinger can send a display command to HWC. HWC can obtain frame B from the back buffer of frame B based on the display command and display frame B.

[0141] like Figure 3 As shown, the time for the application to display the picture frame B is between (t+16.6ms) and (t+24.9ms). The duration of the HWC displaying the picture frame B is 8.3ms.

[0142] Between vertical synchronization signal 3 (VSYNC3) and vertical synchronization signal 4 (VSYNC4), the application can send rendering instruction D to the GPU and frame instruction D1 to the GPU. After receiving rendering instruction D, the GPU can render frame D and store the rendered frame D in the front buffer of frame D indicated by rendering instruction D.

[0143] Between vertical synchronization signal 3 (VSYNC3) and vertical synchronization signal 4 (VSYNC4), the GPU can send synthesis instruction C to SurfaceFlinger, and after sending synthesis instruction C, the GPU can send frame instruction C2 to SurfaceFlinger. Based on synthesis instruction C, SurfaceFlinger can take out frame C from the front buffer of frame C for layer synthesis, and store the synthesized frame C in the back buffer specified by synthesis instruction C.

[0144] When vertical synchronization signal 4 (VSYNC4) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame C from the back buffer of frame C based on the display instruction and display frame C.

[0145] like Figure 3 As shown, the time for the application to display the picture frame C is between (t+24.9ms) and (t+33.2ms). The duration of the HWC display picture frame C is 8.3ms.

[0146] Between vertical synchronization signal 4 (VSYNC4) and vertical synchronization signal 5 (VSYNC5), the application can send rendering instruction E to the GPU and frame instruction E1 to the GPU. After receiving rendering instruction E, the GPU can render frame E and store the rendered frame E in the front buffer of frame E indicated by rendering instruction E.

[0147] Between vertical synchronization signal 4 (VSYNC4) and vertical synchronization signal 5 (VSYNC5), the GPU can send synthesis instruction D to SurfaceFlinger, and after sending synthesis instruction D, the GPU can send frame instruction D2 to SurfaceFlinger. Based on synthesis instruction D, SurfaceFlinger can take out frame D from the front buffer of frame D for layer synthesis, and store the synthesized frame D in the back buffer specified by synthesis instruction D.

[0148] When vertical synchronization signal 5 (VSYNC5) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame D from the back buffer of frame D based on the display instruction and display frame D.

[0149] like Figure 3 As shown, the time for the application to display the picture frame D is between (t+33.2ms) and (t+41.5ms). The duration of the HWC displaying the picture frame D is 8.3ms.

[0150] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the application can send rendering instruction F to the GPU and frame instruction F1 to the GPU. After receiving rendering instruction F, the GPU can render frame F and store the rendered frame F in the front buffer of frame F indicated by rendering instruction F.

[0151] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the GPU can send a synthesis instruction E to SurfaceFlinger, and after sending the synthesis instruction E, the GPU can send a frame instruction E2 to SurfaceFlinger. Based on the synthesis instruction E, SurfaceFlinger can take out the picture frame E from the front buffer of the picture frame E for layer synthesis, and store the synthesized picture frame E in the back buffer specified by the synthesis instruction E.

[0152] In the above manner, the electronic device 100 can switch to display different picture frames in sequence.

[0153] The electronic device 100 can dynamically switch the screen refresh rate. When the electronic device 100 switches from a first screen refresh rate to a second screen refresh rate, the frame rate of the application will also change accordingly. For example, the frame rate of the application can be switched from a first frame rate to a second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate.

[0154] In a possible implementation, the first screen refresh rate is greater than the second screen refresh rate, that is, the electronic device 100 switches from a high screen refresh rate to a low screen refresh rate, and then the first frame rate is also greater than the second frame rate.

[0155] For example, the first screen refresh rate may be 120 Hz, and the second screen refresh rate may be 60 Hz. Then the first frame rate may be 120 FPS, and the second frame rate may be 60 FPS.

[0156] Figure 4 A schematic diagram of frame switching of an electronic device 100 switching from a screen refresh rate of 120 Hz to a screen refresh rate of 60 Hz is shown.

[0157] like Figure 4 As shown, the application starts to determine the screen frame at 120FPS, and the electronic device 100 refreshes and displays the screen frame at a refresh rate of 120hz.

[0158] For example, if the application determines the picture frame A at 120FPS and displays the picture frame A, during the display of the picture frame A, the electronic device 100 caches the rendered picture frame B and the picture frame C, which are also determined at a frame rate of 120FPS. The frame interval between two adjacent picture frames is 8.3ms, so the picture content of the picture frame B differs from that of the picture frame A by about 8.3ms, and the picture content of the picture frame C differs from that of the picture frame B by about 8.3ms.

[0159] The electronic device 100 displays the picture frame A from the time (t+8.3ms) to the time (t+16.6ms), and the display duration of the picture frame A is 8.3ms.

[0160] Afterwards, the electronic device 100 obtains the picture frame B from the buffer storing the picture frame B and displays the picture frame B. During the display of the picture frame B, the electronic device 100 caches the rendered picture frame C and the picture frame D, which are also determined at a frame rate of 120FPS. The frame interval between two adjacent frames is 8.3ms, so the picture content of the picture frame B differs from that of the picture frame A by about 8.3ms, and the picture content of the picture frame C differs from that of the picture frame B by about 8.3ms.

[0161] The electronic device 100 displays the picture frame B from the time (t+16.6ms) to the time (t+24.9ms), and the display duration of the picture frame B is 8.3ms.

[0162] While the electronic device 100 is displaying the picture frame B, the electronic device 100 decides to switch the screen refresh rate from 120 Hz to 60 Hz.

[0163] After the electronic device 100 displays the picture frame B, if the electronic device 100 immediately switches the screen refresh rate to 60hz, when the electronic device 100 displays the picture frame C, the electronic device 100 displays the picture frame C from the time (t+24.9ms) to the time (t+41.5ms), and the display duration of the picture frame C is 16.6ms. However, the picture content of the picture frame C differs from that of the picture frame B by about 8.3ms, but the picture frame C is displayed for 16.6ms. The electronic device 100 displays the picture frame C for an additional 8.3ms. The user's naked eye feels that the electronic device 100 is missing 8.3ms of image content when displaying the picture frame C, resulting in the picture frame being stuck.

[0164] During the display of the picture frame C, the electronic device 100 caches the rendered picture frame D and the picture frame E. The picture frame D is determined at a frame rate of 120 FPS, and the picture content of the picture frame D differs from that of the picture frame C by about 8.3 ms. The picture frame E is determined at a frame rate of 60 FPS, and the picture content of the picture frame E differs from that of the picture frame D by about 8.3 ms.

[0165] When the electronic device 100 displays the picture frame D, the electronic device 100 displays the picture frame D from the time (t+41.5ms) to the time (t+58.1ms), and the display duration of the picture frame D is 16.6ms. However, the picture content of the picture frame D differs from that of the picture frame C by about 8.3ms, but the picture frame D is displayed for 16.6ms. The electronic device 100 displays the picture frame D for an additional 8.3ms. The user's naked eye feels that the electronic device 100 is missing 8.3ms of image content when displaying the picture frame D, resulting in the picture frame being stuck.

[0166] During the display of picture frame D, the electronic device 100 caches the rendered picture frames E and F, which are determined at a frame rate of 60FPS, and the frame interval between two adjacent frames is 16.6ms. Therefore, the picture content of picture frame E differs from that of picture frame D by approximately 16.6ms, and the picture content of picture frame F differs from that of picture frame E by approximately 16.6ms.

[0167] During the period when the electronic device 100 displays the picture frame E, the electronic device 100 displays the picture frame E from the time (t+58.1ms) to the time (t+74.7ms), and the display duration of the picture frame E is 16.6ms. The picture content of the picture frame E and the picture frame D also differ by about 16.6ms. At this time, the display duration of the picture frame E matches the image content included in the picture frame E, and the user does not feel the lag.

[0168] That is to say, when the screen refresh rate is switched from a high screen refresh rate to a low screen refresh rate, when the electronic device 100 renders the screen frames at a high frame rate and displays them at a low refresh rate, a freeze may occur, resulting in an unsmooth frame switching.

[0169] In other possible implementations, the first screen refresh rate is lower than the second screen refresh rate, that is, when the electronic device 100 switches from a low screen refresh rate to a high screen refresh rate, the first frame rate is also lower than the second frame rate.

[0170] Exemplarily, the first screen refresh rate may be 60 Hz, and the second screen refresh rate may be 120 Hz. Then the first frame rate may be 60 FPS, and the second frame rate may be 120 FPS.

[0171] Figure 5A schematic diagram of frame switching of an electronic device 100 switching from a screen refresh rate of 60 Hz to a screen refresh rate of 120 Hz is shown.

[0172] like Figure 5 As shown, the application starts at a frame rate of 60FPS, and the electronic device 100 refreshes the display screen frame at a refresh rate of 60hz.

[0173] For example, if the application determines the picture frame A at a frame rate of 60 FPS and displays the picture frame A, during the display of the picture frame A, the electronic device 100 caches the rendered picture frame B and the picture frame C, which are also determined at a frame rate of 60 FPS. The frame interval between two adjacent picture frames is 8.3 ms, so the picture content of the picture frame B differs from that of the picture frame A by about 16.6 ms, and the picture content of the picture frame C differs from that of the picture frame B by about 16.6 ms.

[0174] The electronic device 100 displays the picture frame A from the time (t+16.6ms) to the time (t+33.2ms), and the display duration of the picture frame A is 16.6ms.

[0175] Afterwards, the electronic device 100 obtains the picture frame B from the buffer storing the picture frame B and displays the picture frame B. During the display of the picture frame B, the electronic device 100 caches the rendered picture frame C and the picture frame D, and the frame interval between two adjacent picture frames is 8.3ms, so the picture content of the picture frame C differs from that of the picture frame B by about 16.6ms, and the picture content of the picture frame D differs from that of the picture frame C by about 16.6ms.

[0176] The electronic device 100 displays the picture frame B from the time (t+33.2ms) to the time (t+49.8ms), and the display duration of the picture frame B is 16.6ms.

[0177] While the electronic device 100 is displaying the picture frame B, the electronic device 100 decides to switch the screen refresh rate from 60 Hz to 120 Hz.

[0178] After the electronic device 100 displays the picture frame B, if the electronic device 100 immediately switches the screen refresh rate to 120hz, when the electronic device 100 displays the picture frame C, the electronic device 100 displays the picture frame C from ((t+49.8ms) to (t+58.1ms), and the display duration of the picture frame C is 8.3ms. However, the picture content of the picture frame C differs from that of the picture frame B by about 16.6ms, but the picture frame C is only displayed for 8.3ms. The electronic device 100 displays the picture frame C for 8.3ms less, and the user's naked eye feels that a jump occurs when the electronic device 100 displays the picture frame C, resulting in the frame switching being too fast.

[0179] During the display of the picture frame C, the electronic device 100 caches the rendered picture frame D and the picture frame E. The picture frame D is determined at a frame rate of 60 FPS, and the picture content of the picture frame D differs from that of the picture frame C by about 16.6 ms. The picture frame E is determined at a frame rate of 120 FPS, and the picture content of the picture frame E differs from that of the picture frame D by about 8.3 ms.

[0180] When the electronic device 100 displays the picture frame D, the electronic device 100 displays the picture frame D from the time (t+58.1ms) to the time (t+66.4ms), and the display duration of the picture frame D is 8.3ms. However, the picture content of the picture frame D differs from that of the picture frame C by about 16.6ms, but the picture frame D is only displayed for 8.3ms. The electronic device 100 displays the picture frame D for 8.3ms less, and the user's naked eyes feel that the electronic device 100 has a jump when displaying the picture frame D, resulting in the situation of too fast frame switching.

[0181] During the display of picture frame D, the electronic device 100 caches the rendered picture frames E and F, which are determined at a frame rate of 120FPS. The frame interval between two adjacent frames is 8.3ms, so the picture content of picture frame E differs from that of picture frame D by approximately 8.3ms, and the picture content of picture frame F differs from that of picture frame E by approximately 8.3ms.

[0182] During the period when the electronic device 100 displays the picture frame E, the electronic device 100 displays the picture frame E from the time (t+66.4ms) to the time (t+74.7ms), and the display duration of the picture frame E is 8.3ms. The picture content of the picture frame E differs from that of the picture frame D by about 8.3ms, and at this time, the display duration of the picture frame E matches the image content included in the picture frame E, and the user does not feel the jump.

[0183] That is to say, when switching from a low screen refresh rate to a high screen refresh rate, when the electronic device 100 renders the screen frames obtained at a low frame rate and displays them at a high refresh rate, a jump may occur, resulting in an unsmooth frame switching.

[0184] based on Figure 4 and Figure 5 Based on the analysis, the present application provides a screen refresh rate control method. When the electronic device 100 switches the screen refresh rate, the electronic device 100 does not switch the screen refresh rate immediately, so that the frame rate of the picture frame matches the screen refresh rate of the electronic device 100, avoiding the occurrence of unsmooth frame switching.

[0185] The electronic device 100 can switch from a high screen refresh rate to a low screen refresh rate, and the electronic device 100 can also switch from a low screen refresh rate to a high screen refresh rate.

[0186] First, it is introduced how the electronic device 100 switches frames when switching from a high screen refresh rate to a low screen refresh rate.

[0187] First, a scenario in which the electronic device 100 switches from a high screen refresh rate to a low screen refresh rate is introduced.

[0188] 1. In a game scene, when entering a game loading scene, the electronic device 100 can reduce the screen refresh rate.

[0189] Among them, the game loading scene can refer to the scene after the game application is started and before entering the game lobby or in the game lobby. In the game lobby, the user can select a game character, select a game mode, form a team, match teammates, download resource packs, receive props, etc.

[0190] The game match scene may refer to the scene after the application is started and the game begins.

[0191] Figure 6A-6D A schematic diagram of entering a game loading scene or a game match scene based on a first game application is shown.

[0192] like Fig. 6A As shown, the electronic device 100 may display a desktop, in which a page with application icons is displayed, and the page includes multiple application icons (for example, a setting application icon, an application market application icon, a gallery application icon, a browser application icon, a first game application icon, a second application icon, etc.). A page indicator is also displayed below the multiple application icons to indicate the positional relationship between the currently displayed page and other pages. A tray area is displayed below the page indicator. Among them, the tray area includes multiple tray icons, for example, a camera application icon, an address book application icon, a phone application icon, and an information application icon. The tray area remains displayed when the page is switched. In some embodiments, the above-mentioned page may also include multiple application icons and a page indicator, and the page indicator may not be part of the page and exist separately. The above-mentioned tray icon is also optional, and the embodiments of the present application are not limited to this.

[0193] The electronic device 100 may receive an input (e.g., a click) from a user on a phone application icon. In response to the input operation, the electronic device 100 may load a game resource and display the game. Figure 6B The user interface 340 shown may include the text “Loading”.

[0194] After the game resources are loaded, the electronic device 100 can display Figure 6C The user interface shown. Figure 6CIt is a user interface 320 of a game provided in an embodiment of the present application. The user interface 320 can be called a game lobby interface.

[0195] The user interface 320 may include a start game option, for example, the start game option may be a competition option or a qualifying match option in the user interface 320. The user may start the game through the competition option or the qualifying match option in the user interface 320, and the electronic device 100 may display the game match interface.

[0196] For example, Figure 6C As shown, the electronic device 100 may receive an input operation (eg, a click) from a user for a competitive confrontation option in the user interface 320. In response to the input operation from the user, the electronic device 100 may display Fig.6D The user interface 330 shown in the figure may also be referred to as a game match interface. The user interface 330 includes an exit game option and a game operation option, and the user may end the game through the exit game option.

[0197] Among them, user interface 340 and user interface 320 can be referred to as a game loading scene.

[0198] User interface 330 may be referred to as a game play scene.

[0199] It should be noted that the game loading scene and the game match scene may also be other interfaces. This application only explains user interface 340, user interface 320 and user interface 330, and this application does not limit this.

[0200] When the electronic device 100 enters the game loading scene from the game playing scene, since the game has not started yet in the game loading scene and the user's requirements for image quality are not very high, the electronic device 100 can automatically reduce the screen refresh rate, for example, switch the screen refresh rate from a high refresh rate to a low refresh rate, to save power consumption of the electronic device 100.

[0201] 2. When the power level of the electronic device 100 is lower than a preset power level, the electronic device 100 can reduce the screen refresh rate.

[0202] When the power level of the electronic device 100 is lower than a preset power level, for example, when the power level of the electronic device 100 is lower than 50% of the total power level, the electronic device 100 can automatically switch from a high screen refresh rate to a low screen refresh rate to save power consumption of the electronic device 100 and extend the usage time of the power of the electronic device 100.

[0203] Optionally, when the power level of the electronic device 100 is lower than a preset power level, the electronic device 100 may prompt the user whether to turn on the power saving mode. After the user confirms to turn on the power saving mode, the electronic device 100 automatically switches from a high screen refresh rate to a low screen refresh rate.

[0204] 3. When the temperature of the electronic device 100 is higher than a preset temperature, the electronic device 100 can reduce the screen refresh rate.

[0205] If the electronic device 100 is used continuously for too long, it will generate heat and affect the life of the electronic device 100. After the electronic device 100 detects that the device temperature of the electronic device 100 is higher than the preset temperature, the electronic device 100 can automatically reduce the screen refresh rate to alleviate the heating problem of the electronic device 100 and reduce the temperature of the electronic device 100.

[0206] 4. Upon detecting the screen refresh rate set by the user, the electronic device 100 may switch the screen refresh rate to the screen refresh rate set by the user, where the screen refresh rate set by the user is lower than the current screen refresh rate of the electronic device 100.

[0207] For example, the electronic device 100 refreshes the display frame at the current screen refresh rate. The user can manually set the screen refresh rate of the electronic device 100. After detecting the screen refresh rate set by the user, the electronic device 100 can switch the screen refresh rate to the screen refresh rate set by the user, and the screen refresh rate set by the user is lower than the current screen refresh rate of the electronic device 100.

[0208] 5. When the CPU occupancy rate of the electronic device 100 is greater than the specified occupancy rate, the electronic device 100 may reduce the screen refresh rate.

[0209] When the electronic device 100 detects that the occupancy rate of the central processing unit (CPU) of the electronic device 100 is greater than a specified occupancy rate, the electronic device 100 may reduce the screen refresh rate to alleviate the occupancy rate of the central processing unit (CPU) and avoid the occurrence of freezes.

[0210] 6. When the user slides the page at a speed lower than a preset speed, the electronic device 100 can reduce the screen refresh rate.

[0211] When the electronic device 100 detects that the user slides the page and the speed at which the user slides the page is lower than a preset speed, the electronic device 100 can reduce the screen refresh rate of the electronic device 100. In this way, the electronic device 100 can refresh and display sub-pages that are not displayed in the long page at a low screen refresh rate to save power consumption of the electronic device 100.

[0212] For example, when a user slides pages to read an e-book or news, if the electronic device 100 detects that the speed at which the user slides pages is lower than a preset speed, the electronic device 100 can automatically reduce the screen refresh rate of the electronic device 100.

[0213] Not limited to the above scenario of reducing the screen refresh rate, in other embodiments, the electronic device 100 can also reduce the screen refresh rate of the electronic device 100 based on other factors, and this application does not limit this.

[0214] Specific implementation of smooth frame switching when switching from high screen refresh rate to low screen refresh rate.

[0215] When the electronic device 100 switches from the first screen refresh rate to the second screen refresh rate, the frame rate of the application will also change accordingly. For example, the frame rate of the application can be switched from the first frame rate to the second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate.

[0216] Among them, the first screen refresh rate is greater than the second screen refresh rate, and the first frame rate is greater than the second frame rate.

[0217] For example, the first screen refresh rate may be 120 Hz, and the second screen refresh rate may be 60 Hz. The first frame rate may be 120 FPS, and the second frame rate may be 60 FPS.

[0218] First, it is introduced how the electronic device 100 renders the picture frame when the screen refresh rate of the electronic device 100 switches from 120 Hz to 60 Hz.

[0219] Figure 7 A schematic diagram showing an application determining multiple picture frames when the screen refresh rate of the electronic device 100 switches from 120 Hz to 60 Hz.

[0220] For example, Figure 7 A long page is taken as an example to illustrate how to obtain multiple screen frames by application rendering.

[0221] like Figure 7 As shown, the application can determine the picture frame A, the picture frame B, the picture frame C and the picture frame D at a frame rate of 120 FPS. For the description of the picture frame A, the picture frame B, the picture frame C and the picture frame D, please refer to Figure 1 The description of the picture frame A, the picture frame B, the picture frame C and the picture frame D in the embodiment will not be repeated in this application.

[0222] While the application is rendering the screen frame D, the electronic device 100 decides to switch to a screen refresh rate of 60 Hz. The application switches the frame rate to 60 FPS.

[0223] When the application renders the screen frame E, the application determines the screen frame E at a frame rate of 60FPS. If the moving speed of the long page is 1mm per 1ms, and the frame interval of the frame rate of 60FPS is 16.6ms, then the starting position of the screen frame E moves backward by 16.6mm relative to the starting position of the screen frame D, and the ending position of the screen frame E also moves backward by 16.6mm relative to the ending position of the screen frame D. Then the starting position of the screen frame E is the 41.5mm position in the long page, and the ending position of the screen frame E is the 61.5mm position in the long page. The time for the application to render the screen frame E is between (t+33.2ms) and (t+49.8ms).

[0224] When the application renders the screen frame F, the application determines the screen frame F at a frame rate of 60FPS. If the moving speed of the long page is 1mm per 1ms, and the frame interval of the frame rate of 60FPS is 16.6ms, then the starting position of the screen frame F moves backward by 16.6mm relative to the starting position of the screen frame E, and the ending position of the screen frame F also moves backward by 16.6mm relative to the ending position of the screen frame E. Then the starting position of the screen frame E is the 58.1mm position in the long page, and the ending position of the screen frame E is the 78.1mm position in the long page. The time for the application to render the screen frame E is between (t+49.8ms) and (t+66.4ms).

[0225] By analogy, the application can render the frame E and the frame F to obtain other more frames.

[0226] Next, it is described how the electronic device 100 displays picture frames when the screen refresh rate of the electronic device 100 switches from 120 Hz to 60 Hz.

[0227] Figure 8 A schematic diagram showing a display frame when the screen refresh rate of the electronic device 100 switches from 120 Hz to 60 Hz.

[0228] like Figure 8 As shown, the application starts to determine the screen frame at a frame rate of 120FPS, and the electronic device 100 refreshes and displays the screen frame at a refresh rate of 120hz.

[0229] For example, if the application determines the picture frame A at a frame rate of 120 FPS and displays the picture frame A, during the display of the picture frame A, the electronic device 100 caches the rendered picture frame B and the picture frame C, which are also determined at a frame rate of 120 FPS. The frame interval between two adjacent picture frames is 8.3 ms, so the picture content of the picture frame B differs from that of the picture frame A by about 8.3 ms, and the picture content of the picture frame C differs from that of the picture frame B by about 8.3 ms.

[0230] The electronic device 100 displays the picture frame A from the time (t+8.3ms) to the time (t+16.6ms), and the display duration of the picture frame A is 8.3ms.

[0231] Afterwards, the electronic device 100 obtains the picture frame B from the buffer storing the picture frame B and displays the picture frame B. During the display of the picture frame B, the electronic device 100 caches the rendered picture frame C and the picture frame D, which are also determined at a frame rate of 120FPS. The frame interval between two adjacent frames is 8.3ms, so the picture content of the picture frame B differs from that of the picture frame A by about 8.3ms, and the picture content of the picture frame C differs from that of the picture frame B by about 8.3ms.

[0232] The electronic device 100 displays the picture frame B from the time (t+16.6ms) to the time (t+24.9ms), and the display duration of the picture frame B is 8.3ms.

[0233] During the period when the electronic device 100 displays the picture frame B, for example, between VSYNC3 and VSYNC4, the electronic device 100 decides that the screen refresh rate of the electronic device 100 needs to be switched from 120 Hz to 60 Hz.

[0234] The decision may be made automatically by the electronic device 100, or after the electronic device 100 receives an operation from the user, which is not limited in this application.

[0235] In response to the electronic device 100 deciding to switch the screen refresh rate of the electronic device 100 from 120hz to 60hz, the application switches the frame rate from 120FPS to 60FPS. After the frame rate is switched to 60FPS, the electronic device obtains data of the screen frame E according to the frame rate of 60FPS.

[0236] In response to the electronic device 100 deciding to switch the screen refresh rate of the electronic device 100 from 120hz to 60hz, before the electronic device 100 switches the screen refresh rate from 120hz to 60hz, the electronic device 100 needs to determine whether the electronic device 100 has a picture frame determined at a frame rate of 120FPS cached. If so, the electronic device 100 does not switch the screen refresh rate to 60hz first, but refreshes and displays the picture frame determined at a frame rate of 120FPS at a screen refresh rate of 120hz. After determining that the electronic device 100 does not cache the picture frame determined at a frame rate of 120FPS, the electronic device 100 switches the screen refresh rate to 60hz.

[0237] like Figure 8As shown, during the period when the electronic device 100 displays the picture frame B, the electronic device 100 decides to switch the screen refresh rate of the electronic device 100 from 120hz to 60hz. The application first switches the frame rate to 60FPS, and at the same time, the electronic device 100 determines that the cache also has the picture frame C and the picture frame D determined at the frame rate of 120FPS. The electronic device 100 does not switch to the screen refresh rate of 60hz first, and still refreshes and displays the picture frame C and the picture frame D at the screen refresh rate of 120hz.

[0238] After the electronic device 100 displays the picture frame B, the electronic device 100 still refreshes the picture frame at a screen refresh rate of 120 Hz. The electronic device 100 obtains the picture frame C from the buffer storing the picture frame C and displays the picture frame C. The screen refresh rate of the electronic device 100 is still 120 Hz, so the electronic device 100 still displays the picture frame C from the time (t+24.9ms) to the time (t+33.2ms), and the display duration of the picture frame C is 8.3ms. The picture content of the picture frame C differs from that of the picture frame B by about 8.3ms. The picture frame C is also displayed for 8.3ms, and the image content of the picture frame C matches the display duration of the picture frame C, and there will be no Figure 4 The embodiment discloses a freeze problem when the electronic device 100 switches and displays the picture frame C.

[0239] Similarly, during the display of the picture frame C, the electronic device 100 caches the rendered picture frame D and the picture frame E. The picture frame D is determined at a frame rate of 120 FPS, and the picture content of the picture frame D differs from that of the picture frame C by about 8.3 ms. The picture frame E is determined at a frame rate of 60 FPS, and the picture content of the picture frame E differs from that of the picture frame D by about 16.6 ms.

[0240] During the period when the electronic device 100 displays the picture frame C, the electronic device 100 determines that the cached picture frame D determined at a frame rate of 120 FPS is also included. The electronic device 100 does not switch to the screen refresh rate of 60 Hz first, but refreshes and displays the picture frame D at the screen refresh rate of 120 Hz.

[0241] After the electronic device 100 displays the picture frame C, the electronic device 100 still refreshes and displays the picture frame at a screen refresh rate of 120 Hz. The electronic device 100 obtains the picture frame D from the buffer storing the picture frame D and displays the picture frame D. The screen refresh rate of the electronic device 100 is still 120 Hz, so the electronic device 100 still displays the picture frame D from the time (t+33.2ms) to the time (t+41.5ms), and the display duration of the picture frame D is 8.3ms. The picture content of the picture frame D differs from that of the picture frame C by about 8.3ms, and the picture frame D is also displayed for 8.3ms. The image content of the picture frame D matches the display duration of the picture frame D, and there will be no Figure 4 The embodiment discloses a freeze problem when the electronic device 100 switches and displays the picture frame D.

[0242] Similarly, during the display of picture frame D, the electronic device 100 caches the rendered picture frames E and F, which are determined at a frame rate of 60FPS, and the frame interval between two adjacent picture frames is 16.6ms. The picture content of picture frame E differs from that of picture frame D by approximately 16.6ms, and the picture content of picture frame F differs from that of picture frame E by approximately 16.6ms.

[0243] During the period when the electronic device 100 displays the picture frame D, the electronic device 100 determines that the picture frame determined at the frame rate of 120 FPS is not cached, and the cached picture frames include only the picture frames E and F determined at the frame rate of 60 FPS. Figure 8 As shown, after the electronic device 100 displays the picture frame D, the electronic device 100 can switch the screen refresh rate to 60hz, and the electronic device 100 refreshes the picture frame at a screen refresh rate of 60hz. The electronic device 100 obtains the picture frame E from the buffer storing the picture frame E and displays the picture frame E. The screen refresh rate of the electronic device 100 has been switched to 60hz, so the electronic device 100 displays the picture frame E from the moment (t+41.5ms) to the moment (t+58.1ms), and the display duration of the picture frame E is 16.6ms. The picture content of the picture frame E and the picture frame D also differ by about 16.6ms, and the picture frame D also displays 16.6ms. The image content of the picture frame E matches the display duration of the picture frame E, so the electronic device 100 will not have a freeze problem when switching from the picture frame D to the picture frame E.

[0244] Similarly, during the display of picture frame E, the electronic device 100 caches the rendered picture frame F and picture frame G, which are determined at a frame rate of 60FPS, and the frame interval between two adjacent picture frames is 16.6ms. The picture content of picture frame F differs from that of picture frame E by approximately 16.6ms, and the picture content of picture frame G differs from that of picture frame F by approximately 16.6ms.

[0245] During the period when the electronic device 100 displays the picture frame E, the electronic device 100 has switched to a screen refresh rate of 60 Hz.

[0246] like Figure 8As shown, after the electronic device 100 displays the picture frame E, the electronic device 100 refreshes the picture frame at a screen refresh rate of 60 Hz. The electronic device 100 obtains the picture frame F from the buffer storing the picture frame F and displays the picture frame F. The screen refresh rate of the electronic device 100 has been switched to 60 Hz, so the electronic device 100 displays the picture frame F from the moment (t+58.1ms) to the moment (t+74.7ms), and the display duration of the picture frame F is 16.6ms. The picture content of the picture frame F and the picture frame E also differ by about 16.6ms. The picture frame F also displays 16.6ms, and the image content of the picture frame F matches the display duration of the picture frame F, so the electronic device 100 will not have a freeze problem when switching from the picture frame E to the picture frame F.

[0247] based on Figure 8 In the embodiment, before switching the screen refresh rate, the electronic device 100 will determine whether there is a frame rate of a picture frame that does not match the switched screen refresh rate. If there is, after the picture frame that does not match the switched screen refresh rate is displayed, the screen refresh rate is switched to avoid the situation where the frame switching is not smooth.

[0248] based on Figure 8 Description of the embodiment. After the electronic device 100 decides to switch the screen refresh rate of the electronic device 100 from 120 Hz to 60 Hz, when the electronic device 100 determines that there are still cached screen frames rendered at 120 FPS, the electronic device 100 will not immediately switch the screen refresh rate, that is, will not immediately change the period of the vysnc signal. After determining that the electronic device 100 does not cache the screen frames rendered at 120 FPS, the electronic device 100 switches the screen refresh rate again, that is, changes the period of the vysnc signal.

[0249] Next, taking the cycle of the vysnc signal as an example, how the electronic device 100 displays a picture frame is described.

[0250] Fig.9A A timing diagram of picture frames from rendering to display before and after the screen refresh rate is switched is shown.

[0251] Fig.9A In the embodiment, before the HWC displays the picture frame B and before the HWC displays the picture frame B, how the electronic device 100 obtains the picture frame A, the picture frame B, the picture frame C and the picture frame D can be referred to. Figure 3 The description in the embodiments will not be repeated in this application.

[0252] When the HWC displays frame B, the electronic device 100 decides to switch the screen refresh rate of the electronic device 100 from 120 Hz to 60 Hz.

[0253] The decision may be made automatically by the electronic device 100, or after the electronic device 100 receives an operation from the user, which is not limited in this application.

[0254] In response to the electronic device 100 deciding to switch the screen refresh rate of the electronic device 100 from 120 Hz to 60 Hz, the application switches the frame rate from 120 FPS to 60 FPS.

[0255] When vertical synchronization signal 4 (VSYNC4) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame C from the back buffer of frame C based on the display instruction and display frame C.

[0256] like Fig.9A As shown, the time for the application to display the picture frame C is between (t+24.9ms) and (t+33.2ms). The duration of the HWC display picture frame C is 8.3ms.

[0257] Between vertical synchronization signal 4 (VSYNC4) and vertical synchronization signal 5 (VSYNC5), the application can send rendering instruction E to the GPU and frame instruction E1 to the GPU. After receiving rendering instruction E, the GPU can render frame E and store the rendered frame E in the front buffer of frame E indicated by rendering instruction E.

[0258] Here, the application has switched the frame rate from 120 FPS to 60 FPS, so the application determines the screen frame E at the frame rate of 60 FPS.

[0259] Between vertical synchronization signal 4 (VSYNC4) and vertical synchronization signal 5 (VSYNC5), the GPU can send synthesis instruction D to SurfaceFlinger, and after sending synthesis instruction D, the GPU can send frame instruction D2 to SurfaceFlinger. Based on synthesis instruction D, SurfaceFlinger can take out frame D from the front buffer of frame D for layer synthesis, and store the synthesized frame D in the back buffer specified by synthesis instruction D.

[0260] The time difference between VSYNC4 and VSYNC5 is 8.3 ms. At this time, the electronic device 100 has not changed the screen refresh rate, that is, has not changed the period of the vertical synchronization signal, but has only changed the frame rate of the application.

[0261] When vertical synchronization signal 5 (VSYNC5) arrives, SurfaceFlinger can send a display command to HWC. HWC can obtain frame D from the back buffer of frame C based on the display command and display frame D.

[0262] like Fig.9A As shown, the time for the application to display the picture frame D is between (t+33.2ms) and (t+41.5ms). The duration of the HWC display picture frame C is 8.3ms.

[0263] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the application can send rendering instruction F to the GPU and frame instruction F1 to the GPU. After receiving rendering instruction F, the GPU can render frame F and store the rendered frame F in the front buffer of frame F indicated by rendering instruction F.

[0264] Here, the application has switched the frame rate from 120 FPS to 60 FPS, so the application determines the picture frame F at the frame rate of 60 FPS.

[0265] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the GPU can send a synthesis instruction E to SurfaceFlinger, and after sending the synthesis instruction E, the GPU can send a frame instruction E2 to SurfaceFlinger. Based on the synthesis instruction E, SurfaceFlinger can take out the picture frame E from the front buffer of the picture frame E for layer synthesis, and store the synthesized picture frame E in the back buffer specified by the synthesis instruction E.

[0266] The time difference between VSYNC5 and VSYNC6 is 8.3 ms. At this time, the electronic device 100 has not changed the screen refresh rate, that is, has not changed the period of the vertical synchronization signal, but has only changed the frame rate of the application.

[0267] When vertical synchronization signal 6 (VSYNC6) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame E from the back buffer of frame E based on the display instruction and display frame E.

[0268] like Fig.9A As shown, the time for the application to display the picture frame E is between (t+41.5ms) and (t+58.1ms). The duration of the HWC display picture frame E is 16.6ms.

[0269] Between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), the application can send rendering instruction G to the GPU and frame instruction G1 to the GPU. After receiving rendering instruction G, the GPU can render the screen frame G and store the rendered screen frame G in the front buffer of the screen frame G indicated by rendering instruction G.

[0270] Here, the application has switched the frame rate from 120 FPS to 60 FPS, so the application determines the screen frame G at the frame rate of 60 FPS.

[0271] Between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), the GPU can send a synthesis instruction F to SurfaceFlinger, and after sending the synthesis instruction F, the GPU can send a frame instruction F2 to SurfaceFlinger. Based on the synthesis instruction F, SurfaceFlinger can take out the picture frame F from the front buffer of the picture frame F for layer synthesis, and store the synthesized picture frame F in the back buffer specified by the synthesis instruction F.

[0272] The time difference between VSYNC6 and VSYNC7 is 16.6 ms. At this time, the electronic device 100 has changed the screen refresh rate, that is, has changed the period of the vertical synchronization signal.

[0273] When vertical synchronization signal 7 (VSYNC7) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame F from the back buffer of frame F based on the display instruction and display frame F.

[0274] like Fig.9A As shown, the time for the application to display the picture frame F is between (t+58.1ms) and (t+74.7ms). The duration of the HWC display picture frame F is 16.6ms.

[0275] Between vertical synchronization signal 7 (VSYNC7) and vertical synchronization signal 8 (VSYNC8), the application can send rendering instruction H to the GPU and frame instruction H1 to the GPU. After receiving rendering instruction H, the GPU can render frame H and store the rendered frame H in the front buffer of frame H indicated by rendering instruction H.

[0276] Here, the application has switched the frame rate from 120 FPS to 60 FPS, so the application determines the picture frame H at the frame rate of 60 FPS.

[0277] Between vertical synchronization signal 7 (VSYNC7) and vertical synchronization signal 8 (VSYNC8), the GPU can send a synthesis instruction G to SurfaceFlinger, and after sending the synthesis instruction G, the GPU can send a frame instruction G2 to SurfaceFlinger. Based on the synthesis instruction G, SurfaceFlinger can take out the picture frame G from the front buffer of the picture frame G for layer synthesis, and store the synthesized picture frame G in the back buffer specified by the synthesis instruction G.

[0278] The time difference between VSYNC7 and VSYNC8 is 16.6 ms. At this time, the electronic device 100 has changed the screen refresh rate, that is, has changed the period of the vertical synchronization signal.

[0279] Next, combine Fig.9A , it is explained how the electronic device 100 determines the progress of each picture frame before and after switching the screen refresh rate.

[0280] Table 1

[0281]

[0282]

[0283] Wherein, the progress of the picture frame shown in Table 1 can be understood as the progress of the current picture frame in the whole animation. For example, the duration of an animation can be a fixed duration, and the fixed duration of an animation can be divided into n equal parts in ms. Then each picture frame used to play the animation can include m equal parts of animation data. For example, the progress of the first picture frame can be 0 milliseconds to m milliseconds, the progress of the second picture frame can be p milliseconds to (p+m) milliseconds, and the progress of the third picture frame can be 2p milliseconds to (2p+m) milliseconds, and so on, p is equal to the frame interval, and the frame interval is equal to the inverse of the frame rate.

[0284] The progress of each picture frame can be determined based on the vsync signal. After each vsync signal is received, the application will determine the progress of the next picture frame.

[0285] When the refresh rate is switched, the progress of the picture frame also needs to be adjusted accordingly. For example, when the progress of the fourth picture frame is determined, the frame interval is switched to q, then the progress of the fourth picture frame can be (2p+q) milliseconds to (2p+m+q) milliseconds, the progress of the fifth picture frame can be (2p+2q) milliseconds to (2p+m+2q) milliseconds, and so on.

[0286] Table 1 is combined Fig.9AThe following is an exemplary description of how the electronic device 100 determines the progress of each picture frame before and after the screen refresh rate is switched.

[0287] For example, the electronic device 100 starts to forward display frames at a screen refresh rate of 120 Hz, and determines the progress of the picture frames at a frame rate of 120 FPS. Then the period of the vsync signal is 8.3 ms, and the frame interval is 8.3 ms.

[0288] As shown in Table 1, if frame A is the first frame in the animation, when the application receives vsync0 at 0ms, the application can determine that the progress of frame A is 8.3ms, and determine the image data of frame A based on the progress of frame A, and then render frame B based on the image data of frame A.

[0289] The progress of the next vsync1 is 8.3ms. If frame B is the second frame in the animation, when the application receives vsync1 at 8.3ms, the application determines that the progress of frame B is 16.6ms, and determines the image data of frame B based on the progress of frame B, and then renders frame B based on the image data of frame B.

[0290] The progress of the next vsync2 is 16.6ms. If frame C is the third frame in the animation, when the application receives vsync2 at 16.6ms, the application determines that the progress of frame C is 16.6ms, determines the image data of frame C based on the progress of frame C, and then renders frame C based on the image data of frame C.

[0291] The progress of the next vsync3 is 24.9ms. If frame D is the fourth frame in the animation, when the application receives vsync3 at 24.9ms, the application determines that the progress of frame D is 33.2ms, and determines the image data of frame D based on the progress of frame D, and then renders frame D based on the image data of frame D.

[0292] Between vsync3 and vsync4, the electronic device 100 decides to switch the screen refresh rate to 60hz. Based on the above analysis, when the application receives vsync4, the application will switch the frame rate from 120 to 60FPS, and the frame interval will switch from 8.3ms to 16.6ms. When SurfaceFlinger receives vsync6, SurfaceFlinger will switch the screen refresh rate to 60hz, that is, change the period of the vsync signal to 16.6ms.

[0293] The progress of the next vsync4 is 33.2ms. If frame E is the fifth frame in the animation, when the application receives vsync4 at 33.2ms, the application determines that the progress of frame E is 49.8ms, and determines the image data of frame E based on the progress of frame E, and then renders frame E based on the image data of frame E.

[0294] The progress of the next vsync5 is 41.5ms. If frame F is the sixth frame in the animation, when the application receives vsync5 at 41.5ms, the application determines that the progress of frame F is 66.4ms, determines the image data of frame F based on the progress of frame F, and then renders frame F based on the image data of frame F.

[0295] The progress of the next vsync6 is 49.8ms. If frame G is the seventh frame in the animation, when the application receives vsync6 at 49.8ms, the application determines that the progress of frame G is 83ms, determines the image data of frame G based on the progress of frame G, and then renders frame G based on the image data of frame G.

[0296] The progress of the next vsync7 is 66.4ms. If the picture frame H is the eighth picture frame in the animation, when the application receives vsync7 at 66.4ms, the application determines that the progress of the picture frame H is 99.6ms, and determines the image data of the picture frame H based on the progress of the picture frame H, and then renders the picture frame H based on the image data of the picture frame H.

[0297] As can be seen from Table 1, between vsync3 and vsync4, the electronic device 100 decides to switch the screen refresh rate to 60hz. The frame interval is switched from 8.3ms to 16.6ms. Since the period of the vsync signal has not changed at this time. Therefore, when the application receives vsync5, the progress of vsync5 is 41.5ms, while the progress of the previous frame of frame F (frame E) is 49.8ms, resulting in the progress of frame E being greater than the progress of vsync5, which in turn causes the frame to be rendered too quickly, resulting in frame accumulation. Correspondingly, subsequent frame G and frame H both experience frame accumulation.

[0298] Therefore, before determining the progress of the next frame, the application needs to determine whether the progress of the previous frame is less than the progress of the current vsync signal. If so, continue to determine the progress of the next frame and render the next frame. If not, it means that the frame is rendered too fast and the rendering needs to be paused to avoid frame accumulation.

[0299] Table 2

[0300]

[0301] Table 2 shows that the application can determine the progress of the next picture frame based on the progress of the current vsync signal and the progress of the previous picture frame.

[0302] For example, when the application receives vsync5, the progress of vsync5 is 41.5ms, and the progress of the previous frame of frame F (frame E) is 49.8ms. The application determines that the progress of frame E is greater than the progress of vsync5, so the application pauses to determine the progress of frame F. When the next vsync signal arrives, the progress of frame F is determined again to avoid frame accumulation.

[0303] The progress of the next vsync6 is 49.8ms. When the application receives vsync6, the application determines that the progress of the picture frame E is less than the progress of vsync6. Then the application can determine the progress of the picture frame F. As shown in Table 2, the application determines that the progress of the picture frame F is 66.4ms.

[0304] The progress of the next vsync7 is 66.4ms. When the application receives vsync7, the application determines that the progress of the picture frame E is equal to the progress of vsync6. Then the application can determine the progress of the picture frame G. As shown in Table 2, the application determines that the progress of the picture frame G is 83ms.

[0305] Based on Table 2, the present application provides another timing diagram of picture frames from rendering to display before and after the screen refresh rate is switched.

[0306] Fig. 9B Another timing diagram of picture frames from rendering to display before and after the screen refresh rate is switched is shown.

[0307] Before the application receives vsync4, how the electronic device 100 renders and displays the picture frame can be referred to Fig.9A Description in the Examples.

[0308] Fig. 9B and Fig.9A The difference is that Fig. 9B In the example, based on the description in Table 2, when the application receives the vertical synchronization signal 5 (VSYNC5), the application suspends rendering the picture frame F in order to avoid the accumulation of picture frames.

[0309] When vertical synchronization signal 5 (VSYNC5) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame D from the back buffer of frame D based on the display instruction and display frame D.

[0310] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the GPU can send a synthesis instruction E to SurfaceFlinger, and after sending the synthesis instruction E, the GPU can send a frame instruction E2 to SurfaceFlinger. Based on the synthesis instruction E, SurfaceFlinger can take out the picture frame E from the front buffer of the picture frame E for layer synthesis, and store the synthesized picture frame E in the back buffer specified by the synthesis instruction E.

[0311] When vertical synchronization signal 6 (VSYNC6) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame E from the back buffer of frame E based on the display instruction and display frame E.

[0312] like Fig. 9B As shown, the time for the application to display the picture frame E is between (t+41.5ms) and (t+58.1ms). The duration of the HWC display picture frame E is 16.6ms.

[0313] Between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), the application can send rendering instruction F to the GPU and frame instruction F1 to the GPU. After receiving rendering instruction F, the GPU can render frame F and store the rendered frame F in the front buffer of frame F indicated by rendering instruction F.

[0314] Here, the application has switched the frame rate from 120 FPS to 60 FPS, so the application determines the screen frame F at the frame rate of 60 FPS.

[0315] Between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), since the front buffer does not store the screen frame F to be synthesized, the GPU does not send a synthesis instruction to SurfaceFlinger, and SurfaceFlinger does not synthesize the screen frame for display.

[0316] The time difference between VSYNC6 and VSYNC7 is 16.6 ms. At this time, the electronic device 100 has changed the screen refresh rate, that is, has changed the period of the vertical synchronization signal.

[0317] When vertical synchronization signal 7 (VSYNC7) arrives, SurfaceFlinger can send display instructions to HWC. Since SurfaceFlinger did not synthesize the display frame between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), HWC still continues to display frame E between vertical synchronization signal 7 (VSYNC7) and vertical synchronization signal 8 (VSYNC8).

[0318] like Fig. 9B As shown, the time for the application to display the picture frame E is between (t+58.1ms) and (t+74.7ms). The duration of the HWC display picture frame E is 16.6ms.

[0319] Between vertical synchronization signal 7 (VSYNC7) and vertical synchronization signal 8 (VSYNC8), the application can send rendering instruction G to the GPU and frame instruction G1 to the GPU. After receiving rendering instruction G, the GPU can render the screen frame G and store the rendered screen frame G in the front buffer of the screen frame G indicated by rendering instruction G.

[0320] Here, the application has switched the frame rate from 120 FPS to 60 FPS, so the application determines the screen frame G at the frame rate of 60 FPS.

[0321] Between vertical synchronization signal 7 (VSYNC7) and vertical synchronization signal 8 (VSYNC8), GPU can send synthesis instruction F to SurfaceFlinger, and after sending synthesis instruction F, GPU can send frame instruction F2 to SurfaceFlinger. Based on synthesis instruction F, SurfaceFlinger can take out picture frame F from the front buffer of picture frame F for layer synthesis, and store the synthesized picture frame F in the back buffer specified by synthesis instruction F.

[0322] The time difference between VSYNC7 and VSYNC8 is 16.6 ms. At this time, the electronic device 100 has changed the screen refresh rate, that is, has changed the period of the vertical synchronization signal.

[0323] Optionally, Table 1 and Table 2 use a front buffer as an example to illustrate how the electronic device 100 controls over-rendering of picture frames.

[0324] In the case where there is only one front buffer, or when the electronic device 100 has two front buffers but only one buffer stores the rendered screen frame, when the electronic device 100 determines that the progress of the screen frame E is greater than the progress of VSYNC5, the electronic device 100 does not render the screen frame F when receiving VSYNC5. When waiting to receive VSYNC6, the electronic device 100 renders the screen frame F again. Then there will be two cycles in which the electronic device 100 displays the screen frame E. For example, the electronic device 100 displays the screen frame E in the VSYNC5 to VSYNC6 cycle and the VSYNC6 to VSYNC7 cycle. In the case of only one buffer, when the electronic device 100 controls the over-rendering of the screen frame, a freeze may occur.

[0325] In the case where the electronic device 100 has two and two front buffers, since SurfaceFlinger has one vsync cycle or multiple vsync cycles without synthesizing the picture frame, at least two front buffers store the rendered picture frames. When the electronic device 100 determines that the picture frame is over-rendered, the electronic device 100 can suspend rendering the picture frame. When the first adjacent vsync signal arrives, the electronic device 100 can take out the picture frame from other buffers for synthesis and store it in the back buffer. When the second adjacent vsync signal arrives, the electronic device 100 can take out the synthesized picture frame from the back buffer and send it for display. There will be no problem of the electronic device 100 displaying the same picture frame in two cycles, that is, there will be no freeze when the electronic device 100 controls the over-rendering of the picture frame.

[0326] For example, Fig. 9C As shown, if the electronic device 100 has two front buffers, for example, front buffer 1 and front buffer 2, the front buffer 1 and the front buffer 2 are used to store rendered picture frames.

[0327] Between vsync0 and vsync1, the electronic device 100 can render the picture frame A and store the picture frame A in the front buffer1.

[0328] Between vsync1 and vsync2, SurfaceFlinger should take out frame A from front buffer1 and synthesize frame A. If SurfaceFlinger freezes and fails to synthesize frame A between vsync1 and vsync2, frame A is still stored in front buffer1. At the same time, electronic device 100 can render frame B and store frame B in front buffer2. Then, between vsync1 and vsync2, both front buffer1 and front buffer2 store rendered frames.

[0329] Between vsync2 and vsync3, the electronic device 100 may take out the picture frame B from the front buffer 2 and store the picture frame B in the front buffer 1. At the same time, the electronic device 100 may render the picture frame C and store the picture frame C in the front buffer 2.

[0330] During vsync3 to vsync4, the HWC can retrieve the synthesized frame A from the back buffer and display the frame A on the display screen. At the same time, the electronic device 100 can retrieve the frame C from the front buffer 2 and store the frame C in the front buffer 1. At the same time, the electronic device 100 can render the frame D and store the frame D in the front buffer 2.

[0331] Between vsync4 and vsync5, the HWC can take out the synthesized frame B from the back buffer and display the frame B on the display screen. At the same time, the electronic device 100 can take out the frame D from the front buffer 2 and store the frame D in the front buffer 1. At the same time, the electronic device 100 can render the frame E and store the frame E in the front buffer 2.

[0332] Between vsync5 and vsync6, if the electronic device 100 determines that the progress of the screen frame E is greater than the progress of VSYNC5 plus, then the electronic device 100 may not render the screen frame F, and buffer1 is empty between vsync5 and vsync6. The electronic device 100 can take out the screen frame E from the front buffer2 and store the screen frame E in the front buffer1. HWC can take out the synthesized screen frame C from the back buffer and display the screen frame C on the display. At the same time, SurfaceFlinger can take out the screen frame D from the front buffer1 and synthesize the screen frame D, and store the synthesized screen frame D in the back buffer.

[0333] Between vsync6 and vsync7, if the electronic device 100 determines that the progress of the picture frame E is less than or equal to the progress of VSYNC6, the electronic device 100 can start rendering the picture frame. SurfaceFlinger can take out the picture frame F from the front buffer 1 and synthesize the picture frame, and store the synthesized picture frame F in the back buffer. At the same time, the electronic device 100 can render the picture frame F and store the picture frame F in the front buffer 1. At the same time, the HWC can take out the synthesized picture frame D from the back buffer and display the picture frame D on the display screen.

[0334] Between vsync7 and vsync8, HWC can take out the synthesized frame E from the back buffer and display frame E on the display screen. At the same time, SurfaceFlinger can take out frame F from front buffer1 and synthesize frame F, and store the synthesized frame F in the back buffer. At the same time, electronic device 100 can render frame G and store frame G in front buffer1.

[0335] pass Fig. 9C It can be seen that when the electronic device 100 has two front buffers and at least two front buffers store rendered picture frames, no lag will occur when the electronic device 100 controls the rendering transition of the picture frames.

[0336] Next, a scenario in which the electronic device 100 switches from a low screen refresh rate to a high screen refresh rate is introduced.

[0337] 1. In a game scenario, when entering a game scenario, the electronic device 100 can increase the screen refresh rate.

[0338] In the game scene, the game screen changes quickly, and the user has high requirements for the smoothness of the screen. After detecting that the game scene has been entered, the electronic device 100 can automatically increase the screen refresh rate of the electronic device 100 to improve the smoothness of the game screen to improve the user's gaming experience.

[0339] For example, after the electronic device 100 detects that the first game application displays the user interface 330 , the electronic device 100 may automatically increase the screen refresh rate of the electronic device 100 .

[0340] 2. When the power level of the electronic device 100 is higher than a preset power level, the electronic device 100 can increase the screen refresh rate.

[0341] When the power level of the electronic device 100 is lower than a preset power level, for example, when the power level of the electronic device 100 is lower than 50% of the total power level, the electronic device 100 automatically switches from a high screen refresh rate to a low screen refresh rate. When the power level of the electronic device 100 is higher than 50% of the total power level after the electronic device 100 is charged, the electronic device 100 can automatically increase the screen refresh rate of the electronic device 100.

[0342] 3. When the temperature of the electronic device 100 is lower than a preset temperature, the electronic device 100 can increase the screen refresh rate.

[0343] When the electronic device 100 is used for too long, the temperature of the electronic device 100 is greater than the preset temperature. After the electronic device 100 reduces the screen refresh rate, the temperature of the electronic device 100 will drop. When the temperature of the electronic device 100 is detected to be lower than the preset temperature, the electronic device 100 can further increase the screen refresh rate of the electronic device 100.

[0344] 4. Upon detecting the screen refresh rate set by the user, the electronic device 100 may switch the screen refresh rate to the screen refresh rate set by the user, where the screen refresh rate set by the user is higher than the current screen refresh rate of the electronic device 100.

[0345] For example, the electronic device 100 refreshes the display frame at the current screen refresh rate. The user can manually set the screen refresh rate of the electronic device 100. After detecting the screen refresh rate set by the user, the electronic device 100 can switch the screen refresh rate to the screen refresh rate set by the user, and the screen refresh rate set by the user is higher than the current screen refresh rate of the electronic device 100.

[0346] 5. When the CPU occupancy rate of the electronic device 100 is less than the specified occupancy rate, the electronic device 100 can increase the screen refresh rate.

[0347] When the electronic device 100 detects that the CPU occupancy rate of the central processing unit of the electronic device 100 is less than the specified occupancy rate, the electronic device 100 can increase the screen refresh rate to improve the smoothness of the picture frame display.

[0348] 6. When the user slides the page faster than a preset speed, the electronic device 100 can increase the screen refresh rate.

[0349] When the electronic device 100 detects that the user is sliding a page and the speed at which the user slides the page is higher than a preset speed, the electronic device 100 can increase the screen refresh rate of the electronic device 100. In this way, the electronic device 100 can refresh and display sub-pages that are not displayed in the long page at the screen refresh rate, thereby improving the smoothness of page sliding.

[0350] For example, when a user slides pages to read an e-book or news, and the electronic device 100 detects that the speed at which the user slides pages is higher than a preset speed, the electronic device 100 can automatically increase the screen refresh rate of the electronic device 100 .

[0351] Not limited to the above scenario of increasing the screen refresh rate, in other embodiments, the electronic device 100 can also increase the screen refresh rate of the electronic device 100 based on other factors, and this application does not limit this.

[0352] Not limited to the above scenario of increasing the screen refresh rate, in other embodiments, the electronic device 100 can also increase the screen refresh rate of the electronic device 100 based on other factors, which is not limited in this application.

[0353] Specific implementation of smooth frame switching when switching from low screen refresh rate to high screen refresh rate.

[0354] When the electronic device 100 switches from the first screen refresh rate to the second screen refresh rate, the frame rate of the application will also change accordingly. For example, the frame rate of the application can be switched from the first frame rate to the second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate.

[0355] Among them, the first screen refresh rate is lower than the second screen refresh rate, and the first frame rate is lower than the second frame rate.

[0356] For example, the first screen refresh rate may be 60 Hz, and the second screen refresh rate may be 120 Hz. The first frame rate may be 60 FPS, and the second frame rate may be 120 FPS.

[0357] Next, it is introduced how the electronic device 100 renders the picture frame when the screen refresh rate of the electronic device 100 switches from 60 Hz to 120 Hz.

[0358] Fig.10 A schematic diagram showing an application determining multiple picture frames when the screen refresh rate of the electronic device 100 switches from 60 Hz to 120 Hz.

[0359] For example, Fig.10 A long page is taken as an example to illustrate how to obtain multiple screen frames by application rendering.

[0360] like Fig.10 As shown, the application can determine the picture frame A, the picture frame B, the picture frame C and the picture frame D at a frame rate of 60 FPS. For the description of the picture frame A, the picture frame B, the picture frame C and the picture frame D, please refer to Figure 2 The description of the picture frame A, the picture frame B, the picture frame C and the picture frame D in the embodiment will not be repeated in this application.

[0361] While the application is rendering the screen frame D, the electronic device 100 decides to switch to a screen refresh rate of 120 Hz. The application switches the frame rate to 12 FPS.

[0362] When the application renders the screen frame E, the application determines the screen frame E at a frame rate of 120FPS. If the moving speed of the long page is 1ms and 1mm, and the frame interval of the frame rate of 120FPS is 8.3ms, then the starting position of the screen frame E moves 8.3mm backward relative to the starting position of the screen frame D, and the ending position of the screen frame E also moves 8.3mm backward relative to the ending position of the screen frame D. Then the starting position of the screen frame E is the 58.1mm position in the long page, and the ending position of the screen frame E is the 78.1mmmm position in the long page. The time for the application to render the screen frame E is between (t+49.8ms) and (t+66.4ms).

[0363] When the application renders the screen frame F, the application determines the screen frame E at a frame rate of 120FPS. If the moving speed of the long page is 1mm per 1ms, and the frame interval of the frame rate of 120FPS is 8.3ms, then the starting position of the screen frame F moves 8.3mm backward relative to the starting position of the screen frame E, and the ending position of the screen frame F also moves 8.3mm backward relative to the ending position of the screen frame E. Then the starting position of the screen frame F is the 66.4mm position in the long page, and the ending position of the screen frame E is the 86.4mm position in the long page. The time for the application to render the screen frame F is between (t+66.4ms) and (t+83ms).

[0364] When the application renders the screen frame G, the application determines the screen frame E at a frame rate of 120FPS. If the moving speed of the long page is 1mm per 1ms, and the frame interval of the frame rate of 120FPS is 8.3ms, then the starting position of the screen frame G moves 8.3mm backward relative to the starting position of the screen frame F, and the ending position of the screen frame G also moves 8.3mm backward relative to the ending position of the screen frame F. Then the starting position of the screen frame G is the 74.7mm position in the long page, and the ending position of the screen frame E is the 94.7mm position in the long page. The time for the application to render the screen frame G is between (t+83ms) and (t+91.3ms).

[0365] By analogy, the application can render the frame E, the frame F, and the frame G to obtain more frame E and frame G.

[0366] Next, it is described how the electronic device 100 displays picture frames when the screen refresh rate of the electronic device 100 switches from 60 Hz to 120 Hz.

[0367] Fig.11A schematic diagram showing a display frame when the screen refresh rate of the electronic device 100 switches from 60 Hz to 120 Hz.

[0368] like Fig.11 As shown, the application starts to determine the screen frame at a frame rate of 60FPS, and the electronic device 100 refreshes and displays the screen frame at a refresh rate of 60hz.

[0369] For example, if the application determines the picture frame A at a frame rate of 60 FPS and displays the picture frame A, during the display of the picture frame A, the electronic device 100 caches the rendered picture frames B and C, which are also determined at a frame rate of 120 FPS. The frame interval between two adjacent picture frames is 16.6 ms, so the picture content of the picture frame B differs from that of the picture frame A by about 16.6 ms, and the picture content of the picture frame C differs from that of the picture frame B by about 16.6 ms.

[0370] The electronic device 100 displays the picture frame A from the time (t+16.6ms) to the time (t+33.2ms), and the display duration of the picture frame A is 16.6ms.

[0371] Afterwards, the electronic device 100 obtains the picture frame B from the buffer storing the picture frame B and displays the picture frame B. During the display of the picture frame B, the electronic device 100 caches the rendered picture frame C and the picture frame D, which are also determined at a frame rate of 60FPS. The frame interval between two adjacent frames is 16.6ms, so the picture content of the picture frame B differs from that of the picture frame A by about 16.6ms, and the picture content of the picture frame C differs from that of the picture frame B by about 16.6ms.

[0372] The electronic device 100 displays the picture frame B from the time (t+33.2ms) to the time (t+49.8ms), and the display duration of the picture frame B is 16.6ms.

[0373] During the period when the electronic device 100 displays the picture frame B, for example, between VSYNC3 and VSYNC4, the electronic device 100 decides that the screen refresh rate of the electronic device 100 needs to be switched from 60 Hz to 120 Hz.

[0374] The decision may be made automatically by the electronic device 100, or after the electronic device 100 receives an operation from the user, which is not limited in this application.

[0375] In response to the electronic device 100 deciding to switch the screen refresh rate of the electronic device 100 from 60hz to 120hz, the application switches the frame rate from 60FPS to 120FPS. After the frame rate is switched to 120FPS, the electronic device obtains data of the screen frame E according to the frame rate of 120FPS.

[0376] In response to the electronic device 100 deciding to switch the screen refresh rate of the electronic device 100 from 60hz to 120hz, before the electronic device 100 switches the screen refresh rate from 60hz to 120hz, the electronic device 100 needs to determine whether the electronic device 100 has a picture frame determined at a frame rate of 60FPS cached. If so, the electronic device 100 does not switch the screen refresh rate to 120hz first, but refreshes and displays the picture frame determined at a frame rate of 60FPS at a screen refresh rate of 60hz. After determining that the electronic device 100 does not cache the picture frame determined at a frame rate of 60FPS, the electronic device 100 switches the screen refresh rate to 120hz.

[0377] like Fig.11 As shown, during the period when the electronic device 100 displays the picture frame B, the electronic device 100 decides to switch the screen refresh rate of the electronic device 100 from 60hz to 120hz. The application first switches the frame rate to 120FPS, and at the same time, the electronic device 100 determines that the cache also has the picture frame C and the picture frame D determined at the frame rate of 60FPS. The electronic device 100 does not switch to the screen refresh rate of 120hz first, and still refreshes and displays the picture frame C and the picture frame D at the screen refresh rate of 60hz.

[0378] After the electronic device 100 displays the picture frame B, the electronic device 100 still refreshes and displays the picture frame at a screen refresh rate of 60 Hz. The electronic device 100 obtains the picture frame C from the buffer storing the picture frame C and displays the picture frame C. The screen refresh rate of the electronic device 100 is still 60 Hz, so the electronic device 100 still displays the picture frame C from the time (t+49.8ms) to the time (t+66.4ms), and the display duration of the picture frame C is 16.6ms. The picture content of the picture frame C differs from that of the picture frame B by approximately 16.6ms. The picture frame C is also displayed for 16.6ms, and the image content of the picture frame C matches the display duration of the picture frame C, and there will be no Figure 5 The embodiment discloses a freeze problem when the electronic device 100 switches and displays the picture frame C.

[0379] Similarly, during the display of the picture frame C, the electronic device 100 caches the rendered picture frame D and the picture frame E. The picture frame D is determined at a frame rate of 60 FPS, and the picture content of the picture frame D differs from that of the picture frame C by about 16.6 ms. The picture frame E is determined at a frame rate of 120 FPS, and the picture content of the picture frame E differs from that of the picture frame D by about 8.3 ms.

[0380] During the period when the electronic device 100 displays the picture frame C, the electronic device 100 determines that the cached picture frame D determined at a frame rate of 60 FPS is also included. The electronic device 100 does not switch to the screen refresh rate of 120 Hz, but refreshes and displays the picture frame D at the screen refresh rate of 60 Hz.

[0381] After the electronic device 100 displays the picture frame C, the electronic device 100 still refreshes and displays the picture frame at a screen refresh rate of 60 Hz. The electronic device 100 obtains the picture frame D from the buffer storing the picture frame D and displays the picture frame D. The screen refresh rate of the electronic device 100 is still 60 Hz, so the electronic device 100 still displays the picture frame D from the time (t+66.4ms) to the time (t+83ms), and the display duration of the picture frame D is 16.6ms. The picture content of the picture frame D differs from that of the picture frame C by about 16.6ms, and the picture frame D is also displayed for 16.6ms. The image content of the picture frame D matches the display duration of the picture frame D, and there will be no Figure 5 The embodiment discloses a freeze problem when the electronic device 100 switches and displays the picture frame D.

[0382] Similarly, during the display of picture frame D, the electronic device 100 caches the rendered picture frames E and F, which are determined at a frame rate of 120FPS, and the frame interval between two adjacent picture frames is 8.3ms. Therefore, the picture content of picture frame E differs from that of picture frame D by approximately 8.3ms, and the picture content of picture frame F differs from that of picture frame E by approximately 8.3ms.

[0383] During the period when the electronic device 100 displays the picture frame D, the electronic device 100 determines that the picture frame determined at the frame rate of 60 FPS is not cached, and only the picture frame E and the picture frame F determined at the frame rate of 120 FPS are cached.

[0384] like Fig.11 As shown, after the electronic device 100 displays the picture frame D, the electronic device 100 can switch the screen refresh rate to 120hz, and the electronic device 100 refreshes the picture frame at a screen refresh rate of 120hz. The electronic device 100 obtains the picture frame E from the buffer storing the picture frame E and displays the picture frame E. The screen refresh rate of the electronic device 100 has been switched to 120hz, so the electronic device 100 displays the picture frame E from the moment (t+83ms) to the moment (t+91.3ms), and the display duration of the picture frame E is 8.3ms. The picture content of the picture frame E and the picture frame D also differ by about 8.3ms, and the picture frame D also displays 8.3ms. The image content of the picture frame E matches the display duration of the picture frame E, so the electronic device 100 will not have a freeze problem when switching from the picture frame D to the picture frame E.

[0385] Similarly, during the display of picture frame E, the electronic device 100 caches the rendered picture frame F and picture frame G, which are determined at a frame rate of 120FPS, and the frame interval between two adjacent picture frames is 8.3ms, so the picture content of picture frame F differs from that of picture frame E by about 8.3ms, and the picture content of picture frame G differs from that of picture frame F by about 8.3ms. Picture frame F and picture frame G also display 8.3ms, and the image content of picture frame F matches the display duration of picture frame F, and the image content of picture frame G matches the display duration of picture frame G, so the electronic device 100 will not experience a freeze problem when switching from picture frame E to picture frame F and from picture frame F to picture frame G.

[0386] based on Fig.11 In the embodiment, before switching the screen refresh rate, the electronic device 100 will determine whether there is a frame rate of a picture frame that does not match the switched screen refresh rate. If there is, the screen refresh rate will be switched after the picture frame that does not match the switched screen refresh rate is displayed, so as to avoid the situation where the frame switching is not smooth when switching the screen refresh rate.

[0387] based on Fig.11 Description of the embodiment. After the electronic device 100 decides to switch the screen refresh rate of the electronic device 100 from 60 Hz to 120 Hz, when the electronic device 100 determines that there are still cached picture frames rendered at 60 FPS, the electronic device 100 will not immediately switch the screen refresh rate, that is, will not immediately change the period of the vysnc signal. After determining that the electronic device 100 does not cache the picture frames rendered at 60 FPS, the electronic device 100 will switch the screen refresh rate again, that is, change the period of the vysnc signal.

[0388] Next, taking the cycle of the vysnc signal as an example, how the electronic device 100 displays a picture frame is described.

[0389] Fig.12 A timing diagram of picture frames from rendering to display before and after the screen refresh rate is switched is shown.

[0390] For example, between vertical synchronization signal 0 (VSYNC0) and vertical synchronization signal 1 (VSYNC1), the application can send rendering instruction A to the GPU and frame instruction A1 to the GPU. After receiving rendering instruction A, the GPU can render frame A and store the rendered frame A in the front buffer of frame A indicated by rendering instruction A.

[0391] like Fig.12As shown, the time for applying rendering picture frame A is between ((t-16.6ms) and time tms. The duration of applying rendering picture frame A is 16.6ms.

[0392] The time difference between VSYNC0 and VSYNC1 is 16.6ms.

[0393] After detecting that the front buffer of frame A is filled with rendered frame A, when VSYNC1 arrives, the GPU can send synthesis instruction A to SurfaceFlinger, and after sending synthesis instruction A, the GPU can send frame instruction A2 to SurfaceFlinger. Based on synthesis instruction A, SurfaceFlinger can take out frame A from the front buffer of frame A for layer synthesis, and store the synthesized frame A in the back buffer specified by synthesis instruction A.

[0394] Between vertical synchronization signal 1 (VSYNC1) and vertical synchronization signal 2 (VSYNC2), the application can send rendering instruction B to the GPU and frame instruction B1 to the GPU. After receiving rendering instruction B, the GPU can render frame B and store the rendered frame B in the front buffer of frame B indicated by rendering instruction B.

[0395] like Fig.12 As shown, the time for applying rendering picture frame B is between time tms and time (t+16.6ms). The duration of applying rendering picture frame B is 16.6ms.

[0396] The time difference between VSYNC1 and VSYNC2 is 16.6ms.

[0397] When vertical synchronization signal 2 (VSYNC2) arrives, SurfaceFlinger can send a display command to HWC. HWC can obtain frame A from the back buffer of frame A based on the display command and display frame A.

[0398] like Fig.12 As shown, the time for the application to display the picture frame A is between (t+16.6ms) and (t+33.2ms). The duration of the HWC display picture frame A is 16.6ms.

[0399] Between vertical synchronization signal 2 (VSYNC2) and vertical synchronization signal 3 (VSYNC3), the application can send rendering instruction C to the GPU and frame instruction C1 to the GPU. After receiving rendering instruction C, the GPU can render frame C and store the rendered frame C in the front buffer of frame C indicated by rendering instruction C.

[0400] Between vertical synchronization signal 2 (VSYNC2) and vertical synchronization signal 3 (VSYNC3), the GPU can send synthesis instruction B to SurfaceFlinger, and after sending synthesis instruction B, the GPU can send frame instruction B2 to SurfaceFlinger. Based on synthesis instruction B, SurfaceFlinger can take out frame B from the front buffer of frame B for layer synthesis, and store the synthesized frame B in the back buffer specified by synthesis instruction B.

[0401] The time difference between VSYNC2 and VSYNC3 is 16.6ms.

[0402] When vertical synchronization signal 3 (VSYNC3) arrives, SurfaceFlinger can send a display command to HWC. HWC can obtain frame B from the back buffer of frame B based on the display command and display frame B.

[0403] like Fig.12 As shown, the time for the application to display the picture frame B is between (t+33.2ms) and (t+49.8ms). The duration of the HWC displaying the picture frame B is 16.6ms.

[0404] Between vertical synchronization signal 3 (VSYNC3) and vertical synchronization signal 4 (VSYNC4), the application can send rendering instruction D to the GPU and frame instruction D1 to the GPU. After receiving rendering instruction D, the GPU can render frame D and store the rendered frame D in the front buffer of frame D indicated by rendering instruction D. Frame D is rendered at 60FPS.

[0405] When the HWC displays frame B, the electronic device 100 decides that the screen refresh rate of the electronic device 100 needs to be switched from 60 Hz to 120 Hz.

[0406] The decision may be made automatically by the electronic device 100, or after the electronic device 100 receives an operation from the user, which is not limited in this application.

[0407] In response to the electronic device 100 deciding to switch the screen refresh rate of the electronic device 100 from 60 Hz to 120 Hz, the application switches the frame rate from 60 FPS to 120 FPS, and when the next VSYNC signal arrives, the application determines the picture frame at 120 FPS.

[0408] Between vertical synchronization signal 3 (VSYNC3) and vertical synchronization signal 4 (VSYNC4), the GPU can send synthesis instruction C to SurfaceFlinger, and after sending synthesis instruction C, the GPU can send frame instruction C2 to SurfaceFlinger. Based on synthesis instruction C, SurfaceFlinger can take out frame C from the front buffer of frame C for layer synthesis, and store the synthesized frame C in the back buffer specified by synthesis instruction C.

[0409] The time difference between VSYNC3 and VSYNC4 is 16.6 ms. At this time, the electronic device 100 has not changed the screen refresh rate, that is, has not changed the period of the vertical synchronization signal, but has only changed the frame rate of the application.

[0410] When vertical synchronization signal 4 (VSYNC4) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame C from the back buffer of frame C based on the display instruction and display frame C.

[0411] like Fig.12 As shown, the time for the application to display the picture frame C is between (t+49.8ms) and (t+66.4ms). The duration of the HWC display picture frame B is 16.6ms.

[0412] Between vertical synchronization signal 4 (VSYNC4) and vertical synchronization signal 5 (VSYNC5), the application can send rendering instruction E to the GPU and frame instruction E1 to the GPU. After receiving rendering instruction E, the GPU can render frame E and store the rendered frame E in the front buffer of frame E indicated by rendering instruction E. The application has changed the frame rate of the frame, and frame E is rendered at 120FPS.

[0413] Between vertical synchronization signal 4 (VSYNC4) and vertical synchronization signal 5 (VSYNC5), the GPU can send synthesis instruction D to SurfaceFlinger, and after sending synthesis instruction D, the GPU can send frame instruction D2 to SurfaceFlinger. Based on synthesis instruction D, SurfaceFlinger can take out frame D from the front buffer of frame D for layer synthesis, and store the synthesized frame D in the back buffer specified by synthesis instruction D.

[0414] The time difference between VSYNC4 and VSYNC5 is 16.6 ms. At this time, the electronic device 100 has not changed the screen refresh rate, that is, has not changed the period of the vertical synchronization signal, but has only changed the frame rate of the application.

[0415] When vertical synchronization signal 5 (VSYNC5) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame D from the back buffer of frame D based on the display instruction and display frame D.

[0416] like Fig.12 As shown, the time for the application to display the picture frame D is between (t+66.4ms) and (t+83ms). The duration of the HWC display picture frame D is 16.6ms.

[0417] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the application can send rendering instruction F to the GPU and frame instruction F1 to the GPU. After receiving rendering instruction F, the GPU can render frame F and store the rendered frame F in the front buffer of frame F indicated by rendering instruction F. The application has changed the frame rate of the frame, and frame F is rendered at 120FPS.

[0418] Between vertical synchronization signal 5 (VSYNC5) and vertical synchronization signal 6 (VSYNC6), the GPU can send a synthesis instruction E to SurfaceFlinger, and after sending the synthesis instruction E, the GPU can send a frame instruction E2 to SurfaceFlinger. Based on the synthesis instruction E, SurfaceFlinger can take out the picture frame E from the front buffer of the picture frame D for layer synthesis, and store the synthesized picture frame E in the back buffer specified by the synthesis instruction E.

[0419] The time difference between VSYNC5 and VSYNC6 is 16.6 ms. At this time, the electronic device 100 has not changed the screen refresh rate, that is, has not changed the period of the vertical synchronization signal, but has only changed the frame rate of the application.

[0420] When vertical synchronization signal 6 (VSYNC6) arrives, SurfaceFlinger can send a display instruction to HWC. HWC can obtain frame E from the back buffer of frame E based on the display instruction and display frame E.

[0421] like Fig.12 As shown, the time for the application to display the picture frame E is between (t+83ms) and (t+91.3ms). The duration of the HWC display picture frame E is 8.3ms.

[0422] Between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), the application can send rendering instruction G to the GPU and frame instruction G1 to the GPU. After receiving rendering instruction G, the GPU can render the screen frame G and store the rendered screen frame G in the front buffer of the screen frame G indicated by rendering instruction G. The application has changed the frame rate of the screen frame, and the screen frame G is rendered at 120FPS.

[0423] Between vertical synchronization signal 6 (VSYNC6) and vertical synchronization signal 7 (VSYNC7), the GPU can send a synthesis instruction F to SurfaceFlinger, and after sending the synthesis instruction F, the GPU can send a frame instruction F2 to SurfaceFlinger. Based on the synthesis instruction F, SurfaceFlinger can take out the picture frame F from the front buffer of the picture frame F for layer synthesis, and store the synthesized picture frame F in the back buffer specified by the synthesis instruction F.

[0424] The time difference between VSYNC6 and VSYNC7 is 8.3 ms. At this time, the electronic device 100 has changed the screen refresh rate, that is, has changed the period of the vertical synchronization signal.

[0425] Next, combine Fig.12 , it is explained how the electronic device 100 determines the progress of each picture frame before and after switching the screen refresh rate.

[0426] Based on the analysis of Table 1 and Table 2, before determining the progress of the next frame, the application needs to determine whether the progress of the previous frame is less than the progress of the current vsync signal. If yes, continue to determine the progress of the next frame and render the next frame. If no, it means that the frame is rendered too fast and the rendering needs to be paused to avoid frame accumulation.

[0427] Table 3

[0428]

[0429]

[0430] Table 3 is combined Fig.12 The following is an exemplary description of how the electronic device 100 determines the progress of each picture frame before and after the screen refresh rate is switched.

[0431] For example, the electronic device 100 starts to forward display frames at a screen refresh rate of 60 Hz, and determines the progress of the picture frames at a frame rate of 60 FPS. Then the period of the vsync signal is 16.6 ms, and the frame interval is 16.6 ms.

[0432] As shown in Table 3, if frame A is the first frame in the animation, when the application receives vsync0 at 0ms, the application can determine that the progress of frame A is 16.6ms, and determine the image data of frame A based on the progress of frame A, and then render frame B based on the image data of frame A.

[0433] The progress of the next vsync1 is 16.6ms. If frame B is the second frame in the animation, when the application receives vsync1 at 16.6ms, the application determines that the progress of frame A is equal to the progress of vsync1, then the application can determine that the progress of frame B is 16.6ms, and determine the image data of frame B based on the progress of frame B, and then render frame B based on the image data of frame B.

[0434] The progress of the next vsync2 is 33.2ms. If frame C is the third frame in the animation, when the application receives vsync2 at 33.2ms, the application determines that the progress of frame B is equal to the progress of vsync2, then the application can determine that the progress of frame C is 16.6ms, and based on the progress of frame C, determine the image data of frame C, and then render frame C based on the image data of frame C.

[0435] The progress of the next vsync3 is 49.8ms. If frame D is the fourth frame in the animation, when the application receives vsync3 at 49.8ms, the application determines that the progress of frame C is equal to the progress of vsync3, then the application can determine that the progress of frame D is 66.4ms, and determine the image data of frame D based on the progress of frame D, and then render frame D based on the image data of frame D.

[0436] Between vsync3 and vsync4, the electronic device 100 decides to switch the screen refresh rate to 60hz. Based on the above analysis, when the application receives vsync4, the application will switch the frame rate from 120 to 60FPS, and the frame interval will switch from 8.3ms to 16.6ms. When SurfaceFlinger receives vsync6, SurfaceFlinger will switch the screen refresh rate to 60hz, that is, change the period of the vsync signal to 16.6ms.

[0437] The progress of the next vsync4 is 66.4ms. If frame E is the fifth frame in the animation, when the application receives vsync4 at 66.4ms, the application determines that the progress of frame E is equal to the progress of vsync4, then the application can determine that the progress of frame E is 74.7ms, and determine the image data of frame E based on the progress of frame E, and then render frame E based on the image data of frame E.

[0438] The progress of the next vsync5 is 83ms. If frame F is the sixth frame in the animation, when the application receives vsync5 at 83ms, the application determines that the progress of frame E is less than the progress of vsync5, then the application can determine that the progress of frame F is 83ms, and determine the image data of frame F based on the progress of frame F, and then render frame F based on the image data of frame F.

[0439] The progress of the next vsync6 is 83ms. If frame G is the seventh frame in the animation, when the application receives vsync6 at 83ms, the application determines that the progress of frame F is less than the progress of vsync6, then the application can determine that the progress of frame G is 91.3ms, and determine the image data of frame G based on the progress of frame G, and then render frame G based on the image data of frame G.

[0440] The progress of the next vsync7 is 107.9ms. If frame H is the eighth frame in the animation, when the application receives vsync7 at 107.9ms, the application determines that the progress of frame G is less than the progress of vsync7, then the application can determine that the progress of frame H is 99.6ms, and determine the image data of frame H based on the progress of frame H, and then render frame H based on the image data of frame H.

[0441] Fig.13 A flowchart of a screen refresh rate control method provided in this application.

[0442] like Fig.13 As shown, the electronic device 100 includes a first application, a refresh rate decision module, a layer buffer (buffer), a layer synthesizer (SurfaceFlinger) and a HWC.

[0443] S1301: A first application determines a picture frame at a first frame rate and renders the picture frame, wherein a frame spacing between two adjacent picture frames is a first value, and the first value is equal to a reciprocal of the first frame rate.

[0444] The frame interval can be understood as the change in image content between two adjacent frames. For example, for a long page, if the long page moves at a speed of 1 mm per 1 ms, when the first frame rate is 60 FPS, the starting position of the next frame moves 16.6 mm below the long page relative to the starting position of the adjacent previous frame. When the first frame rate is 120 FPS, the starting position of the next frame moves 8.3 mm below the long page relative to the starting position of the adjacent previous frame.

[0445] Exemplarily, the first frame rate may be 60 FPS, and the first value of the frame interval between two adjacent frames may be 16.6 ms.

[0446] For example, the frame rate rendered at 60 FPS can be Fig.10 The embodiment shows picture frame A, picture frame B, picture frame C, and picture frame D.

[0447] Exemplarily, the first frame rate may also be 120 FPS, and the first value of the frame interval between two adjacent frames may be 8.3 ms.

[0448] For example, the frame rate rendered at 120 FPS can be Figure 7 The embodiment shows picture frame A, picture frame B, picture frame C, and picture frame D.

[0449] S1302: The first application stores the rendered picture frame in a layer buffer.

[0450] Exemplarily, the buffer storing the picture frame may include a front buffer and a back buffer. The first application stores the rendered picture frame in the front buffer of the picture frame, and the layer compositor (SurfaceFlinger) may obtain the picture frame from the front buffer of the picture frame and store it in the back buffer of the picture frame.

[0451] S1303. The layer compositor (SurfaceFlinger) obtains the picture frame from the layer buffer (buffer).

[0452] S1304, the layer compositor (SurfaceFlinger) sends the picture frame to the HWC for display.

[0453] S1305. The HWC displays the picture frames determined by the first frame rate at the first screen refresh rate. The display duration of the picture frames determined by the first frame rate is the first duration, and the first duration is equal to the reciprocal of the first screen refresh rate.

[0454] The value of the first frame rate is equal to the value of the first screen refresh rate. The frame rate of the application is determined based on the screen refresh rate.

[0455] The layer compositor (SurfaceFlinger) may periodically obtain the screen frame from the layer buffer (buffer) and send it to the HWC for display. The HWC may send the screen frame determined by the first frame rate for display at the first screen refresh rate, and the display duration of the screen frame determined by the first frame rate is the first duration, which is equal to the inverse of the first screen refresh rate.

[0456] Exemplarily, the first frame rate may be 60 Hz, and the HWC obtains a picture frame from a layer buffer every 16.6 ms and displays it on the screen of the electronic device 100 .

[0457] Exemplarily, the first frame rate may be 120 Hz, and the HWC obtains a picture frame from a layer buffer every 8.3 ms and displays it on the screen of the electronic device 100 .

[0458] S1306: The refresh rate decision module decides that the first screen refresh rate needs to be switched to the second screen refresh rate.

[0459] In some embodiments, the refresh rate decision module may switch from a low screen refresh rate to a high screen refresh rate, ie, the second screen refresh rate is greater than the first screen refresh rate.

[0460] The refresh rate decision module can automatically switch from a low screen refresh rate to a high screen refresh rate. The refresh rate decision module can also switch from a low screen refresh rate to a high screen refresh rate based on user operations. This application does not limit this. For how the refresh rate decision module decides to switch from a low screen refresh rate to a high screen refresh rate, please refer to the above description, and this application will not repeat it here.

[0461] In other embodiments, the refresh rate decision module may switch from a high screen refresh rate to a low screen refresh rate, that is, the second screen refresh rate is less than the first screen refresh rate.

[0462] The refresh rate decision module can automatically switch from a high screen refresh rate to a low screen refresh rate. The refresh rate decision module can also switch from a high screen refresh rate to a low screen refresh rate based on user operations. This application does not limit this. For how the refresh rate decision module decides to switch from a high screen refresh rate to a low screen refresh rate, please refer to the above description, and this application will not repeat it here.

[0463] S1307. The refresh rate decision module sends the second screen refresh rate to the first application.

[0464] S1308. The refresh rate decision module sends the second screen refresh rate to the layer compositor (SurfaceFlinger).

[0465] When the refresh rate decision module determines that the first screen refresh rate needs to be switched to the second screen refresh rate, the refresh rate decision module needs to send the second screen refresh rate to the first application, so that the first application can adjust the frame rate based on the second screen refresh rate so that the application frame rate matches the screen refresh rate, thereby avoiding the occurrence of unsmooth frame switching.

[0466] S1309: The first application switches the frame rate from the first frame rate to the second frame rate, where the value of the second frame rate is equal to the value of the second screen refresh rate.

[0467] In some embodiments, the refresh rate decision module decides to switch from a high screen refresh rate to a low screen refresh rate, and the refresh rate decision module can send the second screen refresh rate to the first application. In response to the second screen refresh rate, the first application can switch the first frame rate to the second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate.

[0468] For example, the first screen refresh rate may be 120 Hz, and the first frame rate may be 120 FPS.

[0469] The second screen refresh rate may be 60 Hz, and the second frame rate may be 60 FPS.

[0470] In other embodiments, the refresh rate decision module decides to switch from a low screen refresh rate to a high screen refresh rate, and the refresh rate decision module can send the second screen refresh rate to the first application. In response to the second screen refresh rate, the first application can switch the first frame rate to the second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate. In other embodiments, the refresh rate decision module decides to switch from a low screen refresh rate to a high screen refresh rate, and the application may not adjust the frame rate of the application, which is not limited in this application.

[0471] For another example, the first screen refresh rate may be 60 Hz, and the first frame rate may be 60 FPS.

[0472] The second screen refresh rate may be 120 Hz, and the second frame rate may be 120 FPS.

[0473] S1310: The first application determines a picture frame at a second frame rate and renders the picture frame, wherein a frame spacing between two adjacent picture frames is a second value, and the second value is equal to a reciprocal of the second frame rate.

[0474] After the refresh rate decision module decides to adjust the screen refresh rate, the first application adjusts the frame rate of the application accordingly, for example, to the second frame rate. The first application can determine the image data contained in the picture frame based on the second frame rate, and render the picture frame, and the frame spacing between two adjacent picture frames is the second value, and the second value is equal to the inverse of the second frame rate.

[0475] Exemplarily, the second frame rate may be 120 FPS, and the second value of the frame interval between two adjacent frames may be 8.3 ms.

[0476] For example, the frame rate determined at 120 FPS can be Fig.10 The embodiment shows picture frame E, picture frame F, and picture frame G.

[0477] Exemplarily, the second frame rate may also be 60 FPS, and the second value of the frame interval between two adjacent frames may be 16.6 ms.

[0478] For another example, the frame rate determined at 120 FPS can be Figure 7 The embodiment shows picture frame E and picture frame F.

[0479] S1311. The first application stores the picture frames rendered at the second frame rate in a layer buffer.

[0480] S1312. The layer compositor (SurfaceFlinger) obtains the picture frame from the layer buffer (buffer).

[0481] Exemplarily, the buffer storing the picture frame may include a front buffer and a back buffer. The first application stores the picture frame rendered at the second frame rate in the front buffer of the picture frame, and the layer compositor (SurfaceFlinger) may obtain the picture frame rendered at the second frame rate from the front buffer of the picture frame and store it in the back buffer of the picture frame.

[0482] S1313: The layer compositor (SurfaceFlinger) needs to determine whether there is a picture frame determined at the first frame rate in the buffer.

[0483] Before SurfaceFlinger sends a message to switch the screen refresh rate to HWC, HWC still periodically obtains the picture frame from the layer buffer at the first screen refresh rate and sends it to the screen of the electronic device 100 for display.

[0484] After HWC receives the screen refresh rate switching message sent by SurfaceFlinger, HWC periodically obtains the picture frame from the layer buffer based on the switched screen refresh rate and sends it to the screen of the electronic device 100 for display.

[0485] SurfaceFlinger needs to determine whether there is a picture frame determined at the first frame rate in the buffer.

[0486] When it is determined that the picture frames determined at the first frame rate exist in the buffer, S1314-S1315 are executed.

[0487] When it is determined that the picture frame determined at the first frame rate does not exist in the buffer, S1316-S1317 are executed.

[0488] S1314. The layer compositor (SurfaceFlinger) sends the first screen refresh rate and picture frame to the HWC.

[0489] S1315. The HWC displays the picture frames determined by the first frame rate at the first screen refresh rate.

[0490] When SurfaceFlinger determines that there are still screen frames determined by the first frame rate in the buffer, SurfaceFlinger does not switch the screen refresh rate, but still sends the first screen refresh rate and screen frames to HWC. HWC still displays the screen frames determined by the first frame rate at the first screen refresh rate, so as to avoid the situation where the frame rate of the screen frame does not match the screen refresh rate, resulting in unsmooth frame switching.

[0491] Optionally, the first screen refresh rate and the picture frame can be sent to the HWC together, or the first screen refresh rate and the picture frame can be sent to the HWC in time-sharing, which is not limited in this application.

[0492] S1316. The layer compositor (SurfaceFlinger) sends the second screen refresh rate and picture frame to the HWC.

[0493] S1317. HWC displays the picture frames determined by the second frame rate at the second screen refresh rate. The display duration of the picture frames determined by the second frame rate is the second duration, and the second duration is equal to the reciprocal of the second screen refresh rate.

[0494] When SurfaceFlinger determines that there are no screen frames determined by the first frame rate in the buffer, that is, the buffer is full of screen frames determined by the second frame rate, SurfaceFlinger needs to switch the screen refresh rate. SurfaceFlinger needs to send the second screen refresh rate and screen frames to HWC, and HWC displays the screen frames determined by the second frame rate at the second screen refresh rate, so that the frame rate of the screen frames matches the screen refresh rate to ensure smooth frame switching.

[0495] Optionally, the second screen refresh rate and the picture frame can be sent to the HWC together, or the second screen refresh rate and the picture frame can be sent to the HWC in time-sharing, which is not limited in this application.

[0496] In some embodiments, the second screen refresh rate is less than the first screen refresh rate, and the second duration is greater than the first duration.

[0497] In other embodiments, the second screen refresh rate is greater than the first screen refresh rate, and the second duration is less than the first duration.

[0498] By this method, before switching the screen refresh rate, the electronic device 100 will determine whether there is a frame rate of the picture frame that does not match the switched screen refresh rate. If there is, after the picture frame that does not match the switched screen refresh rate is displayed, the screen refresh rate is switched to avoid the situation where the frame switching is not smooth when switching the screen refresh rate.

[0499] Fig.14 A flowchart of another method for controlling screen refresh rate provided in this application.

[0500] S1401. Determine a first screen refresh rate of the electronic device.

[0501] S1402, determining a first picture frame according to a first frame rate, and sending the first picture frame for display at a first screen refresh rate through a synthesizer, where the first frame rate is equal to the first screen refresh rate.

[0502] For example, the first screen refresh rate may be 120 Hz, and the first frame rate may be 120 Hz. Then the first picture frame may be Figure 7 or Figure 8 or Fig.9A The picture frame A or the picture frame B or the picture frame C or the picture frame D shown in the figure.

[0503] For example, the first screen refresh rate may be 60 Hz, and the first frame rate may be 60 Hz. Then the first picture frame may be Fig.10 or Fig.11 or Fig.12The picture frame A or the picture frame B or the picture frame C or the picture frame D shown in the figure.

[0504] Wherein, determining the first picture frame according to the first frame rate may be determining the image data contained in the first picture frame according to the first frame rate. The frame rate is used to determine the image data contained in the picture frame, and the determination of the image data contained in the picture frame based on the frame rate may be performed by an electronic device or by an application in the electronic device. When the playback speed of the picture frame is fixed, the larger the frame rate, the smaller the difference in the image data contained between two adjacent picture frames, and the smoother the picture frame playback. The smaller the frame rate, the larger the difference in the image data contained between two adjacent picture frames.

[0505] S1403: After the first condition is met, determine a second screen refresh rate of the electronic device, where the second screen refresh rate is different from the first screen refresh rate.

[0506] The screen refresh rate is used to indicate the number of times the display screen on the electronic device refreshes the display frame within a fixed time. The higher the screen refresh rate, the smoother the electronic device plays the picture frame. The step of determining the screen refresh rate of the electronic device can be determined by the electronic device. The electronic device can automatically determine the second screen refresh rate, and the electronic device can also receive a user operation to determine the second screen refresh rate.

[0507] S1404, obtaining cached picture frames, wherein the cached picture frames include a first cached picture frame and a second cached picture frame, the first cached picture frame is determined by a first frame rate, the second cached picture frame is determined by a second frame rate, the second frame rate is equal to a second screen refresh rate, and the display progress of the first cached picture frame is before the second cached picture frame.

[0508] Optionally, the cached picture frame is not limited to the first cached picture frame and the second cached picture frame, and the number of cached picture frames is related to the number of layer buffers in the electronic device. The more buffers there are, the more cached picture frames there are, and the fewer buffers there are, the fewer cached picture frames there are.

[0509] For example, the second screen refresh rate may be 60 Hz, and the second frame rate may be 60 Hz. The first cached picture frame may be Figure 7 or Figure 8 or Fig.9A The second cached picture frame may be Figure 7 or Figure 8 or Fig.9A Picture frame E is shown in .

[0510] For example, the second screen refresh rate may be 120 Hz, and the second frame rate may be 120 Hz. The first cached picture frame may be Fig.10 or Fig.11 or Fig.12 The second cached picture frame may be Fig.10 or Fig.11 or Fig.12 Picture frame E is shown in .

[0511] S1405: Send the synthesized first cached picture frame for display at the first screen refresh rate through a synthesizer, and send the synthesized second cached picture frame for display at the second screen refresh rate through a synthesizer.

[0512] In some embodiments, the compositor may be a layer compositor (SurfaceFlinger).

[0513] Through this method, after the electronic device decides to switch the screen refresh rate, the electronic device will not switch the screen refresh rate immediately. However, the electronic device will immediately switch the frame rate and determine the image data contained in the picture frame at the frame rate after the switch. When the electronic device sends the picture frame for display, it will determine whether the frame rate of the picture frame matches the screen refresh rate after the switch. If it matches, the electronic device will display the picture frame at the screen refresh rate after the switch. If it does not match, the electronic device will still display the picture frame at the screen refresh rate before the switch. In this way, the frame rate of the picture frame can be matched with the screen refresh rate of the electronic device, ensuring a smooth transition of frame switching.

[0514] In a possible implementation manner, determining the first picture frame according to the first screen refresh rate specifically includes: determining a first frame rate according to the first screen refresh rate; and determining the first picture frame according to the first frame rate.

[0515] Among them, the frame rate is determined by the screen refresh rate. The value of the frame rate is equal to the value of the screen refresh rate. For example, when the screen refresh rate is the first screen refresh rate, the frame rate is equal to the first frame rate, and the value of the first frame rate is equal to the value of the first screen refresh rate. When the screen refresh rate is the second screen refresh rate, the frame rate is equal to the second frame rate, and the value of the second frame rate is equal to the value of the second screen refresh rate. After the screen refresh rate of the electronic device changes, the frame rate will also change immediately, and the image data contained in the picture frame is determined at the switched frame rate.

[0516] In combination with the first aspect, in a possible implementation, the method also includes: in response to the first vysnc signal, determining a second cached screen frame at a second frame rate and rendering the second cached screen frame; in response to the second vysnc signal, determining a second screen frame at the second frame rate and rendering the second screen frame, wherein the display progress of the second screen frame is after the second cached screen frame; wherein the time difference between the second vysnc signal and the first vysnc signal is the inverse of the first screen refresh rate.

[0517] In the present application, the electronic device acquires and generates the current picture frame with the vysnc signal, and triggers the synthesizer to send the picture frame to the hardware layer for rendering. When receiving the first vsync signal, the electronic device determines the second cached picture frame at the second frame rate, and synthesizes the rendered third cached picture frame through the synthesizer. When receiving the second vsync signal, the electronic device determines the second picture frame at the second frame rate, and synthesizes the rendered second cached picture frame through the synthesizer.

[0518] The first vsync signal may be the first vsync signal after the electronic device decides to switch the screen refresh rate. Since the frame rate has been switched to the second frame rate at this time, when the first vsync signal is received, the image data included in the second cached picture frame is determined at the second frame rate.

[0519] The second vsync signal may be the second vsync signal after the electronic device decides to switch the screen refresh rate. Since the third cached picture frame cached by the electronic device is still determined at the first frame rate, the electronic device does not switch the screen refresh rate first, but still sends the display picture frame at the first screen refresh rate. The time difference between the second vysnc signal and the first vysnc signal is the reciprocal of the first screen refresh rate. This can avoid the occurrence of freezes or jumps when the electronic device displays the third cached picture frame.

[0520] For example, the second screen refresh rate may be 60 Hz, and the second frame rate may be 60 Hz. The third cached picture frame may be Figure 7 or Figure 8 or Fig.9A Picture frame D is shown in .

[0521] The second picture frame may be Figure 7 or Figure 8 or Fig.9A Picture frame F is shown in .

[0522] The first VYSNC signal can be Fig.9A The second VYSNC signal can be Fig.9A VSYNC5 is shown in FIG.

[0523] For example, the second screen refresh rate may be 120 Hz, and the second frame rate may be 120 Hz. The third cached picture frame may be Fig.10 or Fig.11 or Fig.12 Picture frame D is shown in .

[0524] The second picture frame may be Fig.10 or Fig.11 or Fig.12 Picture frame F is shown in .

[0525] The first VYSNC signal can be Fig.12 The second VYSNC signal can be Fig.12 VSYNC5 is shown in FIG.

[0526] In a possible implementation, in a possible implementation, the cached picture frame also includes a third cached picture frame, the third cached picture frame is determined by the first frame rate, the display progress of the third cached picture frame is before the second cached picture frame, and the display progress of the third cached picture frame is after the first cached picture frame; the electronic device also includes a hardware synthesizer; the method also includes: in response to the first vysnc signal, synthesizing the rendered third cached picture frame through the synthesizer, and refreshing and displaying the first cached picture frame on the display screen through the hardware synthesizer; in response to the second vysnc signal, refreshing and displaying the third cached picture frame on the display screen through the hardware synthesizer.

[0527] In the present application, when the electronic device receives the VYSNC signal, in addition to determining the output frame based on the frame rate, it also needs to send the display frame. When the first VYSNC signal is received, the first cached frame is refreshed and displayed on the display screen through the HWC. When the second VYSNC signal is received, the third cached frame is refreshed and displayed on the display screen through the HWC.

[0528] The time difference between the second VYSNC signal and the first VYSNC signal is the inverse of the first screen refresh rate. The third cached picture frame is also determined based on the first frame rate, and the frame rate of the third cached picture frame matches the screen refresh rate when the third cached picture frame is displayed. When the electronic device decides to switch the screen refresh rate, the electronic device does not switch the screen refresh rate immediately, thereby avoiding the occurrence of freezes or jumps when the electronic device displays the third cached picture frame, and improving the display effect of the picture frame when switching the screen refresh rate.

[0529] In a possible implementation manner, the method further includes: in response to a second vysnc signal, synthesizing a rendered second cached picture frame by a synthesizer.

[0530] In some embodiments, if the electronic device includes multiple front buffers, the multiple front buffers only store the rendered second cached picture frame and no other rendered picture frames are stored, or the electronic device has only one front buffer and the one front buffer stores the rendered second cached picture frame. Then, in response to the second vysnc signal, the synthesizer can synthesize the rendered second cached picture frame.

[0531] Exemplarily, the third cached picture frame may be Fig.9A or Fig. 9B or Fig.12 Picture frame D is shown.

[0532] The first cached picture frame may be Fig.9A or Fig. 9B or Fig.12 Picture frame C is shown.

[0533] The second cached picture frame may be Fig.9A or Fig. 9B or Fig.12 Picture frame E is shown.

[0534] In some embodiments, if the electronic device includes multiple front buffers, the multiple front buffers store not only the rendered second cached picture frames, but also other rendered picture frames. Then, in response to the second vysnc signal, the synthesizer needs to synthesize the other rendered picture frames, and in response to other vysnc signals after the second vysnc signal, synthesize the rendered second cached picture frames.

[0535] Exemplarily, the third cached picture frame may be Fig. 9C Picture frame C is shown.

[0536] The first cached picture frame may be Fig. 9C Picture frame B is shown.

[0537] The second cached picture frame may be Fig. 9C The picture frame E shown. In response to the SAN vysnc signal, the synthesizer synthesizes the rendered second buffered picture frame.

[0538] In a possible implementation, the method further includes: in response to a third VYSNC signal, synthesizing a rendered second picture frame through a synthesizer, and refreshing and displaying a second cached picture frame on a display screen through a hardware synthesizer; in response to a fourth VYSNC signal, determining a third picture frame at a second frame rate, and rendering the third picture frame; wherein the time difference between the third VYSNC signal and the fourth VYSNC signal is the inverse of the second screen refresh rate.

[0539] When the electronic device receives the third VYSNC signal, before the electronic device sends the second cached picture frame for display, the electronic device determines that the second cached picture frame is determined at the second frame rate. At this time, the electronic device can determine that the electronic device does not cache the picture frame determined at the first frame rate. Then the electronic device can switch the screen refresh rate to the third screen refresh rate. And send the second cached picture frame determined at the second frame rate at the third screen refresh rate, so that the frame rate of the second cached picture frame matches the screen refresh rate when the second cached picture frame is displayed, and the display duration of the second cached picture frame is the time difference between the third VYSNC signal and the fourth VYSNC signal. It avoids the occurrence of freezes or jumps when the electronic device displays the second cached picture frame, and improves the display effect of the picture frame when switching the screen refresh rate.

[0540] For example, the second screen refresh rate may be 120 Hz, and the second frame rate may be 120 Hz. The third vysnc signal may be Fig.9A VSYNC6 is shown in FIG.

[0541] For example, the second screen refresh rate may be 60 Hz, and the second frame rate may be 60 Hz. The third vysnc signal may be Fig.12 VSYNC6 is shown in FIG.

[0542] Exemplarily, the third VYSNC signal may be Fig.9A or Fig. 9B or Fig. 9C VSYNC6 is shown in FIG.

[0543] Exemplarily, the fourth VYSNC signal may be Fig.9A or Fig. 9B or Fig. 9C VSYNC7 is shown.

[0544] In a possible implementation manner, the first vysnc signal and the second vysnc signal are received after determining a second screen refresh rate of the electronic device.

[0545] In combination with the first aspect, in a possible implementation manner, the second vysnc signal and the third vysnc signal are adjacent vysnc signals or the second vysnc signal and the third vysnc signal are non-adjacent vysnc signals.

[0546] In this way, when receiving the first vysnc signal, the electronic device changes the frame rate from the first frame rate to the second frame rate, determines the image data included in the second cache picture frame based on the second frame rate, and renders the second cache picture frame.

[0547] When receiving the second vysnc signal, the electronic device determines the image data included in the second picture frame based on the second frame rate, and renders the second picture frame.

[0548] In a possible implementation, determining the second cached picture frame at the second frame rate specifically includes: determining the image data included in the second cached picture frame according to the second frame rate, the image data included in the first cached picture frame, and the playback speed of the picture frame.

[0549] In some embodiments, in a long page sliding scenario, the playback speed of the picture frames may be related to the speed at which the user slides the long page.

[0550] In other embodiments, such as a video playback scenario, the playback speed of the picture frame may be the playback speed of the video. In combination with the first aspect, in a possible implementation, determining the second cache picture frame at the second frame rate specifically includes: determining the progress of the second cache picture frame according to the second frame rate, the progress of the third cache picture frame, and the playback speed of the picture frame; and determining the image data included in the second cache picture frame based on the progress of the second cache picture frame.

[0551] In this way, the electronic device can determine the progress of the current image frame (or the image data contained in the current image frame) based on the progress of the previous image frame (or the image data contained in the previous image frame), the second frame rate and the playback speed of the image frame.

[0552] In a possible implementation, in response to a second vysnc signal, determining a second picture frame at a second frame rate and rendering the second picture frame specifically includes: in response to the second vysnc signal, when the progress of the second cached picture frame is less than or equal to the progress of the second vysnc signal, determining the second picture frame at the second frame rate and rendering the second picture frame.

[0553] In combination with the first aspect, in a possible implementation manner, the method further includes: in response to the second vysnc signal, when the progress of the second cached picture frame is greater than the progress of the second vysnc signal, not rendering the second picture frame.

[0554] During the switching of the screen refresh rate, the electronic device needs to determine whether the progress of the previous frame is greater than the progress of the current vysnc signal. If the progress of the previous frame is greater than the progress of the current vysnc signal, the electronic device needs to suspend rendering the frame within a vysnc cycle to avoid the situation where the frame is over-rendered and causes the frame to pile up.

[0555] When the progress of the previous frame is less than or equal to the progress of the current vysnc signal, there will be no accumulation of frames due to over-rendering, and the electronic device can render the frames normally without pausing the rendering of the frames.

[0556] When the progress of the previous frame is greater than or equal to the progress of the current vysnc signal, the frame will be over-rendered and piled up, and the electronic device needs to suspend rendering the frame.

[0557] For example, when switching from a high screen refresh rate to a low screen refresh rate, when receiving the first VYSNC signal, the electronic device determines the second cached screen frame at a second frame rate. When receiving the second VYSNC signal, the electronic device needs to determine the relationship between the progress of the second cached screen frame and the progress of the second VYSNC signal. Since the electronic device has switched to a low frame rate at this time, and the screen refresh rate has not changed, the progress of the second cached screen frame will be greater than the progress of the second VYSNC signal. Then, when the electronic device receives the second VYSNC signal, the electronic device first pauses the second screen frame, and the second screen frame can be the next screen frame adjacent to the second cached screen frame. However, when receiving the second VYSNC signal, the electronic device can still synthesize the rendered second cached screen frame through a synthesizer. In this way, the situation where the screen frame is piled up due to excessive rendering of the screen frame can be avoided.

[0558] For details, please refer to Fig. 9B and Fig. 9C Description in the Examples.

[0559] In a possible implementation manner, the method further includes: in response to a third vysnc signal, determining a second picture frame at a second frame rate, and rendering the second picture frame.

[0560] In a vysnc signal cycle, the electronic device pauses rendering the picture frame, and then when the next vysnc signal arrives, the electronic device can start rendering the picture frame.

[0561] Optionally, when receiving the third VYSNC signal, the electronic device may compare the progress of the second cached picture frame with the progress of the third VYSNC signal. When the progress of the second cached picture frame is greater than the progress of the third VYSNC signal, the electronic device may not render the second picture frame. When the progress of the second cached picture frame is less than the progress of the third VYSNC signal, the electronic device may render the second picture frame.

[0562] Optionally, in other embodiments, when receiving the second VYSNC signal, the electronic device may determine the second picture frame at the second frame rate, but does not render the second picture frame. When receiving the third VYSNC signal, the electronic device may no longer determine the second picture frame at the second frame rate, but directly render the second picture frame.

[0563] Exemplarily, the second picture frame may be Fig. 9B or Fig. 9C Picture frame F is shown.

[0564] In some embodiments, when the third vysnc signal is received, whether SurfaceFlinger synthesizes the picture frame depends on whether there is a rendered picture frame cached in the buffer of the electronic device. If there is a rendered third picture frame in the buffer, when the first vysnc signal is received, the second cached picture frame can be determined and rendered. When the second vysnc signal is received, SurfaceFlinger can synthesize the third picture frame. When the third vysnc signal is received, the hardware synthesizer can send the third picture frame to the display screen, and SurfaceFlinger can synthesize the second cached picture frame. Then when the fourth vysnc signal is received, SurfaceFlinger can synthesize the second picture frame, and the hardware synthesizer can send the second cached picture frame to the display screen. When the fifth vysnc signal is received, the hardware synthesizer can send the second picture frame to the display screen.

[0565] Optionally, the third picture frame may be the first cached picture frame or the second cached picture frame or the third cached picture frame or more previous picture frames that fail to be synthesized, resulting in being cached in the buffer when the third vysnc signal is received.

[0566] Exemplarily, the second cached picture frame may be Fig. 9C The picture frame E shown in FIG. 1 , the third picture frame may be Fig. 9C The picture frame D shown in FIG. 1 , the second picture frame may be Fig. 9C Picture frame F is shown in .

[0567] Exemplarily, the second vysnc signal may be Fig. 9C The VSYNC5 shown in the figure, the third VYSNC signal can be Fig. 9C The fourth VYSNC signal shown in VSYNC6 can be Fig. 9C The fifth VYSNC signal shown in VSYNC7 can be Fig. 9C VSYNC8 is shown in Figure 8.

[0568] 5. VYSNC signal can be Fig. 9C VSYNC8 shown.

[0569] For details, please refer to Fig. 9C Description in the Examples.

[0570] In some embodiments, when the third vysnc signal is received, the rendered third frame does not exist in the buffer, and when the third vysnc signal is received, SurfaceFlinger cannot synthesize the frame. Then, when the fourth vysnc signal is received, the hardware synthesizer cannot refresh the frame to be displayed, and the hardware synthesizer needs to display the second cached frame within two vysnc cycles. When the fifth vysnc signal is received, the hardware synthesizer can send the second frame to the display.

[0571] Exemplarily, the second cached picture frame may be Fig. 9B The picture frame E shown in FIG. 1 , the second picture frame may be Fig. 9B Picture frame F is shown in .

[0572] Exemplarily, the second vysnc signal may be Fig. 9B The VSYNC5 shown in the figure, the third VYSNC signal can be Fig. 9B The fourth VYSNC signal shown in VSYNC6 can be Fig. 9B The fifth VYSNC signal shown in VSYNC7 can be Fig. 9B VSYNC8 is shown in Figure 8.

[0573] For details, please refer to Fig. 9B Description in the Examples.

[0574] In a possible implementation, the second screen refresh rate is greater than the first screen refresh rate, and the second frame rate is greater than the first frame rate.

[0575] In one possible implementation, the first condition includes any one or more of the following: the temperature of the electronic device is lower than a preset temperature, the power of the electronic device is higher than a preset power, the CPU occupancy rate of the electronic device's central processing unit is lower than a specified occupancy rate, the user's page sliding speed is greater than a preset speed, and the picture frame is a picture frame in a game scene.

[0576] In a possible implementation, the second screen refresh rate is lower than the first screen refresh rate, and the second frame rate is lower than the first frame rate.

[0577] In one possible implementation, the first condition includes any one or more of the following: the temperature of the electronic device is higher than a preset temperature, the power of the electronic device is lower than a preset power, the CPU occupancy rate of the electronic device's central processing unit is greater than a specified occupancy rate, the user's page sliding speed is lower than a preset speed, and the picture frame is a picture frame in a game loading scene.

[0578] Fig.15 A schematic diagram of a device provided in this application.

[0579] like Fig.15 As shown, the device includes a synthesizer 1501, a screen refresh rate decision module 1502 and a processing module 1503.

[0580] The screen refresh rate decision module 1502 is used to determine a first screen refresh rate of the electronic device.

[0581] The processing module 1503 is used to determine a first picture frame according to a first frame rate.

[0582] The synthesizer 1501 is used to display the synthesized first picture frame at a first screen refresh rate, and the first frame rate is equal to the first screen refresh rate.

[0583] The screen refresh rate decision module 1502 is further used to determine a second screen refresh rate of the electronic device after the first condition is met, where the second screen refresh rate is different from the first screen refresh rate.

[0584] The synthesizer 1501 is further used to obtain a cached picture frame, wherein the cached picture frame includes a first cached picture frame and a second cached picture frame, the first cached picture frame is determined at a first frame rate, the second cached picture frame is determined at a second frame rate, the second frame rate is equal to a second screen refresh rate, and the display progress of the first cached picture frame is before the second cached picture frame;

[0585] The synthesizer 1501 is also used to display the synthesized first cached picture frame at the first screen refresh rate.

[0586] The synthesizer 1501 is also used to display the synthesized second cache picture frame at the second screen refresh rate.

[0587] In some embodiments, compositor 1501 may be referred to as SurfaceFlinger.

[0588] In a possible implementation, the processing module 1503 is specifically configured to: determine a first frame rate according to a first screen refresh rate, and determine a first picture frame according to the first frame rate.

[0589] In a possible implementation, the processing module 1503 is further configured to determine a second cached picture frame at a second frame rate in response to the first vysnc signal, and render the second cached picture frame.

[0590] The processing module 1503 is further configured to determine a second picture frame at a second frame rate and render the second picture frame in response to a second vysnc signal, wherein the display progress of the second picture frame is after the second cached picture frame.

[0591] The time difference between the second vysnc signal and the first vysnc signal is the reciprocal of the first screen refresh rate.

[0592] In a possible implementation, the cached picture frame further includes a third cached picture frame, the third cached picture frame is determined at the first frame rate, the display progress of the third cached picture frame is before the second cached picture frame, and the display progress of the third cached picture frame is after the first cached picture frame; the electronic device further includes a hardware synthesizer 1504. The method further includes:

[0593] The synthesizer 1501 is further configured to synthesize the rendered third cached picture frame in response to the first vysnc signal.

[0594] The hardware synthesizer 1504 is used to refresh and display the first cached picture frame on the display screen in response to the first vysnc signal.

[0595] The hardware synthesizer 1504 is further configured to refresh and display the third cached picture frame on the display screen in response to the second vysnc signal.

[0596] In some embodiments, hardware synthesizer 1504 may be referred to as an HWC.

[0597] In a possible implementation, the synthesizer 1501 is further configured to synthesize a rendered second cached picture frame in response to a second vysnc signal.

[0598] In a possible implementation, the synthesizer 1501 is further configured to synthesize the rendered second picture frame in response to a third vysnc signal.

[0599] The hardware synthesizer 1504 is further configured to refresh and display the second cached picture frame on the display screen in response to a third vysnc signal.

[0600] The processing module 1503 is further configured to determine a third picture frame at a second frame rate in response to a fourth vysnc signal, and render the third picture frame.

[0601] The time difference between the third vysnc signal and the fourth vysnc signal is the reciprocal of the second screen refresh rate.

[0602] In a possible implementation manner, the first vysnc signal and the second vysnc signal are received after determining a second screen refresh rate of the electronic device.

[0603] In a possible implementation manner, the second vysnc signal and the third vysnc signal are adjacent vysnc signals or the second vysnc signal and the third vysnc signal are non-adjacent vysnc signals.

[0604] In one possible implementation, the processing module 1503 is specifically used to determine the progress of the second cached picture frame according to the second frame rate, the progress of the third cached picture frame and the playback speed of the picture frame; and determine the image data included in the second cached picture frame based on the progress of the second cached picture frame.

[0605] In a possible implementation, the processing module 1503 is specifically configured to respond to the second vysnc signal and, when the progress of the second cached picture frame is less than or equal to the progress of the second vysnc signal, determine the second picture frame at the second frame rate and render the second picture frame.

[0606] In a possible implementation, the processing module 1503 is further configured to respond to the second vysnc signal and not render the second picture frame when the progress of the second cached picture frame is greater than the progress of the second vysnc signal.

[0607] In a possible implementation, the processing module 1503 is further configured to determine a second picture frame at a second frame rate and render the second picture frame in response to a third vysnc signal.

[0608] In a possible implementation, the second screen refresh rate is greater than the first screen refresh rate, and the second frame rate is greater than the first frame rate.

[0609] In one possible implementation, the first condition includes any one or more of the following: the temperature of the electronic device is lower than a preset temperature, the power of the electronic device is higher than a preset power, the CPU occupancy rate of the electronic device's central processing unit is lower than a specified occupancy rate, the user's page sliding speed is greater than a preset speed, and the picture frame is a picture frame in a game scene.

[0610] In a possible implementation, the second screen refresh rate is lower than the first screen refresh rate, and the second frame rate is lower than the first frame rate.

[0611] In one possible implementation, the first condition includes any one or more of the following: the temperature of the electronic device is higher than a preset temperature, the power of the electronic device is lower than a preset power, the CPU occupancy rate of the electronic device's central processing unit is greater than a specified occupancy rate, the user's page sliding speed is lower than a preset speed, and the picture frame is a picture frame in a game loading scene.

[0612] The present application provides an electronic device, comprising: one or more processors and one or more memories; wherein the one or more memories are coupled to the one or more processors, the one or more memories are used to store computer program codes, the computer program codes include computer instructions, when the one or more processors execute the computer instructions, the electronic device executes Fig.14 A screen refresh rate control method is shown.

[0613] The present application provides a chip system, which is applied to electronic equipment. The chip system includes a processing circuit and an interface circuit. The interface circuit is used to receive instructions and transmit them to the processing circuit. The processing circuit is used to run the instructions to execute Fig.14 A screen refresh rate control method is shown.

[0614] The present application provides a computer-readable storage medium, including instructions, characterized in that when the instructions are executed on an electronic device, Fig.14 A screen refresh rate control method is shown.

[0615] The present application provides a computer program product, which, when executed on a computer, enables the computer to execute Fig.14 A screen refresh rate control method is shown.

[0616] The following introduces the hardware structure of an electronic device provided in an embodiment of the present application.

[0617] Fig.16 A schematic structural diagram of an electronic device 100 provided in an embodiment of the present application is shown.

[0618] It should be understood that Fig.16 The electronic device 100 shown is only an example, and the electronic device 100 may have more Fig.16 More or fewer components may be shown, two or more components may be combined, or there may be a different configuration of components. Fig.16 The various components shown in the EMBODIMENTS 2000 may be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application specific integrated circuits.

[0619] The electronic device 100 may include: a processor 110, an external memory interface 120, an internal memory 121, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. Among them, the sensor module 180 may include a gyroscope sensor 180B, an acceleration sensor 180E, and a touch sensor 180K, etc.

[0620] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0621] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0622] The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

[0623] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0624] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0625] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0626] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0627] The modem processor may include a modulator and a demodulator. Among them, the modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker 170A, a receiver 170B, etc.), or displays an image or video through a display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and be set in the same device as the mobile communication module 150 or other functional modules.

[0628] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0629] In some embodiments, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with the network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The GNSS may include a global positioning system (GPS), a global navigation satellite system (GLONASS), a Beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS) and / or a satellite based augmentation system (SBAS).

[0630] The electronic device 100 implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

[0631] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD). The display screen panel can also be made of an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), miniled, microled, micro-oled, a quantum dot light emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens 194, where N is a positive integer greater than 1.

[0632] The electronic device 100 can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.

[0633] The ISP is used to process the data fed back by the camera 193. For example, when taking a photo, the shutter is opened, and the light is transmitted to the camera photosensitive element through the lens. The light signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing and converts it into an image visible to the naked eye. The ISP can also perform algorithm optimization on the noise and brightness of the image. The ISP can also optimize the exposure, color temperature and other parameters of the shooting scene. In some embodiments, the ISP can be set in the camera 193.

[0634] The camera 193 is used to capture still images or videos. The object generates an optical image through the lens and projects it onto the photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, and then passes the electrical signal to the ISP to be converted into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard RGB, YUV or other format. In some embodiments, the electronic device 100 may include 1 or N cameras 193, where N is a positive integer greater than 1.

[0635] The digital signal processor is used to process digital signals, and can process not only digital image signals but also other digital signals. For example, when the electronic device 100 is selecting a frequency point, the digital signal processor is used to perform Fourier transform on the frequency point energy.

[0636] Video codecs are used to compress or decompress digital videos. The electronic device 100 may support one or more video codecs. Thus, the electronic device 100 may play or record videos in a variety of coding formats, such as Moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, etc.

[0637] NPU is a neural network (NN) computing processor. By drawing on the structure of biological neural networks, such as the transmission mode between neurons in the human brain, it can quickly process input information and can also continuously self-learn. Through NPU, applications such as intelligent cognition of electronic device 100 can be realized, such as image recognition, face recognition, voice recognition, text understanding, etc.

[0638] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function, such as storing music, video and other files in the external memory card.

[0639] The internal memory 121 can be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 121 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0640] The electronic device 100 can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0641] The audio module 170 is used to convert digital audio information into analog audio signal output, and is also used to convert analog audio input into digital audio signals. The audio module 170 can also be used to encode and decode audio signals. In some embodiments, the audio module 170 can be arranged in the processor 110, or some functional modules of the audio module 170 can be arranged in the processor 110.

[0642] The speaker 170A, also called a "speaker", is used to convert an audio electrical signal into a sound signal. The electronic device 100 can listen to music or listen to a hands-free call through the speaker 170A.

[0643] The receiver 170B, also called a "earpiece", is used to convert audio electrical signals into sound signals. When the electronic device 100 receives a call or voice message, the voice can be received by placing the receiver 170B close to the human ear.

[0644] Microphone 170C, also called "microphone" or "microphone", is used to convert sound signals into electrical signals. When making a call or sending a voice message, the user can speak by putting their mouth close to microphone 170C to input the sound signal into microphone 170C. The electronic device 100 can be provided with at least one microphone 170C. In other embodiments, the electronic device 100 can be provided with two microphones 170C, which can not only collect sound signals but also realize noise reduction function. In other embodiments, the electronic device 100 can also be provided with three, four or more microphones 170C to collect sound signals, reduce noise, identify the sound source, realize directional recording function, etc.

[0645] The earphone interface 170D is used to connect a wired earphone and can be a USB interface, or a 3.5 mm open mobile terminal platform (OMTP) standard interface, or a cellular telecommunications industry association of the USA (CTIA) standard interface.

[0646] The gyro sensor 180B can be used to determine the motion posture of the electronic device 100. In some embodiments, the angular velocity of the electronic device 100 around three axes (i.e., x, y, and z axes) can be determined by the gyro sensor 180B. The gyro sensor 180B can be used for anti-shake shooting. For example, when the shutter is pressed, the gyro sensor 180B detects the angle of the electronic device 100 shaking, calculates the distance that the lens module needs to compensate based on the angle, and allows the lens to offset the shaking of the electronic device 100 through reverse movement to achieve anti-shake. The gyro sensor 180B can also be used for navigation and somatosensory game scenes.

[0647] The acceleration sensor 180E can detect the magnitude of the acceleration of the electronic device 100 in all directions (generally three axes). When the electronic device 100 is stationary, the magnitude and direction of gravity can be detected. It can also be used to identify the posture of the electronic device and is applied to applications such as horizontal and vertical screen switching and pedometers.

[0648] The touch sensor 180K is also called a "touch panel". The touch sensor 180K can be set on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, also called a "touch screen". The touch sensor 180K is used to detect touch operations acting on or near it. The touch sensor can pass the detected touch operation to the application processor to determine the type of touch event. Visual output related to the touch operation can be provided through the display screen 194. In other embodiments, the touch sensor 180K can also be set on the surface of the electronic device 100, which is different from the position of the display screen 194.

[0649] The button 190 includes a power button, a volume button, etc. The button 190 may be a mechanical button. It may also be a touch button. The electronic device 100 may receive a button input and generate a key signal input related to the user settings and function control of the electronic device 100. The motor 191 may generate a vibration prompt. The SIM card interface 195 is used to connect a SIM card. The SIM card may be connected to or disconnected from the electronic device 100 by inserting the SIM card interface 195 or pulling the SIM card interface 195 out.

[0650] In the embodiment of the present application, the device type of the electronic device 100 can be a mobile phone, a tablet computer, a handheld computer, a desktop computer, a laptop computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), as well as smart home devices such as smart large screens and smart speakers, wearable devices such as smart bracelets, smart watches, and smart glasses, extended reality (extended reality, XR) devices such as augmented reality (AR), virtual reality (VR), and mixed reality (MR), vehicle-mounted devices or smart city devices, and the like.

[0651] The software system of the electronic device 100 may adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture. In the embodiment of the present invention, the Android system of the layered architecture is taken as an example to exemplify the software structure of the electronic device 100.

[0652] Fig.17 1 is a software structure block diagram of the electronic device 100 according to an embodiment of the present invention.

[0653] The layered architecture divides the software into several layers, each with clear roles and division of labor. The layers communicate with each other through software interfaces. In some embodiments, the Android system is divided into four layers, from top to bottom: the application layer, the application framework layer, the Android runtime and system library, and the kernel layer.

[0654] The application layer can include a series of application packages.

[0655] like Fig.17 As shown, the application package may include first application, camera, gallery, calendar, call, map, navigation, WLAN, Bluetooth, music, video, short message and other applications.

[0656] The first application may adjust the frame rate based on the screen refresh rate, where the frame rate is used to determine the image data included in the picture frame, and the frame rate is equal to the screen refresh rate.

[0657] The application framework layer provides an application programming interface (API) and a programming framework for the applications in the application layer. The application framework layer includes some predefined functions.

[0658] like Fig.17 As shown, the application framework layer may include a layer compositor (SurfaceFlinger), a screen refresh rate decision module, etc.

[0659] Among them, SurfaceFlinger is used to perform layer synthesis processing on the picture frames rendered by the GPU, generate an interface including the picture frames, and send the interface including the picture frames to the display screen for display.

[0660] The screen refresh rate decision module allows users to dynamically adjust the screen refresh rate of the electronic device. The screen refresh rate decision module can automatically determine the screen refresh rate, and the screen refresh rate decision module can also determine the screen refresh rate to be adjusted based on user operations.

[0661] The application framework layer may also include a window manager, content provider, view system, telephony manager, resource manager, notification manager, etc.

[0662] The window manager is used to manage window programs. The window manager can obtain the display screen size, determine whether there is a status bar, lock the screen, capture the screen, etc.

[0663] Content providers are used to store and retrieve data and make it accessible to applications. The data may include videos, images, audio, calls made and received, browsing history and bookmarks, phone books, etc.

[0664] The view system includes visual controls, such as controls for displaying text, controls for displaying images, etc. The view system can be used to build applications. A display interface can be composed of one or more views. For example, a display interface including a text notification icon can include a view for displaying text and a view for displaying images.

[0665] The phone manager is used to provide communication functions of the electronic device 100, such as management of call status (including connecting, hanging up, etc.).

[0666] The resource manager provides various resources for applications, such as localized strings, icons, images, layout files, video files, and so on.

[0667] The notification manager enables applications to display notification information in the status bar. It can be used to convey notification-type messages and can disappear automatically after a short stay without user interaction. For example, the notification manager is used to notify download completion, message reminders, etc. The notification manager can also be a notification that appears in the system top status bar in the form of a chart or scroll bar text, such as notifications of applications running in the background, or a notification that appears on the screen in the form of a dialog window. For example, a text message is displayed in the status bar, a prompt sound is emitted, an electronic device vibrates, an indicator light flashes, etc.

[0668] Android Runtime includes core libraries and virtual machines. Android runtime is responsible for scheduling and management of the Android system.

[0669] The core library consists of two parts: one part is the function that needs to be called by the Java language, and the other part is the Android core library.

[0670] The application layer and the application framework layer run in a virtual machine. The virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform functions such as object life cycle management, stack management, thread management, security and exception management, and garbage collection.

[0671] The system library may include multiple functional modules, such as surface manager, media library, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0672] The surface manager is used to manage the display subsystem and provide the fusion of 2D and 3D layers for multiple applications.

[0673] The kernel layer may include display drivers, sensor drivers, graphics processing unit drivers (GPU Drivers), etc. Among them, the GPU Driver is used to drive the GPU to perform upper layer operations (for example, operations of rendering picture frames configured by a graphics interface).

[0674] In the above embodiments, all or part of them may be implemented by software, hardware, firmware or any combination thereof.

[0675] When software is used for implementation, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from a website site, a computer, a server, or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server, or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrations. The available medium may be a magnetic medium, (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk), etc.

[0676] Those skilled in the art can understand that to implement all or part of the processes in the above-mentioned embodiments, the processes can be completed by computer programs to instruct related hardware, and the programs can be stored in computer-readable storage media. When the programs are executed, they can include the processes of the above-mentioned method embodiments. The aforementioned storage media include: ROM or random access memory RAM, magnetic disk or optical disk and other media that can store program codes.

[0677] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A screen refresh rate control method, characterized in that: The electronic device includes a synthesizer, and the method includes: Determining a first screen refresh rate of the electronic device; Determine a first picture frame according to the first frame rate, and send the synthesized first picture frame to be displayed at a first screen refresh rate through the synthesizer, wherein the first frame rate is equal to the first screen refresh rate; After the first condition is met, determining a second screen refresh rate of the electronic device, where the second screen refresh rate is different from the first screen refresh rate; Acquire a cached picture frame, wherein the cached picture frame includes a first cached picture frame and a second cached picture frame, the first cached picture frame is determined by the first frame rate, the second cached picture frame is determined by the second frame rate, the second frame rate is equal to the second screen refresh rate, and the display progress of the first cached picture frame is before the second cached picture frame; The synthesized first buffered picture frame is sent for display by the synthesizer at the first screen refresh rate. The synthesized second cache picture frame is sent for display at the second screen refresh rate through the synthesizer.

2. The method according to claim 1, characterized in that The determining the first picture frame according to the first screen refresh rate specifically includes: Determining a first frame rate according to the first screen refresh rate; The first picture frame is determined according to the first frame rate.

3. The method according to claim 1 or 2, characterized in that: The method further comprises: In response to the first vysnc signal, determining the second cache picture frame at the second frame rate, and rendering the second cache picture frame; In response to a second vysnc signal, determining a second picture frame at the second frame rate, and rendering the second picture frame, wherein the display progress of the second picture frame is after the second cached picture frame; The time difference between the second vysnc signal and the first vysnc signal is the reciprocal of the first screen refresh rate.

4. The method according to claim 3, characterized in that The cached picture frame further includes the third cached picture frame, the third cached picture frame is determined based on the first frame rate, the display progress of the third cached picture frame is before the second cached picture frame, and the display progress of the third cached picture frame is after the first cached picture frame; the electronic device further includes a hardware synthesizer; the method further includes: In response to the first vysnc signal, synthesizing the rendered third cached picture frame through the synthesizer, and refreshing and displaying the first cached picture frame on the display screen through the hardware synthesizer; In response to the second vysnc signal, the third cached picture frame is refreshed and displayed on the display screen through the hardware synthesizer.

5. The method according to claim 4, characterized in that The method further comprises: In response to the second vysnc signal, the second cached picture frame is synthesized and rendered by the synthesizer.

6. The method according to any one of claims 3 to 5, characterized in that: The method further comprises: In response to a third vysnc signal, synthesizing the rendered second picture frame through the synthesizer, and refreshing and displaying the second cached picture frame on the display screen through the hardware synthesizer; In response to a fourth vysnc signal, determining a third picture frame at the second frame rate, and rendering the third picture frame; The time difference between the third vysnc signal and the fourth vysnc signal is the reciprocal of the second screen refresh rate.

7. The method according to any one of claims 3 to 6, characterized in that: The first vysnc signal and the second vysnc signal are received after determining a second screen refresh rate of the electronic device.

8. The method according to claim 6, characterized in that The second vysnc signal and the third vysnc signal are adjacent vysnc signals or the second vysnc signal and the third vysnc signal are non-adjacent vysnc signals.

9. The method according to any one of claims 3 to 8, characterized in that: The determining the second cache picture frame at the second frame rate specifically includes: The image data included in the second cache picture frame is determined according to the second frame rate, the image data included in the third cache picture frame, and the playback speed of the picture frame.

10. The method according to any one of claims 3 to 8, characterized in that: The determining the second cache picture frame at the second frame rate specifically includes: Determining the progress of the second cached picture frames according to the second frame rate, the progress of the third cached picture frames, and the playback speed of the picture frames; The image data included in the second cache picture frame is determined based on the progress of the second cache picture frame.

11. The method according to claim 10, characterized in that The step of determining a second picture frame at the second frame rate in response to the second vysnc signal and rendering the second picture frame specifically includes: In response to the second vysnc signal, when the progress of the second cached picture frame is less than or equal to the progress of the second vysnc signal, the second picture frame is determined at the second frame rate and rendered.

12. The method according to claim 11, characterized in that The method further comprises: In response to the second vysnc signal, when the progress of the second cached picture frame is greater than the progress of the second vysnc signal, the second picture frame is not rendered.

13. The method according to claim 12, characterized in that The method further comprises: In response to the third vysnc signal, the second picture frame is determined at the second frame rate, and the second picture frame is rendered.

14. The method according to any one of claims 1 to 13, characterized in that: The second screen refresh rate is greater than the first screen refresh rate, and the second frame rate is greater than the first frame rate.

15. The method according to claim 14, characterized in that The first condition includes any one or more of the following: the temperature of the electronic device is lower than a preset temperature, the power of the electronic device is higher than a preset power, the CPU occupancy rate of the electronic device's central processing unit is lower than a specified occupancy rate, the user's page sliding speed is greater than a preset speed, and the picture frame is a picture frame in a game scene.

16. The method according to any one of claims 1 to 13, characterized in that: The second screen refresh rate is lower than the first screen refresh rate, and the second frame rate is lower than the first frame rate.

17. The method according to claim 16, characterized in that The first condition includes any one or more of the following: the temperature of the electronic device is higher than a preset temperature, the power of the electronic device is lower than a preset power, the CPU occupancy rate of the electronic device's central processing unit is greater than a specified occupancy rate, the user's page sliding speed is lower than a preset speed, and the screen frame is a screen frame in a game loading scene.

18. An electronic device, characterized in that: The device comprises a synthesizer, a determination module and a processing module, wherein: The determining module is used to determine a first screen refresh rate of the electronic device; The processing module is used to determine a first picture frame according to the first frame rate; The synthesizer is used to display the synthesized first picture frame at a first screen refresh rate, and the first frame rate is equal to the first screen refresh rate; The screen refresh rate decision module is further used to determine a second screen refresh rate of the electronic device after the first condition is met, where the second screen refresh rate is different from the first screen refresh rate; The synthesizer is further used for: Acquire a cached picture frame, wherein the cached picture frame includes a first cached picture frame and a second cached picture frame, the first cached picture frame is determined by the first frame rate, the second cached picture frame is determined by the second frame rate, the second frame rate is equal to the second screen refresh rate, and the display progress of the first cached picture frame is before the second cached picture frame; Displaying the synthesized first buffered picture frame at the first screen refresh rate; The synthesized second cache picture frame is sent for display at the second screen refresh rate.

19. The electronic device according to claim 18, characterized in that: The processing module is specifically used for: Determining a first frame rate according to the first screen refresh rate; The first picture frame is determined according to the first frame rate.

20. The electronic device according to claim 18 or 19, characterized in that: The processing module is further configured to determine the second cache picture frame at the second frame rate in response to the first vysnc signal, and render the second cache picture frame; The processing module is further used to determine a second picture frame at the second frame rate in response to a second vysnc signal, and render the second picture frame, wherein the display progress of the second picture frame is after the second cached picture frame; The time difference between the second vysnc signal and the first vysnc signal is the reciprocal of the first screen refresh rate.

21. The electronic device according to claim 20, characterized in that: The cached picture frame also includes the third cached picture frame, the third cached picture frame is determined by the first frame rate, the display progress of the third cached picture frame is before the second cached picture frame, and the display progress of the third cached picture frame is after the first cached picture frame; the electronic device also includes a hardware synthesizer; the method also includes: The synthesizer is further used to synthesize the rendered third cache picture frame in response to the first vysnc signal; The hardware synthesizer is used for refreshing and displaying the first cached picture frame on the display screen in response to the first vysnc signal; The hardware synthesizer is further used for refreshing and displaying the third cached picture frame on the display screen in response to the second vysnc signal.

22. The electronic device according to claim 21, characterized in that: The synthesizer is further used to synthesize the rendered second cache picture frame in response to the second vysnc signal.

23. The electronic device according to any one of claims 20 to 22, characterized in that: The synthesizer is further used to synthesize the rendered second picture frame in response to a third vysnc signal; The hardware synthesizer is further used for refreshing and displaying the second cached picture frame on the display screen in response to the third vysnc signal; The processing module is further used to determine a third picture frame at the second frame rate in response to a fourth vysnc signal, and render the third picture frame; The time difference between the third vysnc signal and the fourth vysnc signal is the reciprocal of the second screen refresh rate.

24. The electronic device according to any one of claims 20 to 23, characterized in that: The first vysnc signal and the second vysnc signal are received after determining a second screen refresh rate of the electronic device.

25. The electronic device according to claim 23, characterized in that: The second vysnc signal and the third vysnc signal are adjacent vysnc signals or the second vysnc signal and the third vysnc signal are non-adjacent vysnc signals.

26. The electronic device according to any one of claims 20 to 25, characterized in that: The processing module is specifically configured to determine the image data included in the second cache picture frame according to the second frame rate, the image data included in the third cache picture frame, and the playback speed of the picture frame.

27. The electronic device according to any one of claims 20 to 25, characterized in that: The processing module is specifically configured to determine the progress of the second cache picture frame according to the second frame rate, the progress of the third cache picture frame and the playback speed of the picture frame; The image data included in the second cache picture frame is determined based on the progress of the second cache picture frame.

28. The electronic device according to claim 27, characterized in that: The processing module is specifically configured to respond to the second vysnc signal, and when the progress of the second cached picture frame is less than or equal to the progress of the second vysnc signal, determine the second picture frame at the second frame rate and render the second picture frame.

29. The electronic device according to claim 28, characterized in that The processing module is further configured to respond to the second vysnc signal and not render the second picture frame when the progress of the second cache picture frame is greater than the progress of the second vysnc signal.

30. The electronic device according to claim 29, characterized in that The processing module is further configured to determine the second picture frame at the second frame rate and render the second picture frame in response to the third vysnc signal.

31. The electronic device according to any one of claims 18 to 30, characterized in that: The second screen refresh rate is greater than the first screen refresh rate, and the second frame rate is greater than the first frame rate.

32. The electronic device according to claim 31, characterized in that: The first condition includes any one or more of the following: the temperature of the electronic device is lower than a preset temperature, the power of the electronic device is higher than a preset power, the CPU occupancy rate of the electronic device's central processing unit is lower than a specified occupancy rate, the user's page sliding speed is greater than a preset speed, and the picture frame is a picture frame in a game scene.

33. The electronic device according to any one of claims 18 to 30, characterized in that: The second screen refresh rate is lower than the first screen refresh rate, and the second frame rate is lower than the first frame rate.

34. The electronic device according to claim 33, characterized in that: The first condition includes any one or more of the following: the temperature of the electronic device is higher than a preset temperature, the power of the electronic device is lower than a preset power, the CPU occupancy rate of the electronic device's central processing unit is greater than a specified occupancy rate, the user's page sliding speed is lower than a preset speed, and the screen frame is a screen frame in a game loading scene.

35. An electronic device, characterized in that: It comprises one or more processors and one or more memories; wherein, the one or more memories are coupled to the one or more processors, and the one or more memories are used to store computer program codes, and the computer program codes include computer instructions, and when the one or more processors execute the computer instructions, the electronic device executes the method as described in any one of claims 1-17.

36. A chip system, characterized in that: The chip system is applied to an electronic device, and the chip system includes a processing circuit and an interface circuit, the interface circuit is used to receive instructions and transmit them to the processing circuit, and the processing circuit is used to run the instructions to execute the method as described in any one of claims 1-17.

37. A computer-readable storage medium, characterized in that: The method comprises instructions, which, when executed on an electronic device, cause the electronic device to execute the method as claimed in any one of claims 1 to 17.

Citation Information

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