A data processing device, method, medium and computing equipment

Abstract

The present application discloses a data processing device, method, medium and computing equipment, and relates to the field of data processing. The device includes: a first state machine, a second state machine, a third state machine, a fourth state machine and a multiplier-adder; the first state machine is used to determine the storage address and cumulative vector address of each data sample contained in the data packet to be reduced in dimension in the memory module and send multiple read requests to the memory module; the second state machine is used to receive the original vector data returned by each read request and send it to the multiplier-adder; the third state machine is used to receive the cumulative vector data returned by each read request and send it to the multiplier-adder; the multiplier-adder is used to accumulate the original vector data and the cumulative vector data in the same read request, and send the accumulated result to the fourth state machine; the fourth state machine is used to update the accumulated result to the memory module. The four state machines and the multiplier-adder of the present application work in parallel, which improves the data throughput and data processing speed.

Description

Technical Field

[0001] The present application relates to the field of data processing in computers, and in particular to a data processing apparatus, method, medium and computing device. Background Art

[0002] In the prior art, in the forward neural network training, when there are duplicate data in the training data, unnecessary computing power will be wasted. If there are too many duplicate data, it will cause overfitting. Therefore, the training samples are often deduplicated, and then the deduplicated data is sparsely reduced to facilitate the next step of training. However, the deduplicated data is often discontinuous in the memory module. For example, the duplicate data in the original continuous data are all removed, and the remaining deduplicated data is discontinuous in the memory module.

[0003] After the training data is deduplicated, deduplicated data is obtained. The deduplicated data is not continuous in the memory module. Therefore, the prior art is prone to errors when performing sparse dimensionality reduction on the deduplicated data. Summary of the invention

[0004] The main purpose of this application is to propose a data processing device, method, medium and computing equipment, aiming to solve the problem that the prior art is prone to errors when performing sparse dimensionality reduction on deduplicated data.

[0005] To achieve the above-mentioned object, the present application proposes a data processing device for performing sparse dimension reduction on a data packet to be reduced in dimension, wherein the data packet to be reduced in dimension is stored in a preset memory module, and the data processing device comprises: a first state machine, a second state machine, a third state machine, a fourth state machine and a multiplier-adder;

[0006] The first state machine is configured to: in response to receiving a sparse dimensionality reduction instruction, determine, based on the sparse dimensionality reduction instruction, a storage address of the original vector data of each data sample contained in the data packet to be reduced in dimension in the memory module and an accumulated vector address of a memory pool in which the original vector data contained in each data sample is located in the memory module;

[0007] And, based on the storage address and accumulated vector address of each data sample in the memory module, a plurality of read requests are respectively sent to the memory module; wherein the read request corresponds to the data sample one by one, and the read request is used to request to read the original vector data of the corresponding data sample and the current accumulated vector data of the memory pool where the original vector data contained in the corresponding data sample is located in the memory module;

[0008] The second state machine is configured to: receive the original vector data returned by the memory module based on each read request, and send the original vector data to the multiplier-adder;

[0009] The third state machine is configured to: receive the accumulated vector data returned by the memory module based on each read request, and send the accumulated vector data to the multiplier-adder;

[0010] The multiplier-adder is configured to: accumulate the original vector data and the accumulated vector data returned by the same read request to obtain an accumulation result corresponding to each read request, and send the accumulation result to the fourth state machine;

[0011] The fourth state machine is configured to update the accumulated result corresponding to each read request to the memory module.

[0012] In the embodiment of the present application, the first state machine is further configured as:

[0013] When sending a read request to the memory module, a first sub-request and a second sub-request are sent respectively; wherein, the first sub-request is used to request to read the original vector data of the data sample currently being read, and the second sub-request is used to request to read the accumulated vector data corresponding to the data sample requested to be read by the first sub-request in the same read request.

[0014] In the embodiment of the present application, the first state machine is further configured as:

[0015] Based on the sparse dimensionality reduction instruction, determine the one-hot bitmap corresponding to each original vector data and each accumulated vector data in each data sample, and send the one-hot bitmap corresponding to each original vector data to the second state machine, and send the one-hot bitmap corresponding to each accumulated vector data to the third state machine.

[0016] In the embodiment of the present application, the second state machine is further configured as:

[0017] Receive the one-hot bitmap corresponding to each original vector data sent by the first state machine, and based on the one-hot bitmap corresponding to each original vector data, send the received each original vector data to the position corresponding to each one-hot bitmap in the multiplier-adder.

[0018] In the embodiment of the present application, the third state machine is further configured as:

[0019] Receive the one-hot bitmaps corresponding to the respective accumulated vector data sent by the first state machine, and based on the one-hot bitmaps corresponding to the respective accumulated vector data, send the received each accumulated vector data to the position corresponding to each one-hot bitmap in the multiplier-adder.

[0020] In the embodiment of the present application, the first state machine is further configured to: send the accumulated vector address to the fourth state machine;

[0021] The fourth state machine is further configured to: receive the accumulated vector address sent by the first state machine, and based on the accumulated vector address, replace the accumulated result corresponding to each read request with the position of the accumulated vector data returned by each read request in the memory module.

[0022] In an embodiment of the present application, the first state machine is further configured to: after the original vector data corresponding to each read request flows back to the second state machine, send a first identifier to the second state machine, the first identifier being used to identify that all the original vector data corresponding to each read request flows back;

[0023] The second state machine is further configured to: receive a first identifier sent by the first state machine, and send the first identifier to the multiplier after all original vector data returned by each read request are sent to the multiplier.

[0024] In the embodiment of the present application, the first state machine is further configured to: after the accumulated vector data corresponding to each read request flows back to the third state machine, send a second identifier to the third state machine, wherein the second identifier is used to identify that all the accumulated vector data corresponding to each read request flows back;

[0025] The third state machine is further configured to: receive a second identifier sent by the first state machine, and send the second identifier to the multiplier after all accumulated vector data returned by each read request are sent to the multiplier.

[0026] In the embodiment of the present application, the first state machine is further configured as:

[0027] After all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a third identifier is sent to the second state machine; the third identifier is used to identify that all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed;

[0028] After all the accumulated vector data corresponding to the data samples in the data packet to be reduced in dimension are all reflowed, a fourth identifier is sent to the third state machine; the fourth identifier is used to identify that all the accumulated vector data corresponding to the data samples in the data packet to be reduced in dimension are all reflowed;

[0029] The second state machine is further configured to: receive a third identifier sent by the first state machine, and send the third identifier to the multiplier-adder;

[0030] The third state machine is further configured to: receive a fourth identifier sent by the first state machine, and send the fourth identifier to the multiplier-adder.

[0031] In the embodiment of the present application, the fourth state machine is further configured to: after the accumulated result corresponding to the previous read request is updated to the memory module, send a completion instruction to the first state machine;

[0032] The first state machine is further configured to: after receiving the completion instruction, read the accumulated vector data corresponding to the next data sample.

[0033] The present application also proposes a data processing method, which is applied to any of the above-mentioned data processing devices, and the processing method includes:

[0034] In response to receiving a sparse dimensionality reduction instruction, determine the storage address of the original vector data of each data sample contained in the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module based on the first state machine and the sparse dimensionality reduction instruction; and, based on the storage address and cumulative vector address of each data sample in the memory module, send multiple read requests to the memory module respectively; wherein the read request corresponds to the data sample one-to-one, and the read request is used to request to read the original vector data of the corresponding data sample and the current cumulative vector data of the memory pool where the original vector data contained in the corresponding data sample is located in the memory module;

[0035] Receive the original vector data returned by each read request based on the second state machine, and send the original vector data to the multiplier-adder;

[0036] receiving the accumulated vector data returned by each read request based on the third state machine, and sending the accumulated vector data to the multiplier-adder;

[0037] Accumulating the original vector data and the accumulated vector data returned by the same read request based on the multiplier-adder to obtain an accumulation result corresponding to each read request, and sending the accumulation result to the fourth state machine;

[0038] Based on the fourth state machine, the accumulated result corresponding to each read request is updated to the memory module.

[0039] In the embodiment of the present application, the data processing method further includes:

[0040] When sending a read request to the memory module, a first sub-request and a second sub-request are sent respectively based on the first state machine; wherein the first sub-request is used to request to read the original vector data of the data sample currently being read, and the second sub-request is used to request to read the accumulated vector data corresponding to the data sample requested to be read by the first sub-request in the same read request.

[0041] In the embodiment of the present application, the data processing method further includes:

[0042] Based on the first state machine and based on the sparse dimensionality reduction instruction, determine the one-hot bitmap corresponding to each original vector data and each accumulated vector data in each data sample, and send the one-hot bitmap corresponding to each original vector data to the second state machine, and send the one-hot bitmap corresponding to each accumulated vector data to the third state machine.

[0043] In the embodiment of the present application, the data processing method further includes:

[0044] Based on the second state machine and the one-hot bitmap corresponding to each original vector data, each received original vector data is sent to a position in the multiplier-adder corresponding to each one-hot bitmap.

[0045] In the embodiment of the present application, the data processing method further includes:

[0046] Based on the third state machine and the one-hot bitmaps corresponding to the respective accumulated vector data, the received respective accumulated vector data are sent to the positions corresponding to the respective one-hot bitmaps in the multiplier-adder.

[0047] In the embodiment of the present application, the data processing method further includes:

[0048] sending the accumulated vector address to the fourth state machine based on the first state machine;

[0049] Based on the fourth state machine and the accumulated vector address, the accumulated result corresponding to each read request is written into the location of the accumulated vector data returned by each read request in the memory module.

[0050] In the embodiment of the present application, the data processing method further includes:

[0051] After the original vector data corresponding to each read request flows back to the second state machine, sending a first identifier to the second state machine based on the first state machine, where the first identifier is used to identify that all the original vector data corresponding to each read request flows back;

[0052] After all the original vector data returned by each read request are sent to the multiplier-accumulator, the first identifier is sent to the multiplier-accumulator based on the second state machine.

[0053] In the embodiment of the present application, the data processing method further includes:

[0054] After the accumulated vector data corresponding to each read request flows back to the third state machine, sending a second identifier to the third state machine based on the first state machine, where the second identifier is used to identify that all the accumulated vector data corresponding to each read request flows back;

[0055] After all the accumulated vector data returned by each read request are sent to the multiplier-accumulator, the second identifier is sent to the multiplier-accumulator based on the third state machine.

[0056] In the embodiment of the present application, the data processing method further includes:

[0057] After all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a third identifier is sent to the second state machine based on the first state machine; the third identifier is used to identify that all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed;

[0058] After all the accumulated vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a fourth identifier is sent to the third state machine based on the first state machine; the fourth identifier is used to identify that all the accumulated vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed;

[0059] sending the third identifier to the multiplier-accumulator based on the second state machine;

[0060] The fourth identifier is sent to the multiplier-accumulator based on the third state machine.

[0061] In the embodiment of the present application, the data processing method further includes:

[0062] After the accumulated result corresponding to the previous read request is updated to the memory module, a completion instruction is sent to the first state machine based on the fourth state machine;

[0063] After receiving the completion instruction, the accumulated vector data corresponding to the next data sample is read based on the first state machine.

[0064] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements any of the above-described methods when executed by a processor.

[0065] An embodiment of the present application further proposes a computing device, comprising any of the data processing devices described above, wherein a computer program is stored on the data processing device, and when the data processing device executes the computer program, the data processing method described above is implemented.

[0066] The data processing device proposed in the present application converts sparse dimensionality reduction calculations into a process of multiple accumulations by setting four state machines and multipliers and adders. There is no need for multiplication calculations, and the amount of calculation is small, the speed is fast, and the efficiency is high. In addition, the first state machine in the present application reads the original vector data and the accumulated vector data based on the storage address of each data sample in the data packet to be reduced, so it is not easy to make mistakes when facing deduplication of data. Moreover, the first state machine is used to send a read request, the second state machine and the third state machine are used to receive the original vector data and the accumulated vector data respectively, the multiplier and adder are used to calculate the accumulation process, and the fourth state machine is used to write the accumulated result of the read request to the memory module. The four state machines and the multiplier and adder work in parallel, which not only improves the data throughput, but also improves the data processing speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0068] Figure 1 A module diagram of a data processing device in an embodiment of the present application;

[0069] Figure 2 This is a flow chart of a data processing device in one embodiment of the present application performing sparse dimensionality reduction;

[0070] Figure 3 This is a schematic diagram of a process of processing a data packet to be dimensionally reduced in a memory module in an embodiment of the present application;

[0071] Figure 4 This is a schematic diagram of a process of processing a data packet to be dimensionally reduced in a memory module in an embodiment of the present application;

[0072] Figure 5 This is a schematic diagram of a process of processing a data packet to be dimensionally reduced in a memory module in an embodiment of the present application;

[0073] Figure 6 This is a schematic diagram of a process of processing a data packet to be dimensionally reduced in a memory module in an embodiment of the present application;

[0074] Figure 7 A step diagram of a data processing method in an embodiment of the present application;

[0075] Figure 8 A module diagram of a computer-readable storage medium in an embodiment of the present application;

[0076] Fig. 9A module diagram of a computing device in one embodiment of the present application.

[0077] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0078] The principles and spirit of the present application will be described below with reference to several exemplary embodiments. It should be understood that these embodiments are provided only to enable those skilled in the art to better understand and implement the present application, and are not intended to limit the scope of the present application in any way. On the contrary, these embodiments are provided to make the present disclosure more thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art.

[0079] Those skilled in the art know that the embodiments of the present application can be implemented as a system, device, method or computer program product. Therefore, the present disclosure can be specifically implemented in the following forms, namely: complete hardware, complete software (including firmware, resident software, microcode, etc.), or a combination of hardware and software.

[0080] According to the implementation manner of the present application, a data processing apparatus, method, medium and computing device are proposed.

[0081] It should be understood herein that any number of elements in the drawings is for illustration rather than limitation, and any naming is only for distinction rather than having any limiting meaning.

[0082] The principles and spirit of the present application are explained in detail below with reference to several representative implementations of the present application.

[0083] Exemplary Devices

[0084] This exemplary embodiment provides a data processing device for performing sparse dimension reduction on deduplicated data, wherein the deduplicated data is stored in a preset memory module, such as Figure 1 As shown, in the embodiment of the present application, the data processing device includes: a first state machine, a second state machine, a third state machine, a fourth state machine and a multiplier-adder;

[0085] The first state machine is configured to: in response to receiving a sparse dimensionality reduction instruction, determine, based on the sparse dimensionality reduction instruction, a storage address of the original vector data of each data sample contained in the data packet to be reduced in dimension in the memory module and an accumulated vector address of a memory pool in which the original vector data contained in each data sample is located in the memory module;

[0086] And, based on the storage address and accumulated vector address of each data sample in the memory module, multiple read requests are respectively sent to the memory module; wherein the read request corresponds to the data sample one by one, and the read request is used to request to read the original vector data of the corresponding data sample and the current accumulated vector data of each memory pool where each original vector data contained in the corresponding data sample is located in the memory module;

[0087] The second state machine is configured to: receive the original vector data returned by the memory module based on each read request, and send the original vector data to the multiplier-adder;

[0088] The third state machine is configured to: receive the accumulated vector data sent by the memory module and returned based on each read request, and send the accumulated vector data to the multiplier;

[0089] The multiplier-adder is configured to: accumulate the original vector data and the accumulated vector data returned by the same read request to obtain an accumulation result corresponding to each read request, and send the accumulation result to the fourth state machine;

[0090] The fourth state machine is configured to update the accumulated result corresponding to each read request to the memory module.

[0091] like Figure 1 As shown, in the embodiment of the present application, each state machine in the data processing device can be composed of a state register and a combinational logic circuit, and can transfer states according to a preset state based on a control signal. It is a control center that coordinates related signal actions and completes specific operations.

[0092] Reference Figure 2 , Figure 3 , Figure 2 is a flow chart of data processing performed by each state machine in a data processing device in an embodiment of the present application, Figure 3 The following is a schematic diagram of the storage of the data packets to be reduced in each memory pool of the preset memory module in an embodiment of the present application. The preset memory module may be a memory with read and write functions, and the memory module has multiple memory pools, each of which has a certain depth. For example, Figure 3The memory module shown includes eight memory pools numbered 0-7, each memory pool has a storage depth of 7, and the same storage depths of different memory pools constitute a storage unit, 0*00, 0*01, 0*02, 0*03, 0*04, 0*05, 0*06 are the storage unit numbers constituted by the different depth storage positions of each memory pool in the memory module, wherein the storage unit numbered 0*00-0*05 is used to store the original vector of each data sample in the data packet to be reduced in dimension, and the storage unit numbered 0*06 is used to store the accumulated vector data of each memory pool, and AH is the accumulated vector data stored in memory pools 0-7 respectively. In addition, the memory module can also communicate with the data processing device in the present application.

[0093] In the embodiment of the present application, the data packet to be reduced in dimension is the deduplicated data to be reduced in dimension, and the deduplicated data refers to the data after deduplication processing of the training data used for forward neural network training. The data packet to be reduced in dimension includes multiple data samples, and each data sample is pre-stored in the memory module in the form of vector data. For example, Figure 3 The data packet to be processed shown includes vector data of three data samples, and the original vector data refers to the vector data of each data sample originally stored in the memory pool of the memory module before sparse dimensionality reduction, which includes data header information and non-header data. Among them, h-0, h-1, and h-2 are the data header information of the three data samples contained in the data packet to be reduced in dimensionality, and d represents the non-header data in each data sample. d at different positions and d in different data samples do not represent the same data content. For example, the original vector data included in the data sample with data header information h-0 is: h-0, d, d, d, d, d, d, d, d, d, d; the original vector data included in the data sample with data header information h-1 is: h-1, d, d, d; the original vector data included in the data sample with data header information h-2 is: h-2, d, d, d, d. It should be noted that the embodiment of the present application only takes the case where three data samples are included in the data packet to be processed as an example. In other embodiments, the data samples included in the data packet to be processed may be more or less. The present application does not limit the number of data samples included in the data packet to be processed.

[0094] In addition, continue to refer to Figure 3, since the data packet to be reduced in the embodiment of the present application is the data after the training data is deduplicated, the original vector data contained in the same data sample in the data packet to be reduced are stored continuously in the memory module, while different data samples may not be stored continuously in the memory module, so the original vector data contained in different data samples may also be discontinuous. For example, the data sample with data header information h-0, the data sample with data header information h-1, and the data sample with data header information h-2 are all discontinuous.

[0095] In an embodiment of the present application, after the first state machine receives a sparse dimensionality reduction instruction, the first state machine can parse the sparse dimensionality reduction instruction to obtain the storage address of the original vector data of each data sample contained in the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module.

[0096] Still Figure 3 Taking the data packet to be reduced in dimensionality as shown as an example, the data packet to be reduced in dimensionality includes three data samples, which are data samples with data header information h-0, h-1, and h-2, respectively. Among them, the original vector data contained in the data sample with data header information h-0 includes [h-0, d, d, d, d, d, d, d, d, d, d], and the starting address stored in the memory module is the position of memory pool 0 in storage unit 0*00, the original vector data contained in the data sample with data header information h-1 includes [h-1, d, d, d], and the starting address stored in the memory module is the position of memory pool 0 in storage unit 0*02, and the original vector data contained in the data sample with data header information h-2 includes [h-2, d, d, d, d], and the starting address stored in the memory module is the position of memory pool 0 in storage unit 0*03. The first state machine can determine the starting address of the original vector data contained in each data sample in the memory module by parsing the sparse dimensionality reduction instruction. In addition, each data header information contains the length of each data sample. For example, the data header information h-0 contains the length of its corresponding data sample. Then, after determining the storage location of the data header information h-0 in the memory module (the starting address of the data sample with the data header information h-0), the original vector data contained in the data sample with the data header information h-0 can be read from the memory module according to the length information contained in h-0.

[0097] Continue to refer to Figure 3In the embodiment of the present application, the lengths of the data samples are different, that is, the number of original vectors contained is different, so the cumulative vector addresses of the memory pools in the memory module where the original vector data contained in the data samples are located are also different. For example, the data sample with the data header information h-0 has original vectors in each memory pool, so in the read request of the original data of the data information h-0, the cumulative vector address contained therein includes all the addresses of the memory pools 0-7 in the storage unit 0*06; and the original vector data contained in the data sample with the data header information h-1 is only stored in the memory pool 0-3, so in the read request of the original data of the data information h-1, the cumulative vector address contained therein only needs to include the address of the memory pool 0-3 in the storage unit 0*06; and the original vector data contained in the data sample with the data header information h-2 is only stored in the memory pool 0-4, so in the read request of the original data of the data information h-2, the cumulative vector address contained therein only needs to include the address of the memory pool 0-4 in the storage unit 0*06.

[0098] After determining the storage address of the original vector data of each data sample in the data packet to be reduced in dimension within the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module, the first state machine can send a read request to the memory module to request to read the original vector data of each data sample and the current cumulative vector data of each memory pool where the original vector data contained in each data sample is located in the memory module.

[0099] In addition, it should be noted that Figure 3 The data packet to be reduced in dimension shown contains three data samples, that is, the first state machine needs to send three read requests to the memory module to respectively request to read the original vector data and the corresponding accumulated vector data of the three data samples. Among them, the three read requests can be sent successively, and the order can be carried out according to the order in which the data samples in the data packet to be reduced in dimension are stored in the memory module. For example, the data sample with the header information h-0 is stored in the front position in the memory module. Therefore, the read request of the data sample with the header information h-0 can be sent first, and then the read request of the data sample with the header information h-1 can be sent, and finally the read request of the data sample with the header information h-2 can be sent.

[0100] In an embodiment of the present application, the first state machine is also configured to: when sending a read request to the memory module, send a first sub-request and a second sub-request respectively; wherein the first sub-request is used to request to read the original vector data of the data sample currently being read, and the second sub-request is used to request to read the accumulated vector data corresponding to the data sample requested to be read by the first sub-request in the same read request.

[0101] For example, still taking the reading of the data sample with data header information h-0 as an example, when the first state machine sends a read request for the original vector data and the corresponding accumulated vector data of the data sample with data header information h-0 to the memory module, the first sub-request and the second sub-request are sent to the memory module respectively. Among them, the first sub-request is used to request to read each original vector data of the data sample with data header information h-0, and the second sub-request is used to request to read each original vector data of the data sample with data header information h-0 in the current accumulated vector data of the memory pool where the memory module is located.

[0102] Among them, when parsing the sparse dimensionality reduction instruction, the first state machine has determined the storage address of each data sample of the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module. Therefore, the first sub-request requests to read based on the storage address of the data sample with data header information h-0, and the second sub-request reads based on the cumulative vector address. Specifically, the starting address requested to be read by the first sub-request is the address of memory pool 0 in storage unit 0*00, and the original vector data returned by the memory module based on the first sub-request is [h-0, d, d, d, d, d, d, d, d, d, d], and it is returned to the second state machine.

[0103] The data sample with data header information h-0 has original vector data in memory pools 0-6. Therefore, the cumulative vector address in the second sub-request is the address of memory pools 0-7 in storage unit 0*06. Assuming that the current cumulative vector data in each memory pool of storage unit 0*06 in the memory module is [A, B, C, D, E, F, G, H], then the cumulative vector data returned by the memory module based on the second sub-request is, and it is returned to the third state machine.

[0104] In addition, when the original vector data and the accumulated vector data are accumulated and reduced in dimension in the multiplier, the original vector data in the same memory pool are accumulated and then accumulated with the accumulated vector data corresponding to the memory pool, while the original vector data and the accumulated vector data in different memory pools do not need to be accumulated. Therefore, in an embodiment of the present application, the cache address for accumulating the original vector data in the same memory pool in the multiplier can be set to be the same, and the multiplier accumulates the data in the same cache address, and then accumulates the accumulated vector data corresponding to the cache address, thereby avoiding errors during accumulation.

[0105] In an embodiment of the present application, the first state machine is further configured to: determine the one-hot bitmap corresponding to each original vector data and each accumulated vector data in each of the data samples based on the sparse dimensionality reduction instruction, and send the one-hot bitmap corresponding to each original vector data to the second state machine, and send the one-hot bitmap corresponding to each accumulated vector data to the third state machine.

[0106] In an embodiment of the present application, a one-hot bitmap can be assigned to each memory pool of the storage module, different memory pools have different one-hot bitmaps, and the same memory pool in different storage units has the same one-hot bitmap. The multiplier-adder sets multiple cache addresses according to the number of memory pools, and the first state machine sends the one-hot bitmap corresponding to each original vector data to the second state. When the second state machine receives each original vector data, it can send it to the corresponding cache address in the multiplier-adder according to its corresponding one-hot bitmap, so that the original vector data of the same memory pool can be accumulated at the same cache address in the multiplier-adder.

[0107] For example, in the embodiment of the present application, the unique hot bitmap corresponding to the memory pool 0 of the memory module is: 10000000;

[0108] The unique hot bitmap corresponding to the memory pool 1 of the memory module is: 01000000;

[0109] The unique hot bitmap corresponding to the memory pool 2 of the memory module is: 00100000;

[0110] The unique hot bitmap corresponding to memory pool 3 of the memory module is: 00010000;

[0111] The unique hot bitmap corresponding to memory pool 4 of the memory module is: 00001000;

[0112] The unique hot bitmap corresponding to memory pool 5 of the memory module is: 00000100;

[0113] The unique hot bitmap corresponding to memory pool 6 of the memory module is: 00000010;

[0114] The unique hot bitmap corresponding to memory pool 7 of the memory module is: 00000001.

[0115] In addition, in addition to the cache addresses for caching the original vector data of each memory pool, the multiplier and adder also has a cache address for caching the accumulated vector data of each memory pool. After the accumulation of each original vector data in the cache address for caching the original vector data, the accumulated vector data in the corresponding cached accumulated vector address is accumulated. For example, the multiplier and adder has addresses 0-7 and addresses 0'-7', and addresses 0-7 and addresses 0'-7' correspond one to one. Addresses 0-7 are used to cache the original vector data of memory pools 0-7, and addresses 0'-7' are used to cache the accumulated vector data of memory pools 0-7. The original vector data and the accumulated vector data in the corresponding addresses are accumulated, such as the original vector data in address 0 is accumulated with the accumulated vector data in address 0'.

[0116] Therefore, in an embodiment of the present application, the one-hot bitmap of the accumulated vector data corresponding to each memory pool can be the same as the one-hot bitmap corresponding to the original vector data in different depths of its memory pool. Therefore, the second state machine can send the original vector data in memory pools 0-7 to addresses 0-7 of the multiplier-adder according to the one-hot bitmaps of each memory pool, and the third state machine can send the accumulated vector data in memory pools 0-7 to addresses 0'-7' of the multiplier-adder according to the one-hot bitmaps of each memory pool, so that the original vector data and the accumulated vector data in the corresponding addresses can be accumulated.

[0117] For example, in the embodiment of the present application, the unique hot bitmap of the accumulated vector data corresponding to the memory pool 0 of the memory module is: 10000000;

[0118] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 1 of the memory module is: 01000000;

[0119] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 2 of the memory module is: 00100000;

[0120] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 3 of the memory module is: 00010000;

[0121] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 4 of the memory module is: 00001000;

[0122] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 5 of the memory module is: 00000100;

[0123] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 6 of the memory module is: 00000010;

[0124] The unique hot bitmap of the accumulated vector data corresponding to the memory pool 7 of the memory module is: 00000001.

[0125] Based on the above explanation, after the first state machine receives the sparse dimensionality reduction instruction, it parses the sparse dimensionality reduction instruction and can determine that the data packet to be reduced includes three data samples, namely: data samples with data header information h-0, h-1, and h-2, and can also determine the cumulative vector address corresponding to each data sample, and can also determine the unique hot bitmap corresponding to each original vector data and the cumulative vector data.

[0126] As shown in Table 1 below, Table 1 shows each original vector data and the corresponding unique hot bitmap in the data sample with data header information h-0:

[0127] Table 1

[0128]

[0129] As shown in Table 2 below, Table 2 shows each accumulated vector data and the corresponding unique hot bitmap in the data sample with data header information h-0:

[0130] Table 2

[0131]

[0132] In an embodiment of the present application, the second state machine is further configured to: receive the one-hot bitmap corresponding to each original vector data sent by the first state machine, and based on the one-hot bitmap corresponding to each original vector data, send the received each original vector data to the position corresponding to each one-hot bitmap in the multiplier / adder.

[0133] Taking the original vector data received by the second state machine as the original vector data corresponding to the data sample with data header information h-1 as an example, as shown in Table 1 above, the original vector data received by the second state machine include [h-0, d, d, d, d, d, d, d, d, d, d], and the first state machine also sends the one-hot bitmap corresponding to each original vector data to the second state machine. Therefore, the second state machine can send each original vector data to the corresponding position in the multiplier based on the one-hot bitmap of each original vector data.

[0134] In an embodiment of the present application, the third state machine is further configured to: receive the one-hot bitmap corresponding to each accumulated vector data sent by the first state machine, and based on the one-hot bitmap corresponding to each accumulated vector data, send the received each accumulated vector data to the position corresponding to each one-hot bitmap in the multiplier / adder.

[0135] Taking the example of the original vector data received by the third state machine as the accumulated vector data corresponding to the data sample with data header information h-1, as shown in Table 2 above, the original vector data received by the second state machine include [A, B, C, D, E, F, G, H], and the first state machine also sends the unique-hot bitmap corresponding to each original vector data to the third state machine. Therefore, the third state machine can send each accumulated vector data to the corresponding position in the multiplier based on the unique-hot bitmap of each accumulated vector data.

[0136] In addition, in the embodiment of the present application, when the multiplier-adder receives the original vector data sent by the second state machine to the multiplier-adder and the accumulated vector data sent by the third state machine to the multiplier-adder, the receiving can be performed based on different interfaces. Figure 2 As shown, the multiplier-adder has an interface 1 and an interface 2. The multiplier-adder can receive the original vector data sent by the second state machine based on interface 1, and can receive the accumulated vector data sent by the third state machine based on interface 2. After the multiplier-adder receives the original vector data sent by the second state machine and the accumulated vector data sent by the third state machine, it first accumulates the original vector data with the same unique hot bitmap, and then accumulates the accumulated original vector data with the accumulated vector data with the same unique hot bitmap, that is, the original vector data and the accumulated vector data in the same memory pool are accumulated.

[0137] In an embodiment of the present application, the first state machine is further configured to, after the original vector data corresponding to each read request flows back to the second state machine, send a first identifier to the second state machine, wherein the first identifier is used to identify that all the original vector data corresponding to each read request flows back;

[0138] The second state machine is further configured to: receive a first identifier sent by the first state machine, and send the first identifier to the multiplier after all original vector data returned by each read request are sent to the multiplier.

[0139] Among them, still taking the data sample with data header information h-0 as an example, when the original vector data corresponding to the data sample are all returned to the second state machine, the first state sends a first identifier to the second state machine, wherein the first identifier can be a binary number 00, indicating that the original vector data requested to be read by the first sub-request have all been returned, and the second state machine first receives the various original vector data returned by the memory module based on the first sub-request. After receiving the first identifier sent by the first state machine, the second state machine will first send all the original vector data corresponding to the first sub-request to the multiplier and adder, and then send the first identifier to the multiplier and adder. When the multiplier and adder receive the first identifier, it means that the original vector data corresponding to the first sub-request have been completely accumulated, as shown in the following Table 3, Table 3 is the result after the multiplier and adder accumulate all the original vector data of the data sample with data header information h-0:

[0140] Table 3

[0141]

[0142] In addition, in the embodiment of the present application, the first state machine is further configured to, after the accumulated vector data corresponding to each read request flows back to the third state machine, send a second identifier to the third state machine, wherein the second identifier is used to identify that all the accumulated vector data corresponding to each read request flows back;

[0143] The third state machine is further configured to: receive a second identifier sent by the first state machine, and send the second identifier to the multiplier after all accumulated vector data returned by each read request are sent to the multiplier.

[0144] Among them, still taking the data sample with data header information h-0 as an example, when the accumulated vector data corresponding to the data sample all flows back to the third state machine, the first state machine sends the second identifier to the third state machine, wherein the second identifier can be a binary number 01, indicating that the accumulated vector data requested to be read by the second sub-request have all flowed back, and the third state machine first receives each accumulated vector data corresponding to the second sub-request, and then receives the second identifier. Then the third state machine will first send all the accumulated vector data corresponding to the second sub-request to the multiplier, and then send the second identifier to the multiplier. When the multiplier receives the second identifier, it means that the original vector data corresponding to the second sub-request has all been received. At this time, each accumulated vector data can be accumulated with the original vector accumulation result in Table 3 to obtain the final accumulation result, as shown in Table 4 below. Table 4 is the accumulation result after the multiplier accumulates the original vector data and the accumulated vector data of the data sample with data header information h-0:

[0145] Table 4

[0146]

[0147] Among them, the cumulative results shown in the above Table 4 are the cumulative results corresponding to the read requests for the data samples with data header information h-0, that is, the dimensionality reduction results corresponding to the data samples with data header information h-0. It should be noted that the cumulative results shown in Table 4 are only the cumulative results of the data samples with data header information h-0, and are not the cumulative results of the data packets to be reduced in dimensionality. The cumulative results of the data packets to be reduced in dimensionality need to be obtained after all data samples are accumulated.

[0148] In the embodiment of the present application, after the multiplier-adder obtains the accumulation result of a data sample, it can send it to the fourth state. For example, after the multiplier-adder obtains the accumulation result shown in Table 4 above, it can send it to the fourth state machine, and the fourth state machine can send the accumulation result to the memory module to update the accumulated vector data in the memory module. Wherein, updating refers to using the vector data corresponding to each memory pool in the accumulation result to replace the accumulated vector data in the corresponding memory pool in the memory module as the new accumulated vector data in the corresponding memory pool.

[0149] In the embodiment of the present application, the first state machine is further configured to: send the accumulated vector address to the fourth state machine;

[0150] The fourth state machine is further configured to: receive the accumulated vector address, and based on the accumulated vector address, replace the accumulated vector data returned by each read request with the accumulated result corresponding to each read request at a position in the memory module.

[0151] Among them, when the first state machine parses the sparse dimension reduction instruction, it also sends the cumulative vector addresses of each memory pool in the memory module to the fourth state machine. Then, when the fourth state machine writes the accumulated results corresponding to each data sample into the memory module, it can be replaced based on the cumulative vector address, such as Figure 4 As shown, Figure 4 That is, it is a schematic diagram after the fourth state machine updates the accumulation result of the data samples with data header information h-0 to the memory module.

[0152] At this point, the read request sent by the first state machine to the memory module to read the original vector data and the cumulative vector data of the data sample with the data header information h-0 has been processed. When the original vector data and the cumulative vector data of the data sample with the data header information h-0 are all returned to the second state machine and the third state machine respectively, the first state machine can send a read request to the memory module to read the original vector data and the cumulative vector data of the data sample with the data header information h-1. Similarly, the read request also includes a first sub-request and a second sub-request. The first sub-request is used to request to read the original vector data of the data sample with the data header information h-1, and the second sub-request is used to request the cumulative vector data of the data sample with the data header information h-1.

[0153] It should be noted that when the first state machine reads the original vector and cumulative vector corresponding to the data sample with data header information h-1, when reading the original vector, only the original vector data of the previous data sample (the data sample with data header information h-0) ​​needs to be fully reflowed to read the original vector data of the data sample with data header information h-1; and when reading the cumulative vector data, it is necessary to ensure that the accumulation result of the previous data sample (the data sample with data header information h-0) ​​has been updated to the memory module before the cumulative vector data of the data sample with data header information h-1 can be read.

[0154] Therefore, in an embodiment of the present application, the fourth state machine is also configured to send a completion instruction to the first state machine after updating the accumulated result to the memory module, and the completion instruction represents that the fourth state machine has updated the accumulated result corresponding to the previous data sample to the memory module.

[0155] Regarding the reading and accumulation process of the original vector data and the accumulated vector data of the data sample with the data header information being h-1, refer to the processing process of the data sample with the data header information being h-0, and will not be described in detail here. Figure 5 As shown, Figure 5 This is a schematic diagram of updating the memory module with the accumulated result of the data header information being h-1 data samples in the fourth state.

[0156] Similarly, when all the original vector data corresponding to the data samples with data header information h-1 are reflowed, the first state machine can send a first sub-request to the memory module to read the original vector data of the data samples with data header information h-2. When the fourth state machine updates the accumulated results of the data samples with data information h-2 to the memory module, the first state machine can send a second sub-request to the memory module to read the accumulated vector data of the data samples with data header information h-2.

[0157] Regarding the reading and accumulation process of the original vector data and the accumulated vector data of the data sample with the data header information h-2, refer to the processing process of the data samples with the data header information h-0 and h-1, which will not be described one by one here. Figure 6 As shown, Figure 6 This is a schematic diagram of updating the memory module with the accumulated result of the data header information being h-1 data samples in the fourth state.

[0158] In the embodiment of the present application, the first state machine is further configured as:

[0159] After all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a third identifier is sent to the second state machine; the third identifier is used to identify that all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed;

[0160] After all the accumulated vector data corresponding to the data samples in the data packet to be reduced in dimension are all reflowed, a fourth identifier is sent to the third state machine; the fourth identifier is used to identify that all the accumulated vector data corresponding to the data samples in the data packet to be reduced in dimension are all reflowed;

[0161] The second state machine is further configured to: receive a third identifier sent by the first state machine, and send the third identifier to the multiplier-adder;

[0162] The third state machine is further configured to: receive a fourth identifier sent by the first state machine, and send the fourth identifier to the multiplier-adder.

[0163] Among them, the third identifier can be a binary number 10, and the fourth identifier can be a binary number 11. When the second state machine receives the third identifier, it means that the original vector data corresponding to each data sample in the data packet to be reduced in dimension have all flowed back. When the third state machine receives the fourth identifier, it means that the cumulative vector data corresponding to each data sample in the data packet to be reduced in dimension have all flowed back. When the multiplier receives the third identifier and the fourth identifier, it means that the original vector data corresponding to each data sample in the data packet to be reduced in dimension are all input into the multiplier through the first interface, and the cumulative vector data corresponding to each data sample in the data packet to be reduced in dimension are all stored and input into the multiplier through the second interface, that is, the data packet to be reduced in dimension has completed dimension reduction. At this time, the multiplier data can be cleared to prepare for dimension reduction of the next data packet to be reduced in dimension.

[0164] The data processing device proposed in the present application converts sparse dimensionality reduction calculations into a process of multiple accumulations by setting four state machines and multipliers and adders. There is no need for multiplication calculations, and the amount of calculation is small, the speed is fast, and the efficiency is high. In addition, the first state machine in the present application reads the original vector data and the accumulated vector data based on the storage address of each data sample in the data packet to be reduced, so it is not easy to make mistakes when performing dimensionality reduction on deduplicated data. Moreover, the first state machine is used to send a read request, the second state machine and the third state machine are used to receive the original vector data and the accumulated vector data respectively, the multiplier and adder are used to calculate the accumulation process, and the fourth state machine is used to write the accumulated results of the read request to the memory module. The four state machines and the multiplier and adder work in parallel, which not only improves the data throughput, but also improves the data processing speed.

[0165] Exemplary Methods

[0166] like Figure 7 As shown, this exemplary embodiment proposes a data processing method, which is applied to the data processing device described in any of the above exemplary devices. In the embodiment of the present application, the data processing method includes the following steps S100-S500:

[0167] Step S100: In response to receiving a sparse dimensionality reduction instruction, determine the storage address of the original vector data of each data sample contained in the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module based on the first state machine and the sparse dimensionality reduction instruction; and, based on the storage address and cumulative vector address of each data sample in the memory module, send multiple read requests to the memory module respectively; wherein the read request corresponds to the data sample one-to-one, and the read request is used to request to read the original vector data of the corresponding data sample and the current cumulative vector data of the memory pool where the original vector data contained in the corresponding data sample is located in the memory module;

[0168] Step S200: receiving original vector data returned by each read request based on the second state machine, and sending the original vector data to the multiplier-adder;

[0169] Step S300: receiving the accumulated vector data returned by each read request based on the third state machine, and sending the accumulated vector data to the multiplier-adder;

[0170] Step S400: accumulating the original vector data and the accumulated vector data returned by the same read request based on the multiplier-adder to obtain an accumulation result corresponding to each read request, and sending the accumulation result to the fourth state machine;

[0171] Step S500: updating the accumulated result corresponding to each read request to the memory module based on the fourth state machine.

[0172] In the embodiment of the present application, the data processing method further includes:

[0173] When sending a read request to the memory module, a first sub-request and a second sub-request are sent respectively based on the first state machine; wherein the first sub-request is used to request to read the original vector data of the data sample currently being read, and the second sub-request is used to request to read the accumulated vector data corresponding to the data sample requested to be read by the first sub-request in the same read request.

[0174] In the embodiment of the present application, the data processing method further includes:

[0175] Based on the first state machine and based on the sparse dimensionality reduction instruction, determine the one-hot bitmap corresponding to each original vector data and each accumulated vector data in each data sample, and send the one-hot bitmap corresponding to each original vector data to the second state machine, and send the one-hot bitmap corresponding to each accumulated vector data to the third state machine.

[0176] In the embodiment of the present application, the data processing method further includes:

[0177] Based on the second state machine and the one-hot bitmap corresponding to each original vector data, each received original vector data is sent to a position in the multiplier-adder corresponding to each one-hot bitmap.

[0178] In the embodiment of the present application, the data processing method further includes:

[0179] Based on the third state machine and the one-hot bitmaps corresponding to the respective accumulated vector data, the received respective accumulated vector data are sent to the positions corresponding to the respective one-hot bitmaps in the multiplier-adder.

[0180] In the embodiment of the present application, the data processing method further includes:

[0181] sending the accumulated vector address to the fourth state machine based on the first state machine;

[0182] Based on the fourth state machine and the accumulated vector address, the accumulated result corresponding to each read request is written into the location of the accumulated vector data returned by each read request in the memory module.

[0183] In the embodiment of the present application, the data processing method further includes:

[0184] After the original vector data corresponding to each read request flows back to the second state machine, sending a first identifier to the second state machine based on the first state machine, where the first identifier is used to identify that all the original vector data corresponding to each read request flows back;

[0185] After all the original vector data returned by each read request are sent to the multiplier-accumulator, the first identifier is sent to the multiplier-accumulator based on the second state machine.

[0186] In the embodiment of the present application, the data processing method further includes:

[0187] After the accumulated vector data corresponding to each read request flows back to the third state machine, sending a second identifier to the third state machine based on the first state machine, where the second identifier is used to identify that all the accumulated vector data corresponding to each read request flows back;

[0188] After all the accumulated vector data returned by each read request are sent to the multiplier-accumulator, the second identifier is sent to the multiplier-accumulator based on the third state machine.

[0189] In the embodiment of the present application, the data processing method further includes:

[0190] After all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a third identifier is sent to the second state machine based on the first state machine; the third identifier is used to identify that all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed;

[0191] After all the accumulated vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a fourth identifier is sent to the third state machine based on the first state machine; the fourth identifier is used to identify that all the accumulated vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed;

[0192] sending the third identifier to the multiplier-accumulator based on the second state machine;

[0193] The fourth identifier is sent to the multiplier-accumulator based on the third state machine.

[0194] In the embodiment of the present application, the data processing method further includes:

[0195] After the accumulated result corresponding to the previous read request is updated to the memory module, a completion instruction is sent to the first state machine based on the fourth state machine;

[0196] After receiving the completion instruction, the accumulated vector data corresponding to the next data sample is read based on the first state machine.

[0197] The data processing method proposed in the embodiment of the present application is applied to the data processing device described in any of the above embodiments, and therefore, it has at least all the beneficial effects of the above data processing device, which will not be described one by one here.

[0198] Exemplary Media

[0199] After introducing the method, medium and system of the exemplary embodiments of the present application, next, reference is made to Figure 8 For a description of the computer-readable storage medium of the exemplary embodiment of the present application, please refer to Figure 8 , the computer-readable storage medium shown is a CD 70, on which a computer program (i.e., a program product) is stored. When the computer program is executed by the processor, it will implement the steps recorded in the above method implementation method, for example, in response to receiving a sparse dimensionality reduction instruction, based on the first state machine and the sparse dimensionality reduction instruction, determine the storage address of the original vector data of each data sample contained in the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module; and based on the storage address and cumulative vector address of each data sample in the memory module, send multiple read requests to the memory module respectively; wherein the read request corresponds to the data sample one by one, and the read request is read from the memory module. The request is used to request to read the original vector data of the corresponding data sample and the current accumulated vector data of the memory pool where the original vector data contained in the corresponding data sample is located in the memory module; based on the second state machine, the original vector data returned by each read request is received, and the original vector data is sent to the multiplier; based on the third state machine, the accumulated vector data returned by each read request is received, and the accumulated vector data is sent to the multiplier; based on the multiplier, the original vector data and the accumulated vector data in the same read request are accumulated to obtain the accumulated result of each read request, and the accumulated result is sent to the fourth state machine; based on the fourth state machine, the accumulated result corresponding to each read request is updated to the memory module. The specific implementation method of each step will not be repeated here. It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical or magnetic storage media, which are not listed here one by one.

[0200] Exemplary Computing Devices

[0201] After introducing the methods, systems, and media of the exemplary embodiments of the present application, reference is now made to Fig. 9 A computing device according to an exemplary embodiment of the present application.

[0202] Fig. 9 A block diagram of an exemplary computing device 80 suitable for implementing embodiments of the present application is shown. The computing device 80 may be a computer system or a server. Fig. 9 The computing device 80 shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0203] like Fig. 9 As shown, the components of the computing device 80 may include, but are not limited to: one or more processors or processing units 801 , a system memory 802 , and a bus 803 connecting various system components (including the system memory 802 and the processing unit 801 ).

[0204] The computing device 80 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by the computing device 80, including volatile and non-volatile media, removable and non-removable media.

[0205] The system storage 802 may include computer system readable media in the form of volatile storage, such as random access memory (RAM) 8021 and / or cache memory 8022. The computing device 80 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the ROM 8023 may be used to read and write non-removable, non-volatile magnetic media ( Fig. 9 is not shown in the Fig. 9 As shown in FIG. 8 , a disk drive for reading and writing a removable non-volatile disk (e.g., a “floppy disk”) and an optical disk drive for reading and writing a removable non-volatile optical disk (e.g., a CD-ROM, a DVD-ROM, or other optical media) can be provided. In these cases, each drive can be connected to the bus 803 via one or more data medium interfaces. The system storage 802 may include at least one program product, which has a set (e.g., at least one) of program modules, which are configured to perform the functions of each embodiment of the present application.

[0206] A program / utility 8025 having a set (at least one) of program modules 8024 may be stored, for example, in system memory 802, and such program modules 8024 include, but are not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. Program modules 8024 generally perform the functions and / or methods of the embodiments described herein.

[0207] The computing device 80 may also communicate with one or more external devices 804 (e.g., a keyboard, a pointing device, a display, etc.). Such communication may be performed via an input / output (I / O) interface. In addition, the computing device 80 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) via a network adapter 806. Fig. 9 As shown, the network adapter 806 communicates with other modules (such as the processing unit 801, etc.) of the computing device 80 via the bus 803. It should be understood that although Fig. 9 Not shown, other hardware and / or software modules may be used in conjunction with computing device 80 .

[0208] The processing unit 801 executes various functional applications and data processing by running the program stored in the system memory 802. For example, in response to receiving a sparse dimensionality reduction instruction, the processing unit 801 determines the storage address of the original vector data of each data sample contained in the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module based on the first state machine and the sparse dimensionality reduction instruction; and, based on the storage address and cumulative vector address of each data sample in the memory module, sends multiple read requests to the memory module respectively; wherein the read request corresponds to the data sample one-to-one, and the read request is used to request to read the corresponding data sample. The original vector data and the corresponding data sample contained in the memory pool in the memory module contain the current accumulated vector data; based on the second state machine, the original vector data returned by each read request is received, and the original vector data is sent to the multiplier; based on the third state machine, the accumulated vector data returned by each read request is received, and the accumulated vector data is sent to the multiplier; based on the multiplier, the original vector data and the accumulated vector data in the same read request are accumulated to obtain the accumulated result of each read request, and the accumulated result is sent to the fourth state machine; based on the fourth state machine, the accumulated result corresponding to each read request is updated to the memory module. The specific implementation method of each step is not repeated here. It should be noted that although several units / modules or sub-units / sub-modules of the computing device are mentioned in the above detailed description, this division is only exemplary and not mandatory. In fact, according to the implementation of the present application, the features and functions of two or more units / modules described above can be concretized in one unit / module. On the contrary, the features and functions of one unit / module described above may be further divided into multiple units / modules to be embodied.

[0209] In the description of the present application, it should be noted that the terms "first", "second" and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0210] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, systems and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0211] In the several embodiments provided in the present application, it should be understood that the disclosed systems, systems and methods can be implemented in other ways. The system embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of the system or unit can be electrical, mechanical or other forms.

[0212] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0213] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0214] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that can be executed by a processor. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computing device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program codes.

[0215] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-described embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-described embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

[0216] In addition, although the operations of the method of the present application are described in a specific order in the drawings, this does not require or imply that the operations must be performed in this specific order, or that all the operations shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps.

Claims

1. A data processing device, for performing sparse dimension reduction on a data packet to be reduced in dimension, wherein the data packet to be reduced in dimension is stored in a preset memory module, and the data processing device comprises: A first state machine, a second state machine, a third state machine, a fourth state machine and a multiplier-accumulator; The first state machine is configured to: in response to receiving a sparse dimensionality reduction instruction, determine, based on the sparse dimensionality reduction instruction, a storage address of the original vector data of each data sample contained in the data packet to be reduced in dimension in the memory module and an accumulated vector address of a memory pool in which the original vector data contained in each data sample is located in the memory module; And, based on the storage address and accumulated vector address of each data sample in the memory module, a plurality of read requests are respectively sent to the memory module; wherein the read request corresponds to the data sample one by one, and the read request is used to request to read the original vector data of the corresponding data sample and the current accumulated vector data of the memory pool where the original vector data contained in the corresponding data sample is located in the memory module; The second state machine is configured to: receive the original vector data returned by the memory module based on each read request, and send the original vector data to the multiplier-adder; The third state machine is configured to: receive the accumulated vector data returned by the memory module based on each read request, and send the accumulated vector data to the multiplier-adder; The multiplier-adder is configured to: accumulate the original vector data and the accumulated vector data returned by the same read request to obtain an accumulation result corresponding to each read request, and send the accumulation result to the fourth state machine; The fourth state machine is configured to update the accumulated result corresponding to each read request to the memory module.

2. The data processing apparatus according to claim 1, wherein the first state machine is further configured to: When sending a read request to the memory module, a first sub-request and a second sub-request are sent respectively; wherein, The first sub-request is used to request to read the original vector data of the data sample currently being read, and the second sub-request is used to request to read the accumulated vector data corresponding to the data sample requested to be read by the first sub-request in the same read request.

3. The data processing apparatus according to claim 1, wherein the first state machine is further configured to: Based on the sparse dimensionality reduction instruction, determine the one-hot bitmap corresponding to each original vector data and each accumulated vector data in each data sample, and send the one-hot bitmap corresponding to each original vector data to the second state machine, and send the one-hot bitmap corresponding to each accumulated vector data to the third state machine.

4. The data processing apparatus according to claim 3, wherein the second state machine is further configured to: Receive the one-hot bitmap corresponding to each original vector data sent by the first state machine, and based on the one-hot bitmap corresponding to each original vector data, send the received each original vector data to the position corresponding to each one-hot bitmap in the multiplier-adder.

5. The data processing apparatus according to claim 3, wherein the third state machine is further configured to: Receive the one-hot bitmaps corresponding to the respective accumulated vector data sent by the first state machine, and based on the one-hot bitmaps corresponding to the respective accumulated vector data, send the received each accumulated vector data to the position corresponding to each one-hot bitmap in the multiplier-adder.

6. The data processing device according to claim 1, wherein the first state machine is further configured to: send the accumulated vector address to the fourth state machine; The fourth state machine is further configured to: receive the accumulated vector address sent by the first state machine, and based on the accumulated vector address, replace the accumulated result corresponding to each read request at the position of the accumulated vector data returned by each read request in the memory module.

7. The data processing device according to claim 1, wherein the first state machine is further configured to: after the original vector data corresponding to each read request flows back to the second state machine, send a first identifier to the second state machine, wherein the first identifier is used to identify that all the original vector data corresponding to each read request flows back; The second state machine is further configured to: receive a first identifier sent by the first state machine, and send the first identifier to the multiplier after all the original vector data returned by each read request are sent to the multiplier.

8. The data processing device according to claim 1, wherein the first state machine is further configured to: after the accumulated vector data corresponding to each read request flows back to the third state machine, send a second identifier to the third state machine, wherein the second identifier is used to identify that all the accumulated vector data corresponding to each read request flows back; The third state machine is further configured to: receive a second identifier sent by the first state machine, and send the second identifier to the multiplier after all accumulated vector data returned by each read request are sent to the multiplier.

9. The data processing apparatus according to claim 1, wherein the first state machine is further configured to: After all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a third identifier is sent to the second state machine; the third identifier is used to identify that all the original vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed; After all the accumulated vector data corresponding to the data samples in the data packet to be reduced in dimension are all reflowed, a fourth identifier is sent to the third state machine; the fourth identifier is used to identify that all the accumulated vector data corresponding to the data samples in the data packet to be reduced in dimension are all reflowed; The second state machine is further configured to: receive a third identifier sent by the first state machine, and send the third identifier to the multiplier-adder; The third state machine is further configured to: receive a fourth identifier sent by the first state machine, and send the fourth identifier to the multiplier-adder.

10. The data processing device according to claim 1, wherein the fourth state machine is further configured to: send a completion instruction to the first state machine after the accumulated result corresponding to the previous read request is updated to the memory module; The first state machine is further configured to: after receiving the completion instruction, read the accumulated vector data corresponding to the next data sample.

11. A data processing method, applied to the data processing device according to any one of claims 1 to 10, the processing method comprising: In response to receiving a sparse dimensionality reduction instruction, determine the storage address of the original vector data of each data sample contained in the data packet to be reduced in the memory module and the cumulative vector address of the memory pool where the original vector data contained in each data sample is located in the memory module based on the first state machine and the sparse dimensionality reduction instruction; and, based on the storage address and cumulative vector address of each data sample in the memory module, send multiple read requests to the memory module respectively; wherein the read request corresponds to the data sample one-to-one, and the read request is used to request to read the original vector data of the corresponding data sample and the current cumulative vector data of the memory pool where the original vector data contained in the corresponding data sample is located in the memory module; Receive the original vector data returned by each read request based on the second state machine, and send the original vector data to the multiplier-adder; receiving the accumulated vector data returned by each read request based on the third state machine, and sending the accumulated vector data to the multiplier-adder; Accumulating the original vector data and the accumulated vector data returned by the same read request based on the multiplier-adder to obtain an accumulation result corresponding to each read request, and sending the accumulation result to the fourth state machine; Based on the fourth state machine, the accumulated result corresponding to each read request is updated to the memory module.

12. The data processing method according to claim 11, further comprising: When sending a read request to the memory module, a first sub-request and a second sub-request are sent respectively based on the first state machine; wherein the first sub-request is used to request to read the original vector data of the data sample currently being read, and the second sub-request is used to request to read the accumulated vector data corresponding to the data sample requested to be read by the first sub-request in the same read request.

13. The data processing method according to claim 11, further comprising: Based on the first state machine and based on the sparse dimensionality reduction instruction, determine the one-hot bitmap corresponding to each original vector data and each accumulated vector data in each data sample, and send the one-hot bitmap corresponding to each original vector data to the second state machine, and send the one-hot bitmap corresponding to each accumulated vector data to the third state machine.

14. The data processing method according to claim 13, further comprising: Based on the second state machine and the one-hot bitmap corresponding to each original vector data, each received original vector data is sent to a position in the multiplier-adder corresponding to each one-hot bitmap.

15. The data processing method according to claim 13, further comprising: Based on the third state machine and the one-hot bitmaps corresponding to the respective accumulated vector data, the received respective accumulated vector data are sent to the positions corresponding to the respective one-hot bitmaps in the multiplier-adder.

16. The data processing method according to claim 11, further comprising: sending the accumulated vector address to the fourth state machine based on the first state machine; Based on the fourth state machine and the accumulated vector address, the accumulated result corresponding to each read request is written into the location of the accumulated vector data returned by each read request in the memory module.

17. The data processing method according to claim 11, further comprising: After the original vector data corresponding to each read request flows back to the second state machine, sending a first identifier to the second state machine based on the first state machine, where the first identifier is used to identify that all the original vector data corresponding to each read request flows back; After all the original vector data returned by each read request are sent to the multiplier-accumulator, the first identifier is sent to the multiplier-accumulator based on the second state machine.

18. The data processing method according to claim 11, further comprising: After the accumulated vector data corresponding to each read request flows back to the third state machine, sending a second identifier to the third state machine based on the first state machine, where the second identifier is used to identify that all the accumulated vector data corresponding to each read request flows back; After all the accumulated vector data returned by each read request are sent to the multiplier-accumulator, the second identifier is sent to the multiplier-accumulator based on the third state machine.

19. The data processing method according to claim 11, further comprising: After all the original vector data corresponding to each data sample in the data packet to be reduced in dimension are all reflowed, sending a third identifier to the second state machine based on the first state machine; The third identifier is used to identify that all original vector data corresponding to each data sample in the data packet to be reduced in dimension are all reflowed; After all the accumulated vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed, a fourth identifier is sent to the third state machine based on the first state machine; the fourth identifier is used to identify that all the accumulated vector data corresponding to each data sample in the data packet to be reduced in dimension have been reflowed; sending the third identifier to the multiplier-accumulator based on the second state machine; The fourth identifier is sent to the multiplier-accumulator based on the third state machine.

20. The data processing method according to claim 11, further comprising: After the accumulated result corresponding to the previous read request is updated to the memory module, a completion instruction is sent to the first state machine based on the fourth state machine; After receiving the completion instruction, the accumulated vector data corresponding to the next data sample is read based on the first state machine.

21. A computer-readable storage medium comprising instructions, which, when executed on a computer, causes the computer to perform the method according to any one of claims 11 to 20.

22. A computing device, comprising a data processing apparatus as claimed in any one of claims 1 to 10, wherein a computer program is stored on the data processing apparatus, and when the data processing apparatus executes the computer program, the data processing method as claimed in any one of claims 11 to 20 is implemented.

Images