Secondary circuit modeling verification method, device, computer, storage medium and program product

By combining image recognition and three-dimensional modeling with simulation and physical verification, the accuracy problem of substation secondary panel cabinet terminal block modeling was solved, and the automation level of digital twin technology in substation secondary circuit design and modeling was improved.

CN119442693BActive Publication Date: 2025-09-23SHENZHEN POWER SUPPLY BUREAU
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Patent Information

Application Number
CN202411662024.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-19
Publication Date
2025-09-23
Estimated Expiration
2044-11-19

AI Technical Summary

Technical Problem

In the existing technology, the accuracy of terminal block modeling in secondary cabinets of substations is poor, and there is a lack of automatic terminal block identification algorithms, which leads to technical barriers in the generation of digital models and the modeling of connection relationships.

Method used

The terminal block image of the secondary panel cabinet is obtained through the image recognition unit, the terminal number and wiring relationship are determined, and the terminal block model is constructed using 3D modeling software. The accuracy of the model is ensured through simulation verification and physical verification.

Benefits of technology

The accuracy and reliability of the substation secondary panel cabinet terminal block model are achieved, and the automation level of digital twin technology in substation secondary circuit design and modeling is improved.

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Abstract

The present application discloses a secondary circuit modeling and verification method, device, computer, storage medium and program product, the method comprising: obtaining a terminal block image; determining the terminal numbers and terminal wiring relationships of all terminals based on the terminal block image; modeling based on the basic structural information, terminal numbers and terminal wiring relationships of all terminals to obtain a target terminal block model; obtaining a first verification result by performing simulation verification on the target terminal block model; performing physical verification on the target terminal block model based on the operating status data of the terminals in the substation to obtain a second verification result; obtaining a target verification result based on the first verification result and the second verification result. By modeling based on the basic structural information, terminal numbers and terminal wiring relationships of the terminals, and then performing simulation verification and physical verification on the obtained target terminal block model, the accuracy of the generated target terminal block model is ensured.
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Description

Technical Field

[0001] The present application relates to the technical field of substations, and in particular to a secondary circuit modeling and verification method, device, computer, storage medium, and program product. Background Art

[0002] Substations are a vital component of the power system, and the accuracy and effectiveness of their operating equipment, along with timely data updates, are crucial to the stability of power supply. With the rise of digital twin technology, its application in numerous fields, including AC / DC distribution networks and smart grids, is maturing. Digital twin technology demonstrates particular advantages in simulating complex system management. By creating virtual replicas of physical entities, digital twins enable real-time monitoring, predictive analysis, and remote control, thereby enhancing system intelligence and the ability to respond to abnormal situations.

[0003] At present, there is little research on the application of digital twin technology in the design and modeling of secondary circuits in substations. There are certain technical barriers to the automated design of terminal wiring in substation secondary panels, digital model generation, and modeling of connection relationships. In addition, due to the lack of automatic terminal block recognition algorithms, the accuracy of terminal block modeling in secondary panels is poor. Summary of the Invention

[0004] The embodiments of the present application provide a secondary circuit modeling and verification method, device, computer, storage medium and program product, which determines the terminal number and terminal wiring relationship based on the collected terminal block image of the secondary panel cabinet, and then models the terminal according to the basic structural information, terminal number and terminal wiring relationship. The target terminal block model obtained by modeling is subjected to simulation verification and physical verification respectively, so as to ensure the accuracy of the generated target terminal block model.

[0005] In a first aspect, an embodiment of the present application provides a secondary circuit modeling verification method, which is applied to a server of a secondary circuit modeling verification system. The method includes:

[0006] The terminal block image of the secondary panel cabinet in the substation is obtained through the image recognition unit; the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet are determined based on the terminal block image; modeling is performed based on the basic structural information, terminal numbers and terminal wiring relationships of all terminals to obtain a target terminal block model; a first verification result for the target terminal block model is obtained by performing simulation verification on the target terminal block model; the target terminal block model is physically verified based on the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model; a target verification result for the target terminal block model is obtained based on the first verification result and the second verification result.

[0007] In a second aspect, an embodiment of the present application provides a secondary circuit modeling verification device, the device comprising:

[0008] An acquisition module is used to acquire an image of a terminal block of a secondary panel cabinet in a substation through an image recognition unit;

[0009] A processing module is used to determine the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the terminal block image; and is used to model the target terminal block model based on the basic structural information, terminal numbers and terminal wiring relationships of all terminals; and is used to obtain a first verification result for the target terminal block model by performing simulation verification on the target terminal block model; and is used to perform physical verification on the target terminal block model based on the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model; and is used to obtain a target verification result for the target terminal block model based on the first verification result and the second verification result.

[0010] In a third aspect, an embodiment of the present application provides a computer, including:

[0011] A memory, a processor, and a secondary circuit modeling and verification program stored in the memory and executable on the processor, wherein the secondary circuit modeling and verification program is configured to implement part or all of the steps described in any method of the first aspect.

[0012] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a secondary circuit modeling verification program is stored. When the secondary circuit modeling verification program is executed by a processor, some or all of the steps described in any method in the first aspect are implemented.

[0013] In a fifth aspect, embodiments of the present application provide a computer program product, wherein the computer program product includes a computer program operable to cause a computer to perform some or all of the steps described in any method of the first aspect of the embodiments of the present application. The computer program product may be a software installation package.

[0014] By implementing the embodiment of the present application, the server of the secondary circuit modeling and verification system first obtains the terminal block image of the secondary panel cabinet in the substation through the image recognition unit; then, based on the terminal block image, the terminal number and terminal wiring relationship of all terminals in the secondary panel cabinet are determined; then, modeling is performed based on the basic structural information, terminal number and terminal wiring relationship of all terminals to obtain a target terminal block model; then, by performing simulation verification on the target terminal block model, a first verification result for the target terminal block model is obtained; then, based on the operating status data of the terminals in the substation, the target terminal block model is physically verified to obtain a second verification result for the target terminal block model; finally, based on the first verification result and the second verification result, a target verification result for the target terminal block model is obtained. By determining the terminal number and terminal wiring relationship based on the collected terminal block image of the secondary panel cabinet, and then modeling is performed based on the basic structural information, terminal number and terminal wiring relationship of the terminals, the target terminal block model obtained by modeling is subjected to simulation verification and physical verification respectively, thereby ensuring the accuracy of the generated target terminal block model. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.

[0016] Figure 1 This is a schematic diagram of the architecture of a secondary circuit modeling and verification system provided in an embodiment of the present application;

[0017] Figure 2 This is a flow chart of a secondary circuit modeling and verification method provided by an embodiment of the present application;

[0018] Figure 3 This is a structural diagram of a substation circuit information collection device provided by an embodiment of the present application;

[0019] Figure 4 This is a schematic diagram of a prompt information provided by an embodiment of the present application;

[0020] Figure 5 This is a structural diagram of a secondary circuit modeling and verification device provided in an embodiment of the present application;

[0021] Figure 6 It is a structural diagram of a computer provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] In order to enable those skilled in the art to better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative work should fall within the scope of protection of the present invention.

[0023] The terms "first," "second," and "third," etc. in the specification, claims, and drawings of this application are used to distinguish between different objects, not to describe a particular order. In addition, the terms "including," "having," and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0024] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0025] Substations are a vital component of the power system, and the accuracy and effectiveness of their operating equipment, along with timely data updates, are crucial to the stability of power supply. With the rise of digital twin technology, its application in numerous fields, including AC / DC distribution networks and smart grids, is maturing. Digital twin technology demonstrates particular advantages in simulating complex system management. By creating virtual replicas of physical entities, digital twins enable real-time monitoring, predictive analysis, and remote control, thereby enhancing system intelligence and the ability to respond to abnormal situations.

[0026] At present, there is little research on the application of digital twin technology in the design and modeling of secondary circuits in substations. There are certain technical barriers to the automated design of terminal wiring in substation secondary panels, digital model generation, and modeling of connection relationships. In addition, due to the lack of automatic terminal block recognition algorithms, the accuracy of terminal block modeling in secondary panels is poor.

[0027] In response to the above problems, the embodiments of the present application provide a secondary circuit modeling and verification method, device, computer, storage medium and program product. The server of the secondary circuit modeling and verification system first obtains the terminal block image of the secondary panel cabinet in the substation through the image recognition unit; then, based on the terminal block image, the terminal number and terminal wiring relationship of all terminals in the secondary panel cabinet are determined; then, modeling is performed based on the basic structural information, terminal number and terminal wiring relationship of all terminals to obtain a target terminal block model; then, by performing simulation verification on the target terminal block model, a first verification result for the target terminal block model is obtained; then, based on the operating status data of the terminals in the substation, the target terminal block model is physically verified to obtain a second verification result for the target terminal block model; finally, based on the first verification result and the second verification result, a target verification result for the target terminal block model is obtained. By determining the terminal number and terminal wiring relationship based on the collected terminal block image of the secondary panel cabinet, and then modeling is performed based on the basic structural information, terminal number and terminal wiring relationship of the terminals, the target terminal block model obtained by modeling is subjected to simulation verification and physical verification respectively, thereby ensuring the accuracy of the generated target terminal block model.

[0028] The secondary circuit modeling verification method, device, computer, storage medium and program product provided in the embodiments of the present application can be applied to Figure 1 In the secondary circuit modeling verification system shown, see Figure 1 , Figure 1 This is a schematic diagram of the architecture of a secondary circuit modeling and verification system provided in an embodiment of the present application. The secondary circuit modeling and verification system 100 includes a terminal 101 and a server 102. The terminal 101 can communicate with the server 102 through a network. The terminal 101 refers to a device used by the user, such as a smart phone, a computer, etc. In this solution, the terminal 101 provides an interface for the user to interact with the secondary circuit modeling and verification system 100. Through the terminal 101, the user can interact with the secondary circuit modeling and verification system 100 and send the basic structural information of all terminals, the terminal number association relationship, and the secondary panel cabinet circuit diagram to the server 102. The user can set or change the terminal input parameters, simulation condition parameters, and preset scores through the terminal 101. The user can also adjust the specific indicator quantity of the image quality evaluation index through the terminal 101.

[0029] Server 102 refers to a remote computer used to process large amounts of computing tasks and store data. In this solution, server 102 is responsible for controlling the image recognition device to collect images of the secondary panel cabinets in the substation. Server 102 determines the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the collected terminal block images: then, based on the basic structural information, terminal numbers, and terminal wiring relationships of all terminals, a model is built to obtain a target terminal block model; finally, the target terminal block model is subjected to simulation verification and physical verification respectively to obtain a target verification result for the target terminal block model. Server 102 is also used to send prompt information to terminal 101, and the prompt information includes the target verification result for the target terminal block model, which is used to indicate the accuracy of the obtained target terminal block model.

[0030] Based on this, the present application provides a secondary circuit modeling verification method, device, computer, storage medium and program product, and the present application is described in detail below with reference to the accompanying drawings.

[0031] See also Figure 2 , Figure 2 This is a flow chart of a secondary circuit modeling verification method provided by an embodiment of the present application. Figure 2 As shown, the method includes the following steps:

[0032] S201: Acquire a terminal block image of a secondary panel cabinet in a substation through an image recognition unit.

[0033] Among them, the execution subject of this method can be Figure 1 The server 102 of the secondary circuit modeling and verification system 100 is shown.

[0034] The image recognition unit refers to a device or software that analyzes and processes input image data and performs computer vision tasks such as image recognition, object detection, and feature extraction. In this method, the image recognition unit is also used to capture images of the terminal blocks of the secondary cabinet. For example, the image recognition unit can be a smartphone, digital camera, or industrial camera.

[0035] Specifically, see Figure 3 , Figure 3 This is a schematic diagram of the structure of a substation circuit information collection device provided by an embodiment of the present application. Figure 3As shown, the substation circuit information collection device includes a spiral screw 1, a dynamic moving unit 2, a stepper motor 21, a slider 22, a positioning rail 23, a power supply 24, and an image recognition unit 3. The spiral screw 1 is designed as a spiral screw structure, connected to the stepper motor 21 of the dynamic moving unit 2, and controlled by the stepper motor 21, thereby rotating the spiral screw 1; the dynamic moving unit 2 is installed at the bottom of the spiral screw 1, and a slider 22 is designed on the spiral screw 1. Positioning rails 23 are installed on both sides of the spiral screw 1 to complete the up and down movement of the slider 22. Image recognition units 3 are respectively provided on both sides of the dynamic moving unit 2. When the slider 22 moves up and down, the image recognition unit 3 is driven to move up and down; preferably, the image recognition unit 3 is a megapixel industrial line array camera that performs line scanning to complete the picture taking of the left and right terminal blocks from top to bottom in the secondary screen cabinet.

[0036] Among them, after the image recognition unit obtains the terminal block image, the acquisition medium control unit can synthesize the terminal block photo and transmit it to the server for subsequent processing. Specifically, the acquisition medium control unit is designed with an extremely stable ISP processing algorithm and Gigabit Ethernet port structure.

[0037] Secondary cabinets are devices used in substations to redistribute and control high-voltage current. They typically contain various electrical components (such as circuit breakers and relays) and terminal blocks. Specifically, terminal blocks connect the electrical components within the secondary cabinet and are used to receive and distribute power signals. Terminal blocks typically consist of metal wires or pins and include multiple terminals, each of which is used to connect one or more cables or wire harnesses to the corresponding electrical components.

[0038] In a possible implementation, the acquiring of the terminal block image of the secondary panel cabinet in the substation by the image recognition unit includes:

[0039] A plurality of first images of a secondary panel cabinet in a substation are acquired through an image recognition unit; a preprocessing operation is performed on the plurality of first images to obtain a plurality of second images, the preprocessing operation including a denoising operation, a contrast enhancement operation and a brightness adjustment operation; based on the secondary panel cabinet layout information, whether the plurality of second images include a complete terminal area is determined; if it is detected that at least one second image among the plurality of second images includes a complete terminal area, the at least one second image is determined to be a third image; the at least one third image is scored according to an image quality assessment index, and the image with the highest score among the at least one third image is determined to be a terminal block image; if it is detected that multiple second images among the plurality of second images do not include a complete terminal area, it is determined whether there is a fourth image including a complete terminal area obtained by merging the plurality of second images including different terminal areas; if it is detected that there is a fourth image including a complete terminal area obtained by merging the plurality of second images including different terminal areas; the fourth image is scored according to the image quality assessment index, and whether the score of the fourth image is greater than a preset score; if it is detected that the score of the fourth image is greater than the preset score, the fourth image is determined to be a terminal block image.

[0040] The secondary screen cabinet layout information may be set or uploaded by the user at the terminal 101 , and then acquired by the server 102 from the terminal 101 .

[0041] Among them, image quality evaluation indicators include but are not limited to clarity evaluation indicators, contrast evaluation indicators and noise level evaluation indicators. Specifically, clarity evaluation indicators include but are not limited to sharpness and peak signal-to-noise ratio (PSNR). Sharpness is used to measure the clarity of edges or details in an image. Common methods include gradient operators, frequency domain analysis, etc. The peak signal-to-noise ratio represents an indicator of reconstruction quality by calculating the mean square error between the original image and the compressed or processed image. Contrast evaluation indicators include but are not limited to dynamic range and relative contrast. Dynamic range reflects the degree of difference between bright and dark areas of an image, and is usually measured using the ratio between maximum brightness and minimum brightness. Relative contrast calculates contrast based on the intensity difference between different grayscale levels in a local area. Noise level assessment metrics include, but are not limited to, the root mean square error (RMSE) and the structural similarity index (SSIM). The RMSE measures the improvement achieved by removing or reducing noise by calculating the root mean square error between the original image and the denoised or processed image. The SSIM evaluates the denoising effect by comparing the structure, texture, and grayscale distribution of the original image and the denoised or processed image.

[0042] Among them, by merging the multiple second images containing different terminal areas, a fourth image containing a complete terminal area is obtained. For example, there are 4 second images, each of which does not contain a complete terminal area. The complete terminal area is S, and the partial terminal areas contained in the 4 second images are S1, S2, S3 and S4 respectively. Among them, S can be merged to obtain S1, S2, S3 and S4. Therefore, the fourth image containing the complete terminal area S can be obtained by merging the 4 second images.

[0043] Among them, the preset score can be set or changed by the user at the terminal 101. The preset score can be 10, 15, etc., and there is no restriction here. For example, the score of the fourth image is 11, and the preset score is 10. At this time, whether the score of the fourth image is greater than the preset score, it is determined that the fourth image is a terminal strip image.

[0044] As can be seen, in this example, if none of the multiple second images contain a complete terminal area, a determination is made as to whether a fourth image containing a complete terminal area can be obtained by merging the second images containing different terminal areas. Upon detecting the presence of a fourth image containing a complete terminal area through merging, the image is scored using the same image quality assessment metric. If the score is greater than a preset score, the fourth image is confirmed as the final terminal strip image. This facilitates the efficient use of multiple images and, in combination with quality assessment methods, selects a terminal strip image that meets the requirements and is of good quality.

[0045] In a possible implementation, scoring the at least one third image according to the image quality assessment index and determining that the image with the highest score among the at least one third image is the terminal block image includes:

[0046] Score the at least one third image according to the clarity assessment index to obtain a clarity score; score the at least one third image according to the contrast assessment index to obtain a contrast score; score the at least one third image according to the noise level assessment index to obtain a noise level score; obtain a first score according to the clarity assessment weight factor and the clarity score; obtain a second score according to the contrast assessment weight factor and the contrast score; obtain a third score according to the noise level assessment weight factor and the noise level score; obtain a score for the at least one third image according to the first score, the second score and the third score; and determine that the image with the highest score among the at least one third image is the terminal block image.

[0047] Specifically, the formula for scoring the third image according to the image quality assessment index is as follows:

[0048] Score = αxK1 + βxK2 + γxK3;

[0049] Among them, Score is the score of the third image, α is the clarity evaluation weight factor, β is the contrast evaluation weight factor, γ is the noise level evaluation weight factor, K1 is the clarity score, K2 is the contrast score, and K3 is the noise level score.

[0050] The score of the third image may also be a combination of other mathematical operations of the first score, the second score and the third score. For example, the score of the third image may be the sum of the first score, the second score and the third score.

[0051] Exemplarily, there are four third images, and the scores of the four third images are 4, 7, 3, and 9 respectively. Therefore, the third image with a score of 9 is determined to be a terminal strip image.

[0052] As can be seen, in this example, at least one third image is scored for clarity, contrast, and noise level to obtain a corresponding score. A comprehensive score is calculated based on the scores and weighting factors, and the image with the highest score is selected as the terminal strip image. This helps ensure that a terminal strip image with good clarity, good contrast, and low noise is selected.

[0053] S202: Determine the terminal numbers and terminal connection relationships of all terminals in the secondary panel cabinet according to the terminal block image.

[0054] Each terminal in a secondary panel has a unique identifier or number for easy identification and location within the electrical system. The terminal number can be provided directly by the equipment manufacturer, obtained from equipment drawings or documentation, or directly read from a nearby location on the terminal. For example, a secondary panel may have terminals A, B, C, and D.

[0055] The terminal wiring relationship refers to the connection method and layout pattern between different terminals. This describes how the terminals are interconnected to transmit signals, current, or energy. By determining the wiring relationship between each terminal and its associated terminals, an electrical connection diagram can be created. For example, a secondary panel contains terminals A, B, C, and D. The terminal wiring relationship is that terminal A is connected to terminal C, and terminal B is connected to terminal D.

[0056] In a possible implementation, determining the terminal numbers and terminal connection relationships of all terminals in the secondary panel cabinet according to the terminal block image includes:

[0057] Determine all terminals in the secondary panel cabinet based on the terminal row image; determine the terminal numbers of all terminals in the secondary panel cabinet based on the numbers of the target positions of all terminals in the secondary panel cabinet; determine the terminal wiring relationship of all terminals in the secondary panel cabinet based on the association between the terminal numbers of all terminals and preset terminal numbers.

[0058] After acquiring the terminal block image, a preprocessing operation may be performed on the terminal block image. The preprocessing operation includes but is not limited to a denoising operation, a contrast enhancement operation, and a brightness adjustment operation.

[0059] By relying on computer vision technology, the outline of each terminal area can be located and extracted in the terminal block image, thereby determining all terminals in the secondary panel cabinet. Specifically, the method for determining all terminals in the terminal block image can be:

[0060] Edge detection uses edge detection algorithms (such as Canny edge detection) to find boundary lines in the image. Since terminals usually have obvious shapes and contours, edge detection can help extract these features.

[0061] Shape analysis uses shape analysis techniques, such as Hough transform or contour fitting, to identify areas in the image that conform to the geometric shape of the predetermined terminal (e.g., circle, square, etc.).

[0062] Color analysis: When acquiring terminal block images as RGB images, analyze the color characteristics of the terminal blocks in the secondary cabinet. By setting a threshold or using color space conversion (such as HSV), areas that match the expected color are filtered out.

[0063] Template matching: Create a database containing known terminal sample templates, and use the template matching algorithm to find local areas with high similarity in the image, and identify the areas with high matching degree with the template as terminal areas.

[0064] The circuit structure in the secondary cabinet follows a certain pattern. After determining the location of each terminal, the terminal number can be further determined based on the terminal's location and target location. Specifically, on each extracted terminal area, optical character recognition (OCR) technology or pattern matching methods are applied to automatically identify the number at the target location. For example, there are four terminals in the secondary cabinet, and the target location is 1 cm below the terminal. The numbers at the four target locations are A, B, C, and D. Therefore, the four terminals in the secondary cabinet are terminal A, terminal B, terminal C, and terminal D.

[0065] The terminal number association relationship can be set or changed by the user at the terminal 101. The terminal number association relationship data can be stored in a terminal number association relationship table. For example, there are terminals A, B, C, and D in the secondary panel cabinet. The terminal number association relationship table is as follows:

[0066]

[0067]

[0068] Among them, the connection between terminal A and terminal C and the connection between terminal B and terminal D can be determined through the terminal number association relationship table.

[0069] It can be seen that in this example, by analyzing the terminal block image, determining the terminal numbers of all terminals, and then determining the connections of all terminals based on the preset terminal number association relationship, it is beneficial to achieve an accurate description of the internal circuit of the secondary panel cabinet.

[0070] In one possible embodiment, determining the terminal numbers and terminal connection relationships of all terminals in the secondary panel cabinet according to the terminal block image includes:

[0071] Determine the positions of all terminals in the secondary panel cabinet according to the terminal row image;

[0072] The terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet are determined according to the positions of all terminals in the secondary panel cabinet and the secondary panel cabinet circuit diagram, wherein the secondary panel cabinet circuit diagram is used to indicate the terminal numbers and terminal wiring relationships of terminals at different positions in the secondary panel cabinet.

[0073] After acquiring the terminal block image, a preprocessing operation may be performed on the terminal block image. The preprocessing operation includes but is not limited to a denoising operation, a contrast enhancement operation, and a brightness adjustment operation.

[0074] Among them, by relying on computer vision technology, the outline of each terminal area can be located and extracted in the terminal block image, and then the position of all terminals in the secondary panel cabinet can be determined.

[0075] The secondary cabinet wiring diagram may be uploaded by the user at the terminal 101 and then received by the server 102 from the terminal 101 , or the secondary cabinet wiring diagram may be directly obtained by the server 102 from relevant manufacturers.

[0076] Among them, the secondary panel cabinet circuit diagram is used to indicate the terminal numbers and terminal wiring relationships of the terminals at different positions in the secondary panel cabinet. By comparing the positions of all terminals in the secondary panel cabinet and the positions of different terminals in the secondary panel cabinet circuit diagram, the wiring relationship of different terminals in the secondary panel cabinet can be determined. For example, there are 4 terminals in the secondary panel cabinet, namely terminal A at the upper left, terminal B at the upper right, terminal C at the lower left, and terminal D at the lower right. At this time, the upper left terminal in the secondary panel cabinet circuit diagram is connected to the lower left terminal, and the upper right terminal is connected to the lower right terminal. Therefore, terminal A is connected to terminal C, and terminal B is connected to terminal D.

[0077] It can be seen that in this example, by analyzing the terminal block image, the terminal numbers and positions of all terminals are determined, and then the connections of all terminals are determined based on the terminal positions and the secondary panel cabinet circuit diagram, which is conducive to achieving an accurate description of the internal circuit of the secondary panel cabinet.

[0078] S203: Modeling is performed according to the basic structural information, terminal numbers, and terminal wiring relationships of all the terminals to obtain a target terminal block model.

[0079] Among them, the basic construction information of all terminals includes the size information and material information of all terminals. Specifically, the size information of the terminals includes the geometric size and shape information of each terminal, and the material information of the terminals indicates the material used for the terminals. For example, the size of terminal A is 12mmx4mmx4mm, and the material of terminal A is brass.

[0080] In a possible implementation, the modeling is performed based on the basic structural information, terminal numbers, and terminal wiring relationships of all the terminals to obtain a target terminal block model, including:

[0081] The terminal block is modeled according to the basic structural information of all the terminals using three-dimensional modeling software to obtain a first terminal block model; the first terminal block model is adjusted according to the terminal numbers and terminal wiring relationships of all the terminals in the secondary panel cabinet to obtain a second terminal block model, which is the target terminal block model.

[0082] The 3D modeling software may be SolidWorks, AutoCAD, CATIA, etc., and is not limited here.

[0083] Among them, the geometric appearance of the first terminal block model is created in the virtual environment according to the basic structural information of the terminals, and then the first terminal block model is further adjusted according to the terminal numbers and terminal wiring relationships of all terminals, the correct numbers are assigned to the terminals at each corresponding position, and the correct wiring relationships between them are determined.

[0084] As can be seen, in this example, the terminal block is modeled using 3D modeling software and adjusted according to the terminal numbering and wiring relationship in the secondary panel cabinet to obtain the target terminal block model. This helps ensure that the target terminal block model can accurately describe and visualize the electrical connection status.

[0085] S204 , obtaining a first verification result for the target terminal block model by performing simulation verification on the target terminal block model.

[0086] In a possible implementation, performing simulation verification on the target terminal block model to obtain a first verification result for the target terminal block model includes:

[0087] Terminal input parameters and simulation condition parameters for the target terminal block model are defined in the simulation software, wherein the terminal input parameters are used to indicate the input signal source of the terminal; the target terminal block model is simulated by the simulation software according to the terminal input parameters and the simulation condition parameters to obtain a first verification result for the target terminal block model.

[0088] Among them, the terminal input parameters are used to define the input signal source of each terminal, including the numerical value and waveform characteristics of voltage, current or other related signals; the simulation condition parameters are used to indicate the simulation time, sampling frequency and simulation step size for simulating the target terminal block model; the first verification result is used to indicate whether the function of the target terminal block model is normal.

[0089] It can be seen that in this example, by simulating the target terminal block model and obtaining the first verification results, it is possible to evaluate whether the expected functions of the target terminal block model are operating normally.

[0090] S205 , performing physical verification on the target terminal block model according to the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model.

[0091] In a possible implementation, performing physical verification on the target terminal block model according to the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model includes:

[0092] The first operating status data of all terminals in the substation are obtained through monitoring equipment; the second operating status data of all terminals in the target terminal block model are obtained, and the second operating status data are used to indicate the simulation operating parameters of the terminals in the target terminal block model; by performing preprocessing operations on the first operating status data and the second operating status data, first verification operating status data and second verification operating status data are obtained; and a second verification result for the target terminal block model is obtained based on the first verification operating status data and the second verification operating status data.

[0093] The first operating status data is used to indicate actual operating parameters of the terminal in the substation, and the second verification result is used to indicate whether the target terminal block model is accurate.

[0094] The preprocessing operation includes a denoising operation, a filtering operation, a normalization operation, a time alignment operation, and a resampling operation, wherein the time alignment operation and the resampling operation are used to adjust the sampling frequency and time interval of the first operating parameter and the second operating parameter to be consistent.

[0095] It can be seen that in this example, by comparing the first operating status data obtained by actual monitoring with the second operating status data obtained by simulation, and combining the preprocessing operation, the accuracy and reliability of the target terminal block model can be further verified and evaluated.

[0096] S206: Obtain a target verification result for the target terminal block model according to the first verification result and the second verification result.

[0097] In a possible implementation, obtaining a target verification result for the target terminal block model according to the first verification result and the second verification result includes:

[0098] It is detected that the first verification result is that the target terminal strip model is not functioning properly, and / or the second verification result is that the target terminal strip model is inaccurate, and it is determined that the target verification result for the target terminal strip model is that there is a problem with the target terminal strip model; it is detected that the first detection result is that the target terminal strip model is functioning properly and the second detection result is that the target terminal strip model is accurate, and it is determined that the target verification result for the target terminal strip model is that there is no problem with the target terminal strip model.

[0099] It can be seen that in this example, by combining the first verification result and the second verification result to determine the target verification result for the target terminal block model, it is helpful to judge and evaluate the performance and reliability of the target terminal block model, and guide subsequent fault diagnosis, design optimization or system adjustment work.

[0100] In a possible implementation, the method further includes:

[0101] After obtaining the target verification result for the target terminal block model, a prompt message is sent to the terminal.

[0102] The prompt information is sent to the user via email, text message, mobile application push notification, online platform message, and phone notification. The prompt information can be text or graphic information, and the prompt information includes the target verification result for the target terminal block model.

[0103] For example, see Figure 4 , Figure 4 This is a schematic diagram of a prompt information provided by an embodiment of the present application, such as Figure 4 As shown in the figure, assume that the user has specified a mobile phone number X in the terminal settings to receive notification messages. Then, when the secondary circuit modeling and verification system determines the target verification result for the target terminal strip model, it can send the following plain text message as the first notification message: "The current target verification result is that there are no issues with the target terminal strip model." This plain text message is sent to the user via the pre-set mobile phone number X. Upon receiving this message, the user is informed that the secondary circuit modeling and verification task has been successfully completed and can further view the relevant results or perform other operations.

[0104] It can be seen that in this example, by sending prompt information to the user, the user can quickly obtain the target verification result for the target terminal block model, and the user experience is enhanced through the real-time feedback mechanism.

[0105] See also Figure 5 , Figure 5 This is a structural diagram of a secondary circuit modeling and verification device provided in an embodiment of the present application. Figure 5 As shown, the secondary circuit modeling and verification device 500 includes:

[0106] An acquisition module 501 is configured to acquire an image of a terminal block of a secondary panel cabinet in a substation through an image recognition unit;

[0107] Processing module 502 is used to determine the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the terminal block image; and to model according to the basic structural information, terminal numbers and terminal wiring relationships of all terminals to obtain a target terminal block model; and to obtain a first verification result for the target terminal block model by performing simulation verification on the target terminal block model; and to perform physical verification on the target terminal block model based on the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model; and to obtain a target verification result for the target terminal block model based on the first verification result and the second verification result.

[0108] In one possible implementation, in terms of determining the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the terminal row image, the processing module 502 is specifically used to: determine all terminals in the secondary panel cabinet based on the terminal row image; determine the terminal numbers of all terminals in the secondary panel cabinet based on the numbers of the target positions of all terminals in the secondary panel cabinet; determine the terminal wiring relationship of all terminals in the secondary panel cabinet based on the association relationship between the terminal numbers of all terminals and preset terminal numbers.

[0109] In one possible implementation, in terms of determining the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the terminal row image, the processing module 502 is specifically used to: determine the positions of all terminals in the secondary panel cabinet based on the terminal row image; determine the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the positions of all terminals in the secondary panel cabinet and the secondary panel cabinet circuit diagram, wherein the secondary panel cabinet circuit diagram is used to indicate the terminal numbers and terminal wiring relationships of terminals at different positions in the secondary panel cabinet.

[0110] In one possible implementation, the basic construction information of all terminals includes the size information and material information of all terminals. In terms of modeling according to the basic construction information, terminal numbers and terminal wiring relationships of all terminals to obtain a target terminal block model, the processing module 502 is specifically used to: model the terminal block according to the basic construction information of all terminals through three-dimensional modeling software to obtain a first terminal block model; adjust the first terminal block model according to the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet to obtain a second terminal block model, and the second terminal block model is the target terminal block model.

[0111] In one possible implementation, in terms of obtaining a first verification result for the target terminal block model by simulating and verifying the target terminal block model, the processing module 502 is specifically used to: define terminal input parameters and simulation condition parameters for the target terminal block model in the simulation software, the terminal input parameters are used to indicate the input signal source of the terminal, and the simulation condition parameters are used to indicate the simulation time, sampling frequency and simulation step size for simulating the target terminal block model; simulate the target terminal block model according to the terminal input parameters and the simulation condition parameters through the simulation software to obtain a first verification result for the target terminal block model, and the first verification result is used to indicate whether the function of the target terminal block model is normal.

[0112] In one possible implementation, in terms of performing physical verification on the target terminal block model based on the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model, the processing module 502 is specifically used to: obtain the first operating status data of all terminals in the substation through monitoring equipment, and the first operating status data is used to indicate the actual operating parameters of the terminals in the substation; obtain the second operating status data of all terminals in the target terminal block model, and the second operating status data is used to indicate the simulated operating parameters of the terminals in the target terminal block model; obtain first verification operating status data and second verification operating status data by performing preprocessing operations on the first operating status data and the second operating status data, wherein the preprocessing operations include denoising operations, filtering operations, normalization operations, time alignment operations, and resampling operations; obtain a second verification result for the target terminal block model based on the first verification operating status data and the second verification operating status data, and the second verification result is used to indicate whether the target terminal block model is accurate.

[0113] In one possible implementation, in terms of obtaining a target verification result for the target terminal strip model based on the first verification result and the second verification result, the processing module 502 is specifically used to: detect that the first verification result is that the target terminal strip model is not functioning properly, and / or the second verification result is that the target terminal strip model is inaccurate, and determine that the target verification result for the target terminal strip model is that there is a problem with the target terminal strip model; detect that the first detection result is that the target terminal strip model is functioning properly and the second detection result is that the target terminal strip model is accurate, and determine that the target verification result for the target terminal strip model is that there is no problem with the target terminal strip model.

[0114] In one possible implementation, in terms of acquiring the terminal row image of the secondary panel cabinet in the substation through the image recognition unit, the acquisition module 501 is specifically used to: acquire multiple first images of the secondary panel cabinet in the substation through the image recognition unit; perform a preprocessing operation on the multiple first images to obtain multiple second images, and the preprocessing operation includes a denoising operation, a contrast enhancement operation, and a brightness adjustment operation; determine whether the multiple second images contain a complete terminal area based on the secondary panel cabinet layout information; if it is detected that at least one second image in the multiple second images contains a complete terminal area, then determine that the at least one second image is a third image; score the at least one third image according to the image quality evaluation index to determine that the at least one third image is a third image. The image with the highest score in the image is the terminal row image, and the image quality evaluation index includes a clarity evaluation index, a contrast evaluation index and a noise level evaluation index; if it is detected that multiple second images among the multiple second images do not contain a complete terminal area, it is judged whether there is a fourth image containing a complete terminal area obtained by merging the multiple second images containing different terminal areas; it is detected that there is a fourth image containing a complete terminal area obtained by merging the multiple second images containing different terminal areas; the fourth image is scored according to the image quality evaluation index, and it is judged whether the score of the fourth image is greater than the preset score; if it is detected that the score of the fourth image is greater than the preset score, it is determined that the fourth image is a terminal row image.

[0115] In one possible implementation, the image quality assessment index includes a clarity assessment index, a contrast assessment index, and a noise level assessment index. In terms of scoring the at least one third image according to the image quality assessment index and determining that the image with the highest score among the at least one third image is the terminal block image, the acquisition module 501 is specifically used to: score the at least one third image according to the clarity assessment index to obtain a clarity score; score the at least one third image according to the contrast assessment index to obtain a contrast score; score the at least one third image according to the noise level assessment index to obtain a noise level score; obtain a first score according to the clarity assessment weight factor and the clarity score; obtain a second score according to the contrast assessment weight factor and the contrast score; obtain a third score according to the noise level assessment weight factor and the noise level score; obtain a score for the at least one third image according to the first score, the second score, and the third score; and determine that the image with the highest score among the at least one third image is the terminal block image.

[0116] It is worth noting that the specific functional implementation of the secondary circuit modeling and verification device 500 is shown in the above Figure 2The description of the secondary circuit modeling verification method shown in the figure, for example, the acquisition module 501 is used to implement the relevant content of executing S201, and the processing module 502 is used to implement the relevant content of executing S202-S206. The various units or modules in the secondary circuit modeling verification device 500 can be individually or completely merged into one or several other units or modules to form a structure, or one (some) of the units or modules can be further divided into multiple functionally smaller units or modules to form a structure, which can achieve the same operation without affecting the realization of the technical effects of the embodiments of the present invention. The above-mentioned units or modules are divided according to logical functions. In actual applications, the functions of one unit (or module) are implemented by multiple units (or modules), or the functions of multiple units (or modules) are implemented by one unit (or module).

[0117] According to the description of the above method embodiment and related device embodiment, please refer to Figure 6 , Figure 6 It is a structural diagram of a computer provided in an embodiment of the present application. Figure 6 The computer 600 shown includes a processor 601 , a memory 602 , a communication interface 603 , and a bus 604 . The processor 601 , the memory 602 , and the communication interface 603 are communicatively connected to each other via the bus 604 .

[0118] Optionally, the memory 602 is a ROM, a static storage device, a dynamic storage device or a RAM.

[0119] The memory 602 can store executable program codes. When the executable program codes stored in the memory 602 are executed by the processor 601, the processor 601 and the communication interface 603 are used to execute the program codes. Figure 2 The various steps of the secondary circuit modeling and verification method of the illustrated embodiment.

[0120] The processor 601 adopts a general CPU, a microprocessor, an application-specific integrated circuit ASIC, a GPU or one or more integrated circuits to execute relevant programs to perform the secondary circuit modeling and verification method of the method embodiment of the present application.

[0121] Processor 601 can also be an integrated circuit chip with signal processing capabilities. During implementation, each step of the secondary circuit modeling and verification method of the present application can be completed by hardware integrated logic circuits or software instructions in processor 601. Optionally, processor 601 is a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component. The processor can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor is a microprocessor or any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly implemented as being executed by a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The optional software module is located in random access memory, flash memory, read-only memory, programmable read-only memory or electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in the memory 602, and the processor 601 reads the information in the memory 602, and combines its hardware to complete the functions required to be executed by the modules included in a secondary circuit modeling and verification device 500 in an embodiment of the present application, or executes the secondary circuit modeling and verification method in the method embodiment of the present application.

[0122] The communication interface 603 uses, for example but not limited to, a transceiver and other transceiver-related devices.

[0123] The bus 604 may include a path for transmitting information between various components of the computer 600 (eg, the memory 602 , the processor 601 , and the communication interface 603 ).

[0124] It should be noted that although Figure 6 The computer 600 shown only shows a memory, a processor, and a communication interface. However, in the specific implementation process, those skilled in the art should understand that the computer 600 also includes other devices necessary for normal operation. At the same time, according to specific needs, those skilled in the art should understand that the computer 600 may also include hardware devices that implement other additional functions. In addition, those skilled in the art should understand that the computer 600 may also include only the devices necessary to implement the embodiments of the present application, and does not necessarily include Figure 6 All devices shown in .

[0125] An embodiment of the present application provides a computer-readable storage medium, which stores a computer program for electronic data exchange. The computer program includes execution instructions, and the execution instructions are used to execute part or all of the steps of any one of the secondary circuit modeling and verification methods described in the above-mentioned secondary circuit modeling and verification method embodiments. The above-mentioned computer includes an electronic terminal device.

[0126] An embodiment of the present application provides a computer program product, wherein the computer program product includes a computer program, and the computer program is operable to enable a computer to perform part or all of the steps of any secondary circuit modeling and verification method described in the above method embodiments. The computer program product can be a software installation package.

[0127] It should be noted that for any of the aforementioned embodiments of the secondary circuit modeling and verification method, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited to the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by this application.

[0128] The above is a detailed introduction to the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of a secondary circuit modeling and verification method, device, computer, storage medium, and program product of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application; at the same time, for a person skilled in the art, based on the idea of ​​a secondary circuit modeling and verification method, device, computer, storage medium, and program product of the present application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

[0129] The present application is described with reference to the flowcharts and / or block diagrams of the methods, hardware products, and computer program products of the embodiments of the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0130] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1The memory may include a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0131] Although the present application has been described herein with reference to various embodiments, those skilled in the art may understand and implement other variations of the disclosed embodiments by examining the drawings, the disclosure, and the appended claims in the course of implementing the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. The fact that certain measures are recited in different dependent claims does not mean that these measures cannot be combined to produce advantageous effects.

[0132] Those skilled in the art will understand that all or part of the steps in the various methods of any of the above-mentioned secondary circuit modeling and verification method embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, which may include: a flash drive, a read-only memory (English: Read-Only Memory, abbreviated as: ROM), a random access memory (English: Random Access Memory, abbreviated as: RAM), a disk or an optical disk, etc.

[0133] It can be understood that any product that is controlled or configured to execute the processing method of the flowchart described in an embodiment of a secondary circuit modeling and verification method of the present application, such as the device and computer program product of the above flowchart, falls within the scope of the related products described in this application.

[0134] Obviously, those skilled in the art may make various modifications and variations to the secondary circuit modeling and verification method, apparatus, computer, storage medium, and program product provided herein without departing from the spirit and scope of the present application. Thus, if such modifications and variations fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations.

Claims

1. A secondary circuit modeling verification method, characterized in that: A server applied to a secondary circuit modeling and verification system, the method comprising: Acquire the terminal block image of the secondary panel cabinet in the substation through the image recognition unit; Determining the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet according to the terminal block image; Modeling the terminal block according to the basic structural information of all the terminals using three-dimensional modeling software to obtain a first terminal block model; wherein the basic structural information of all the terminals includes size information and material information of all the terminals; Adjusting the first terminal block model according to the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet to obtain a second terminal block model, where the second terminal block model is the target terminal block model; By performing simulation verification on the target terminal block model, a first verification result for the target terminal block model is obtained; Performing physical verification on the target terminal block model according to the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model; A target verification result for the target terminal block model is obtained according to the first verification result and the second verification result.

2. The method according to claim 1, wherein Determining the terminal numbers and terminal connection relationships of all terminals in the secondary panel cabinet according to the terminal block image includes: Determine all terminals in the secondary panel cabinet according to the terminal row image; Determining the terminal numbers of all terminals in the secondary panel cabinet according to the numbers of the target positions of all terminals in the secondary panel cabinet; According to the terminal numbers of all the terminals and the preset terminal number association relationship, the terminal wiring relationship of all the terminals in the secondary panel cabinet is determined.

3. The method according to claim 1, wherein Determining the terminal numbers and terminal connection relationships of all terminals in the secondary panel cabinet according to the terminal block image includes: Determine the positions of all terminals in the secondary panel cabinet according to the terminal row image; The terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet are determined according to the positions of all terminals in the secondary panel cabinet and the secondary panel cabinet circuit diagram, wherein the secondary panel cabinet circuit diagram is used to indicate the terminal numbers and terminal wiring relationships of terminals at different positions in the secondary panel cabinet.

4. The method according to any one of claims 1 to 3, wherein The step of obtaining a first verification result for the target terminal block model by performing simulation verification on the target terminal block model includes: Defining terminal input parameters and simulation condition parameters for the target terminal block model in the simulation software, wherein the terminal input parameters are used to indicate the input signal source of the terminal, and the simulation condition parameters are used to indicate the simulation time, sampling frequency, and simulation step size for simulating the target terminal block model; The target terminal block model is simulated by the simulation software according to the terminal input parameters and the simulation condition parameters to obtain a first verification result for the target terminal block model, wherein the first verification result is used to indicate whether the function of the target terminal block model is normal.

5. The method according to any one of claims 1 to 3, wherein The performing physical verification on the target terminal block model according to the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model includes: Acquiring first operating status data of all terminals in the substation through a monitoring device, wherein the first operating status data is used to indicate actual operating parameters of the terminals in the substation; Acquire second operating status data of all terminals in the target terminal block model, where the second operating status data is used to indicate simulation operating parameters of the terminals in the target terminal block model; performing a preprocessing operation on the first operating status data and the second operating status data to obtain first verification operating status data and second verification operating status data, wherein the preprocessing operation includes a denoising operation, a filtering operation, a normalization operation, a time alignment operation, and a resampling operation; A second verification result for the target terminal block model is obtained according to the first verification operation status data and the second verification operation status data, and the second verification result is used to indicate whether the target terminal block model is accurate.

6. The method according to any one of claims 1 to 3, wherein: Obtaining a target verification result for the target terminal block model according to the first verification result and the second verification result includes: It is detected that the first verification result is that the target terminal strip model functions abnormally, and / or the second verification result is that the target terminal strip model is inaccurate, and it is determined that the target verification result for the target terminal strip model is that there is a problem with the target terminal strip model; it is detected that the first verification result is that the target terminal strip model functions normally and the second verification result is that the target terminal strip model is accurate, and it is determined that the target verification result for the target terminal strip model is that there is no problem with the target terminal strip model.

7. The method according to claim 1, wherein The method of obtaining the terminal block image of the secondary panel cabinet in the substation by using the image recognition unit includes: Acquire multiple first images of a secondary panel cabinet in a substation by an image recognition unit; Performing a preprocessing operation on the plurality of first images to obtain a plurality of second images, wherein the preprocessing operation includes a denoising operation, a contrast enhancement operation, and a brightness adjustment operation; Determining, based on the secondary panel cabinet layout information, whether the plurality of second images include a complete terminal area; If at least one of the plurality of second images is detected to contain a complete terminal area, the at least one second image is determined to be a third image; the at least one third image is scored according to an image quality assessment index, and the image with the highest score among the at least one third image is determined to be a terminal row image, the image quality assessment index including a clarity assessment index, a contrast assessment index, and a noise level assessment index; detecting that multiple second images among the multiple second images do not include a complete terminal area, then determining whether there is a fourth image including a complete terminal area obtained by merging the multiple second images including different terminal areas; It is detected that there is a fourth image containing a complete terminal area obtained by merging the multiple second images containing different terminal areas; the fourth image is scored according to the image quality assessment index to determine whether the score of the fourth image is greater than a preset score; when it is detected that the score of the fourth image is greater than the preset score, it is determined that the fourth image is a terminal row image.

8. The method according to claim 7, wherein The image quality assessment index includes a clarity assessment index, a contrast assessment index, and a noise level assessment index. Scoring the at least one third image according to the image quality assessment index, and determining that the image with the highest score among the at least one third image is the terminal block image, includes: Scoring the at least one third image according to the clarity evaluation index to obtain a clarity score; scoring the at least one third image according to the contrast evaluation index to obtain a contrast score; Scoring the at least one third image according to the noise level assessment index to obtain a noise level score; A first score is obtained according to the clarity assessment weight factor and the clarity score; A second score is obtained according to the contrast evaluation weight factor and the contrast score; A third score is obtained according to the noise level assessment weight factor and the noise level score; Obtaining a score for the at least one third image according to the first score, the second score, and the third score; An image with a highest score among the at least one third image is determined to be a terminal strip image.

9. A secondary circuit modeling and verification device, characterized in that: The device comprises: An acquisition module is used to acquire an image of a terminal block of a secondary panel cabinet in a substation through an image recognition unit; A processing module is used to determine the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet based on the terminal block image; and to model the terminal block based on the basic structural information of all terminals through three-dimensional modeling software to obtain a first terminal block model; wherein the basic structural information of all terminals includes the size information and material information of all terminals; and to adjust the first terminal block model based on the terminal numbers and terminal wiring relationships of all terminals in the secondary panel cabinet to obtain a second terminal block model, which is a target terminal block model; and to obtain a first verification result for the target terminal block model by performing simulation verification on the target terminal block model; and to perform physical verification on the target terminal block model based on the operating status data of the terminals in the substation to obtain a second verification result for the target terminal block model; and to obtain a target verification result for the target terminal block model based on the first verification result and the second verification result.

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