Tamper detection device
By designing a tamper detection device including transducer, power supply unit, processing unit, logic gate and tamper label, the problem that the prior art cannot detect tamper events in real time is solved, and accurate detection and recording in unauthorized intrusion is achieved The effect of tampering with events.
Patent Information
- Application Number
- CN202411023065.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-28
- Filing Date
- 2024-07-29
- Publication Date
- 2025-02-14
AI Technical Summary
The prior art cannot detect tamper events in real time, especially in the absence of an RFID/NFC reader, and traditional security systems cannot detect unauthorized intrusions, such as through drilling, etc.
Design a tamper detection device, including a transducer, a power supply unit, a processing unit, a logic gate and a tamper tag, connect these components through a plurality of conductive tracks, and install the logic gate on the operating terminal of the tamper tag to allow the conductive tracks A tamper detection signal is generated during short circuit.
Real-time detection of tamper events and device status is realized, and tamper events can be accurately detected even in the case of short circuit of the conductive track, ensuring safety and reliability.
Smart Images
Figure CN119443141A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates generally to the field of security systems and more particularly to a tamper detection device. Background Art
[0002] The following background art is related to the present disclosure but is not necessarily prior art.
[0003] Currently available security seals / tags based on passive and active radio frequency identification (RFID) or near field communication (NFC) with tamper flags are unable to detect tampering events in real time unless the security seal / tag is polled by an RFID / NFC reader. In the absence of an RFID / NFC reader, a skilled counterfeiter can tamper with such tags / seals and reassemble them without leaving any electronic trace, i.e., without changing the state of the tamper flag. In addition, conventional security systems are unable to detect unauthorized intrusion into the container without touching / damaging the seal (e.g., by drilling a hole in the container). Tamper seals do not record such tampering events. Therefore, in this case, when an RFID reader reads the tamper flag, it will show an untampered state even if the seal / tag has been tampered with, which is undesirable.
[0004] In addition, the conventional seal includes a transducer, logic gates, processing unit, capacitor, power supply unit and tamper tag. These components are assembled on one side and mounted inside the container, except for the tamper tag. The tamper tag is mounted on the outside of the container so that a reader can determine the status of the seal, indicating whether it has been tampered with. The internal components are connected to the external tamper tag through a set of conductive tracks.
[0005] Due to the split mounting of the components - some inside the container and some outside - there is a high risk that a counterfeiter could tamper with the conductive tracks or cables used for these connections. If a counterfeiter shorts one of these conductive tracks, the logic gate responsible for changing the state of the tamper tag is not affected because it is located before the conductive track along with the processing unit inside the container. Therefore, the processing unit detects the tampering but cannot communicate it to the tamper tag because the shorted conductive track prevents the tamper tag from changing its state. This vulnerability allows a counterfeiter to tamper with the seal without changing its state indication.
[0006] Therefore, it is necessary to develop a tampering detection device that eliminates the above-mentioned shortcomings.
[0007] Invention Objectives
[0008] Some of the purposes of the present disclosure met by at least one embodiment herein are as follows:
[0009] The object of the present disclosure is to improve one or more problems of the prior art, or at least to provide a useful alternative;
[0010] An object of the present disclosure is to provide a tamper detection device.
[0011] Another object of the present disclosure is to provide a tamper detection device that detects tamper events and device status in real time.
[0012] Yet another object of the present disclosure is to provide a tamper detection device that can detect a tampering event even if the device is not damaged / destroyed during the tampering process.
[0013] Another object of the present disclosure is to provide a tamper detection device that uses a combination of RFID+NFC communication technologies to eliminate the need for more expensive technologies such as Bluetooth / BLE, Wi-Fi, or complex solutions involving high power consumption communication technologies.
[0014] Yet another object of the present disclosure is to provide a tamper detection device which is able to detect a tamper event even if the conductive tracks are short-circuited.
[0015] Yet another object of the present disclosure is to provide a tamper detection device that provides a different logic gate arrangement by incorporating tamper detection logic that operates independently of the conductive track to ensure that it can directly affect the state of the tamper tag even in the presence of tampering attempts.
[0016] Other objects and advantages of the present disclosure will become more apparent from the following description, which is not intended to limit the scope of the present disclosure. Summary of the invention
[0017] The present disclosure contemplates a tamper detection device. The device is configured to be attached to an operating surface of a container to detect unauthorized intrusion (if present). The device includes: at least one transducer configured to detect a tamper event and generate a corresponding trigger signal when the tamper event is detected; a power supply unit configured to provide power to at least one component of the device; a processing unit that communicates with the power supply unit and the transducer, the processing unit configured to receive the trigger signal from the transducer and process the trigger signal to generate a corresponding tamper detection signal; a logic gate configured to communicate with the processing unit to receive the tamper detection signal, the logic gate configured to be able to operate in an open state and a closed state, and further configured to generate a corresponding tamper detection signal when an unauthorized intrusion occurs. a tamper tag in communication with the logic gate, the tamper tag being configured to store a tamper flag value and further configured to receive the tamper detection signal from the logic gate to change the tamper flag value, wherein the tamper flag value indicates the tamper state of the device; a plurality of conductive tracks configured to connect the logic gate, the tamper tag and at least one of the transducers to the processing unit individually; a capacitor configured to communicate with the processing unit to facilitate power supply in the absence of the power supply unit. The device is characterized in that the logic gate is mounted on the operating terminals of the tamper tag, thereby facilitating the generation of the tamper detection signal when at least one of the conductive tracks is short-circuited, thereby changing the tamper state of the device from "not tampered" to "tampered" in response to an unauthorized intrusion.
[0018] In an embodiment, the unauthorized intrusion event includes:
[0019] • receiving said trigger signal from at least one of said transducers; and
[0020] • Detecting a cut-off of the power supply from the power supply unit.
[0021] In an embodiment, the transducer, the power supply unit, the capacitor and the processing unit are mounted together as a circuit module on an operable inner surface of the container.
[0022] In an embodiment, the tamper tag and the logic gate are mounted together as an antenna module on an operable outer surface of the container.
[0023] In an embodiment, the device comprises an antenna configured to be mounted on the antenna module to communicate with the tamper tag. The antenna is configured to transmit the state of the device to the reader when the tag is scanned by the reader. The antenna is selected from the group consisting of a radio frequency identification (RFID) antenna, a near field communication (NFC) antenna, and an NFC+RFID antenna.
[0024] In an embodiment, the circuit module communicates with the antenna module by means of the plurality of conductive tracks.
[0025] In an embodiment, the plurality of conductive tracks include a first conductive track connecting the logic gate with the processing unit, a second conductive track connecting the tamper tag with the processing unit, and a third conductive track connecting the tamper tag with the processing unit.
[0026] In an embodiment, a short circuit of any of the first conductive track and the second conductive track, the first conductive track and the third conductive track, or the second conductive track and the third conductive track causes the tamper detection signal to be generated, thereby changing the state of the device from a "not tampered" to a "tampered" state.
[0027] In an embodiment, the transducer comprises a first transducer and a second transducer. The first transducer is configured to sense a change in pressure of the container and is typically selected from a group of pressure transducers. The second transducer is configured to sense the presence of light in the container in an operational configuration of the device and is typically selected from a group of photoelectric transducers.
[0028] In an embodiment, the antenna module includes an LED display in communication with the tamper tag. The LED display is configured to flash at different predetermined intervals to indicate the state of the device, and the state is selected from the group consisting of an armed state, an armed state, an untampered state, and a tampered state.
[0029] In an embodiment, the tamper tag comprises a set of sensors configured to detect at least one critical parameter corresponding to a change in the state of the logic gate and to generate a corresponding sensed signal.
[0030] In an embodiment, the LED display is configured to communicate with the set of sensors. The LED display is configured to receive the sensed signals from the set of sensors and is further configured to indicate the status of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The tamper detection device of the present disclosure will now be described with the aid of the accompanying drawings, in which:
[0032] Figure 1 A block diagram showing a conventional tamper detection device (prior art);
[0033] Figure 2 Show Figure 1 The conventional tamper detection device is fixedly arranged on the container door; (Prior Art) Figure 3A shows the operation of a logic gate (transistor) connected to a terminal of a tamper tag when a zero potential voltage is applied to the base of the logic gate (off);
[0034] Figure 3B shows the operation of a logic gate (transistor) connected to a terminal of a tamper tag when a desired potential voltage is applied to the base of the logic gate (turned on);
[0035] Figure 4A A circuit diagram is shown showing a logic gate and a tamper tag connected via a plurality of conductive tracks in a conventional tamper detection device, with a zero potential voltage applied across the circuit;
[0036] Figure 4B A circuit diagram is shown showing logic gates and tamper tags connected via a plurality of conductive tracks in a conventional tamper detection device, with a desired potential voltage applied across the circuit;
[0037] Figure 5 A block diagram of a tamper detection device according to the present disclosure is shown.
[0038] Figure 6 A circuit diagram according to the present disclosure is shown, showing a power supply unit, a transducer connected via a plurality of conductive tracks with LED indicators, and a tamper tag.
[0039] Fig. 7A shows a circuit diagram according to a first embodiment of the present disclosure, showing a tamper tag and a logic gate connected to a terminal of the tamper tag, wherein a zero potential voltage is applied across the circuit via a plurality of conductive tracks;
[0040] Figure 7B shows a circuit diagram according to a first embodiment of the present disclosure, showing a tamper tag and a logic gate connected to a terminal of the tamper tag, wherein the conductive tracks are short-circuited and a zero potential voltage is applied across the circuit;
[0041] Fig. 8A shows a circuit diagram according to a second embodiment of the present disclosure, showing a tamper tag and a logic gate connected to a terminal of the tamper tag, wherein a desired potential voltage is applied across the circuit via a plurality of conductive tracks;
[0042] Figure 8Bshowing a circuit diagram according to a second embodiment of the present disclosure, showing a tamper tag and a logic gate connected to the terminals of the tamper tag, with the conductive tracks shorted and a desired potential voltage applied across the circuit; and
[0043] FIG. 9A to FIG. 9I Show Description Figure 5 Flow chart of various status indications of a tamper detection device.
[0044] List of Reference Symbols Used in the Detailed Description and Drawings
[0045] 100' – Traditional tamper detection device
[0046] 100-Tamper detection device of the present disclosure
[0047] 102 – Tampering with labels
[0048] 104 – Processing Unit
[0049] 106 – First Transducer
[0050] 108 – Auxiliary capacitor
[0051] 110 – Second transducer
[0052] 112 – Logic Gate (BJT / MOSFET)
[0053] 114 – Battery (power supply unit)
[0054] 116 – Sensor
[0055] 118 – LED Indicator
[0056] 120 – Reader
[0057] 122a – first conductive track
[0058] 122b – Second conductive track
[0059] 122c – Third conductive track
[0060] 124 – Short-circuit conductor track
[0061] 202 – Door frame
[0062] 204 – Door Edge
[0063] 206 – Container Door
[0064] 208 – Inside of container door DETAILED DESCRIPTION
[0065] Embodiments of the present disclosure will now be described with reference to the accompanying drawings.
[0066] The embodiments are provided to thoroughly and fully convey the scope of the present disclosure to those skilled in the art. Many details related to specific components and methods are described to provide a complete understanding of the embodiments of the present disclosure. It will be understood by those skilled in the art that the details provided in the embodiments should not be construed as limiting the scope of the present disclosure. In some embodiments, well-known processes, well-known device structures, and well-known technologies are not described in detail.
[0067] The terms used in the present disclosure are only used to explain specific embodiments, and these terms should not be considered to limit the scope of the present disclosure. As used in the present disclosure, unless the context clearly indicates otherwise, the forms "a", "an", and "the" may also include plural forms. The terms "comprise", "comprising", "including", and "having" are open transition phrases, thus specifying the presence of the features, integers, steps, operations, elements, modules, units, and / or components described, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0068] When an element is referred to as being "mounted on," "engaged to," "connected to," or "coupled to" another element, it may be directly mounted on, engaged to, connected to, or coupled to the other element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed elements.
[0069] Existing security seals / tags (100') are unable to detect tampering events without damaging / destroying the seal. Therefore, the security seal may be subtly tampered with without affecting the value of the tamper flag within the seal, so that when a reader reads the tamper flag, it will show that the seal / tag has not been tampered with even though it has been tampered with. Figure 1 A block diagram showing a conventional tamper detection device (100') or seal (prior art).
[0070] In addition, if Figure 1 As shown, a conventional seal or device (100') includes a transducer, a logic gate (112), a processing unit (104), a capacitor (108), a power supply unit (114), and a tamper tag (102). These components are assembled on one side and mounted inside a container, except for the tamper tag (102). The tamper tag (102) is mounted on the outside of the container to allow a reader to determine the state of the seal, indicating whether it has been tampered with. The internal components are connected to the external tamper tag (102) via a set of conductive tracks. Figure 2 Show Figure 1 The tamper detection device is fixedly arranged on the container door.
[0071] The logic gate (112) acts as a switching element between the two terminals of the tamper tag; it controls the impedance characteristics between the two terminals of the tamper tag. Based on the bias characteristics of the logic gate, the impedance can be low or high. The tamper state of the tamper tag is controlled by this impedance. When the reader reads the tag, the antenna transmits the tamper state of the device to the reader. Once the tamper tag finds the "tampered" state, it is permanently recorded in the EEPROM and cannot be undone by any means.
[0072] like Figure 3A As shown, in the case where the logic gate (112) is in the off state: the logic gate (112), which is typically a transistor, is in the off state when a zero potential voltage (0V) is applied to its base (for an npn bipolar junction transistor (BJT)) or gate (for a normally-on field effect transistor (FET)). In this state, no current is conducted between the collector and emitter (for a BJT) or between the drain and source (for a FET) of the transistor. Therefore, when the logic gate (112) is off, it induces a high impedance between the operating terminals of the tamper tag (102). The high impedance actually means that the circuit between the terminals of the tamper tag (102) and the output of the logic gate (112) is non-conductive. The resistance in the path is very high, and therefore, the current through the path is minimal. When the reader scans the tamper tag, the tamper tag finds a high impedance between its terminals; the antenna transmits the "tampered" state of the device to the reader. As shown Figure 3B As shown, with the logic gate (112) in the on state: the logic gate (112) is considered to be in the on state when a desired potential voltage (e.g., 5V) is applied to its base (for a BJT) or gate (for a FET). Applying this voltage forward biases the transistor, causing it to conduct between the collector and emitter (for a BJT) or between the drain and source (for a FET). When the logic gate (112) is on, it induces a low impedance between the operating terminals of the tamper tag (102). The low impedance means that the circuit between the terminals of the tamper tag (102) and the output of the logic gate (112) becomes conductive. The resistance in this path is significantly reduced, allowing current to flow freely. When the reader scans the tamper tag, the tamper tag finds a lower resistance between its terminals; the antenna transmits the "not tampered" state of the device to the reader.
[0073] Furthermore, due to the split installation of the components - some inside the container and some outside the container - there is a high risk that a counterfeiter could tamper with the conductive tracks or cables used for these connections. If a counterfeiter short-circuits one of these conductive tracks, the logic gate (112) responsible for changing the state of the tamper tag (102) is not affected because it is located before the conductive track along with the processing unit (104) inside the container. Therefore, the processing unit (104) detects the tampering but cannot communicate it to the tamper tag (102) because the short-circuited conductive track prevents the tamper tag (102) from changing its state. This vulnerability allows a counterfeiter to tamper with the seal without changing its state indication.
[0074] like Figure 4A As depicted, a logic gate (112) (typically a transistor) is connected to an operating terminal of a tamper tag (102) via a plurality of conductive tracks (122a, 122b, 122c). The conductive tracks serve as electrical paths to facilitate communication and interaction between the logic gate (112) and the tamper tag (102). When the logic gate (112) is in a state such as Figure 4A In the off state shown (i.e., zero potential voltage is applied across the base of a BJT or the gate of a FET), it behaves as a non-conductive element. In this state, the logic gate (112) introduces a high impedance between its output and the terminals of the tamper tag (102). However, a counterfeiter may attempt to bypass or destroy the tamper tag (102) by using the shorting conductive track 124 to create a short circuit between any two conductive tracks, such as Figure 4B As shown. For example, if track 122a and track 122b are shorted, or if track 122b and track 122c are shorted, the conductive material creates an unexpected low resistance path (low impedance) between these tracks and between the terminals of the tamper tag (102). The short circuit provides a direct electrical path with extremely low resistance, thereby reducing the overall impedance observed across the terminals of the tamper tag (102). In the case of a conventional tamper detection device, the presence of low impedance due to a track short circuit does not necessarily result in a change in the state of the tamper tag (102). This is because the tamper tag (102) may not be able to distinguish between a legitimate operating signal and an induced short circuit condition. As a result, the tamper tag (102) fails to detect the tampering event caused by the short circuit, resulting in its state not being changed in the case of a conventional device (100'). Therefore, the conventional tamper detection device (100') cannot accurately record unauthorized intervention.
[0075] In order to overcome the above-mentioned problems, a tampering state detection device (hereinafter referred to as “device 100 ”) of the present disclosure is conceived.
[0076] The tamper detection device 100 is attached to a product for detecting unauthorized intrusion of the product including containers, storerooms, storage containers, shipping containers, bottles, luggage, valuable merchandise, etc. In the case of a room / container, the device 100 may be secured to one or more doors in the room / container.
[0077] refer to Figure 5 The tamper detection device 100 of the present disclosure includes a tamper tag 102, a processing unit 104, a logic gate 112, a power supply unit 114, at least one transducer (106 and 110), a plurality of conductive tracks (122a, 122b, 122c) and a capacitor 108.
[0078] The transducers 106 , 110 are configured to detect at least one tampering event and are further configured to generate at least one trigger signal upon detection of the at least one tampering event.
[0079] The logic gate 112 is configured to be operable in a state consisting of an open state and a closed state.
[0080] The processing unit 104 is configured to communicate with the power supply unit 114 to receive power. The processing unit 104 is configured to receive power from the power supply unit 114. The processing unit 104 is further configured to cooperate with the transducers 106, 110 and the logic gate 112 to generate a tamper detection signal for changing the state of the logic gate 112 when an event selected from a group of events consisting of the following events occurs:
[0081] (i) receiving a trigger signal from a transducer (106, 110); and
[0082] (ii) Detection of cutoff of power supply from the power supply unit 114.
[0083] The tamper tag 102 is connected to the logic gate 112. The tamper tag includes a set of sensors 116 connected to the logic gate 112. The sensors 116 are configured to detect at least one key parameter corresponding to a change in the state of the logic gate 112 and generate a sensed signal. The tamper tag 102 further includes an LED indicator 118 configured to communicate with the set of sensors. The LED indicator 118 is configured to receive the sensed signal from the set of sensors 116 and is further configured to indicate the state of the device 100.
[0084] Conductive tracks (122a, 122b, 122c) are configured to connect the logic gate (112), the tamper tag (102) and the transducer (106, 110) to the processing unit (104). The conductive tracks facilitate the electrical connections required for signal transmission. The conductive tracks include a first conductive track (122a) connecting the logic gate (112) to the processing unit (104), a second conductive track (122b) connecting the tamper tag (102) to the processing unit (104), and a third conductive track (122c) connecting the tamper tag (102) to the processing unit (104).
[0085] The terminals of the tamper tag 102 are connected to a logic gate 112 driven by a processing unit 104. The proposed configuration is critical because it is able to generate a tamper detection signal when any of the conductive tracks (122a, 122b, 122c) are short-circuited. The logic gate (112) changes the state of the device from "not tampered" to "tampered" in response to the tamper detection signal, thereby indicating an unauthorized intrusion. The short circuit of any of the conductive tracks (122a and 122b, 122a and 122c, or 122b and 122c) generates a tamper detection signal, thereby changing the state of the device to "tampered" in an operational configuration of the device (100).
[0086] Figure 6 A circuit diagram according to the present disclosure is shown, showing a power supply unit, a transducer connected via a plurality of conductive tracks with LED indicators, and a tamper tag.
[0087] In a first embodiment, the logic gate (112) is directly connected to the operating terminals of the tamper tag (102) via conductive tracks. Fig. 7A The key point here is the behavior of the circuit when the logic gate (112) is in the off state and when a counterfeiter attempts to short-circuit the conductive tracks. The logic gate (112) is directly connected to the operating terminals of the tamper tag (102). Fig. 7AAs shown, the connection is established by conductive tracks marked as track 122a, track 122b and track 122c. When the logic gate (112) is in the off state, a zero potential voltage is applied to its base. This causes a high impedance between the terminals of the tamper tag (102), thereby preventing a large amount of current from flowing through the circuit. When a counterfeiter attempts to short-circuit any one of the conductive tracks (122a, 122b, 122c) using a short-circuit conductive track (124). This operation is intended to bypass the expected impedance characteristics of the circuit. When the short-circuit conductive track (124) is used, it produces an alternative low resistance path on the conductive track. In the off state, the short circuit does not significantly change the impedance of the circuit because the high impedance of the logic gate (112) dominates. Despite the short-circuit attempt, the circuit impedance is still high because the logic gate (112) in the off state continues to block a large amount of current. Therefore, the impedance distribution does not change immediately. However, the presence of the short-circuit path changes the expected electrical signal flow. The change in flow triggers the logic gate (112) to re-evaluate the state of the tamper tag (102). Figure 7B In the operational configuration shown, logic gate (112) switches the state of tamper tag (102) from "not tampered" to "tampered".
[0088] In a second embodiment, the logic gate (112) is again connected directly to the operating terminals of the tamper tag (102) via conductive tracks, such as Fig. 8A As shown. The key aspect here is the behavior of the circuit when the logic gate (112) is in the on state (indicating the current state of the tag "not tampered") and when a counterfeiter attempts to short-circuit the conductive tracks. Similar to the first embodiment, the logic gate (112) is directly connected to the operating terminals of the tamper tag (102) through the conductive tracks (tracks 122a, 122b, 122c), as shown. Fig. 8AAs shown. When the logic gate (112) is in the on state, a desired potential voltage (e.g., 5V) is applied across its base, inducing a low impedance across the terminals of the tamper tag (102). This condition allows current to flow freely through the circuit, thereby maintaining a low resistance path. When a counterfeiter attempts to short-circuit any of the conductive tracks (122a, 122b, 122c) using a short-circuited conductive track (124). This operation is intended to manipulate the impedance characteristics of the circuit. When the short-circuited conductive track (124) is introduced, it creates an alternative low resistance path on the conductive track and changes the impedance on the conductive track. In the on state, this modification changes the impedance distribution of the circuit from low impedance to high impedance because the short-circuited path provides a low resistance path. The introduction of the short-circuited track changes the impedance from low to high. This transition is critical because the logic gate (112), which is now in the on state, detects the impedance shift. The change in impedance triggers the logic gate (112) to re-evaluate the state of the tamper tag (102). Therefore, the logic gate (112) changes the state of the tamper tag (102) from "not tampered" to "tampered", as shown in FIG. Figure 8B The operational configuration shown is described.
[0089] In an embodiment, the LED indicator is configured to flash at different predetermined rates to indicate a state of the device 100 selected from the group consisting of an armed state, an armed state, an untampered state, and a tampered state.
[0090] In an embodiment, the tag 102 further comprises an antenna for sending the status of the device 100 to the reader 120 when the reader 120 scans the tag 102. The antenna may be selected from a group consisting of a radio frequency identification (RFID) antenna, a near field communication (NFC) antenna, and an NFC+RFID antenna. Therefore, the RFID / NFC reader 120 can read the tamper flag value.
[0091] In an exemplary embodiment, the device 100 includes two transducers 106, 110. A pair of output terminals / leads of the processing unit 104 is connected to the first transducer 106, and another pair of output terminals / leads in the processing unit 104 is connected to the second transducer 110. The first transducer 106 and the second transducer 110 are configured to detect a tampering event, and the processing unit 104 is further configured to change the state of the logic gate when a tampering event is detected. The change in the state of the logic gate is sensed by a sensor, and the sensor generates a corresponding sensed signal. These signals are received by an LED indicator to indicate the state of the device 100.
[0092] The first and second transducers (106, 110) are selected from the group consisting of a pressure transducer, a flow meter sensor, a temperature sensor, a piezoelectric transducer, a photoelectric transducer, a capacitive sensor, and the like.
[0093] exist Figure 5In an embodiment of the present invention, the first transducer 106 is a pressure transducer and the second transducer 110 is a photoelectric transducer. The device 100 is attached to the container door 206 so that the tamper tag 102 is adhered to the outside of the door 206. The first transducer 106 is placed on a bridge between the door frame 202 and the edge 204 of the door 206. The second transducer 110 is housed in a label adhered to the inner face 208 of the door 206 so that the second transducer is exposed to light only when the door 206 is open.
[0094] The pressure transducer is selected from but not limited to the group consisting of force sensing resistor (FSR), tactile switch, strain gauge, etc. The photoelectric transducer is selected from but not limited to the group consisting of LED (light emitting diode), light dependent resistor (LDR), photodiode, phototransistor, etc.
[0095] In an embodiment, the logic gate 112 is in an open state before use. When the container is loaded and the container door 206 is closed (i.e., locked) after fixing the device 100, the pressure transducer can experience pressure. When the pressure experienced by the pressure transducer reaches a predefined threshold and the light sensor detects a predefined darkness, the processing unit 104 closes the logic gate 112. The threshold pressure value that triggers the closing event can be controlled by adding additional electronic components to adjust the output of the pressure transducer, or by selecting the pressure transducer accordingly. The LED indicator communicates the status of the device 100 by flashing.
[0096] Once logic gate 112 is closed, processing unit 104 may be programmed to open logic gate 112 after a preset delay only if any of the following conditions are met:
[0097] i. when the pressure on the pressure transducer changes by a predetermined value, wherein the predetermined value can be controlled by adding additional electronic components to adjust the output of the pressure transducer, or by selecting the transducer accordingly;
[0098] ii. when a predetermined amount of light falls on the surface of the photoelectric transducer, wherein the predetermined amount can be controlled by adding additional electronic components to adjust the output of the photoelectric transducer, or by selecting the photoelectric transducer accordingly; and
[0099] iii. When someone attempts to remove the power supply unit / battery from the tampering status detection device 100 .
[0100] Once the logic gate 112 is opened due to any one of the above three conditions, the logic gate 112 cannot be closed again. Therefore, when the user scans the tamper tag 102 using a reader, the status of the device 100 is displayed as "tampered" or "unlocked".
[0101] The preset delay of the processing unit 104 ensures that any light falling on the photoelectric transducer before the door 206 is fully closed will not trigger a false signal to open the logic gate. Once the door 206 is fully secured, the interior of the container should be completely dark.
[0102] In an exemplary embodiment, the pressure transducer is placed on a bridge between the frame 202 and the edge 204 of the door 206, and the optoelectronic transducer 110 is fixed to the inside of the door 206. When the door 206 is opened, the bridge of the pressure transducer 106 is squeezed between the frame 202 and the edge 204 of the door 206. This applies pressure to the pressure transducer 106. When the pressure experienced by the pressure transducer 106 changes by a predetermined value, the pressure transducer 106 generates a trigger signal for opening the logic gate 112 to the processing unit 104. The LED indicator communicates the status of the device 100 by flashing.
[0103] Any attempt to open the door 206 or to enter the container by drilling a hole in the side of the container will trigger a tampering event due to the light falling on the photoelectric transducer. Similarly, any attempt to open the door 206 or remove the door from the hinges will trigger a tampering event due to the pressure changes experienced by the pressure transducer.
[0104] In an embodiment, the auxiliary capacitor 108 is used to store energy generated by the first transducer 106 and the second transducer 110 to temporarily power the processing unit 104 even after a tampering event occurs. The auxiliary capacitor 108 may be further used to power the processing unit 104 to facilitate the generation of a tamper detection signal in the absence of power from the power supply unit 114. In another embodiment, the processing unit 104 may be powered by a battery independent of the transducers 106, 110.
[0105] In an embodiment, the tamper tag 102 includes at least one of an NFC and an RFID antenna to transmit the tamper indication value to a reader. Therefore, the device 100 does not require expensive or high power consumption communication methods such as Bluetooth / BLE, Wi-Fi, etc.
[0106] In another exemplary embodiment, the default state of the logic gate 112 is open. The first user / exporter attaches the device 100 to the container door 206. At this stage, the logic gate is closed due to the pressure on the pressure transducer. The closed state of the logic gate corresponds to a tampered state of "not tampered" or "locked". The container can be shipped to the end user in this condition. Therefore, if the end user uses a reader to read the tamper flag of the tag 102, it will display a "not tampered" or "locked" state. However, if the container is tampered with or opened during transportation, without damaging or destroying the device 100, the tamper flag value will change, which may be due to (i) pressure changes on the pressure transducer, or (ii) light detected by the photoelectric transducer, or (iii) any attempt to remove power from the system to deactivate the device 100. When the end user scans the tag 102, this change in the tamper flag value will be reflected on the reader as "tampered" or "unlocked". Therefore, the device 100 is able to detect tampering events in real time. Once a tampering event is detected, it cannot be undone.
[0107] In one embodiment, if a counterfeiter attempts to remove the battery from the system, the counterfeiter will deactivate the tamper detection process, and the device 100 will also record this event as a tamper event. In this case, the auxiliary capacitor 108 provides power supply to the processing unit 104 until the event is recorded.
[0108] In another embodiment, the processing unit (microcontroller) 104 tracks all tampering events starting from the activation of the tamper tag 102. This is beneficial because it can roughly locate the location of the event. To this end, the device 100 includes a real-time clock to track the current date and time, and the device also includes a data logger, which is configured to cooperate with the real-time clock to record the detected tampering events, the date and time corresponding to the event, and additional information associated with the tampering event. The additional information may include the location of the tampering event. All tampered event data and the current time can be recorded in the EEPROM of the central processing unit.
[0109] In one exemplary embodiment, the flexible connection between the two parts of the electronic seal may attract possible tampering of the connecting wire. To cope with this possibility, modifications have been made so that any such attempt will correctly indicate the tampering status. In the modified circuit, the detection transistors are placed in such a way that if the state of the seal has not been tampered with, an attempt to short the line will report a tampering state, while if the state has been tampered with, it will continue to remain unchanged. The logic of the implementation scheme is detailed below. Therefore, the present disclosure is a major modification that makes the seal more robust.
[0110] Consider a scenario where the device (100) is attached to a shipping container. The pressure transducer (106) monitors the internal pressure, while the photoelectric transducer (110) detects light intrusion. If the container is tampered with, such as by drilling or cutting sections, these transducers detect the change and send a trigger signal to the processing unit (104).
[0111] The processing unit (104) processes these signals and sends a tamper detection signal to the logic gate (112). This in turn changes the tamper flag value in the tamper tag (102), indicating a tampered state. The LED indicator (118) then flashes to signal this change. If an RFID reader scans the tamper tag (102), the antenna transmits the tampered state, alerting the relevant authorities.
[0112] Thus, the tamper detection device (100) provides a powerful, multi-faceted solution for protecting containers from unauthorized access, ensuring that any tampering attempts are promptly detected and communicated.
[0113] FIG. 9A to FIG. 9I Show Description Figure 5 Flow chart of various status indications of a tamper detection device.
[0114] Case 1: Assuming the tag is in an untampered state: the LED signal is short-circuited with the control signal
[0115] like Fig.9A As shown, when the tag is in the untampered state, the LED signal remains low. Therefore, there are two ground lines and a control signal that remain high for the bias of the transistor. The short circuit of the LED signal to the control signal causes the control signal to go low, which biases the transistor to cutoff, thus opening the tamper loop. When read by an RFID reader, the tampered tag will generate a tampered notification and permanently set the state to tampered.
[0116] Case 2: Assuming the tag is in an untampered state: the control signal is shorted to ground
[0117] like Fig. 9B As shown, shorting the control signal to ground will cause the control signal to go low, biasing the transistor to cutoff, thus opening the tamper loop. When read by an RFID reader, the tamper tag will generate a tampered notification and permanently set the state to tampered.
[0118] Case 3: Assuming the tag is in an untampered state: LED signal is shorted to ground
[0119] like Fig. 9CAs shown, shorting the LED signal to ground has no effect on the control signal, which causes the transistor bias to turn on and closes the tamper loop. When read by the RFID reader, the tamper tag will generate a not tampered notification. If any unauthorized access to the container is attempted, such as opening the door / removing the door from the hinges or cutting the container, the light and / or pressure sensor will detect this and the microcontroller will change the control signal to a low state. This will cause the transistor bias to turn off and open the tamper loop. When read by the RFID reader, the tamper tag will generate a tampered notification and permanently set the state to tampered. Therefore, the tag will function as expected.
[0120] Case 4: Assuming the tag is in an untampered state: LED signal and control signal are shorted to ground
[0121] like Fig.9D As shown, the control signal goes low, causing the transistor bias to turn off and opening the tamper loop. When read by an RFID reader, the tamper tag will generate a tampered notification and permanently set the state to tampered.
[0122] Case 5: Assume the tag is in a tampered state
[0123] like Fig.9E As shown, the LED signal remains high for a short time in one minute, such as 0.5 seconds, and the rest of the time the LED signal remains low. If (the microcontroller) has detected tampering, the control signal will go low. When read by an RFID reader, the tampered tag will generate a tampered notification and permanently set the state to tampered.
[0124] Case 6: Assuming the tag is in a tampered state: the LED signal is short-circuited with the control signal
[0125] like Fig.9F As shown, the control signal remains high for a short period of time within one minute, such as 0.5 seconds. (This is a configurable setting, and the LED can be completely off in the Tampered state.) This ensures that the tag is permanently in the Tampered state when read by an RFID reader. The transistor will be in the on state for 0.5 seconds and remain on for nearly 1 minute. If the tag is read while the transistor is in the on state, the tampered tag will generate a Tampered notification when read by the RFID reader. The probability of reading a tag while the transistor is in the on state (0.5 seconds) is very low. This is a permanent change and any further notifications from the tag will always show Tampered. LED flashing may be affected.
[0126] Case 7: Assuming the tag is in tampered state: control signal is shorted to ground
[0127] like Figure 9GAs shown, the control signal is low, so the transistor will be in the off state and the tamper loop will be turned on. When read by the RFID reader, the tamper tag will generate a tampered notification and permanently set the state to tampered.
[0128] Case 8: Assuming the tag is in tampered state: LED signal is shorted to ground
[0129] like Figure 9H As shown, the control signal is low, so the transistor will be in the off state and the tamper loop will be turned on. When read by the RFID reader, the tamper tag will generate a tampered notification and permanently set the state to tampered. LED flashing may have an effect.
[0130] Case 9: Assuming the tag is in tampered state: LED signal and control signal are shorted to ground:
[0131] like Fig.9I As shown, the control signal is held high for a short period of time within a minute, say 0.5 seconds. (This is a configurable setting, and the LED can be completely off in the tampered state.) The transistor will be on for 0.5 seconds and remain on for nearly 1 minute. The tampered tag will generate a tampered notification when read by an RFID reader. This is a permanent change, and any further notifications from the tag will always show tampered. LED flashing may be affected.
[0132] In an embodiment, the tamper tag 102 gives information about the tampering when scanned with the NFC / UHF reader 120. However, if the user is interested in knowing the cause of the tampering event, there are three ways to do this, the first method is to destructively access the processing unit 104, the second method is to communicate using the serial port from the processing unit 104, and the third method is to use an i2c / spi supported NFC / UHF RFID IC. In destructive access, the processing unit 104 is removed from the device 100 and the EEPROM data is read by a dedicated EEPROM reading device for the microcontroller. The processing unit 104 also supports serial communication, so the tampered data can be sent serially to the serial monitor. If the user wants to know the tampered data only through NFC / UHF, in this case, an i2c / spi supported NFC / UHF IC can be used. An additional benefit to the user is that the user does not need any other hardware except the RFID reader.
[0133] In an embodiment, the power supply unit 114 includes a rechargeable or non-rechargeable battery. In another embodiment, the power supply unit 114 includes an energy collection device, such as a piezoelectric transducer, a solar panel, etc. In this case, a power source such as a coin cell is not required in the device 100. In order to store the collected energy, an auxiliary capacitor 108 can be used. The auxiliary capacitor 108 can maintain a charge for the operation of the tampering state detection device 100. The reader can be a user device, such as a mobile phone, a laptop, a tablet computer, or a portable or wearable electronic device with scanning and processing capabilities. The user device can be associated with a user with a unique account ID. The account ID can be pre-assigned to an authorized user.
[0134] Processing unit 104 may be implemented using one or more microprocessors, microcomputers, microcontrollers, digital signal processors, central processing units, state machines, logic circuits, and / or any device that manipulates signals based on operational instructions.
[0135] Advantageously, the device 100 is made using flexible / printed electronics or hybrid electronics (printed with adhesive components) or printed circuit boards (PCBs). Alternatively, the device 100 may be a hybrid of flexible electronics and PCBs for durability and strength.
[0136] The above description of the embodiments is provided for the purpose of illustration and is not intended to limit the scope of the present disclosure. The individual components of a particular embodiment are generally not limited to the particular embodiment, but are interchangeable. Such variations should not be considered as departing from the present disclosure, and all such modifications are considered to be within the scope of the present disclosure.
[0137] Technological progress and its economic significance
[0138] The above-described disclosure has several technical advantages, including but not limited to realizing a tamper detection device having the following functions:
[0139] ● Detect tampering events in real time;
[0140] ●Indicates the real-time status of the device;
[0141] ● Detect tampering even if the device is not damaged / destroyed during the tampering process; and
[0142] ●Use a combination of RFID+NFC communication technologies to eliminate the need for more expensive technologies or complex solutions involving high-power communication technologies such as Bluetooth / BLE, Wi-Fi, etc.
[0143] The above description of the specific embodiments fully reveals the general nature of the embodiments herein, and others can easily modify and / or adjust these specific embodiments to adjust various applications by applying current knowledge without departing from the general concept, and therefore, these adjustments and modifications should and are intended to be understood within the equivalent meaning and scope of the disclosed embodiments. It should be understood that the words or terms used herein are for description rather than limitation. Therefore, although the embodiments herein are described according to preferred embodiments, those skilled in the art will recognize that the embodiments herein can be modified to practice within the spirit and scope of the embodiments described herein.
[0144] Throughout this specification, the word "comprise" or variations such as "comprises" or "comprising" should be understood to imply the inclusion of stated elements, integers or steps or groups of elements, integers or steps, but not the exclusion of any other elements, integers or steps or groups of elements, integers or steps.
[0145] The use of the expression "at least" or "at least one" indicates the use of one or more elements or components or amounts, as may be used in embodiments of the present disclosure, to achieve one or more desired objectives or results.
[0146] Any discussion of documents, acts, materials, devices, articles or the like contained in this specification is solely for the purpose of providing a background to the present disclosure. This is not to be taken as an admission that any or all of these matters form part of the prior art base or were common general knowledge in the field relevant to the present disclosure as it existed before the priority date of this application.
[0147] Although considerable emphasis is placed herein on the components and constituent parts of the preferred embodiment, it should be understood that many embodiments may be developed without departing from the principles of the present disclosure, and that many changes may be made in the preferred embodiment. These and other changes in the preferred embodiment and other embodiments of the present disclosure will be apparent to those skilled in the art from the disclosure herein, and it should be clearly understood that the above description is only to be interpreted as an illustration of the present disclosure, and not as a limitation.
Claims
1. A tamper detection device (100), the device (100) being configured to be attached to an operating surface of a container to detect unauthorized intrusion (if present), the device (100) comprising: ● at least one transducer (106, 110) configured to detect a tampering event and to generate a corresponding trigger signal upon detection of said tampering event; a power supply unit (114) configured to provide power to at least one component of the device (100); a processing unit (104) in communication with the power supply unit (114) and the transducer (106, 110), the processing unit (104) being configured to receive the trigger signal from the transducer (106, 110) and process the trigger signal to generate a corresponding tamper detection signal; a logic gate (112) configured to communicate with the processing unit to receive the tamper detection signal, the logic gate (112) configured to be operable in an open state and a closed state, and further configured to change the state relative to the tamper detection signal upon the occurrence of an unauthorized intrusion event (if any); a tamper tag (102) in communication with the logic gate (112), the tamper tag (102) being configured to store a tamper flag value and further configured to receive the tamper detection signal from the logic gate (112) to change the tamper flag value, wherein the tamper flag value indicates a tamper status of the device (100); a plurality of conductive tracks (122a, 122b, 122c) configured to individually connect the logic gate (112), the tamper tag (102) and at least one of the transducers (106, 110) to the processing unit (104); a capacitor (108) configured to communicate with the processing unit (104) to facilitate power supply in the absence of the power supply unit (114), The device (100) is characterized in that the logic gate (112) is mounted on an operating terminal of the tamper tag (102) to facilitate the generation of the tamper detection signal when at least one of the conductive tracks (122a, 122b, 122c) is short-circuited, thereby changing the tamper state of the device (100) from "untampered" to "tampered" in response to an unauthorized intrusion.
2. The apparatus (100) according to claim 1, wherein the unauthorized intrusion event comprises: • receiving said trigger signal from at least one of said transducers (106, 110); and • Detecting a cut-off of the power supply from the power supply unit (114).
3. The device (100) according to claim 1, wherein the transducer (106, 110), the power supply unit (114), the capacitor (108) and the processing unit (104) are mounted together as a circuit module on an operable inner surface of the container.
4. The device (100) according to claim 3, wherein the tamper tag (102), the logic gate (112) are mounted together as an antenna module on an operable outer surface of the container.
5. The device (100) according to claim 4 comprises an antenna configured to be mounted on the antenna module for communicating with the tamper tag (102), the antenna being configured to transmit the state of the device (100) to the reader when the tag is scanned by the reader, the antenna being selected from the group consisting of a radio frequency identification (RFID) antenna, a near field communication (NFC) antenna and an NFC+RFID antenna.
6. The device (100) of claim 4, wherein the circuit module communicates with the antenna module by means of the plurality of conductive tracks (122a, 122b, 122c).
7. The device (100) of claim 1, wherein the plurality of conductive tracks (122a, 122b, 122c) comprises a first conductive track (122a), a second conductive track (122b), and a third conductive track (122c), the first conductive track (122a) connecting the logic gate (112) and the processing unit (104), the second conductive track (122b) connecting the tamper tag (102) and the processing unit (104), and the third conductive track (122c) connecting the tamper tag (102) and the processing unit (104).
8. The device (100) according to claim 4, wherein a short circuit of any one of the first conductive track (122a) and the second conductive track (122b) or the first conductive track (122a) and the third conductive track (122c) or the second conductive track (122b) and the third conductive track (122c) causes the tamper detection signal to be generated, thereby changing the state of the device (100) from a "not tampered" state to a "tampered" state.
9. The device (100) of claim 1, wherein the transducer comprises a first transducer (106) and a second transducer (110), wherein the first transducer (106) is configured to sense a pressure change in the container and is typically selected from a group of pressure transducers, and the second transducer (110) is configured to sense the presence of light in the container in an operable configuration of the device and is typically selected from a group of photoelectric transducers.
10. The device (100) of claim 1, comprising an LED display (118) in communication with the tamper tag, the LED display being configured to flash at different predetermined intervals to indicate the state of the device, the state being selected from the group consisting of an armed state, an armed state, an untampered state, and a tampered state.
11. The apparatus (100) of claim 10, wherein the tamper tag (102) comprises a set of sensors (116) configured to detect at least one critical parameter corresponding to a change in the state of the logic gate (112) and generate a corresponding sensed signal.
12. The device (100) of claim 11, wherein the LED display (118) is configured to communicate with the set of sensors, the LED signal is configured to receive the sensed signal from the set of sensors (116) and is further configured to indicate the status of the device (100).