Driving transistor, micro-display pixel driving circuit and forming method thereof

Abstract

The invention discloses a driving transistor, a micro-display pixel driving circuit and a forming method thereof. The circuit forming method comprises the following steps: forming a driving active region; and forming a driving gate structure on the driving active region, wherein at least partial region of the driving gate structure is not doped with the first doping ions. The threshold voltage is increased and the saturation current is reduced by increasing the sub-threshold swing S, and the controllable voltage range gamma can be increased by increasing the sub-threshold swing S of the driving transistor because the driving transistor does not need high saturation current. According to the technical scheme, by reducing the doping amount of the first doping ions in the driving gate structure and weakening the control capability of the driving gate structure on the channel region, the subthreshold swing S of the driving transistor is increased so as to increase the controllable voltage range gamma, design of a compensation circuit is facilitated, and the display effect is improved. The doping amount of the first doped ions can be adjusted only by adjusting the original photomask structure, the photomask structure does not need to be added, and the manufacturing cost is effectively controlled.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a driving transistor, a pixel driving circuit of a micro display and a forming method thereof. Background Art

[0002] In recent years, with the development of AR (Augmented Reality) / VR (Virtual Reality) technology, the closely related microdisplay technology has also received widespread attention. Microdisplay technology is a branch of the display technology field. Generally, displays with a diagonal size less than 1 inch (2.54 cm) or those small enough to require optical magnification are called microdisplays.

[0003] At present, the common micro-display technologies include organic light-emitting diode on silicon (OLEDOS), light-emitting diode on silicon (LEDOS), liquid crystal on silicon (LCOS) and digital micro mirror device (DMD). Among them, organic light-emitting diode on silicon and silicon-based diode light-emitting diode are active light-emitting diodes, while liquid crystal on silicon and digital micro mirror devices are passive light-emitting diodes. Since organic light-emitting diode on silicon and silicon-based diode light-emitting diode also have the advantages of low power consumption, high contrast and fast response, they are more suitable for application in AR and VR technologies.

[0004] Silicon-based organic light-emitting and silicon-based diode light-emitting microdisplays are different from conventional amorphous silicon, microcrystalline silicon or low-temperature polycrystalline silicon processes. They use single-crystal silicon chips as substrates and can adopt the existing mature integrated circuit complementary metal oxide semiconductor (CMOS) process. Therefore, they can not only realize the active addressing matrix of display pixels, but also realize the drive control circuits of various functions such as scan chain circuits, digital-to-analog conversion circuits, and bandgap references, thereby greatly reducing the external connections of the device, increasing reliability, and achieving lightweight.

[0005] However, there are still many problems with the pixel driving circuit of the micro display in the prior art. Summary of the invention

[0006] The technical problem solved by the present invention is to provide a driving transistor, a pixel driving circuit of a micro display and a forming method thereof, which is beneficial to the design of a compensation circuit and improves the display effect without additionally increasing the process cost.

[0007] To solve the above problems, the present invention provides a driving transistor, comprising: a driving active area; a driving gate structure located on the driving active area, the driving gate structure covering a portion of the top surface of the driving active area, and at least a portion of the driving gate structure having no first doped ions; a driving source and a driving drain located in the driving active area, the driving source and the driving drain being located on both sides of the driving gate structure, the driving source and the driving drain having driving source-drain ions, and the driving source-drain ions being of the same electrical type as the first doped ions.

[0008] Optionally, the driving gate structure includes: a driving gate dielectric layer, and a driving gate layer located in the driving gate dielectric layer, wherein at least a partial region of the driving gate layer does not have the first doping ions.

[0009] Optionally, a partial area of ​​the driving gate layer has the first doping ions.

[0010] Optionally, the partial region of the driving gate layer includes: one doping region or a plurality of doping regions separated from each other.

[0011] Optionally, the driving gate layer does not contain the first doping ions.

[0012] Correspondingly, the technical solution of the present invention further provides a pixel driving circuit for a micro display, comprising: a driving transistor as described in any of the above technical solutions.

[0013] Optionally, it also includes: a switching transistor, the switching transistor including: a switch active area; a switch gate structure located on the switch active area, the switch gate structure covering a portion of the top surface of the switch active area, and the switch gate structure having second doped ions; a switch source and a switch drain located in the switch active area, the switch source and the switch drain are located on both sides of the switch gate structure, the switch source and the switch drain have switch source and drain ions, and the switch source and drain ions are of the same electrical type as the second doped ions, wherein the switch source is electrically connected to the drive gate structure.

[0014] Optionally, the switch gate structure includes: a switch gate dielectric layer, and a switch gate layer located in the switch gate dielectric layer, wherein the switch gate layer contains the second doping ions.

[0015] Optionally, the driving source-drain ions and the switch source-drain ions are of the same or different electrical types.

[0016] Optionally, it also includes: a storage capacitor, the storage capacitor including: a first electrode plate, an insulating layer located on the first electrode plate, and a second electrode plate located on the insulating layer, wherein the first electrode plate is electrically connected to the switch source, and the second electrode plate is electrically connected to the drive drain.

[0017] Optionally, it further includes: a light emitting diode, wherein the light emitting diode includes: a positive electrode doping region and a negative electrode doping region adjacent to each other, wherein the positive electrode doping region is electrically connected to the driving source.

[0018] Correspondingly, the technical solution of the present invention also provides a method for forming a driving transistor, comprising: forming a driving active area; forming a driving gate structure on the driving active area, wherein the driving gate structure covers a portion of the top surface of the driving active area, and at least a portion of the driving gate structure is not doped with a first doping ion; forming a driving source and a driving drain in the driving active area, wherein the driving source and the driving drain are located on both sides of the driving gate structure, and the driving source and the driving drain are doped with driving source and drain ions, and the driving source and drain ions are of the same electrical type as the first doping ions.

[0019] Optionally, forming the driving gate structure includes: forming a driving gate dielectric layer, the driving gate dielectric layer covering a portion of the top surface of the driving active area; forming a driving gate layer on the driving gate dielectric layer, wherein at least a portion of the driving gate layer does not have the first doping ions.

[0020] Optionally, when a doped region of the driving gate layer has the first doped ions, the method for forming the driving gate layer includes: forming a sacrificial layer on the driving active area, the sacrificial layer covering a portion of the top surface of the driving gate layer, and the portion of the top surface covered by the driving gate layer is a continuous area; using the sacrificial layer as a mask, injecting the first doped ions into the driving gate layer, so that a doped region of the driving gate layer has the first doped ions.

[0021] Optionally, when several mutually discrete doped regions of the driving gate layer have the first doped ions, the method for forming the driving gate layer includes: forming a sacrificial layer on the driving active area, the sacrificial layer covering a portion of the top surface of the driving gate layer, and the portion of the top surface of the driving gate layer covered is several mutually discrete regions; using the sacrificial layer as a mask, injecting the first doped ions into the driving gate layer, so that the several mutually discrete doped regions of the driving gate layer have the first doped ions.

[0022] Optionally, when the driving gate layer is not doped with the first doping ions, the method for forming the driving gate layer includes: forming a sacrificial layer on the driving active area, the sacrificial layer completely covering the top surface of the driving gate layer and exposing the remaining area requiring ion implantation; using the sacrificial layer as a mask, injecting the first doping ions so that the driving gate layer does not contain the first doping ions.

[0023] Correspondingly, the technical solution of the present invention further provides a method for forming a pixel driving circuit of a micro display, comprising: forming a driving transistor by the method for forming a driving transistor as described in any of the technical solutions above.

[0024] Optionally, it also includes: forming a switching transistor, forming the switching transistor includes: forming a switch active area; forming a switch gate structure on the switch active area, the switch gate structure covering a portion of the top surface of the switch active area, and the switch gate structure having a second doped ion; forming a switch source and a switch drain in the switch active area, the switch source and the switch drain are located on both sides of the switch gate structure, the switch source and the switch drain are doped with switch source and drain ions, the switch source and drain ions are of the same electrical type as the second doped ions, wherein the switch source is electrically connected to the drive gate structure.

[0025] Optionally, it also includes: forming a storage capacitor, forming the storage capacitor includes: forming a first electrode plate; forming an insulating layer on the first electrode plate; forming a second electrode plate on the insulating layer, wherein the first electrode plate is electrically connected to the switch source, and the second electrode plate is electrically connected to the drive drain.

[0026] Optionally, it also includes: forming a light emitting diode, forming the light emitting diode includes: forming a positive electrode doping region; forming a negative electrode doping region, the positive electrode doping region and the negative electrode doping region are adjacent to each other, wherein the positive electrode doping region is electrically connected to the driving source.

[0027] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0028] In the driving transistor of the technical solution of the present invention, since increasing the subthreshold swing S will lead to an increase in the threshold voltage and a decrease in the saturation current, and the driving transistor does not need a high saturation current, the controllable voltage range γ can be increased by increasing the subthreshold swing S of the driving transistor. By adjusting and reducing the doping amount of the first doping ion in the driving gate structure, the controllable voltage range γ of the driving gate structure is weakened, thereby increasing the subthreshold swing S of the driving transistor to increase the controllable voltage range γ, which is beneficial to the design of the compensation circuit and improves the display effect.

[0029] In the pixel driving circuit of the micro display of the technical solution of the present invention, since increasing the subthreshold swing S will lead to an increase in the threshold voltage and a decrease in the saturation current, and the driving transistor does not need a high saturation current, the controllable voltage range γ can be increased by increasing the subthreshold swing S of the driving transistor. By adjusting and reducing the doping amount of the first doping ion in the driving gate structure, the controllable voltage range γ of the driving gate structure is weakened, thereby increasing the subthreshold swing S of the driving transistor to increase the controllable voltage range γ, which is beneficial to the design of the compensation circuit and improves the display effect.

[0030] In the method for forming a driving transistor of the technical solution of the present invention, since increasing the subthreshold swing S will lead to an increase in the threshold voltage and a decrease in the saturation current, and the driving transistor does not require a high saturation current, the subthreshold swing S of the driving transistor can be increased to increase the controllable voltage range γ. By adjusting and reducing the doping amount of the first doping ion in the driving gate structure, the controllable voltage range γ of the driving gate structure is weakened, thereby increasing the subthreshold swing S of the driving transistor to increase the controllable voltage range γ, which is beneficial to the design of the compensation circuit and improves the display effect. In addition, the doping amount of the first doping ion in the driving gate structure can be adjusted by adjusting the original mask structure, without the need to add an additional mask structure, thereby effectively controlling the process cost.

[0031] In the method for forming a pixel driving circuit of a micro display of the technical solution of the present invention, since increasing the subthreshold swing S will cause the threshold voltage to increase and the saturation current to decrease, and the driving transistor does not need a high saturation current, the subthreshold swing S of the driving transistor can be increased to increase the controllable voltage range γ. By adjusting and reducing the doping amount of the first doping ion in the driving gate structure, the controllable voltage range γ of the driving gate structure is weakened, thereby increasing the subthreshold swing S of the driving transistor to increase the controllable voltage range γ, which is beneficial to the design of the compensation circuit and improves the display effect. In addition, the doping amount of the first doping ion in the driving gate structure can be adjusted by adjusting the original mask structure, without the need to add an additional mask structure, thereby effectively controlling the process cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a schematic diagram of the circuit structure of a pixel driving circuit of a micro display;

[0033] Figure 2 is a schematic diagram of the transfer characteristic curve of the driving transistor;

[0034] Figures 3 to 5 It is a schematic structural diagram of each step of a method for forming a pixel driving circuit of a micro display in an embodiment of the present invention;

[0035] Figure 6 is a schematic diagram of a driving gate structure of a pixel driving circuit of a micro display in another embodiment of the present invention;

[0036] Figure 7 is a schematic diagram of a driving gate structure of a pixel driving circuit of a micro display in another embodiment of the present invention;

[0037] Figure 8 It is a schematic diagram of the circuit structure of a pixel driving circuit of a micro display;

[0038] Fig. 9 It is a schematic diagram of the structural layout of the chip in an embodiment of the present invention. DETAILED DESCRIPTION

[0039] As described in the background art, there are still many problems with the pixel driving circuit of the micro display in the prior art, which will be described in detail below with reference to the accompanying drawings.

[0040] Figure 1 It is a schematic diagram of the circuit structure of a pixel driving circuit of a micro display; Figure 2 Schematic diagram of the transfer characteristic curve of the driving transistor T2.

[0041] Please refer to Figure 1The pixel driving circuit of the micro display is composed of at least two transistors and a capacitor, and its basic circuit is a 2T1C circuit. Among them, transistor T1 is a switching transistor and transistor T2 is a driving transistor. In the addressing stage, through V SCAN The control transistor T1 is turned on, and the storage capacitor C is used to store the data voltage; in the light-emitting stage, through V SCAN The terminal controls the transistor T1 to be turned off, and the voltage stored in the storage capacitor C keeps the transistor T2 turned on, and keeps the light-emitting diode D emitting light.

[0042] At present, in order to make the transistor have a high saturation current, ion doping is performed in all areas of the transistor gate. However, in the 2T1C driving circuit, the brightness of the light-emitting diode is determined by the current flowing through the transistor T2, and the current range for achieving full grayscale is 10pA to 10nA. The current flowing through the transistor T2 is determined by the voltage stored in the storage capacitor C, such as Figure 2 As shown, the subthreshold current of the transistor T2 just controls the light emitting diode D to achieve different brightness, so the transistor T2 is not required to have a high saturation current.

[0043] In a pixel area, each driving circuit controls a light-emitting point. Due to the small pixel area, the threshold voltage drift between different transistors T2 cannot be ignored. Additional components need to be added to compensate for the impact of threshold voltage drift and accurately control the data voltage to achieve different grayscale brightness. Figure 2 As shown, when the subthreshold swing S (the inverse of the subthreshold slope) is larger, the corresponding controllable voltage range γ is larger, the compensation effect of the compensation circuit is better, and the display effect is better.

[0044] The threshold voltage of the traditional 8V MOS tube is lower than 1V, and the controllable voltage range γ is less than 0.3V, which is not conducive to the design of the compensation circuit and will limit the further improvement of the display effect. If the controllable voltage range γ is increased by adjusting the thickness of the gate dielectric layer of the 8V MOS, the process is extremely difficult and requires additional mask processes.

[0045] On this basis, the present invention provides a driving transistor, a pixel driving circuit of a micro display and a method for forming the same, by adjusting and reducing the doping amount of the first doping ion in the driving gate structure, the control ability of the driving gate structure over the channel region is weakened, thereby increasing the subthreshold swing S of the driving transistor to increase the controllable voltage range γ, thereby facilitating the design of the compensation circuit and improving the display effect. In addition, the doping amount of the first doping ion in the driving gate structure can be adjusted by simply adjusting the original mask structure, without the need to add an additional mask structure, thereby effectively controlling the process cost.

[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0047] Figures 3 to 5 It is a schematic structural diagram of each step of a method for forming a pixel driving circuit of a micro display in an embodiment of the present invention; Figure 6 is a schematic diagram of a driving gate structure of a pixel driving circuit of a micro display in another embodiment of the present invention; Figure 7 is a schematic diagram of a driving gate structure of a pixel driving circuit of a micro display in another embodiment of the present invention; Figure 8 It is a schematic diagram of the circuit structure of a pixel driving circuit of a micro display; Fig. 9 It is a schematic diagram of the structural layout of the chip in an embodiment of the present invention.

[0048] Please refer to Figure 3 , providing a substrate 100.

[0049] In this embodiment, the material of the substrate 100 is silicon; in other embodiments, the material of the substrate may also be germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium.

[0050] In this embodiment, a driving active region 100 a is formed in the substrate 100 , and the driving active region 100 a is used for subsequently forming a driving transistor.

[0051] In this embodiment, a switch active region 100 b is further formed in the substrate 100 , and the switch active region 100 b is used for subsequently forming a switch transistor.

[0052] In this embodiment, both the driving active region 100 a and the switch active region 100 b are doped with P-type ions.

[0053] In other embodiments, the ions doped in the driving active region and the switch active region may also be N-type ions.

[0054] In other embodiments, the types of ions doped in the driving active region and the switch active region may be different, that is, one region is doped with N-type ions and the other region is doped with P-type ions.

[0055] Please refer to Figure 4 , forming a driving gate structure 101 on the driving active area 100a, wherein the driving gate structure 101 covers a portion of the top surface of the driving active area 100a, and at least a portion of the driving gate structure 101 is not doped with the first doping ions.

[0056] In this embodiment, forming the driving gate structure 101 includes: forming a driving gate dielectric layer 101a, wherein the driving gate dielectric layer 101a covers a portion of the top surface of the driving active area 100a; and forming a driving gate layer 101b on the driving gate dielectric layer 101a, wherein at least a portion of the driving gate layer 101b does not have the first doping ions.

[0057] In this embodiment, the driving gate dielectric layer 101 a is made of silicon oxide; and the driving gate layer 101 b is made of polysilicon.

[0058] In this embodiment, a partial region of the driving gate layer 101 b is doped with the first doping ions.

[0059] In this embodiment, a partial region of the driving gate layer 101 b is a doped region.

[0060] In this embodiment, the method for forming the driving gate layer 101b includes: forming a sacrificial layer (not shown) on the driving active area 100a, the sacrificial layer covering a portion of the top surface of the driving gate layer 101b, and the portion of the top surface covered by the driving gate layer 101b is a continuous area; using the sacrificial layer as a mask, injecting the first doping ions into the driving gate layer 101b, so that a doping area of ​​the driving gate layer 101b has the first doping ions.

[0061] For other embodiments, please refer to Figure 6 , a partial area of ​​the driving gate layer 101b can also be a plurality of mutually discrete doped areas, and the corresponding method for forming the driving gate layer 101b includes: forming a sacrificial layer (not shown) on the driving active area 100a, wherein the sacrificial layer covers a portion of the top surface of the driving gate layer 101b, and the portion of the top surface of the driving gate layer 101b covered is a plurality of mutually discrete areas; using the sacrificial layer as a mask, injecting the first doping ions into the driving gate layer 101b, so that the mutually discrete doping areas of the driving gate layer 101b have the first doping ions.

[0062] For other embodiments, please refer to Figure 7 , the driving gate layer 101b is not doped with the first doping ions, and the corresponding method for forming the driving gate layer 101b includes: forming a sacrificial layer (not shown) on the driving active area 100a, wherein the sacrificial layer completely covers the top surface of the driving gate layer 101b and exposes the remaining area requiring ion implantation; and injecting the first doping ions using the sacrificial layer as a mask, so that the driving gate layer 101b does not have the first doping ions.

[0063] Please continue to refer to Figure 4 In this embodiment, a switch gate structure 102 is formed on the switch active area 100 b , the switch gate structure 102 covers a portion of the top surface of the switch active area 100 b , and the switch gate structure 102 has second doping ions therein.

[0064] In this embodiment, forming the switch gate structure 102 includes: forming a switch gate dielectric layer 102a; and forming a switch gate layer 102b on the switch gate dielectric layer 102a, wherein the switch gate layer 102b has the second doping ions.

[0065] In this embodiment, the material of the switch gate dielectric layer 102 a is silicon oxide; the material of the switch gate layer 102 b is polysilicon.

[0066] In this embodiment, the driving gate structure 101 and the switch gate structure 102 are formed simultaneously by a synchronous process.

[0067] In this embodiment, since the first doped ions are of the same electrical type as the subsequent driving source drain ions, and the electrical type of the driving source drain ions is opposite to the electrical type of the doped ions in the driving active area 100a, the first doped ions are of opposite electrical type to the doped ions in the driving active area 100a, that is, the first doped ions are N-type ions.

[0068] In this embodiment, since the second doped ions are of the same electrical type as the subsequent switch source and drain ions, and the electrical type of the switch source and drain ions is opposite to the electrical type of the doped ions in the switch active area 100b, the second doped ions are of opposite electrical type to the doped ions in the switch active area 100b, that is, the second doped ions are N-type ions.

[0069] In other embodiments, when the doping ions in the driving active region and the switch active region are both N-type, the corresponding first doping ions and the second doping ions are both P-type ions.

[0070] In other embodiments, when the electrical types of the doped ions in the driving active region and the switch active region are different, the electrical types of the corresponding first doped ions and the second doped ions are also different, that is, one is an N-type ion and the other is a P-type ion.

[0071] Please refer to Figure 5 and Figure 8A driving source 103 and a driving drain 104 are formed in the driving active area 100a, and the driving source 103 and the driving drain 104 are located on both sides of the driving gate structure 101. The driving source 103 and the driving drain 104 are doped with driving source and drain ions, and the driving source and drain ions are of the same electrical type as the first doped ions.

[0072] In this embodiment, the driving transistor 105 is formed by the driving active area 100 a , the driving gate structure 101 , the driving source 103 , and the driving drain 104 .

[0073] Please continue to refer to Figure 2 Since increasing the subthreshold swing S will increase the threshold voltage and reduce the saturation current, and the driving transistor 105 does not need a high saturation current, the controllable voltage range γ can be increased by increasing the subthreshold swing S of the driving transistor 105.

[0074] In this embodiment, by adjusting and reducing the doping amount of the first doping ion in the driving gate structure 101, the control ability of the driving gate structure 101 on the channel region is weakened, thereby increasing the subthreshold swing S of the driving transistor 105 to increase the controllable voltage range γ, thereby facilitating the design of the compensation circuit and improving the display effect. In addition, the doping amount of the first doping ion in the driving gate structure 101 can be adjusted by simply adjusting the original mask structure, without adding an additional mask structure, thereby effectively controlling the process cost.

[0075] Please continue to refer to Figure 5 In this embodiment, it also includes: forming a switch source 106 and a switch drain 107 in the switch active area 100b, the switch source 106 and the switch drain 107 are located on both sides of the switch gate structure 102, the switch source 106 and the switch drain 107 are doped with switch source and drain ions, and the switch source and drain ions are of the same electrical type as the second doped ions, wherein the switch source 106 is electrically connected to the driving gate structure 101.

[0076] In this embodiment, the switch transistor 108 is formed by the switch active region 100 b , the switch gate structure 102 , the switch source 106 and the switch drain 107 .

[0077] In this embodiment, since the first doping ions and the second doping ions are both N-type ions, the driving source and drain ions and the switching source and drain ions are also N-type ions, and the corresponding driving transistor 105 and the switching transistor 108 are both NMOS transistors.

[0078] In other embodiments, when the first doping ions and the second doping ions are both P-type ions, the driving source-drain ions and the switching source-drain ions are also both P-type ions, and the corresponding driving transistor and the switching transistor are both PMOS transistors.

[0079] In other embodiments, when the electrical types of the first doped ions and the second doped ions are different, the electrical types of the driving source drain ions and the switching source drain ions are also different, and the corresponding driving transistor and the switching transistor are one PMOS transistor and the other NMOS transistor.

[0080] Please continue to refer to Figure 8 , forming a storage capacitor 109, forming the storage capacitor 109 includes: forming a first electrode plate; forming an insulating layer on the first electrode plate; forming a second electrode plate (not shown) on the insulating layer, wherein the first electrode plate is electrically connected to the switch source 106, and the second electrode plate is electrically connected to the driving drain 104.

[0081] Please refer to Fig. 9 It should be noted that, in this embodiment, the storage capacitor 109, the driving transistor 105 and the switching transistor 108 are all formed in the silicon-based driving circuit layer 110 of the chip, and the storage capacitor 109 is a MIM capacitor manufactured in the back-end process. The storage capacitor 109 is formed after the driving transistor 105 and the switching transistor 108.

[0082] Please continue to refer to Figure 8 In the present embodiment, it also includes: forming a light-emitting diode 111, and forming the light-emitting diode 111 includes: forming a positive electrode doping region; forming a negative electrode doping region (not shown), the positive electrode doping region and the negative electrode doping region are adjacent to each other, wherein the positive electrode doping region is electrically connected to the driving source 103.

[0083] In this embodiment, the switch transistor 108 is coupled to the drive transistor 105, and the storage capacitor 109 is coupled to the switch transistor 108 and the drive transistor 105, respectively. SCAN The switch transistor 108 is turned on by the terminal, and the storage capacitor 109 is used to store the data voltage; in the light-emitting stage, V SCAN The terminal controls the switch transistor 109 to be turned off, and the voltage stored in the storage capacitor 109 maintains the driving transistor 105 to be turned on, and keeps the light emitting diode 111 emitting light.

[0084] Please continue to refer to Fig. 9It should be noted that, in this embodiment, the light emitting diode 111 is formed on the light emitting film layer 112 of the chip, and the light emitting film layer 112 is located above the silicon-based driving circuit layer 110, so the light emitting diode 111 is formed after the driving transistor 105, the switching transistor 108 and the storage capacitor 109. The positive doping region (i.e., the anode) of the light emitting diode 111 is connected to the driving source 103 through various layers of conductive plugs and various layers of metal layers.

[0085] Correspondingly, the present invention also provides a pixel driving circuit for a micro display, please continue to refer to Figure 5 and Figure 8 , including: a driving transistor 105, the driving transistor 105 including: a driving active area 100a; a driving gate structure 101 located on the driving active area 100a, the driving gate structure 101 covers a portion of the top surface of the driving active area 100a, and at least a portion of the driving gate structure 101 does not have a first doping ion; a driving source 103 and a driving drain 104 located in the driving active area 100a, the driving source 103 and the driving drain 104 are located on both sides of the driving gate structure 101, and the driving source 103 and the driving drain 104 have driving source and drain ions, and the driving source and drain ions are of the same electrical type as the first doping ions.

[0086] Please continue to refer to Figure 2 Since increasing the subthreshold swing S will increase the threshold voltage and reduce the saturation current, and the driving transistor 105 does not need a high saturation current, the controllable voltage range γ can be increased by increasing the subthreshold swing S of the driving transistor 105.

[0087] In this embodiment, by adjusting and reducing the doping amount of the first doping ion in the driving gate structure 101, the control ability of the driving gate structure 101 over the channel region is weakened, thereby increasing the subthreshold swing S of the driving transistor 105 to increase the controllable voltage range γ, thereby facilitating the design of the compensation circuit and improving the display effect.

[0088] In this embodiment, the driving gate structure 101 includes: a driving gate dielectric layer 101 a and a driving gate layer 101 b located on the driving gate dielectric layer 101 a , wherein at least a part of the driving gate layer 101 a does not have the first doping ions.

[0089] In this embodiment, a portion of the driving gate layer 101 a has the first doping ions.

[0090] In this embodiment, a partial region of the driving gate layer 101a is a doped region.

[0091] For other embodiments, please continue to refer to Figure 6 Part of the driving gate layer 101a may also be a plurality of separate doping regions.

[0092] For other embodiments, please continue to refer to Figure 7 , the driving gate layer 101 does not contain the first doping ions.

[0093] In this embodiment, it also includes: a switch transistor 108, wherein the switch transistor 108 includes: a switch active area 100b; a switch gate structure 102 located on the switch active area 100b, wherein the switch gate structure 102 covers a portion of the top surface of the switch active area 100b, and wherein the switch gate structure 102 has second doping ions therein; a switch source 106 and a switch drain 107 located in the switch active area 100b, wherein the switch source 106 and the switch drain 107 are located on both sides of the switch gate structure 102, wherein the switch source 106 and the switch drain 107 have switch source and drain ions therein, and the switch source and drain ions are of the same electrical type as the second doping ions, wherein the switch source 106 is electrically connected to the drive gate structure 101.

[0094] In this embodiment, the switch gate structure 102 includes: a switch gate dielectric layer 102 a and a switch gate layer 102 b located in the switch gate dielectric layer 102 a , wherein the switch gate layer 102 b has the second doping ions therein.

[0095] In this embodiment, the driving source-drain ions and the switch source-drain ions are of the same electrical type.

[0096] In other embodiments, the driving source-drain ions and the switch source-drain ions may be of different electrical types.

[0097] In this embodiment, it also includes: a storage capacitor 109, the storage capacitor 109 includes: a first electrode plate, an insulating layer located on the first electrode plate, and a second electrode plate located on the insulating layer, wherein the first electrode plate is electrically connected to the switch source 106, and the second electrode plate is electrically connected to the driving drain 107.

[0098] In this embodiment, it further includes: a light emitting diode 111 , and the light emitting diode 111 includes: a positive electrode doping region and a negative electrode doping region adjacent to each other, wherein the positive electrode doping region is electrically connected to the driving source 104 .

[0099] Accordingly, the present invention also provides a method for forming a driving transistor 105, please continue to refer to Figure 3and Figure 7 , including: forming a driving active area 100a; forming a driving gate structure 101 on the driving active area 100a, wherein the driving gate structure 101 covers a portion of the top surface of the driving active area 100a, and at least a portion of the driving gate structure 101 is not doped with a first doping ion; forming a driving source 103 and a driving drain 104 in the driving active area 100a, wherein the driving source 103 and the driving drain 104 are located on both sides of the driving gate structure 101, and the driving source 103 and the driving drain 104 are doped with driving source and drain ions, and the driving source and drain ions are of the same electrical type as the first doping ions.

[0100] In this embodiment, by adjusting and reducing the doping amount of the first doping ion in the driving gate structure 101, the control ability of the driving gate structure 101 on the channel region is weakened, thereby increasing the subthreshold swing S of the driving transistor 105 to increase the controllable voltage range γ, thereby facilitating the design of the compensation circuit and improving the display effect. In addition, the doping amount of the first doping ion in the driving gate structure 101 can be adjusted by simply adjusting the original mask structure, without adding an additional mask structure, thereby effectively controlling the process cost.

[0101] In this embodiment, forming the driving gate structure 101 includes: forming a driving gate dielectric layer 101a, wherein the driving gate dielectric layer 101a covers a portion of the top surface of the driving active area 100a; and forming a driving gate layer 101b on the driving gate dielectric layer 101a, wherein at least a portion of the driving gate layer 101b does not have the first doping ions.

[0102] Please continue to refer to Figure 5 In this embodiment, when a doped region of the driving gate layer 101b has the first doped ions, the method for forming the driving gate layer 101b includes: forming a sacrificial layer on the driving active area 100a, the sacrificial layer covering a portion of the top surface of the driving gate layer 101b, and the portion of the top surface covered by the driving gate layer 101b is a continuous area; using the sacrificial layer as a mask, injecting the first doped ions into the driving gate layer 101b, so that a doped region of the driving gate layer 101b has the first doped ions.

[0103] For other embodiments, please continue to refer to Figure 6When several mutually discrete doped regions of the driving gate layer 101b have the first doped ions, the method for forming the driving gate layer 101b includes: forming a sacrificial layer on the driving active area 100a, the sacrificial layer covering a portion of the top surface of the driving gate layer 101b, and covering a portion of the top surface of the driving gate layer 101b as several mutually discrete regions; using the sacrificial layer as a mask, injecting the first doped ions into the driving gate layer 101b, so that the several mutually discrete doped regions of the driving gate layer 101b have the first doped ions.

[0104] For other embodiments, please refer to Figure 7 When the driving gate layer 101b is not doped with the first doping ions, the method for forming the driving gate layer 101b includes: forming a sacrificial layer on the driving active area 100a, wherein the sacrificial layer completely covers the top surface of the driving gate layer 101b and exposes the remaining area requiring ion implantation; and injecting the first doping ions using the sacrificial layer as a mask, so that the driving gate layer 101b does not have the first doping ions.

[0105] Accordingly, a driving transistor 106 is also provided in the embodiment of the present invention, please continue to refer to Figures 5 to 7 , including: a driving active area 100a; a driving gate structure 101 located on the driving active area 100a, the driving gate structure 101 covers a portion of the top surface of the driving active area 100a, and at least a portion of the driving gate structure 101 does not have a first doping ion; a driving source 103 and a driving drain 104 located in the driving active area 100a, the driving source 103 and the driving drain 104 are located on both sides of the driving gate structure 101, and the driving source 103 and the driving drain 104 have driving source and drain ions, and the driving source and drain ions are of the same electrical type as the first doping ions.

[0106] In this embodiment, by adjusting and reducing the doping amount of the first doping ion in the driving gate structure 101, the control ability of the driving gate structure 101 over the channel region is weakened, thereby increasing the subthreshold swing S of the driving transistor 105 to increase the controllable voltage range γ, thereby facilitating the design of the compensation circuit and improving the display effect.

[0107] In this embodiment, the driving gate structure 101 includes: a driving gate dielectric layer 101a and a driving gate layer 101b located on the driving gate dielectric layer 101a, wherein at least a part of the driving gate layer 101b does not have the first doping ions.

[0108] In this embodiment, please continue to refer to Figure 5 , a partial area of ​​the driving gate layer 101b has the first doping ions.

[0109] For other embodiments, please refer to Figure 6 The partial area of ​​the driving gate layer 101b includes: one doping area or a plurality of doping areas separated from each other.

[0110] For other embodiments, please refer to Figure 7 , the driving gate layer 101b does not contain the first doping ions.

[0111] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A driving transistor, characterized in that: include: driving the active region; A driving gate structure located on the driving active area, the driving gate structure covers a portion of the top surface of the driving active area, and at least a portion of the driving gate structure does not have first doping ions; A driving source and a driving drain are located in the driving active area, the driving source and the driving drain are located on both sides of the driving gate structure, and the driving source and the driving drain have driving source and drain ions, and the driving source and drain ions are of the same electrical type as the first doped ions.

2. The driving transistor according to claim 1, wherein: The driving gate structure includes: a driving gate dielectric layer and a driving gate layer located on the driving gate dielectric layer, wherein at least a part of the driving gate layer does not have the first doping ions.

3. The driving transistor according to claim 2, wherein: The first doping ions are present in a partial region of the driving gate layer.

4. The driving transistor according to claim 3, wherein: The partial area of ​​the driving gate layer includes: one doping area or a plurality of doping areas separated from each other.

5. The driving transistor according to claim 2, wherein: The driving gate layer does not have the first doping ions therein.

6. A pixel driving circuit for a micro display, characterized in that: include: A driving transistor as claimed in any one of claims 1 to 5.

7. The pixel driving circuit of the micro display as claimed in claim 6, characterized in that: Also includes: A switching transistor, the switching transistor comprising: Switch active area; a switch gate structure located on the switch active region, the switch gate structure covering a portion of the top surface of the switch active region, and having second doping ions therein; A switch source and a switch drain are located in the switch active area, the switch source and the switch drain are located on both sides of the switch gate structure, the switch source and the switch drain have switch source and drain ions, the switch source and drain ions are of the same electrical type as the second doped ions, wherein the switch source is electrically connected to the drive gate structure.

8. The pixel driving circuit of the micro display as claimed in claim 7, characterized in that: The switch gate structure includes: a switch gate dielectric layer and a switch gate layer located on the switch gate dielectric layer, wherein the switch gate layer has the second doping ions.

9. The pixel driving circuit of a micro display as claimed in claim 7, characterized in that: The driving source-drain ions and the switch source-drain ions may be of the same or different electrical types.

10. The pixel driving circuit of a micro display as claimed in claim 7, characterized in that: It also includes: a storage capacitor, which includes: a first electrode plate, an insulating layer located on the first electrode plate, and a second electrode plate located on the insulating layer, wherein the first electrode plate is electrically connected to the switch source, and the second electrode plate is electrically connected to the drive drain.

11. The pixel driving circuit of a micro display as claimed in claim 6, characterized in that: Also includes: A light emitting diode comprises: a positive electrode doping region and a negative electrode doping region adjacent to each other, wherein the positive electrode doping region is electrically connected to the driving source electrode.

12. A method for forming a driving transistor, characterized in that: include: forming a driving active region; forming a driving gate structure on the driving active area, wherein the driving gate structure covers a portion of the top surface of the driving active area, and at least a portion of the driving gate structure is not doped with the first doping ions; A driving source and a driving drain are formed in the driving active area. The driving source and the driving drain are located on both sides of the driving gate structure. The driving source and the driving drain are doped with driving source and drain ions. The driving source and drain ions are of the same electrical type as the first doped ions.

13. The method for forming a driving transistor according to claim 12, wherein: Forming the driving gate structure includes: forming a driving gate dielectric layer, the driving gate dielectric layer covers a portion of the top surface of the driving active area; forming a driving gate layer on the driving gate dielectric layer, wherein at least a portion of the driving gate layer does not have the first doping ions.

14. The method for forming a driving transistor according to claim 13, wherein: When a doped region of the driving gate layer has the first doped ions, the method for forming the driving gate layer includes: forming a sacrificial layer on the driving active area, the sacrificial layer covering a portion of the top surface of the driving gate layer, and the portion of the top surface covered by the driving gate layer is a continuous area; using the sacrificial layer as a mask, injecting the first doped ions into the driving gate layer, so that a doped region of the driving gate layer has the first doped ions.

15. The method for forming a driving transistor according to claim 13, wherein: When several mutually discrete doped regions of the driving gate layer have the first doped ions, the method for forming the driving gate layer includes: forming a sacrificial layer on the driving active area, the sacrificial layer covering a portion of the top surface of the driving gate layer, and the portion of the top surface of the driving gate layer covered is several mutually discrete regions; using the sacrificial layer as a mask, injecting the first doped ions into the driving gate layer, so that the several mutually discrete doped regions of the driving gate layer have the first doped ions.

16. The method for forming a driving transistor according to claim 13, wherein: When the driving gate layer is not doped with the first doping ions, the method for forming the driving gate layer includes: forming a sacrificial layer on the driving active area, the sacrificial layer completely covering the top surface of the driving gate layer and exposing the remaining area where ion implantation is required; using the sacrificial layer as a mask, injecting the first doping ions so that the driving gate layer does not have the first doping ions.

17. A method for forming a pixel driving circuit of a micro display, characterized in that: include: The driving transistor is formed by the method for forming a driving transistor according to any one of claims 13 to 16.

18. The method for forming a pixel driving circuit of a micro display according to claim 17, wherein: Also includes: A switch transistor is formed, wherein the forming of the switch transistor comprises: forming a switch active area; forming a switch gate structure on the switch active area, wherein the switch gate structure covers a portion of the top surface of the switch active area, and wherein the switch gate structure has second doping ions; forming a switch source and a switch drain in the switch active area, wherein the switch source and the switch drain are located on both sides of the switch gate structure, and wherein the switch source and the switch drain are doped with switch source and drain ions, and wherein the switch source and drain ions are of the same electrical type as the second doping ions, wherein the switch source is electrically connected to the drive gate structure.

19. The method for forming a pixel driving circuit of a micro display according to claim 18, characterized in that: Also includes: A storage capacitor is formed, wherein the storage capacitor includes: forming a first electrode plate; forming an insulating layer on the first electrode plate; and forming a second electrode plate on the insulating layer, wherein the first electrode plate is electrically connected to the switch source, and the second electrode plate is electrically connected to the drive drain.

20. The method for forming a pixel driving circuit of a micro display according to claim 17, wherein: Also includes: A light emitting diode is formed, wherein the light emitting diode comprises: forming a positive electrode doping region; forming a negative electrode doping region, wherein the positive electrode doping region and the negative electrode doping region are adjacent to each other, wherein the positive electrode doping region is electrically connected to the driving source electrode.

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