Driver circuit of display device

Abstract

The invention discloses a driver circuit of a display device. The driver circuit includes an upper transistor, an upper voltage drop suppression circuit, a lower voltage drop suppression circuit, a lower transistor, and a control circuit. When the driver circuit uses the upper input voltage to output power, the control circuit turns on the upper voltage drop suppression circuit to reduce the voltage drop between the first end and the second end of the upper transistor. When the driver circuit outputs power using a lower-side input voltage, the control circuit turns on the lower-side voltage drop suppression circuit to reduce the voltage drop of the lower-side transistor.

Description

Technical Field

[0001] The present invention relates to a display device, and in particular to a driver circuit of a display device. Background Art

[0002] With the advancement of technology, the process technology of display devices continues to develop, making display devices widely used in people's lives. Among various display devices, electronic paper display devices have the characteristics of low power consumption. With the demand for colorization of electronic paper, higher driving voltage is often required to bring out the optical characteristics of electronic paper materials, and transistors with higher voltage resistance are required, but this also causes an increase in circuit costs, or faces the problem of no suitable high-voltage process to meet the demand. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a driver circuit of a display device in view of the deficiencies of the prior art. The driver circuit of the display device includes an upper transistor, an upper voltage drop suppression circuit, a lower voltage drop suppression circuit, a lower transistor and a control circuit. The first end of the upper transistor is coupled to an upper input voltage. The first end of the upper voltage drop suppression circuit is connected to the second end of the upper transistor. The second end of the upper voltage drop suppression circuit is connected to the output end of the driver circuit of the display device. The second end of the lower voltage drop suppression circuit is connected to the output end of the driver circuit of the display device and the second end of the upper voltage drop suppression circuit. The first end of the lower transistor is coupled to a lower input voltage. The second end of the lower transistor is connected to the first end of the lower voltage drop suppression circuit. The control circuit is connected to the control end of the upper transistor, the control end of the upper voltage drop suppression circuit, the control end of the lower voltage drop suppression circuit and the control end of the lower transistor. When the output end of the driver circuit of the display device outputs the power generated by the upper input voltage, the control circuit turns on the upper transistor and the upper voltage drop suppression circuit, so that the upper voltage drop suppression circuit and the upper transistor divide the voltage to bear the voltage drop between the upper input voltage and the output end of the driver circuit of the display device. When the output end of the driver circuit of the display device outputs the power generated by the lower input voltage, the control circuit turns on the lower transistor and the lower voltage drop suppression circuit, so that the lower voltage drop suppression circuit and the lower transistor divide the voltage to bear the voltage drop between the lower input voltage and the output end of the driver circuit of the display device.

[0004] In an embodiment, the high-side voltage drop suppression circuit includes at least one transistor as at least one high-side suppression transistor.

[0005] In an embodiment, the control circuit supplies a high-side control signal to the control terminal of the high-side transistor, and changes the voltage of the high-side control signal supplied to the control terminal of the high-side transistor between the high-side input voltage and a high-side modulation voltage.

[0006] In one embodiment, the control circuit supplies the high-side modulation voltage to a control terminal of the at least one high-side suppression transistor.

[0007] In an embodiment, the driver circuit of the display device further includes an upper voltage modulation circuit. A first end of the upper voltage modulation circuit is connected to an upper voltage source. A second end of the upper voltage modulation circuit is connected to an upper node between the second end of the upper transistor and the first end of the at least one upper suppression transistor. When the output end of the driver circuit of the display device outputs power generated by the lower input voltage, the control circuit controls the upper voltage modulation circuit to use the voltage supplied by the upper voltage source to reduce the voltage of the upper node.

[0008] In an embodiment, the value of the voltage received by the high-side voltage modulation circuit from the high-side voltage source is equal to the high-side modulation voltage.

[0009] In an embodiment, the upper voltage modulation circuit includes a transistor as an upper modulation transistor. The control end of the upper modulation transistor is connected to the control circuit. When the output end of the driver circuit of the display device outputs the power generated by the upper input voltage, the control circuit turns off the upper modulation transistor. When the output end of the driver circuit of the display device outputs the power generated by the lower input voltage, the control circuit controls the upper modulation transistor to use the voltage supplied by the upper voltage source to reduce the voltage of the upper node.

[0010] In an embodiment, the upper voltage source is a variable voltage source.

[0011] In an embodiment, the control circuit supplies the high-side control signal to a control terminal of the high-side modulation transistor. A first terminal of the high-side modulation transistor receives the high-side modulation voltage from the high-side voltage source.

[0012] In an embodiment, the upper voltage modulation circuit includes a plurality of transistors serving as a plurality of upper modulation transistors, wherein the first terminals of the plurality of upper modulation transistors are respectively connected to a plurality of upper voltage sources for supplying different modulation voltages. The second terminal of each of the upper modulation transistors is connected to the upper node. The control terminal of each of the upper modulation transistors is connected to the control circuit.

[0013] In an embodiment, the low-side voltage drop suppression circuit includes at least one transistor as at least one low-side suppression transistor.

[0014] In an embodiment, the control circuit supplies a lower control signal to the control terminal of the lower transistor, and changes the voltage of the lower control signal supplied to the control terminal of the lower transistor between a lower modulation voltage and the lower input voltage.

[0015] In one embodiment, the control circuit supplies the low-side modulation voltage to a control terminal of the at least one low-side suppression transistor.

[0016] In an embodiment, the driver circuit of the display device further comprises a lower voltage modulation circuit. A first end of the lower voltage modulation circuit is connected to a lower voltage source. A second end of the lower voltage modulation circuit is connected to a lower node between the second end of the lower transistor and the first end of the at least one lower suppression transistor. When the output end of the driver circuit of the display device outputs power generated by the upper input voltage, the control circuit controls the lower voltage modulation circuit to use the voltage supplied by the lower voltage source to increase the voltage of the lower node.

[0017] In an embodiment, the value of the voltage received by the high-side voltage modulation circuit from the low-side voltage source is equal to the low-side modulation voltage.

[0018] In an embodiment, the lower voltage modulation circuit includes a transistor as a lower modulation transistor. The control end of the lower modulation transistor is connected to the control circuit. When the output end of the driver circuit of the display device outputs the power generated by the lower input voltage, the control circuit turns off the lower modulation transistor. When the output end of the driver circuit of the display device outputs the power generated by the upper input voltage, the control circuit controls the lower modulation transistor to use the voltage supplied by the lower voltage source to increase the voltage of the lower node.

[0019] In an embodiment, the lower voltage source is a variable voltage source.

[0020] In one embodiment, the control circuit supplies the low-side control signal to a control terminal of the low-side modulation transistor. A second terminal of the low-side modulation transistor receives the low-side modulation voltage from the low-side voltage source.

[0021] In an embodiment, the lower voltage modulation circuit comprises a plurality of transistors respectively serving as a plurality of lower modulation transistors. A first end of each of the lower modulation transistors is connected to the lower node. A second end of each of the lower modulation transistors is respectively connected to a plurality of lower voltage sources supplying different modulation voltage values. A control end of each of the lower modulation transistors is connected to the control circuit.

[0022] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and description and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 Schematic diagram of a driver circuit of a display device according to a first embodiment of the present invention outputting power using a high-side input voltage.

[0024] Figure 2 It is a schematic diagram of signals when the driver circuit of the display device according to the first embodiment of the present invention outputs power using a high-side input voltage.

[0025] Figure 3 Schematic diagram of a driver circuit of a display device according to a first embodiment of the present invention outputting power using a low-side input voltage.

[0026] Figure 4 It is a schematic diagram of signals when the driver circuit of the display device according to the first embodiment of the present invention outputs power using a low-side input voltage.

[0027] Figure 5 FIG. 4 is a circuit diagram of a driver circuit of a display device according to a second embodiment of the present invention.

[0028] Figure 6 FIG. 4 is a circuit diagram of a driver circuit of a display device according to a third embodiment of the present invention.

[0029] Figure 7 FIG. 4 is a circuit diagram of a driver circuit of a display device according to a fourth embodiment of the present invention.

[0030] Figure 8 FIG. 5 is a circuit diagram of a driver circuit of a display device according to a fifth embodiment of the present invention.

[0031] Fig. 9 FIG. 6 is a circuit diagram of a driver circuit of a display device according to a sixth embodiment of the present invention.

[0032] Fig.10 FIG. 7 is a circuit diagram of a driver circuit of a display device according to a seventh embodiment of the present invention. DETAILED DESCRIPTION

[0033] The following is an explanation of the embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention. In addition, the term "or" used herein may include any one or more combinations of the associated listed items depending on the actual situation.

[0034] See also Figures 1 to 4 ,in Figure 1 FIG. 1 is a circuit diagram of a driver circuit of a display device according to a first embodiment of the present invention.

[0035] The driver circuit of the present invention is suitable for display devices, such as but not limited to electronic paper.

[0036] like Figure 1 As shown, the driver circuit of the display device according to the first embodiment of the present invention may include a high-side transistor TH, a high-side voltage drop suppression circuit DVH, a low-side voltage drop suppression circuit DVL, a low-side transistor TL, and a control circuit CTR.

[0037] The first end of the upper transistor TH is coupled to an upper input voltage VGH. The first end of the upper voltage drop suppression circuit DVH is connected to the second end of the upper transistor TH. The second end of the upper voltage drop suppression circuit DVH is connected to the output end PNout of the driver circuit of the display device of the present invention.

[0038] The second end of the lower voltage drop suppression circuit DVL is connected to the output end PNout of the driver circuit of the display device of the present invention and the second end of the upper voltage drop suppression circuit DVH. The first end of the lower transistor TL is coupled to a lower input voltage VGL. The second end of the lower transistor TL is connected to the first end of the lower voltage drop suppression circuit DVL.

[0039] The control circuit CTR is connected to the control end of the upper transistor TH and the control end of the lower transistor TL. The control circuit CTR can also be connected to the control end of the upper voltage drop suppression circuit DVH and the control end of the lower voltage drop suppression circuit DVL.

[0040] In all embodiments of the present invention, the upper transistor TH is a p-type metal oxide semiconductor field effect transistor (PMOS), and the lower transistor TL is an n-type metal oxide semiconductor field effect transistor (NMOS), but this is only an example and the present invention is not limited thereto.

[0041] When the output terminal PNout of the driver circuit of the display device of the present invention is Figure 1 The output shown uses power generated by a high-side input voltage VGH (eg Figure 2 When the output voltage Vout reaches 35V, the control circuit CTR outputs (for example Figure 2 A high-side control signal CRH (shown as a low level) is sent to the control terminal of the high-side transistor TH to turn on the high-side transistor TH, and output (eg Figure 2 The control circuit CTR can supply a high voltage drop suppression signal to the high voltage drop suppression circuit DVH to start and control the high voltage drop suppression circuit DVH to operate. At this time, the low voltage drop suppression circuit DVL can be turned off.

[0042] For example, Figure 1 As shown, the control circuit CTR can adjust the voltage of a high-side control signal CRH supplied to the control terminal of the high-side transistor TH to a high-side input voltage VGH (eg Figure 2 35V) to a high-side modulation voltage VSS (eg Figure 2 0V is shown).

[0043] When the upper transistor TH and the upper voltage drop suppression circuit DVH are turned on, as shown in FIG. Figure 1 As shown, the current flows sequentially through the upper transistor TH and the upper voltage drop suppression circuit DVH to the output terminal PNout of the driver circuit of the display device of the present invention.

[0044] When the upper voltage drop suppression circuit DVH and the upper transistor TH are turned on at the same time, the voltage division withstands the voltage drop between the voltage of the output terminal PNout (e.g., -35V) of the driver circuit of the display device of the present invention and the upper input voltage VGH (e.g., 35V). In this way, the voltage drop between the first terminal and the second terminal of the upper transistor TH is reduced and is not higher than the withstand voltage of the upper transistor TH.

[0045] Therefore, the driver circuit of the display device of the present invention does not need to use high-voltage circuit components, but only needs to set up a lower-voltage upper transistor TH at a lower cost. Under the condition that the upper transistor TH will not be burned due to overvoltage, it can still supply sufficient power.

[0046] When the output terminal PNout of the driver circuit of the display device of the present invention is Figure 3 The output shown uses the power output generated by the lower input voltage VGL (for example Figure 4 When the output voltage Vout reaches -35V, the control circuit CTR outputs (for example Figure 4A high level ... Figure 4 The control circuit CTR can supply a high-level lower control signal CRL to the control terminal of the lower transistor TL to turn on the lower transistor TL. At the same time, the control circuit CTR can supply an upper voltage drop suppression signal to the lower voltage drop suppression circuit DVL to control the operation of the lower voltage drop suppression circuit DVL. At this time, the upper voltage drop suppression circuit DVH can be turned off.

[0047] For example, Figure 3 As shown, the control circuit CTR can adjust the voltage of the lower control signal CRL supplied to the control terminal of the lower transistor TL to the lower modulation voltage VDD (for example, Figure 4 3V) to the lower input voltage VGL (e.g. Figure 4 -35V shown).

[0048] When the lower transistor TL and the lower voltage drop suppression circuit DVL are turned on, Figure 3 As shown, the current flows sequentially through the bottom transistor TL and the bottom voltage drop suppression circuit DVL to the output terminal PNout of the driver circuit of the display device of the present invention.

[0049] When the lower voltage drop suppression circuit DVL and the lower transistor TL are turned on at the same time, the voltage division withstands the voltage drop between the voltage of the output terminal PNout (e.g., 35V) of the driver circuit of the display device of the present invention and the lower input voltage VGL (e.g., -35V). In this way, the voltage drop between the first terminal and the second terminal of the lower transistor TL is reduced and is not higher than the withstand voltage of the lower transistor TL.

[0050] Therefore, the driver circuit of the display device of the present invention does not need to use high-voltage circuit components, but only needs to set up a lower-voltage bottom transistor TL at a lower cost. Under the condition that the lower transistor TL will not be burned due to overvoltage, it can still supply sufficient power.

[0051] See also Figure 5 , which is a circuit diagram of a driver circuit of a display device according to a second embodiment of the present invention. The similarities between the second embodiment of the present invention and the first embodiment are not described in detail below.

[0052] In the second embodiment, the high-side voltage drop suppression circuit DVH1 of the driver circuit of the display device of the present invention includes a transistor as a high-side suppression transistor TEH1 described herein.

[0053] The first end of the upper-side suppression transistor TEH1 is connected to the second end of the upper-side transistor TH. The second end of the upper-side suppression transistor TEH1 is connected to the output end PNout of the driver circuit of the display device of the present invention. The control end of the upper-side suppression transistor TEH1 can be coupled to a high-side modulation voltage VSS, or connected to the control circuit CTR to receive a high-side modulation voltage VSS from the control circuit CTR.

[0054] When the output terminal PNout of the driver circuit of the display device of the present invention outputs power generated by using a high-side input voltage VGH, the control circuit CTR outputs a high-side control signal CRH to the control terminal of the high-side transistor TH to turn on the high-side transistor TH. At the same time, the control circuit CTR outputs (e.g. Figure 5 A high-side voltage drop suppression signal having a high-side modulation voltage VSS is shown to a control terminal of a high-side suppression transistor TEH1 to turn on a high-side suppression transistor TEH1.

[0055] In the second embodiment, the low-side voltage drop suppression circuit DVL1 of the driver circuit of the display device of the present invention includes a transistor as a low-side suppression transistor TEL1 described herein.

[0056] The second end of the lower suppression transistor TEL1 is connected to the output end PNout of the driver circuit of the display device of the present invention and the second end of the upper suppression transistor TEH1. The first end of the lower suppression transistor TEL1 is connected to the second end of the lower transistor TL. The control end of the lower suppression transistor TEL1 can be coupled to a lower modulation voltage VDD, or connected to the control circuit CTR to receive a lower modulation voltage VDD from the control circuit CTR.

[0057] When the output terminal PNout of the driver circuit of the display device of the present invention outputs the power generated by the lower input voltage VGL, the control circuit CTR outputs a lower control signal CRL to the control terminal of the lower transistor TL to turn on the lower transistor TL. Figure 5 A lower voltage drop suppression signal having a lower modulation voltage VDD is sent to a control terminal of the lower suppression transistor TEL1 to turn on the lower suppression transistor TEL1.

[0058] See also Figure 6 , which is a circuit diagram of a driver circuit of a display device according to a third embodiment of the present invention. The third embodiment of the present invention is similar to the first embodiment and will not be described in detail below.

[0059] In the third embodiment, the upper voltage drop suppression circuit DVH2 of the driver circuit of the display device of the present invention includes n transistors, as the n upper suppression transistors TEH1 to TEHn described in this article, where n is an integer greater than 1 and may depend on the withstand voltage requirements of the upper transistor TH.

[0060] The first end of the upper transistor TH is coupled to an upper input voltage VGH. The second end of the upper transistor TH is connected to the first end of the upper suppression transistor TEH1. The second end of the upper suppression transistor TEH1 is connected to the first end of the upper suppression transistor TEH2, the second end of the upper suppression transistor TEH2 is connected to the first end of the upper suppression transistor TEH3, and so on. The second end of the upper suppression transistor TEHn is connected to the output end PNout of the driver circuit of the display device of the present invention. The control end of each of the upper suppression transistors TEH1 to TEHn can be connected to the control circuit CTR to be controlled by the control circuit CTR.

[0061] When the output terminal PNout of the driver circuit of the display device of the present invention outputs power generated by using a high-side input voltage VGH, the control circuit CTR outputs a high-side control signal CRH to the control terminal of the high-side transistor TH to turn on the high-side transistor TH. At the same time, the control circuit CTR outputs a high-side voltage drop suppression signal to each of the high-side suppression transistors TEH1 to TEHn to turn on the plurality of high-side suppression transistors TEH1 to TEHn, thereby reducing the voltage drop between the first terminal and the second terminal of the high-side transistor TH.

[0062] In the third embodiment, the lower voltage drop suppression circuit DVL2 of the driver circuit of the display device of the present invention includes n transistors, as the n lower voltage suppression transistors TEL1 to TELn described in this article, where n is an integer greater than 1 and may depend on the withstand voltage requirements of the lower transistor TL.

[0063] The first end of the lower transistor TL is coupled to a lower input voltage VGL. The second end of the lower transistor TL is connected to the first end of the lower suppression transistor TEL1. The second end of the lower suppression transistor TEL1 is connected to the first end of the lower suppression transistor TEL2, the second end of the lower suppression transistor TEL2 is connected to the first end of the lower suppression transistor TEL3, and so on. The second end of the lower suppression transistor TELn is connected to the output end PNout of the driver circuit of the display device of the present invention and the second end of the upper suppression transistor TEHn. The control end of each of the lower suppression transistors TEL1 to TELn can be connected to the control circuit CTR to be controlled by the control circuit CTR.

[0064] When the output terminal PNout of the driver circuit of the display device of the present invention outputs power generated by using an upper input voltage VGH, the control circuit CTR outputs a lower control signal CRL to the control terminal of the lower transistor TL to turn on the lower transistor TL. At the same time, the control circuit CTR outputs a lower voltage drop suppression signal to each of the lower suppression transistors TEL1 to TELn to turn on the plurality of lower suppression transistors TEL1 to TELn, thereby reducing the voltage drop between the first terminal and the second terminal of the lower transistor TL.

[0065] See also Figure 7 , which is a circuit diagram of a driver circuit of a display device according to a fourth embodiment of the present invention. The fourth embodiment of the present invention is similar to the first embodiment and will not be described in detail below.

[0066] The driver circuit of the display device according to the fourth embodiment of the present invention may further include a high-side voltage modulation circuit MUH.

[0067] The first terminal of the upper voltage modulation circuit MUH can be connected to an upper voltage source. The voltage value received by the upper voltage modulation circuit MUH from the upper voltage source can be equal to the upper modulation voltage VSS. That is, the first terminal of the upper voltage modulation circuit MUH can be coupled to the upper modulation voltage VSS.

[0068] The second terminal of the upper voltage modulation circuit MUH is connected to an upper node between the second terminal of the upper transistor TH and the first terminal of the upper limiting transistor TEH1 .

[0069] When the output terminal PNout of the driver circuit of the display device of the present invention outputs the power generated by the lower input voltage VGL, the control circuit CTR controls the upper voltage modulation circuit MUH to use the voltage supplied by the upper voltage source (e.g., an upper modulation voltage VSS) to reduce the voltage of an upper node between the second end of the upper transistor TH and the first end of the upper suppression transistor TEH1 connected to the second end of the upper voltage modulation circuit MUH. As a result, the voltage drop between the first end and the second end of the lower transistor TL is reduced. Therefore, the driver circuit of the display device of the present invention only needs to use the lower transistor TL with a lower withstand voltage to save circuit cost.

[0070] The driver circuit of the display device according to the fourth embodiment of the present invention may further include a lower voltage modulation circuit MUL.

[0071] A first terminal of the lower voltage modulation circuit MUL is connected to a lower voltage source, and a second terminal of the lower voltage modulation circuit MUL is connected to a lower node between the second terminal of the lower transistor TL and the first terminal of the lower suppression transistor TEL1.

[0072] When the output terminal PNout of the driver circuit of the display device of the present invention outputs power generated by an upper input voltage VGH, the control circuit CTR controls the lower voltage modulation circuit MUL to use the voltage supplied by the lower voltage source (e.g., the lower modulation voltage VDD) to increase the voltage of a lower node between the second end of the lower transistor TL and the first end of the lower suppression transistor TEL1 connected to the second end of the lower voltage modulation circuit MUL. As a result, the voltage drop between the first end and the second end of the upper transistor TH is reduced. Therefore, the driver circuit of the display device of the present invention only needs to use an upper transistor TH with a lower withstand voltage to save circuit cost.

[0073] See also Figure 8 , which is a circuit diagram of a driver circuit of a display device according to a fifth embodiment of the present invention. The fifth embodiment of the present invention is similar to the fourth embodiment and will not be described in detail below.

[0074] In the fifth embodiment, the upper voltage modulation circuit MUH1 of the driver circuit of the display device of the present invention includes a transistor, which serves as an upper modulation transistor TMH1 described herein.

[0075] The first terminal of the high-side modulation transistor TMH1 is connected to a high-side voltage source to receive a modulation voltage (eg, a high-side modulation voltage VSS) from the high-side voltage source, or the first terminal of the high-side modulation transistor TMH1 is coupled to a modulation voltage (eg, a high-side modulation voltage VSS).

[0076] The second terminal of the high-side modulation transistor TMH1 is connected to a high-side node between the second terminal of the high-side transistor TH and the first terminal of the high-side suppression transistor TEH1 . The control terminal of the high-side modulation transistor TMH1 is connected to the control circuit CTR.

[0077] When the output terminal PNout of the driver circuit of the display device of the present invention outputs power generated by a lower input voltage VGL, the control circuit CTR outputs an upper modulation signal CMH1 to the control terminal of the upper modulation transistor TMH1 to turn on the upper modulation transistor TMH1.

[0078] When the upper modulation transistor TMH1 is turned on, the voltage of an upper node between the second end of the upper transistor TH and the first end of the upper suppression transistor TEH1 is directly reduced to be equal to or close to a modulation voltage (e.g., an upper modulation voltage VSS). At this time, the voltage drop between the first end and the second end of the lower transistor TL and the lower suppression transistor TEL1 does not exceed their own withstand voltage, and thus they will not be burned due to overvoltage.

[0079] In the fifth embodiment, the lower voltage modulation circuit MUL1 of the driver circuit of the display device of the present invention comprises a transistor as the lower modulation transistor TML1 described herein.

[0080] The first end of the low-side modulation transistor TML1 is connected to a low-side voltage source to receive a modulation voltage (eg, a low-side modulation voltage VDD) from the low-side voltage source, or the first end of the low-side modulation transistor TML1 is coupled to a modulation voltage (eg, a low-side modulation voltage VDD).

[0081] The second terminal of the bottom modulation transistor TML1 is connected to a bottom node between the second terminal of the bottom transistor TL and the first terminal of the bottom suppression transistor TEL1. The control terminal of the bottom modulation transistor TML1 is connected to the control circuit CTR.

[0082] When the output terminal PNout of the driver circuit of the display device of the present invention outputs power generated by a high-side input voltage VGH, the control circuit CTR outputs a low-side modulation signal CML1 to the control terminal of the low-side modulation transistor TML1 to turn on the low-side modulation transistor TML1.

[0083] When the lower modulation transistor TML1 is turned on, the voltage of a lower node between the second end of the lower transistor TL and the first end of the lower suppression transistor TEL1 is directly increased to be equal to or close to a modulation voltage (e.g., a lower modulation voltage VDD). At this time, the voltage drop between the first end and the second end of the upper transistor TH and the upper suppression transistor TEH1 does not exceed their own withstand voltage, and thus they will not be burned due to overvoltage.

[0084] See also Fig. 9 , which is a circuit diagram of a driver circuit of a display device according to a sixth embodiment of the present invention. The sixth embodiment of the present invention is similar to the fifth embodiment and will not be described in detail below.

[0085] like Figure 8 As shown, in the fifth embodiment, the first terminal of the high-side modulation transistor TMH1 is coupled to a high-side modulation voltage VSS having a fixed voltage value, or is connected to a fixed voltage source to receive a high-side modulation voltage VSS having a fixed voltage value from the fixed voltage source.

[0086] like Fig. 9As shown, in the sixth embodiment, the first end of the upper modulation transistor TMH1 is connected to an upper voltage source PSH as a variable voltage source. The upper voltage source PSH can determine the value of an upper modulation voltage supplied to the first end of the upper modulation transistor TMH1 according to the value of a lower input voltage VGL and other practical requirements such as the withstand voltage of the lower transistor TL. If necessary, the control circuit CTR can be connected to the upper voltage source PSH to control the upper voltage source PSH to supply an upper modulation voltage.

[0087] like Figure 8 As shown, in the fifth embodiment, the first terminal of the low-side modulation transistor TML1 is coupled to a low-side modulation voltage VDD having a fixed voltage value, or is connected to a fixed voltage source to receive a low-side modulation voltage VDD having a fixed voltage value from the fixed voltage source.

[0088] like Fig. 9 As shown, in the sixth embodiment, the first end of the lower modulation transistor TML1 is connected to a lower voltage source PSL which is a variable voltage source. The lower voltage source PSL can determine the value of the lower modulation voltage supplied to the first end of the lower modulation transistor TML1 according to the value of an upper input voltage VGH and other practical requirements such as the withstand voltage of the upper transistor TH. If necessary, the control circuit CTR can be connected to the lower voltage source PSL to control the lower voltage source PSL to supply a lower modulation voltage.

[0089] See also Fig.10 , which is a circuit diagram of a driver circuit of a display device according to a seventh embodiment of the present invention. The seventh embodiment of the present invention is similar to the fifth embodiment and will not be described in detail below.

[0090] In the seventh embodiment of the present invention, the upper voltage modulation circuit MUH2 of the driver circuit of the display device of the present invention includes a plurality of upper modulation transistors TMH1 to TMHn, and the lower voltage modulation circuit MUL2 includes a plurality of lower modulation transistors TML1 to TMLn.

[0091] If necessary, the driver circuit of the display device of the present invention may further include a plurality of high-side switching elements SWH1 to SWHn and a plurality of low-side switching elements SWL1 to SWLn.

[0092] The first ends of the plurality of upper-side modulation transistors TMH1 to TMHn may be respectively connected to a plurality of upper-side voltage sources for supplying different upper-side modulation voltages VMH1 to VMHn. The second ends of the plurality of upper-side modulation transistors TMH1 to TMHn may be respectively connected to the first ends of the plurality of upper-side switching elements SWH1 to SWHn. The second end of each of the upper-side switching elements SWH1 to SWHn may be connected to an upper-side node between the second end of the upper-side transistor TH and the first end of the upper-side inhibition transistor TEH1.

[0093] The first ends of the plurality of lower side modulation transistors TML1 to TMLn may be respectively connected to the plurality of lower side voltage sources for supplying different lower side modulation voltages VML1 to VMLn. The second ends of the plurality of lower side modulation transistors TML1 to TMLn may be respectively connected to the first ends of the plurality of lower side switching elements SWL1 to SWLn. The second end of each lower side switching element SWL1 to SWLn may be connected to a lower side node between the second end of the lower side transistor TL and the first end of the lower side suppression transistor TEL1.

[0094] The control circuit CTR can be connected to the control terminals of the plurality of upper modulation transistors TMH1 to TMHn and the plurality of lower modulation transistors TML1 to TMLn. The control circuit CTR can output a plurality of upper modulation signals CMH1 to CMHn to the control terminals of the upper modulation transistors TMH1 to TMHn, respectively, to control the operation of the plurality of upper modulation transistors TMH1 to TMHn. The control circuit CTR can output a plurality of lower modulation signals CML1 to CMLn to the control terminals of the lower modulation transistors TML1 to TMLn, respectively, to control the operation of the lower modulation transistors TML1 to TMLn.

[0095] The control circuit CTR may be connected to the control terminal of each of the plurality of upper switching elements SWH1 to SWHn and the plurality of lower switching elements SWL1 to SWLn to control the operation of the plurality of upper switching elements SWH1 to SWHn and the plurality of lower switching elements SWL1 to SWLn.

[0096] The control circuit CTR can decide which of the multiple upper switching elements SWH1 to SWHn to turn on based on other actual requirements such as the withstand voltage of the lower transistor TL, and further decide to directly reduce a lower node between the second end of the lower transistor TL and the first end of the lower inhibition transistor TEL1 to be equal to or close to which of the multiple upper modulation voltages VMH1 to VMHn.

[0097] The control circuit CTR can decide which one of the multiple lower switching elements SWL1 to SWLn to turn on based on other practical requirements such as the withstand voltage of the upper transistor TH, and further decide to increase the voltage of an upper node between the second end of the upper transistor TH and the first end of the upper inhibition transistor TEH1 to be equal to or close to which one of the multiple lower modulation voltages VML1 to VMLn.

[0098] In actual operation, the multiple upper side switching components SWH1 to SWHn can be replaced by a multiplexer or other selection circuits and other circuit components with the same function, and the multiple lower side switching components SWL1 to SWLn can also be replaced by a multiplexer or other selection circuits and other circuit components with the same function. The above is only an example, and the present invention is not limited to this.

[0099] In summary, the present invention provides a driver circuit for a display device, in which a voltage drop suppression circuit (and a voltage modulation circuit) is provided to reduce the voltage drop between the first end and the second end of a transistor. Thus, in the driver circuit for the display device of the present invention, it is not necessary to use a high-voltage withstand process to manufacture a high-voltage withstand transistor at a high cost, but it is sufficient to use a low-cost low-voltage withstand process to manufacture a low-voltage withstand transistor, thereby effectively saving circuit costs and preventing the transistor from being damaged due to overvoltage and affecting the operation of the driver circuit of the display device (such as but not limited to electronic paper).

[0100] The contents disclosed above are only preferred feasible embodiments of the present invention, and are not intended to limit the claims of the present invention. Therefore, all equivalent technical changes made using the description and drawings of the present invention are included in the claims of the present invention.

Claims

1. A driver circuit for a display device, characterized in that: The driver circuit of the display device comprises: A high-side transistor, a first terminal of the high-side transistor is coupled to a high-side input voltage; an upper voltage drop suppression circuit, wherein a first end of the upper voltage drop suppression circuit is connected to a second end of the upper transistor, and a second end of the upper voltage drop suppression circuit is connected to an output end of a driver circuit of the display device; a lower voltage drop suppression circuit, wherein a second end of the lower voltage drop suppression circuit is connected to an output end of a driver circuit of the display device and a second end of the upper voltage drop suppression circuit; a bottom-side transistor, a first terminal of the bottom-side transistor being coupled to a bottom-side input voltage, and a second terminal of the bottom-side transistor being connected to a first terminal of the bottom-side voltage drop suppression circuit; and A control circuit connected to the control end of the upper transistor, the control end of the upper voltage drop suppression circuit, the control end of the lower voltage drop suppression circuit, and the control end of the lower transistor; When the output end of the driver circuit of the display device outputs the power generated by the upper input voltage, the control circuit turns on the upper transistor and the upper voltage drop suppression circuit, so that the upper voltage drop suppression circuit and the upper transistor divide the voltage to bear the voltage drop between the upper input voltage and the output end of the driver circuit of the display device; Among them, when the output end of the driver circuit of the display device outputs the power generated by using the lower side input voltage, the control circuit turns on the lower side transistor and the lower side voltage drop suppression circuit, so that the lower side voltage drop suppression circuit and the lower side transistor divider withstand the voltage drop between the lower side input voltage and the output end of the driver circuit of the display device.

2. The driver circuit of the display device according to claim 1, characterized in that: The high-side voltage drop suppression circuit includes at least one transistor as at least one high-side suppression transistor.

3. The driver circuit of the display device according to claim 2, characterized in that: The control circuit supplies a high-side control signal to the control terminal of the high-side transistor, and changes the voltage of the high-side control signal supplied to the control terminal of the high-side transistor between the high-side input voltage and a high-side modulation voltage.

4. The driver circuit of the display device according to claim 3, characterized in that: The control circuit supplies the high-side modulation voltage to a control terminal of the at least one high-side suppression transistor.

5. The driver circuit of the display device according to claim 4, characterized in that: The driver circuit of the display device further comprises: A high-side voltage modulation circuit, wherein a first terminal of the high-side voltage modulation circuit is connected to a high-side voltage source, and a second terminal of the high-side voltage modulation circuit is connected to a high-side node between the second terminal of the high-side transistor and the first terminal of the at least one high-side inhibition transistor; When the output end of the driver circuit of the display device outputs power generated by the lower input voltage, the control circuit controls the upper voltage modulation circuit to use the voltage supplied by the upper voltage source to reduce the voltage of the upper node.

6. The driver circuit of the display device according to claim 5, characterized in that: The value of the voltage received by the high-side voltage modulation circuit from the high-side voltage source is equal to the high-side modulation voltage.

7. The driver circuit of the display device according to claim 5, characterized in that: The upper voltage modulation circuit includes a transistor as an upper modulation transistor, and the control terminal of the upper modulation transistor is connected to the control circuit; Wherein, when the output terminal of the driver circuit of the display device outputs the power generated by using the upper input voltage, the control circuit turns off the upper modulation transistor; When the output terminal of the driver circuit of the display device outputs power generated by the lower input voltage, the control circuit controls the upper modulation transistor to use the voltage supplied by the upper voltage source to reduce the voltage of the upper node.

8. The driver circuit of the display device according to any one of claims 5 to 7, characterized in that: The upper voltage source is a variable voltage source.

9. The driver circuit of the display device according to claim 7, characterized in that: The control circuit supplies the high-side control signal to a control terminal of the high-side modulation transistor. A first terminal of the high-side modulation transistor receives the high-side modulation voltage from the high-side voltage source.

10. The driver circuit of the display device according to claim 5, characterized in that: The upper voltage modulation circuit includes a plurality of transistors serving as a plurality of upper modulation transistors, wherein the first ends of the plurality of upper modulation transistors are respectively connected to a plurality of upper voltage sources for supplying different modulation voltages, the second end of each of the upper modulation transistors is connected to the upper node, and the control end of each of the upper modulation transistors is connected to the control circuit.

11. The driver circuit of the display device according to claim 1, characterized in that: The low-side voltage drop suppression circuit includes at least one transistor serving as at least one low-side suppression transistor.

12. The driver circuit of the display device according to claim 11, characterized in that: The control circuit supplies a lower control signal to the control terminal of the lower transistor, and changes the voltage of the lower control signal supplied to the control terminal of the lower transistor between a lower modulation voltage and the lower input voltage.

13. The driver circuit of the display device according to claim 12, characterized in that: The control circuit supplies the low-side modulation voltage to a control terminal of the at least one low-side suppression transistor.

14. The driver circuit of the display device according to claim 13, characterized in that: The driver circuit of the display device further comprises: a lower voltage modulation circuit, wherein a first terminal of the lower voltage modulation circuit is connected to a lower voltage source, and a second terminal of the lower voltage modulation circuit is connected to a lower node between the second terminal of the lower transistor and the first terminal of the at least one lower suppression transistor; When the output end of the driver circuit of the display device outputs power generated by the upper input voltage, the control circuit controls the lower voltage modulation circuit to increase the voltage of the lower node using the voltage supplied by the lower voltage source.

15. The driver circuit of the display device according to claim 14, characterized in that: The value of the voltage received by the low-side voltage modulation circuit from the low-side voltage source is equal to the low-side modulation voltage.

16. The driver circuit of the display device according to claim 14, characterized in that: The lower voltage modulation circuit comprises a transistor as a lower modulation transistor, and the control terminal of the lower modulation transistor is connected to the control circuit; Wherein, when the output terminal of the driver circuit of the display device outputs the power generated by using the lower input voltage, the control circuit turns off the lower modulation transistor; When the output terminal of the driver circuit of the display device outputs power generated by the upper input voltage, the control circuit controls the lower modulation transistor to increase the voltage of the lower node using the voltage supplied by the lower voltage source.

17. The driver circuit of the display device according to any one of claims 14 to 16, characterized in that: The lower voltage source is a variable voltage source.

18. The driver circuit of the display device according to claim 16, characterized in that: The control circuit supplies the low-side control signal to a control terminal of the low-side modulation transistor. A first terminal of the low-side modulation transistor receives the low-side modulation voltage from the low-side voltage source.

19. The driver circuit of the display device according to claim 14, characterized in that: The lower voltage modulation circuit includes a plurality of transistors serving as a plurality of lower modulation transistors, wherein the second end of each of the lower modulation transistors is connected to the lower node, the first ends of the plurality of lower modulation transistors are respectively connected to a plurality of lower voltage sources supplying different modulation voltage values, and the control end of each of the lower modulation transistors is connected to the control circuit.

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