Vertical cavity surface emitting laser array, manufacturing method thereof, chip and laser radar

Abstract

The invention relates to a vertical cavity surface emitting laser array, a manufacturing method thereof, a chip and a laser radar, and the method comprises the steps: providing an epitaxial layer which comprises a first reflector, an active layer and a second reflector which are sequentially stacked on a substrate; performing mesa etching on the epitaxial layer to form a first groove; forming a first electrode in the first trench; forming a first passivation layer covering the first electrode; performing proton injection to form a proton injection region; forming a second passivation layer covering the first passivation layer; and forming a metal wiring layer for electrically connecting the plurality of second electrodes, wherein the metal wiring layer and the first electrode are insulated and isolated through the first passivation layer and the second passivation layer. Compared with the prior art, the first passivation layer is thin so as to reduce the blocking force of the first passivation layer on proton injection forming the proton injection region, and the two-layer passivation layer structure can avoid poor quality of the passivation layers, so that effective isolation between the metal wiring layer and the first electrode is ensured, and the risk of failure and short circuit of the device is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor laser technology, and in particular to a vertical cavity surface emitting laser array, a vertical cavity surface emitting laser chip, a method for manufacturing a vertical cavity surface emitting laser array, and a laser radar. Background Art

[0002] With the continuous development of semiconductor technology, vertical-cavity surface-emitting lasers (VCSELs) are widely used in optical communications, optical interconnection, optical sensing and other fields due to their easy integration. Two-dimensional (2D) addressable VCSEL arrays have become candidate light sources for systems such as three-dimensional sensing and advanced lidar due to their characteristics of partitioned lighting and low power consumption.

[0003] The exemplary two-dimensional addressable VCSEL adopts a coplanar electrode structure, that is, the P-type electrode and the N-type electrode are distributed on the front of the chip. This electrode design improves the integration of the device and optimizes the management of the electrical and thermal distribution of the device. Insufficient isolation between adjacent electrodes can lead to short circuits, false lighting, etc., causing device failure, poor reliability and even safety risks. The probability of this risk increases significantly with the increase in device integration. Therefore, it is necessary to adopt an effective way to achieve insulation isolation between electrodes. Summary of the invention

[0004] Based on this, it is necessary to provide a method for manufacturing a vertical cavity surface emitting laser array with good isolation effect between electrodes.

[0005] A method for manufacturing a vertical cavity surface emitting laser array, comprising: providing an epitaxial layer; wherein the epitaxial layer comprises a first reflector, an active layer and a second reflector which are sequentially stacked on a substrate; performing table etching on the epitaxial layer to form a first groove; wherein the first groove exposes a portion of the surface of the first reflector and separates adjacent table surfaces, and a table surface is a portion of a vertical cavity surface emitting laser; forming a plurality of first electrodes located on a portion of the surface of the first reflector and electrically connected to the first reflector in the first groove, wherein a plurality of first electrodes are located near a first side wall of the first groove, a plurality of first electrodes are located near a second side wall of the first groove, and the positions of the first side wall and the second side wall are opposite to each other. The invention relates to a method for producing a first passivation layer covering the first electrode and a first reflector between the first electrode near the first side wall and the first electrode near the second side wall; forming a first passivation layer covering the first passivation layer, wherein the thickness of the first passivation layer is less than the thickness of the second passivation layer; forming a metal wiring layer electrically connecting a plurality of second electrodes; the metal wiring layer is insulated and isolated from the plurality of first electrodes by the first passivation layer and the second passivation layer; wherein each second electrode is formed before forming the metal wiring layer, each second electrode is electrically connected to the second reflector, and each first electrode has opposite polarity to each second electrode.

[0006] In the manufacturing method of the above-mentioned vertical cavity surface emitting laser array, proton injection is performed between the steps of forming the first passivation layer and the second passivation layer. The first passivation layer adopts a relatively thin thickness to reduce its blocking force on proton injection, so as to achieve effective proton injection, thereby ensuring that the proton injection area formed by effective proton injection is electrically isolated from the first electrode close to the first side wall and the first electrode close to the second side wall. In addition, a two-layer passivation layer structure (first passivation layer and second passivation layer) is adopted between the metal wiring layer and the first electrode. Compared with a single-layer passivation layer structure, under the premise of ensuring the thickness of the passivation layer between the metal wiring layer and the first electrode, it is possible to avoid defects caused by excessive thickness of the passivation layer formed at one time, thereby avoiding poor quality of the passivation layer, ensuring effective isolation between the metal wiring layer and the first electrode, and reducing the risk of device failure and short circuit.

[0007] In one of the embodiments, after forming a plurality of the first electrodes and before the step of forming a first passivation layer covering the first electrodes, the step further includes etching between the first electrode close to the first side wall and the first electrode close to the second side wall to form an isolation groove.

[0008] In one of the embodiments, after the mesa etching and before the step of forming a first passivation layer covering the first electrode, the step further includes etching between the first electrode close to the first side wall and the first electrode close to the second side wall to form an isolation trench.

[0009] In one embodiment, the step of forming the first reflector includes: forming a first distributed Bragg reflector; forming a first conductive layer on the first distributed Bragg reflector; the first conductive layer has the same conductivity type as the first distributed Bragg reflector; the step of forming the second reflector includes: forming a second distributed Bragg reflector; forming a second conductive layer on the second distributed Bragg reflector; the second conductive layer has the same conductivity type as the second distributed Bragg reflector, and the conductivity type of the first distributed Bragg reflector is opposite to that of the second distributed Bragg reflector; the step of forming a plurality of first electrodes in the first groove, which are located on a partial surface of the first reflector and are electrically connected to the first reflector, includes forming the plurality of first electrodes on a partial surface of the first conductive layer; each of the second electrodes is formed on the second conductive layer.

[0010] In one embodiment, the first distributed Bragg reflector and the first conductive layer are N-type layers, and the N-type doping concentration of the first conductive layer is greater than the N-type doping concentration of the first distributed Bragg reflector; the second distributed Bragg reflector and the second conductive layer are P-type layers, and the P-type doping concentration of the second conductive layer is greater than the P-type doping concentration of the second distributed Bragg reflector.

[0011] In one embodiment, the metal wiring layer extends along the first sidewall, the bottom of the first trench and the second sidewall, so as to connect the second electrodes on the adjacent mesas.

[0012] In one embodiment, each of the second electrodes is formed before the step of performing mesa etching; the manufacturing method further comprises the step of forming a third passivation layer covering the second electrodes before performing mesa etching.

[0013] In one of the embodiments, the method further includes partially oxidizing the second reflector to form an oxide layer on a partial area of ​​the second reflector close to the active layer.

[0014] In one embodiment, the bottom of the proton implantation region formed by the proton implantation step extends into the substrate.

[0015] In one of the embodiments, after forming the metal wiring layer, the method further includes: thinning the back side of the substrate; and depositing metal on the back side of the thinned substrate.

[0016] In one embodiment, the material of the substrate is a low-doped III-V group compound.

[0017] In one of the embodiments, the manufacturing method is used to manufacture a vertical cavity surface emitting laser array in a two-dimensionally addressable vertical cavity surface emitting laser chip.

[0018] There is also a need to provide an array of vertical cavity surface emitting lasers.

[0019] A vertical cavity surface emitting laser array comprises a plurality of vertical cavity surface emitting lasers, each of the vertical cavity surface emitting lasers comprises: a substrate; a first reflector located on the substrate; an active layer located on the first reflector; a second reflector located on the active layer; a first electrode located on a portion of the surface of the first reflector and electrically connected to the first reflector; a second electrode located on the second reflector and electrically connected to the second reflector, the first electrode and the second electrode having opposite polarities; a first passivation layer covering the first electrode; a second passivation layer covering the first passivation layer, the thickness of the first passivation layer being less than that of the second passivation layer; a metal wiring layer electrically connecting the second electrodes of adjacent vertical cavity surface emitting lasers, the ... The layer is insulated and isolated from the first electrode by the first passivation layer and the second passivation layer; wherein the vertical cavity surface emitting laser array is also provided with a first groove located between adjacent vertical cavity surface emitting lasers, the first groove exposes a portion of the surface of the first reflector, a number of first electrodes of the vertical cavity surface emitting laser array are located near the first side wall of the first groove, and a number of first electrodes are located near the second side wall of the first groove, and the positions of the first side wall and the second side wall are opposite; the vertical cavity surface emitting laser array also includes a proton injection region located in the first reflector, the proton injection region is located between the first electrode near the first side wall and the first electrode near the second side wall, and is located in the first reflector.

[0020] In the above-mentioned vertical cavity surface emitting laser array, the first passivation layer adopts a relatively thin thickness to reduce its blocking force on the proton injection forming the proton injection area, so as to achieve effective proton injection, thereby ensuring the electrical isolation of the proton injection area to the first electrode close to the first side wall and the first electrode close to the second side wall. In addition, a two-layer passivation layer structure (first passivation layer and second passivation layer) is adopted between the metal wiring layer and the first electrode. Compared with a single-layer passivation layer structure, under the premise of ensuring the thickness of the passivation layer between the metal wiring layer and the first electrode, it is possible to avoid defects caused by excessive thickness of the passivation layer formed at one time, thereby avoiding poor quality of the passivation layer, ensuring effective isolation between the metal wiring layer and the first electrode, and reducing the risk of device failure and short circuit.

[0021] In one embodiment, part of the proton implantation region is located in the first passivation layer, and there is no proton implantation region in the second passivation layer.

[0022] It is also necessary to provide a vertical cavity surface emitting laser chip, including the aforementioned vertical cavity surface emitting laser array.

[0023] In one of the embodiments, the VCSEL chip is a two-dimensionally addressable VCSEL chip.

[0024] It is also necessary to provide a laser radar, including the aforementioned vertical cavity surface emitting laser chip and a driving circuit for driving the chip to work. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood.

[0026] Figure 1 It is a flow chart of a method for manufacturing a vertical cavity surface emitting laser array in one embodiment of the present application.

[0027] Figure 2a is a schematic diagram of the structure of a vertical cavity surface emitting laser array after step S150 is completed in one embodiment of the present application, Figure 2b Will Figure 2a The first trench 211 and the isolation trench 213 in the illustrated structure are outlined with dotted lines.

[0028] Figure 3 1 is a schematic diagram of the structure of a vertical cavity surface emitting laser array after step S160 is completed in one embodiment of the present application.

[0029] Figure 4 It is a schematic diagram of the structure of a vertical cavity surface emitting laser array after step S170 is completed in one embodiment of the present application.

[0030] Figure 5 1 is a schematic diagram of the structure of a vertical cavity surface emitting laser array after step S180 is completed in one embodiment of the present application.

[0031] Figure 6 It is a flow chart of a method for manufacturing a vertical cavity surface emitting laser array in another embodiment of the present application.

[0032] Figure 7 FIG. 1 is a schematic diagram of an oxide layer of a VCSEL in an embodiment of the present application. DETAILED DESCRIPTION

[0033] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0035] It should be understood that when an element or layer is referred to as "on ...," "adjacent to ...," "connected to" or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...," "directly adjacent to ...," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as the second element, component, region, layer or part.

[0036] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0037] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0038] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the invention should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the invention.

[0039] Figure 1 1 is a flow chart of a method for manufacturing a vertical cavity surface emitting laser array in an embodiment of the present application, comprising the following steps:

[0040] S110, forming a first reflector, an active layer and a second reflector on a substrate.

[0041] In one embodiment of the present application, an epitaxial layer is provided, including a first reflector 220 , an active layer 230 , and a second reflector 240 sequentially formed on a substrate 210 (ie, a wafer).

[0042] In one embodiment of the present application, the material of the substrate 210 is a low-doped III-V compound, which refers to a compound including a III-group element and a V-group element, such as GaAs. The first reflector 220 and the second reflector 240 have opposite conductivity types, that is, one is N-type doped and the other is P-type doped. In one embodiment of the present application, the first reflector 220 is an N-type layer and the second reflector 240 is a P-type layer.

[0043] S120, forming a second electrode.

[0044] A plurality of second electrodes 246 electrically connected to the second reflector 240 are formed. Since the vertical cavity surface emitting laser array includes a plurality of channels, each channel includes a plurality of light emitting units (the VCSEL array includes a plurality of VCSELs), step S120 needs to form a plurality of second electrodes 246 of the VCSEL array. It is understandable that the step of forming the second electrode 246 can also be performed in a subsequent step of the entire VCSEL array manufacturing process. In one embodiment of the present application, after forming the second electrode 246, a passivation layer (third passivation layer, Figure 2a (not shown) to protect the second electrode 246 from being oxidized or causing electrochemical effects.

[0045] S130, performing mesa etching to form a first groove.

[0046] The front side of the epitaxial layer is photolithographically and etched to form a first groove 211, thereby dividing a plurality of mesas distributed in an array. The first groove 211 exposes a portion of the surface of the first reflector 220 and separates adjacent mesas. Each mesa is a portion of a VCSEL.

[0047] S140, forming a first electrode.

[0048] A plurality of first electrodes 226 are formed in the first groove 211 and are located on a portion of the surface of the first reflector 220 and are electrically connected to the first reflector 220. The first electrodes 226 of adjacent VCSELs are arranged opposite to each other, that is, a portion of the first electrodes (referred to as first electrodes 226a) is located near the first sidewall (i.e., Figure 2a The other part of the first electrode (referred to as the first electrode 226b) is located near the second side wall of the first groove 211 (i.e. Figure 2a The first side wall and the second side wall are opposite to each other. The first electrode 226 and the second electrode 246 have opposite polarities, that is, one is a cathode electrode and the other is an anode electrode.

[0049] S150, forming a first passivation layer covering the first electrode.

[0050] After forming the first electrode 226, the first passivation layer 252 is deposited as soon as possible to protect the first electrode 226. The first passivation layer 252 is thinner to reduce the first passivation layer 252's blocking of proton injection in the subsequent step S160. The structure of the VCSEL array after step S150 is completed can refer to Figure 2a .

[0051] S160, forming a proton injection region between adjacent first electrodes.

[0052] Protons are implanted, and protons pass downward through the first passivation layer 252 to form a proton implantation region 214 in the first reflector 220 between the first electrode 226a and the first electrode 226b. The structure of the VCSEL array after step S160 is completed can be referred to as Figure 3 . The proton injection region 214 formed by proton injection is a high resistance / insulating region, thereby strengthening the electrical isolation between the first electrode 226a and the first electrode 226b. Since the thickness of the first passivation layer 252 is designed to be thinner, the first passivation layer 252 has less obstruction to proton injection, thereby ensuring effective injection of protons. In one embodiment of the present application, the bottom of the proton injection region 214 extends into the substrate 210. In one embodiment of the present application, a portion of the proton injection region 214 is formed in the first passivation layer 252. In one embodiment of the present application, effective injection of protons can also be ensured by increasing the energy of the proton injection.

[0053] S170 , forming a second passivation layer covering the first passivation layer.

[0054] Since the first passivation layer 252 is relatively thin, a double-layer passivation layer structure is obtained by forming the second passivation layer 254, and the passivation layer is thickened to enhance the insulation capability. The structure of the VCSEL array after step S170 is completed can refer to Figure 4 .

[0055] S180, forming a metal wiring layer that electrically connects the plurality of second electrodes.

[0056] The metal wiring layer 260 extends along the first sidewall, the bottom and the second sidewall of the first trench 211, thereby connecting the second electrodes 246 on the adjacent mesas. The metal wiring layer 260 is insulated and isolated from the first electrodes 226 by the first passivation layer 252 and the second passivation layer 254. The structure of the VCSEL array after step S180 is completed can be referred to Figure 5 As mentioned above, the step of forming the second electrode 246 can also be performed after step S130, but must be performed before step S180.

[0057] In one embodiment of the present application, the metal wiring layer 260 is formed by electroplating. Before electroplating, it is necessary to open a hole in the passivation layer on the second electrode 246 so that the metal wiring layer 260 contacts the second electrode 246 through the hole.

[0058] In the manufacturing method of the vertical cavity surface emitting laser array, proton injection is performed between the steps of forming the first passivation layer 252 and the second passivation layer 254. The first passivation layer 252 is thinner to reduce its blocking force on proton injection, so as to achieve effective proton injection, thereby ensuring that the proton injection area 214 formed by effective proton injection is electrically isolated from the first electrode 226a and the first electrode 226b. In addition, a two-layer passivation layer structure (the first passivation layer 252 and the second passivation layer 254) is used between the metal wiring layer 260 and the first electrode 226. Compared with a single-layer passivation layer structure, under the premise of ensuring the thickness of the passivation layer between the metal wiring layer 260 and the first electrode 226, defects caused by excessive thickness of the passivation layer formed at one time can be avoided, thereby avoiding poor quality of the passivation layer, ensuring effective isolation between the metal wiring layer 260 and the first electrode 226, and reducing the risk of device failure and short circuit.

[0059] Figure 6 Flow chart of a method for manufacturing a vertical cavity surface emitting laser array in another embodiment of the present application. In this embodiment, after step S140 and before step S150, step S142 is further included: etching is performed between the first electrode 226a and the first electrode 226b to form an isolation groove 213.

[0060] In order to distinguish the positions of the first trench 211 and the isolation trench 213, Figure 2b In the figure, the first groove 211 is framed by a thick dotted line, and the isolation groove 213 is framed by a thin dotted line. The isolation groove 213 can prevent the current from flowing horizontally from the bottom of the first electrode 226a to the first electrode 226b, thereby strengthening the electrical isolation between the first electrode 226a and the first electrode 226b. In another embodiment of the present application, the step of etching to form the isolation groove 213 can also be performed after step S130 and before step S150. That is, the first electrode 226 can be formed first and then the isolation groove 213 can be etched, or the isolation groove 213 can be etched first and then the first electrode 226 can be formed.

[0061] In one embodiment of the present application, the first reflector 220 includes a first distributed Bragg reflector (DBR) 222 and a first conductive layer 224. Forming the first reflector 220 includes forming the first distributed Bragg reflector 222 and forming the first conductive layer 224 on the first distributed Bragg reflector 222. Accordingly, step S140 is to form a first electrode 226 on the first conductive layer 224. The first conductive layer 224 and the first distributed Bragg reflector 222 have the same conductivity type, for example, the first conductive layer 224 and the first distributed Bragg reflector 222 are both N-type layers. In one embodiment of the present application, the doping concentration of the first conductive layer 224 is greater than the doping concentration of the first distributed Bragg reflector 222, so that it can form an ohmic contact with the first electrode 226 (for example, forming N-Metal) to reduce resistance.

[0062] In one embodiment of the present application, step S142 is to etch the first conductive layer 224 and the first distributed Bragg reflector 222 between the first electrode 226 a and the first electrode 226 b , so that the bottom of the isolation trench 213 formed by etching enters the first distributed Bragg reflector 222 .

[0063] In one embodiment of the present application, the second reflector 240 includes a second distributed Bragg reflector 242 and a second conductive layer 244. Forming the second reflector 240 includes forming the second distributed Bragg reflector 242 and forming the second conductive layer 244 on the second distributed Bragg reflector 242. Accordingly, step S120 is to form a second electrode 246 on the second conductive layer 244. The second conductive layer 244 and the second distributed Bragg reflector 242 have the same conductivity type, for example, the second conductive layer 244 and the second distributed Bragg reflector 242 are both P-type layers. In one embodiment of the present application, the doping concentration of the second conductive layer 244 is greater than the doping concentration of the second distributed Bragg reflector 242, so that it can form an ohmic contact with the second electrode 246 (for example, forming a P-Metal) to reduce resistance. In one embodiment of the present application, the second conductive layer 244 is a P-type heavily doped GaAs or InP material.

[0064] In one embodiment of the present application, the mesa includes a second conductive layer 244, a second distributed Bragg reflector 242, an active layer 230, and a first conductive layer 224. The cross-section of the mesa may be circular, elliptical, polygonal, asymmetric, etc. In one embodiment of the present application, each light emitter unit includes a second conductive layer 244, a second distributed Bragg reflector 242, an active layer 230, a first conductive layer 224, a first distributed Bragg reflector 222, and a substrate 210.

[0065] In one embodiment of the present application, the method further includes step S132: partially oxidizing the second reflector to form an oxide layer.

[0066] exist Figure 6 In the illustrated embodiment, step S132 is performed after step S130 and before step S140 , in which the second distributed Bragg reflector 242 is partially oxidized to form an oxide layer 241 in a partial region of the second distributed Bragg reflector 242 close to the active layer 230 . Figure 7 The position of the oxide layer 241 in one embodiment is shown. The oxide layer 241 can reduce the junction capacitance of the VCSEL and improve the modulation bandwidth of the VCSEL. The area in the middle of the oxide layer 241 surrounded by the oxide layer 241 is a current limiting hole 243.

[0067] In one embodiment of the present application, the material of each passivation layer (including the first passivation layer 252 , the second passivation layer 254 , and the third passivation layer) may be silicon oxide, silicon nitride, or the like.

[0068] In one embodiment of the present application, after step S180, the method further includes:

[0069] S192, thinning the back side of the substrate.

[0070] The back side (wafer back side) of the substrate 210 is the side of the substrate 210 facing away from the first reflector 220 .

[0071] S194, depositing a back metal on the thinned substrate.

[0072] On the other hand, the present application accordingly proposes a vertical cavity surface emitting laser (VCSEL) array, which includes a plurality of vertical cavity surface emitting lasers, each of which includes a substrate 210, a first reflector 220, an active layer 230, a second reflector 240, a first electrode 226, a second electrode 246, a first passivation layer 252, a second passivation layer 254 and a metal wiring layer 260. The structure of the VCSEL array can be seen in Figure 5, the first reflector 220 is located on the substrate 210. The active layer 230 is located on the first reflector 220. The second reflector 240 is located on the active layer 230. The first electrode 226 is located on a portion of the surface of the first reflector 220 and is electrically connected to the first reflector 220. The second electrode 246 is located on the second reflector 240 and is electrically connected to the second reflector 240. The polarities of the first electrode 226 and the second electrode 246 are opposite, that is, the cathode electrode and the anode electrode respectively. The first passivation layer 252 covers the first electrode 226. The second passivation layer 254 covers the first passivation layer 252, and the thickness of the first passivation layer 252 is less than that of the second passivation layer 254. The metal wiring layer 260 is electrically connected to the second electrode 246 on the adjacent VCSEL, and the metal wiring layer 260 is insulated and isolated from the first electrode 226 by the first passivation layer 252 and the second passivation layer 254.

[0073] The VCSEL array is further provided with a first groove 211 located between adjacent vertical cavity surface emitting lasers VCSELs. The first groove 211 exposes a portion of the surface of the first reflector 220. A plurality of first electrodes 226a of the VCSEL array are located near the first side wall of the first groove 211, and a plurality of first electrodes 226b are located near the second side wall of the first groove 211, and the positions of the first side wall and the second side wall are opposite. The VCSEL array also includes a proton injection region 214 located in the first reflector 220, and the proton injection region 214 is located in the first reflector 220 between the first electrode 226a and the first electrode 226b (actually below the area between the first electrode 226a and the first electrode 226b).

[0074] In the above VCSEL array, the first passivation layer 252 is thinner to reduce its blocking force on the proton injection forming the proton injection area 214, so as to achieve effective proton injection, thereby ensuring the electrical isolation of the proton injection area 214 from the first electrode 226a and the first electrode 226b. In addition, a two-layer passivation layer structure (the first passivation layer 252 and the second passivation layer 254) is adopted between the metal wiring layer 260 and the first electrode 226. Compared with a single-layer passivation layer structure, under the premise of ensuring the thickness of the passivation layer between the metal wiring layer 260 and the first electrode 226, it is possible to avoid the passivation layer formed once being too thick to generate defects, resulting in poor quality of the passivation layer, thereby ensuring effective isolation between the metal wiring layer 260 and the first electrode 226, and reducing the risk of device failure and short circuit.

[0075] In one embodiment of the present application, since the proton injection region 214 is formed by proton implantation of the first reflector 220 and the substrate 210 after forming the first passivation layer 252 , part of the proton injection region 214 is located in the first passivation layer 252 , and there is no proton injection region 214 in the second passivation layer 254 .

[0076] In one embodiment of the present application, a concave isolation trench 213 is further formed at the bottom of the first trench 211 between the first electrode 226a and the first electrode 226b. The isolation trench 213 can prevent current from flowing horizontally from the bottom of the first electrode 226a to the first electrode 226b, thereby strengthening the electrical isolation between the first electrode 226a and the first electrode 226b.

[0077] In one embodiment of the present application, the first reflector 220 includes a first distributed Bragg reflector 222 and a first conductive layer 224. Accordingly, the first electrode 226 is located on the first conductive layer 224. The first conductive layer 224 and the first distributed Bragg reflector 222 have the same conductivity type, for example, the first conductive layer 224 and the first distributed Bragg reflector 222 are both N-type layers. In one embodiment of the present application, the doping concentration of the first conductive layer 224 is greater than the doping concentration of the first distributed Bragg reflector 222, so that an ohmic contact (for example, N-Metal) can be formed with the first electrode 226 to reduce resistance.

[0078] In one embodiment of the present application, the second reflector 240 includes a second distributed Bragg reflector 242 and a second conductive layer 244. Accordingly, the second electrode 246 is located on the second conductive layer 244. The second conductive layer 244 and the second distributed Bragg reflector 242 have the same conductivity type, for example, the second conductive layer 244 and the second distributed Bragg reflector 242 are both P-type layers. In one embodiment of the present application, the doping concentration of the second conductive layer 244 is greater than the doping concentration of the second distributed Bragg reflector 242, so that an ohmic contact (for example, a P-Metal) can be formed with the second electrode 246 to reduce resistance.

[0079] In one embodiment of the present application, each VCSEL includes a light emitter unit, and each light emitter unit includes a second conductive layer 244 , a second distributed Bragg reflector 242 , an active layer 230 , a first conductive layer 224 , a first distributed Bragg reflector 222 and a substrate 210 .

[0080] In one embodiment of the present application, the material of each passivation layer may be silicon oxide, silicon nitride, or the like.

[0081] The manufacturing method of the vertical cavity surface emitting laser array of the present application is based on the same inventive concept as the vertical cavity surface emitting laser array. For the contents not specifically described in the vertical cavity surface emitting laser array, please refer to the introduction to the manufacturing method of the vertical cavity surface emitting laser array in the previous text.

[0082] The present application accordingly proposes a vertical cavity surface emitting laser chip, which includes the vertical cavity surface emitting laser array described in any of the above embodiments. In one embodiment of the present application, the chip is a two-dimensional addressable vertical cavity surface emitting laser chip.

[0083] The present application accordingly proposes a laser radar (Light Detection and Ranging, LiDAR), including a transmitting end and a receiving end. The transmitting end includes the aforementioned two-dimensional addressable vertical cavity surface emitting laser chip as a light source, a driving circuit for driving the chip to work, and a deflection module for adjusting the field of view (FOV) of the laser radar, etc. The receiving end includes a photosensitive chip, etc.

[0084] It should be understood that, although the various steps in the flowchart of the present application are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the present application may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0085] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0086] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0087] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for manufacturing a vertical cavity surface emitting laser array, comprising: Providing an epitaxial layer; wherein the epitaxial layer comprises a first reflector, an active layer and a second reflector which are sequentially stacked on a substrate; Performing mesa etching on the epitaxial layer to form a first groove; wherein the first groove exposes a portion of the surface of the first reflector and separates adjacent mesas, and one mesa is a portion of a vertical cavity surface emitting laser; A plurality of first electrodes are formed in the first groove and are located on a portion of the surface of the first reflector and are electrically connected to the first reflector, wherein some of the first electrodes are located near a first side wall of the first groove, and some of the first electrodes are located near a second side wall of the first groove, and the first side wall and the second side wall are located opposite to each other; forming a first passivation layer covering the first electrode; Performing proton implantation, whereby protons pass downward through the first passivation layer to form a proton implantation region in a first reflector between a first electrode close to the first side wall and a first electrode close to the second side wall; forming a second passivation layer covering the first passivation layer, wherein the thickness of the first passivation layer is less than the thickness of the second passivation layer; Forming a metal wiring layer electrically connecting the plurality of second electrodes; the metal wiring layer and the plurality of first electrodes are insulated and isolated by the first passivation layer and the second passivation layer; Wherein, each of the second electrodes is formed before forming the metal wiring layer, each of the second electrodes is electrically connected to the second reflector, and each of the first electrodes has opposite polarity to each of the second electrodes.

2. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: After forming the plurality of first electrodes and before the step of forming the first passivation layer covering the first electrodes, the method further comprises etching between the first electrode close to the first sidewall and the first electrode close to the second sidewall to form an isolation groove; or After the mesa etching and before the step of forming the first passivation layer covering the first electrode, the step further includes etching between the first electrode close to the first side wall and the first electrode close to the second side wall to form an isolation groove.

3. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: The step of forming the first reflector comprises: forming a first distributed Bragg reflector; forming a first conductive layer on the first distributed Bragg reflector; the first conductive layer and the first distributed Bragg reflector have the same conductivity type; The step of forming the second reflector comprises: forming a second distributed Bragg reflector; forming a second conductive layer on the second distributed Bragg reflector; the second conductive layer and the second distributed Bragg reflector have the same conductivity type, and the first distributed Bragg reflector and the second distributed Bragg reflector have opposite conductivity types; The step of forming a plurality of first electrodes in the first groove, which are located on a partial surface of the first reflector and are electrically connected to the first reflector, includes forming the plurality of first electrodes on a partial surface of the first conductive layer; each of the second electrodes is formed on the second conductive layer.

4. The method for manufacturing a vertical cavity surface emitting laser array according to claim 3, characterized in that: The first distributed Bragg reflector and the first conductive layer are N-type layers, and the N-type doping concentration of the first conductive layer is greater than the N-type doping concentration of the first distributed Bragg reflector; The second distributed Bragg reflector and the second conductive layer are P-type layers, and the P-type doping concentration of the second conductive layer is greater than the P-type doping concentration of the second distributed Bragg reflector.

5. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: The metal wiring layer extends along the first side wall, the bottom of the first trench and the second side wall, so as to connect the second electrodes on the adjacent mesas; and / or Each of the second electrodes is formed before the step of performing mesa etching; the manufacturing method further comprises the step of forming a third passivation layer covering the second electrodes before performing mesa etching.

6. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: The method further comprises the step of partially oxidizing the second reflector to form an oxide layer on a partial area of ​​the second reflector close to the active layer; and / or The bottom of the proton implantation region formed by the proton implantation step extends into the substrate.

7. The method for manufacturing a vertical cavity surface emitting laser array according to claim 1, characterized in that: After forming the metal wiring layer, the method further includes: performing backside thinning on the substrate; The back metal is deposited on the thinned substrate.

8. A vertical cavity surface emitting laser array, comprising a plurality of vertical cavity surface emitting lasers, characterized in that: Each of the vertical cavity surface emitting lasers comprises: substrate; A first reflector, located on the substrate; an active layer, located on the first reflector; a second reflector, located on the active layer; A first electrode, located on a portion of the surface of the first reflector and electrically connected to the first reflector; a second electrode, located on the second reflector and electrically connected to the second reflector, wherein the polarities of the first electrode and the second electrode are opposite; a first passivation layer, covering the first electrode; a second passivation layer, covering the first passivation layer, wherein the thickness of the first passivation layer is smaller than that of the second passivation layer; A metal wiring layer electrically connected to the second electrode of the adjacent vertical cavity surface emitting laser, wherein the metal wiring layer is insulated and isolated from the first electrode by the first passivation layer and the second passivation layer; The vertical cavity surface emitting laser array is further provided with a first groove located between adjacent vertical cavity surface emitting lasers, the first groove exposes a portion of the surface of the first reflector, a plurality of first electrodes of the vertical cavity surface emitting laser array are located near a first side wall of the first groove, a plurality of first electrodes are located near a second side wall of the first groove, and the positions of the first side wall and the second side wall are opposite; the vertical cavity surface emitting laser array also includes a proton injection region located in the first reflector, the proton injection region is located between a first electrode near the first side wall and a first electrode near the second side wall, and is located in the first reflector.

9. A vertical cavity surface emitting laser chip, comprising the vertical cavity surface emitting laser array according to claim 8, characterized in that: The vertical cavity surface emitting laser chip is a two-dimensionally addressable vertical cavity surface emitting laser chip.

10. A laser radar, characterized in that: The invention comprises the vertical cavity surface emitting laser chip as claimed in claim 9 and a driving circuit for driving the chip to operate.

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