Improved self-powered power supply driving circuit and chip

Abstract

The invention discloses an improved self-powered power supply driving circuit and a chip. In a pre-turn-off stage of a turn-on period, a current sampling switch tube is turned off and a charging switch tube is turned on, so that current flowing through a driving tube is led out to an energy storage circuit for charging; the charging opportunity is selected in the pre-turn-off stage of the conduction period, the normal switching period of the driving tube and the normal output of energy cannot be influenced, the self-charging can be realized without the help of an external winding, and the defects of many processes, power consumption and cost of charging of an auxiliary winding are overcome; when the driving tube is realized by adopting a Darlington tube, the amplification factor is larger, the required driving current is smaller, better conversion efficiency can be achieved, enough time is provided for charging the energy storage circuit at the primary side conduction stage after pre-turn-off, and the same output power is realized at lower cost. Appropriate charging current is selected according to the voltage on the output feedback voltage pin, the maximum voltage value in the chip is reduced, and the chip is prevented from being damaged.

Description

Technical Field

[0001] The invention relates to the field of power supplies, and in particular to an improved self-powered power supply driving circuit and chip. Background Art

[0002] The AC-DC power driver chip is used to convert AC voltage into DC voltage. The internal circuit of the chip needs power supply to work normally. Due to the power consumption of the chip itself, if Vin is directly powered, the loss will be large and the efficiency will be low, so it is necessary to solve its own power supply problem. Figure 1 This is a block diagram of a traditional PSR topology AC-DC circuit. Its working process is as follows: when the input power supply Vin is powered on, the VCC capacitor is charged through the resistor Rstart. The VCC detection circuit detects the voltage VCC of the VCC capacitor in real time. When it is detected that the voltage VCC reaches the requirement, the output VCC_ON signal triggers the chip to start working. Since the system has strict requirements on standby power consumption, the resistance value of the resistor Rstart is set very large, and its charging current cannot meet the working current of the chip at all, so an auxiliary winding is required to power the power control chip. Figure 1 The turns ratio of each coil is: Np / Ns=n, Np / Na=m. When the switch is turned on, the voltage across the transformer becomes Vin. According to the characteristics of the transformer, at this time:

[0003]

[0004]

[0005] When the switch is turned off:

[0006] V s =V o +V D1

[0007]

[0008] V cc =V a -V d2

[0009] It can be seen from the formula that the relationship between VCC and Vo is proportional. When working normally, Vo remains constant and VCC is also constant. When designing, the auxiliary winding can be designed according to the required VCC voltage. The system charges the VCC capacitor through the auxiliary winding during the secondary discharge stage to ensure the normal operation of the chip. The current relationship is:

[0010] I L *N P =I S *N S +I a *N a

[0011] This method requires an additional auxiliary winding for power supply, and a diode D2 is required to block the path when the primary side is turned on to prevent the VCC capacitor from discharging in reverse; a sampling resistor Rcs is required to sample the inductor current I required by the system L , there are many peripheral components and the cost is high. When used in the field of PD3.0 chargers with PPS protocol, the output voltage Vo varies from 3.3V to 20V. When VCC is used to drive the switch tube M1, a minimum VCC working voltage of 10V is required. Therefore, the minimum value of m / n is 3. When the output voltage is 20V, the VCC voltage reaches 60V, which has high requirements on the process and the IC power consumption is also relatively large. Summary of the invention

[0012] The technical problem to be solved by the present invention is to provide a self-powered power drive circuit and chip that do not require an auxiliary winding, in view of the defects in process, power consumption and cost caused by the above-mentioned auxiliary winding-based power supply in the prior art.

[0013] The technical solution adopted by the present invention to solve its technical problem is:

[0014] The present invention provides an improved self-powered power drive circuit, which is used to connect a drive tube T to realize power drive and charge an energy storage circuit 1, and is characterized in that the power drive circuit includes:

[0015] A charging detection circuit 2, connected to the energy storage circuit 1, for detecting a power supply voltage VCC of the energy storage circuit 1, and generating a self-charging signal when the power supply voltage VCC is lower than a self-charging threshold Vth2;

[0016] Current sampling switch tube K1, the input of the driving tube T is used to connect to the input power supply, and the output of the driving tube T is grounded via the current sampling switch tube K1;

[0017] A charging switch tube K2, whose input is connected between the driving tube T and the current sampling switch tube K1, and whose output is connected to the energy storage circuit 1;

[0018] A sampling circuit 3, whose input is connected between the driving tube T and the current sampling switch tube K1, is used to obtain the current flowing from the driving tube T to the current sampling switch tube K1 and generate a sampling voltage Vsense;

[0019] The control circuit 4 is connected to the output of the sampling circuit 3 and obtains the sampling voltage Vsense, and is connected to the output of the charging detection circuit 2 and the control end of the charging switch tube K2, and is used to control the driving tube T based on the sampling voltage Vsense to make it periodically alternately enter the on-cycle and the off-cycle;

[0020] If the control circuit 4 does not receive the self-charging signal each time it enters a conduction cycle, it is in a first conduction control state after entering the conduction cycle, wherein the first conduction control state is to turn on the current sampling switch tube K1 and turn off the charging switch tube K2;

[0021] If the control circuit 4 receives the self-charging signal each time it enters a conduction cycle, it is in the first conduction control state in the early stage after entering the conduction cycle, and switches to the second conduction control state in the later pre-shutdown stage to use the current flowing through the driving tube T in the pre-shutdown stage to charge the energy storage circuit 1 to achieve self-power supply, wherein the pre-shutdown stage is the period from stopping driving the driving tube T to completely shutting down the driving tube T in the conduction cycle, and the second conduction control state is to shut down the current sampling switch tube K1 and turn on the charging switch tube K2;

[0022] The control circuit 4 controls the timing of switching to the second conduction control state in the later pre-shutdown stage, and selects a suitable charging current intensity to charge the energy storage circuit 1.

[0023] The present invention also provides an improved self-powered power drive chip, which has the improved self-powered power drive circuit of the present invention integrated therein.

[0024] The self-powered power drive circuit and chip of the present invention have the following beneficial effects:

[0025] (1) In the present invention, a driving tube and a current sampling switch tube are connected in series between the input power supply and the ground. In the pre-shutdown stage of the conduction cycle, the current sampling switch tube is turned off and the charging switch tube is turned on, so that the current flowing through the driving tube is led to the energy storage circuit for charging. The timing of charging is selected in the pre-shutdown stage of the conduction cycle, which will not affect the normal switching cycle of the driving tube itself and the normal output of energy. Moreover, this charging method using the pre-shutdown stage of the conduction cycle does not require the use of external winding power supply, and can achieve self-charging, thereby solving many defects in the process, power consumption and cost of auxiliary winding charging;

[0026] (2) Under the aforementioned charging method, when the driving tube is implemented by a Darlington tube, compared with a triode, its amplification factor is larger, the required driving current is smaller, and better conversion efficiency can be achieved; compared with a MOS tube, its relatively large Cbe capacitor can utilize its storage characteristics, and there is enough time to charge the energy storage circuit in the primary side conduction stage after pre-shutdown, which will not affect the normal switching cycle of the Darlington tube itself, and will not affect the normal output of energy. At the same time, its cost also has a significant advantage, and the same output power can be achieved at a lower cost.

[0027] (3) The present invention does not directly use an external resistor to sample the current flowing through the Darlington tube, but uses a current sampling switch tube to act as the original sampling resistor. The current sampling switch tube can be integrated into the chip, saving peripheral components. At the same time, when charging is required, it can be completely turned off, so that the current flowing through the Darlington tube can all be charged to the energy storage circuit through the charging switch tube.

[0028] (4) The start time and duration of charging the energy storage circuit are controlled according to the range of the output feedback voltage, thereby indirectly controlling the charging current, effectively reducing the risk of chip damage caused by excessive ESR resistance of the charging capacitor, and improving the stability of the entire system. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The drawings described herein are used to provide further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0030] Figure 1 This is the traditional PSR topology AC-DC circuit block diagram.

[0031] Figure 2 It is a structural schematic diagram of the self-powered power drive circuit of the present invention.

[0032] Figure 3 It is a schematic diagram of the structure of the power drive circuit in a preferred embodiment of the present invention.

[0033] Figure 4 It is a circuit block diagram of a PSR topology AC-DC power supply chip in a specific embodiment of the present invention.

[0034] Figure 5 yes Figure 4 Working waveform of the circuit shown.

[0035] Figure 6 yes Figure 4 The waveform diagram of each node of the Darlington tube in the circuit shown.

[0036] Figure 7 It is a graph showing how the ESR resistance of a capacitor changes with temperature.

[0037] Figure 8 It is a circuit block diagram of a PSR topology AC-DC voltage chip in another specific embodiment of the present invention.

[0038] Fig. 9 yes Figure 8 Working waveform of the circuit shown.

[0039] Fig.10 yes Figure 8The waveform diagram of each node of the Darlington tube in the circuit shown.

[0040] Fig.11 yes Figure 8 The shown circuit is the operating current waveform of VCC when it is fully loaded.

[0041] Fig.12 yes Figure 8 The shown circuit is the operating current waveform of VCC when it is unloaded. DETAILED DESCRIPTION

[0042] In order to solve the defects in process, power consumption and cost caused by auxiliary winding power supply in traditional power supply circuit, a self-powered power supply driving circuit and chip without auxiliary winding power supply are provided. In the present invention, a driving tube and a current sampling switch tube in series are connected between the input power supply and the ground. During normal operation, the control circuit can feedback control the driving tube based on the sampling voltage so that it is periodically in the on cycle and the off cycle. When the energy storage circuit is not powered enough, the charging detection circuit will output a self-charging signal. After each new self-charging signal from the charging detection circuit is received by the control circuit, the current sampling switch tube is turned off and the charging switch tube is turned on in the pre-off stage of the next on cycle, and the energy storage circuit is charged by the current flowing through the driving tube in the pre-off stage. In this way, self-power supply without auxiliary winding power supply is realized, and the original switching cycle and normal energy output are not affected.

[0043] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Typical embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, rather than limitations on the technical solutions of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0044] The self-powered power drive circuit of the present invention can be applied to power chips such as AC-DC and DC-DC. Figure 2 The circuit can control the periodic switch of the driving tube T to realize power driving, and can also be used to charge the energy storage circuit 1. The energy storage circuit 1 is used to provide the power supply voltage VCC. For example, the energy storage circuit 1 is a VCC capacitor external to the chip. The entire self-powered power driving circuit can be integrated in a self-powered power driving chip. The energy storage circuit 1 is not recommended to be integrated in the self-powered power driving chip, but is generally external to the self-powered power driving chip.

[0045] The power drive circuit of the present invention comprises: a charging detection circuit 2, a current sampling switch tube K1, a charging switch tube K2, a sampling circuit 3, and a control circuit 4.

[0046] The charging detection circuit 2 is connected to the energy storage circuit 1, and is used to detect the power supply voltage VCC, and generate a self-charging signal when the power supply voltage VCC is lower than the self-charging threshold Vth2. The implementation method of the charging detection circuit 2 is not limited, for example, it can be composed of a conventional voltage sampling circuit and a voltage comparison circuit, the voltage sampling circuit is not limited to the voltage dividing sampling circuit, and the reference value of the voltage comparison circuit is set to Vth2 and other values ​​that need to be compared.

[0047] The driver tube T and the current sampling switch tube K1 are connected in series between the input power supply and the ground. Specifically, the input of the driver tube T is used to access the input power supply, and the output of the driver tube T is grounded via the current sampling switch tube K1. The input power supply input to the driver tube T is mainly AC power, refer to Figure 4 For example, one end of the primary side of the transformer in the AC-DC power supply system can be directly connected to the external input power supply, and the other end of the primary side of the transformer can be connected to the input of the driver tube T. The current flowing into the driver tube T is the inductor current. The driver tube T is a periodic switch, and one of its working cycles consists of a conduction cycle and a shutdown cycle. The working cycle of the driver tube T and the peak current are determined according to the energy supply demand. For example, Figure 4 Taking the application as an example, the working cycle and peak current of the driving tube T are affected by the load on the secondary winding side.

[0048] A charging switch tube K2, whose input is connected between the driving tube T and the current sampling switch tube K1, and whose output is connected to the energy storage circuit 1;

[0049] The sampling circuit 3 has an input connected between the driving tube T and the current sampling switch tube K1 and is used to obtain the current flowing from the driving tube T to the current sampling switch tube K1 and generate a sampling voltage Vsense.

[0050] The control circuit 4 is connected to the output of the sampling circuit 3 and obtains the sampling voltage Vsense, and is connected to the output of the charging detection circuit 2 and the control end of the charging switch tube K2.

[0051] The control circuit 4 is used to control the driving tube T based on the sampling voltage Vsense so that the driving tube T periodically and alternately enters an on-period and an off-period;

[0052] Wherein, if the control circuit 4 does not receive the self-charging signal each time it enters a conduction cycle, it is in a first conduction control state after entering the conduction cycle, wherein the first conduction control state is to turn on the current sampling switch tube K1 and turn off the charging switch tube K2;

[0053] Wherein, if the control circuit 4 receives the self-charging signal each time it enters a conduction cycle, it is in the first conduction control state in the early stage after entering the conduction cycle, and switches to the second conduction control state in the later pre-shutdown stage to use the current flowing through the driving tube T in the pre-shutdown stage to charge the energy storage circuit 1 to achieve self-power supply, wherein the second conduction control state is to turn off the current sampling switch tube K1 and turn on the charging switch tube K2.

[0054] The control circuit (4) controls the timing of switching to the second conduction control state in the later pre-shutdown stage, and selects a suitable charging current intensity to charge the energy storage circuit (1). In the same conduction cycle, the current flowing through the driving tube T shows a linear upward trend, and its change slope is stable. The earlier the timing of switching to the second conduction control state, the smaller the charging current, and the later the timing of switching, the larger the charging current.

[0055] On the one hand, in the normal working state where charging is not required, the charging switch tube K2 is clock-off, and the control circuit 4 performs feedback control on the driving tube T based on the sampling voltage Vsense to make it periodically in the on-cycle and the off-cycle. Specifically: when the power supply voltage VCC is normal and charging is not required, the driving tube T ends the off-cycle and enters the on-cycle, which is generally triggered by the oscillator of the chip, and ends the on-cycle and enters the off-cycle by the control circuit 4 according to the sampling voltage Vsense. Feedback control is achieved.

[0056] On the other hand, in order to cancel the auxiliary winding power supply and realize self-power supply, the present invention does not affect the normal switching cycle of the driving tube T and the normal energy transfer of the current. When charging is needed, the energy storage circuit 1 is charged by using the pre-shutdown stage of one or more conduction cycles. Specifically, after each new self-charging signal is received, the control circuit 4 turns off the current sampling switch tube K1 and turns on the charging switch tube K2 in the pre-shutdown stage of the next conduction cycle (which may be the next conduction cycle or the next multiple conduction cycles), and uses the current flowing through the driving tube T in the pre-shutdown stage to charge the energy storage circuit 1. Of course, when self-powered, the driving tube T ends the shutdown cycle and enters the conduction cycle, which is consistent with the previous normal working state, and is also triggered by the oscillator of the chip.

[0057] The pre-shutdown stage is the period from stopping driving the driver tube T to completely shutting down the driver tube T in the conduction cycle. Specifically, the driver tube T needs a current input to its control terminal to drive it before it can be turned on. Figure 3 , the current input circuit 5 is connected to the control end of the driver tube T, and the current input circuit 5 is used to input current to drive the driver tube T to turn on. When we turn off the driver tube T, we first cancel the current input. For example, in each of the conduction cycles, when the sampling voltage Vsense reaches the first reference voltage Vref1, the current input circuit 5 is turned off to stop driving the driver tube T. However, even if the input current is canceled, the driver tube T is not really turned off at this time. The current flowing through the driver tube T will continue and increase until the driver tube T is completely turned off. The period from the time when the input current is canceled at the control end of the driver tube T (that is, from the time when the driving of the driver tube T is stopped) to the time when the driver tube T is completely turned off is the pre-turnoff stage, and we use the pre-turnoff stage to charge.

[0058] However, after we remove the input current of the control end of the driver tube T, we do not let it slowly reach complete shutdown by itself, because if we do so, the peak current when the driver tube T is completely shut down may not meet our energy supply, and the peak value cannot be controlled. Figure 3 Preferably, in order to make the current when the driving tube T is completely turned off controllable and meet the energy output requirements, we further designed a discharge circuit 6, which is connected to the control end of the driving tube T and is used to discharge the control end of the driving tube T. Specifically, after stopping driving the driving tube T, when the sampling voltage Vsense continues to rise and reaches the second reference voltage Vref2, we turn off the current sampling switch tube K1 and synchronously control the discharge circuit 6 to discharge, so that the driving tube T can be forced to be completely turned off. It can be seen that the pre-turnoff stage is the period from stopping driving the driving tube T to completely turning off the driving tube T in the conduction cycle, which is actually the period when the sampling voltage Vsense rises from the first reference voltage Vref1 to the second reference voltage Vref2.

[0059] Therefore, in general, the control circuit 4 is used to:

[0060] On the one hand, in the normal working state without receiving the self-charging signal, in each of the conduction cycles, when the sampling voltage Vsense reaches the first reference voltage Vref1, the current input circuit 5 is turned off to stop driving the driving tube T, and when the sampling voltage Vsense continues to rise to reach the second reference voltage Vref2, the current sampling switch tube K1 is turned off and the discharge circuit 6 is synchronously controlled to start discharging to achieve forced complete shutdown of the driving tube T;

[0061] On the other hand, each time a new self-charging signal is received, a charging operation is performed in each subsequent conduction cycle until the current self-charging signal is released.

[0062] The so-called charging operation specifically includes: the withdrawal of the input current to the control end of the driver tube T during the conduction cycle (i.e., stopping driving the driver tube T) is the same as the normal working state without charging, except that, when the charging operation is performed, the current sampling switch tube K1 will be turned off while stopping driving the driver tube T, and the charging switch tube K2 will be turned on synchronously while turning off the current sampling switch tube K1, so that the current flowing through the driver tube T can all reach the energy storage circuit 1 through the charging switch tube K2. Because in theory we still have to ensure the normal switching cycle of the driver tube T, and ensure that the peak value of the current flowing through the driver tube T in each conduction cycle meets the energy output requirements, so we do not necessarily complete the charging in one time, and in many cases, multiple conduction cycles are used for multiple charging. However, when the charging switch tube K2 is turned on for charging, the current sampling switch tube K1 is turned off synchronously, which means that the sampling voltage Vsense cannot be obtained through the sampling circuit 3. Therefore, the control circuit 4 can no longer determine whether the driving tube T needs to be completely turned off by monitoring whether the sampling voltage Vsense reaches the second reference voltage Vref2. Based on this, we will record the time for the sampling voltage Vsense to rise from the first charging reference voltage Vcharge1 to the second charging reference voltage Vcharge2 in advance before charging in each conduction cycle as the charging reference time of the current conduction cycle, and obtain the charging reference time based on the charging reference time. The execution duration is determined, and when the charging reference duration timing ends, the current input circuit 5 is synchronously turned off, the current sampling switch tube K1 is turned off, and the charging switch tube K2 is turned on to start timing the charging execution duration. When the timing time reaches the charging execution duration, the charging switch tube K2 is turned off and the discharge circuit 6 is synchronously controlled to start discharging to forcibly completely turn off the driving tube T, thereby ending the current on-cycle and entering the next off-cycle. If after the next off-cycle ends, when the next on-cycle arrives, the self-charging signal is still maintained, the next on-cycle will perform the above-mentioned charging operation again, and so on, until the self-charging signal is released.

[0063] Among them, the charging execution time and the charging reference time satisfy the following relationship:

[0064] (Vend-Vcharge2) / tcharge=(Vcharge2-Vcharge1) / t1;

[0065] Vcharge1 represents the first charging reference voltage, Vcharge2 represents the second charging reference voltage, Vend represents the value of Vsense at the end of the charging execution time, t1 represents the charging reference time, that is, the time from the first charging reference voltage Vcharge1 to the second charging reference voltage Vcharge2, and tcharge represents the charging execution time.

[0066] The above calculation formula is valid because the slope of the current flowing through the driver tube T in the same conduction period is stable.

[0067] In addition, it should be noted that the "next conduction cycle" mentioned above refers to N conduction cycles starting from the next conduction cycle, where N is an integer and N≥1. The specific value of N is uncertain. The charging operation of these N conduction cycles can release the self-charging signal. For example, if a self-charging signal is generated during the i-th working cycle (regardless of whether it is a conduction cycle or a shutdown cycle in the i-th working cycle), the self-charging signal will be detected when entering the i+1th conduction cycle, so charging will be performed in the pre-shutdown stage of the i+1th conduction cycle. If the self-charging signal is still maintained at the end of the i+1th conduction cycle, the self-charging signal is still maintained after a shutdown cycle and has not been released. Therefore, the self-charging signal will be detected again when entering the i+2th conduction cycle, and charging will be performed again in the pre-shutdown stage of the i+2th conduction cycle. If the self-charging signal is still maintained, after a shutdown cycle, charging will continue in the pre-shutdown stage of the i+3th conduction cycle, and so on, until the self-charging signal is released. After the self-charging signal is released, the driving tube T returns to normal working state.

[0068] The following summarizes the on and off moments of each switch in a complete working cycle (consisting of an on cycle and an off cycle):

[0069] 1) The oscillator triggers the logic circuit of the control circuit 4, which turns on the current input circuit 5 and the current sampling switch tube K1, and the discharge circuit 6 is turned off. At this time, a conduction cycle begins.

[0070] If there is no self-charging signal when entering the current conduction cycle, the current input circuit 5 is turned off when the sampling voltage Vsense reaches the first reference voltage Vref1, and when the sampling voltage Vsense continues to rise and reaches the second reference voltage Vref2, the current sampling switch tube K1 is turned off and the discharge circuit 6 is turned on synchronously to start discharging, and the driving tube T is turned off, and a conduction cycle ends at this time;

[0071] If there is a self-charging signal when entering the current conduction cycle, the first timing starts when the sampling voltage Vsense reaches the first charging reference voltage Vcharge1, and the first timing is stopped when the sampling voltage Vsense reaches the second charging reference voltage Vcharge2 to obtain the charging reference time t1, and the charging execution time tcharge is obtained based on the charging reference time t1, and the second timing is started at the same time. While stopping the first timing, the current input circuit 5, the current sampling switch tube K1 and the charging switch tube K2 are also turned off synchronously. When the second timing reaches tcharge, the charging switch tube K2 is turned off and the discharge circuit 6 is turned on synchronously for discharge, and then one conduction cycle ends.

[0072] 2) After the on-cycle ends, it enters the off-cycle and waits for the next oscillator trigger to arrive before entering the on-cycle.

[0073] Preferably, Figure 3 As shown, the driving circuit of the present invention further includes a power direct charging circuit 7 connected between the input of the driving tube T and the energy storage circuit 1. The power direct charging circuit 7 is used to directly take power from the input power supply to charge the energy storage circuit 1 until the power supply voltage VCC is greater than the chip startup threshold Vth1 when the chip is powered on.

[0074] The charging detection circuit 2 is also used to output a chip start signal vcc_on to trigger the chip to start normal operation when it is detected that the power direct charging circuit 7 charges the energy storage circuit 1 until the power supply voltage VCC is greater than the chip start threshold Vth1 when powered on, and the chip start threshold Vth1 is greater than the self-charging threshold Vth2.

[0075] The charging detection circuit 2 is also used to output a chip shutdown signal vcc_off to trigger chip reset and stop working when it detects that the energy storage circuit 1 is discharged to the chip reset threshold Vth3 after the driving tube T stops working, and the self-charging threshold Vth2 is greater than the chip reset threshold Vth3.

[0076] Let's take a scenario as an example: Assuming that the drive circuit of the present invention is used in a PD charger, when the PD charger is just plugged into the socket, that is, when it starts to power on, the power direct charging circuit 7 first charges the energy storage circuit. After charging to the chip startup threshold Vth1, the chip startup signal vcc_on is sent to trigger the circuit reset. We achieve self-charging based on the set self-charging threshold Vth2. When we unplug the PD charger from the socket, the drive tube T will stop working and will not self-charge. The energy storage circuit 1 will discharge. When it discharges to the chip reset threshold Vth3, it will output the chip shutdown signal vcc_off to trigger the chip reset and stop working. In addition, after being plugged into the socket, when the load is light, the current IL It is relatively small and has a long working cycle, so the stdby mode is designed.

[0077] refer to Figure 4 , below, taking the PSR topology AC-DC power chip integrating the power drive circuit of the present invention as an example, a specific circuit example is given. The AC-DC power chip includes a self-powered power drive chip and a drive tube T inside, and is externally connected to a storage circuit 1 and other structures. The pins of the AC-DC power chip include a power input pin HV, a chip voltage pin VCC, and a feedback pin FB. The input of the drive tube T is connected to the power input pin HV. The energy storage circuit 1 is connected to the chip voltage pin VCC. The feedback pin FB is connected to the voltage divider resistor of the auxiliary winding, so as to obtain the second reference voltage Vref2, so that the control circuit 4 can know the situation of Vout according to the second reference voltage Vref2, and thus decide how much energy to give.

[0078] Specifically, the driving tube T is a Darlington tube, including a front-stage transistor T1 and a rear-stage transistor T2, and the discharge circuit 6 includes a first discharge switch K3 and a second discharge switch K4, and the first discharge switch K3 and the second discharge switch K4 are specifically NMOS tubes NM3 and NM2 respectively. The first discharge switch NM3 is connected between the base of the front-stage transistor T1 and the ground, and the second discharge switch NM2 is connected between the base of the rear-stage transistor T2 and the ground. When the first discharge switch NM3 and the second discharge switch NM2 are turned on at the same time, the discharge circuit 6 discharges.

[0079] Specifically, the current input circuit 5 includes a current source Ibase and a current input switch K5. The current source Ibase generates current from the power supply voltage VCC. The current input switch K5 is specifically a PMOS tube PM1. The current input switch PM1 is connected between the base of the previous transistor T1 and the current source Ibase. When the current input switch PM1 is turned on, the current input circuit 5 inputs current to drive the driving tube T to turn on.

[0080] Specifically, the current sampling switch tube K1 is an NMOS tube NM1, and the charging switch tube K2 is a PMOS tube PM2.

[0081] Specifically, the control circuit includes: an error amplifier EA, a first PWM comparator CP1, a second PWM comparator CP2 and a logic circuit.

[0082] An error amplifier EA, one input of which is connected to the output feedback voltage pin FB, and the other input of which is connected to the output reference voltage Vref, for calculating and amplifying the error between the output feedback voltage and the output reference voltage, and the output of which is used to form the reference voltage in the input of the first PWM comparator CP1 and the second PWM comparator CP2;

[0083] A first PWM comparator CP1, one input end of which is connected to the first reference voltage Vref1, and the other input end of which is connected to the output of the sampling circuit 3, and is used to output a first trigger signal comp_out1 when the sampling voltage Vsense rises to the first reference voltage Vref1;

[0084] A second PWM comparator CP2, one input end of which is connected to the second reference voltage Vref2, and the other input end is connected to the output of the sampling circuit 3, and is used for outputting a second trigger signal comp_out2 when the sampling voltage Vsense rises to the second reference voltage Vref2;

[0085] A logic circuit, connected to the error amplifier EA, the first PWM comparator CP1, the second PWM comparator CP2, the charging detection circuit 2, the current sampling switch tube NM1, the current input circuit 5, and the discharge circuit 6 respectively;

[0086] The logic circuit is used for, if the self-charging signal is not received each time when entering a conduction cycle, first turning on the current sampling switch tube NM1 and turning off the charging switch tube PM2 after entering the conduction cycle, and turning off the current input circuit 5 when receiving the first trigger signal comp_out1, and turning off the current sampling switch tube NM1 and synchronously controlling the discharge circuit 6 to discharge when receiving the second trigger signal comp_out2;

[0087] The logic circuit is also used for, if the self-charging signal is received each time a conduction cycle is entered, then after entering the conduction cycle, the current sampling switch tube NM1 is first turned on and the charging switch tube PM2 is turned off, and the first timing is started. When the first trigger signal comp_out1 is received, the first timing is ended to obtain the charging reference time t1, and the second timing is started at the same time as the first timing is ended, and the current input circuit 5 is synchronously turned off, the current sampling switch tube NM1 is turned off and the charging switch tube PM2 is turned on. When the second timing reaches the charging execution time tcharge, the charging switch tube PM2 is turned off and the discharge circuit (6) is synchronously controlled to discharge.

[0088] Specifically, it is assumed that Vref1 = 0.8eaout, Vref2 = eaout, Vcharge1 = 0, Vcharge2 = 0.8eaout, wherein eaout is the output of the error amplifier EA, and the greater the load, the greater its value.

[0089] The following is combined with Figure 4-6 , explaining that the complete working principle of the present invention is:

[0090] 1) When the chip is powered on, the VCC capacitor is charged through the power direct charging circuit. When the charging detection circuit 2 detects that the VCC voltage reaches Vth1, the vcc_on signal is triggered, and the chip starts to work normally. The direct charging circuit keeps working, and the direct charging current is very small and cannot meet the demand. The chip starts to self-power the VCC capacitor through the operation of its own driving tube T;

[0091] 2) During normal operation, when Vsense = 0.8eaout, the output comp_out1 of PWM comparator CP1 becomes high, and PM1 is turned off. At this time, the charge stored in the Cbe capacitor of the driver tube T can still ensure its normal operation. When Vsense = eaout, the output comp_out2 of PWM comparator CP2 turns off NM1, and NM2 and NM3 are turned on, completely turning off the driver tube T, and the secondary side starts to discharge until the next time the driver tube T is turned on, completing a working cycle.

[0092] 3) When it is detected that the VCC voltage is less than Vth2, the VCC_charge signal is triggered to flip, that is, the self-charging signal is output. At this time, the logic circuit determines that the VCC capacitor needs to be charged. Therefore, at the beginning of the next conduction cycle of Darlington T, VCC is charged by the inductor current. The charging process within a conduction cycle is: when Vsense rises to equal 0.8eaout, when comp_out1 becomes high, NM1 is turned off, PM1 is turned off, and PM2 is turned on. Since the inductor current cannot change suddenly, the voltage of V1 becomes VCC+R PM2 *I L Due to the existence of its own capacitance Cbe, the Base voltages of T2 and T1 are raised to V1+Vbe2 and V1+Vbe2+Vbe1 respectively. The driver tube T is still in the normal on state, and the inductor current charges the VCC capacitor through PM2. When charging the VCC capacitor, since NM1 is turned off, the sampling circuit 3 cannot sample the inductor current I L , that is, Vsense becomes 0 at this time, and the required final value eaout cannot be reached at all. Therefore, a reference quantity is needed to judge the inductor current I LThe final value of the logic circuit 4 is obtained by timing the time t1 of Vsense rising from 0 to 0.8eaout, t1 being the charging reference time, and taking t1 as the charging execution time tcharge for charging the VCC capacitor in the current conduction cycle, that is, starting from the time when Vsense rises to 0.8eaout, and timing again. When the timing time reaches tcharge, PM2 is turned off, NM2 and NM3 are turned on, the driving tube T is completely turned off, and the secondary side starts to discharge until the next time the driving tube T is turned on, completing a working cycle, wherein

[0093] 4) When the Darlington stops switching, the VCC capacitor continues to discharge to Vth3, triggering the vcc_off signal to reset the entire chip.

[0094] Figure 6 The voltage waveform of each node of the Darlington tube during power supply. When the charging cycle uses Ipeak to charge the VCC capacitor, that is, when I L The VCC capacitor is charged during the period of 0.8Ipeak-Ipeak. Since the VCC capacitor has an equivalent series resistance (ESR), Figure 7 The graph shows the change of capacitor ESR with temperature. In low temperature environment, ESR increases as the temperature decreases. The resistance of a capacitor with a capacitance of 10uF reaches 10ohm at -30℃. When the value of Ipeak_max is set to 1A, when charging with 1A Ipeak, the maximum base voltage of T1 is equal to:

[0095] V1_max=V cc +I peak_max *R pm2 +I peak_max *ESR

[0096] V B2 _max=V cc +I peak_max *R pm2 +I peak_max *ESR+V BE

[0097] V B1 _max=V cc +I peak_max *R pm2 +I peak_max *ESR+2*V BE

[0098] Take VCC = 5V, R pm2 =0.4ohm, V BE=0.7V, the maximum value of VB1 during charging reaches 16.8V, the withstand voltage of the device is 12V, when the value of VB1 exceeds the withstand voltage of the device, the chip will be damaged.

[0099] Furthermore, in order to solve the problem of chip damage caused by excessive internal voltage of the chip when self-powered due to the equivalent series resistance (ESR) of the capacitor, a method is proposed. Figure 8 The circuit selects the charging current according to the value of the error amplifier eaout. The charging strategy of this circuit is: when the value of eaout is greater than the fourth reference voltage Vref4, a small charging current is used for charging, otherwise the corresponding Ipeak is used for charging; eaout is the output of the error amplifier EA, the greater the load, the greater its value, the greater the corresponding Ipeak, eaout_max is a fixed value, and eaout_max corresponds to Ipeak_max.

[0100] Specifically, a third PWM comparator CP3 and a fourth comparator CP4 are added:

[0101] A third PWM comparator CP3, one input end of which is connected to the third reference voltage Vref3, and the other input end is connected to the output of the sampling circuit 3, and is used for outputting a third trigger signal comp_out3 when the sampling voltage Vsense rises to the first reference voltage Vref3;

[0102] The fourth comparator CP4 has one input terminal connected to the fourth reference voltage Vref4 and the other input terminal connected to the output of the error amplifier EA, and is used for comparing the output of the error amplifier EA with the fourth reference voltage Vref4 and outputting a comparison result comp_out4.

[0103] If the logic circuit receives the self-charging signal each time it enters a conduction cycle, and if the comparison result comp_out4 output by the fourth comparator CP4 is at a low level, then after entering the conduction cycle, the current sampling switch tube K1 is first turned on and the charging switch tube K2 is turned off, and the first timing is started. When the third trigger signal comp_out3 is received, the first timing is ended to obtain the charging reference duration, and the second timing is started at the same time as the first timing is ended, and the current input circuit 5 is turned off, the current sampling switch tube K1 is turned off, and the charging switch tube K2 is turned on. When the second timing reaches the charging execution duration, the charging switch tube K2 is turned off and the discharge circuit 6 is synchronously controlled to discharge;

[0104] If the logic circuit receives the self-charging signal each time it enters a conduction cycle, and if the comparison result comp_out4 output by the fourth comparator CP4 is at a high level, then after entering the conduction cycle, the current sampling switch tube K1 is first turned on and the charging switch tube K2 is turned off, and the first timing is started. When the first trigger signal comp_out1 is received, the first timing is ended to obtain the charging reference duration, and the second timing is started at the same time as the first timing is ended, and the current input circuit 5 is turned off, the current sampling switch tube K1 is turned off, and the charging switch tube K2 is turned on. When the second timing reaches the charging execution duration, the charging switch tube K2 is turned off and the discharge circuit 6 is synchronously controlled to discharge.

[0105] Take Vref3=0.1eaout_max,Vref4=0.4eaout_max,the system working waveform is as follows Fig. 9 As shown, the circuit working process is:

[0106] When the system detects that eaout is greater than 0.4eaout_max, in the charging cycle, the time t0 when Vsense reaches 0.1eaout_max from 0 is recorded. When Vsense is greater than 0.1eaout_max, NM1 and PM1 are disconnected, PM2 is turned on, and the VCC capacitor is charged. The charging time is t1=0.5t0. After completion, PM2 is disconnected, NM1 and PM1 are turned on, and current flows through NM1, and Vsense is generated again. When Vsense rises to 0.8eaout, PM1 is disconnected, and the charge stored in Cbe can still allow the Darlington tube to continue to be turned on. Until Vsense reaches eaout, NM2 and NM3 are turned on, the Darlington tube is turned off, and the secondary side begins to discharge until the primary side is turned on in the next cycle to complete a working cycle.

[0107] When the system detects that eaout is within 0.4eaout_max, if a small inductor current is used for charging, Vsense needs to be re-established when charging is completed. At this time, the inductor current I L Very close to the Ipeak of this cycle, I L When the value exceeds Ipeak, the Darlington tube is not turned off, resulting in large system output ripple, which introduces new problems. Therefore, when eaout is within 0.4eaout_max, the system design uses Ipeak for charging. Its working process is similar to Figure 5 The working process is consistent.

[0108] Take the maximum value of Eaout_max as 1V, the inductance value L as 1.5mH, and Rstart as 8MΩ. The system is designed to work in BCM mode when fully loaded. eaout is greater than 0.4eaout_max, and charging is carried out in low current mode, that is, charging starts when Vsense = 0.1eaout_max. Ibase is 5mA, and the turns ratio is n = Np / Ns = 10. When the input voltage is 90Vac, the valley voltage is 90V, the output voltage is 12V, Ipeak is 1A, and the chip operating current Iq is 0.45mA. The operating waveform is as follows: Fig.11 As shown, the duty cycle is:

[0109]

[0110] The on time is:

[0111]

[0112]

[0113] The power consumption of each cycle at this time is:

[0114] Q discharge =I base *t on *0.8+I q *T=5mA*16.7uS*0.8+0.45mA*29.3uS=80nC

[0115] The charging time for each cycle is:

[0116]

[0117] Among them, 100mA corresponds to the charging current when Vsense=0.1eaout_max.

[0118] The charge per cycle is:

[0119] Q charge1 =I charge *t charge =125mA*0.835uS=104nC

[0120] Among them, 125mA is the average charging current. At the beginning of charging, the charging current is 100mA, and at the end of charging, the current is 150mA. The average current of 125mA is taken for calculation.

[0121] The amount of charge to VCC through Rstart is:

[0122]

[0123] Qcharge =Q charge1 +Q charge2 =104.3nC

[0124] Q charge >Q discharge

[0125] The charging amount in each cycle is greater than the discharging amount, which can ensure the normal operation of the system.

[0126] When working in no-load mode, the eaout_min value is 0.3V, the inductance value L is 1.5mH, and the system is designed to work in DCM mode at this time. eaout is within 0.4eaout_max, and it is charged according to the Ipeak mode. Ibase is 5mA, and the turns ratio is n=Np / Ns=10. When the input voltage is 90Vac, the voltage is 90*1.414=127V, the output voltage is 12V, Ipeak is 0.3A, and the operating frequency is 330Hz. In order to ensure charging, the stdby mode is designed: when the system detects that the next cycle has not started after the secondary discharge time is completed for 120uS, it enters the stdby mode at this time, and starts the next cycle after exiting the stdby mode for 20uS. The cycle is the longest when no-load, which is the condition with the highest power supply requirements. Its working current waveform is as follows Fig.12 As shown;

[0127] The minimum on-time when no load is:

[0128]

[0129] The secondary discharge time is:

[0130]

[0131] Each cycle discharge is:

[0132] Q discharge =I base *T on *0.8+(I q -I stdby )*(T on +T ons +t1+t2)+Istdby*T=130.2nC

[0133] Among them, I stdby =0.02mA.

[0134] The charging time for each cycle is:

[0135] Q charge1 =I charge *t charge=(0.24A+0.3A) / 2*3.54uS*0.2=191nC

[0136] Among them, 0.24A is the charging current when Vsense=0.8eaout_max, and the charging time is 20% of the on-time, so tcharge=Ton*0.2.

[0137] The amount of charge to VCC through Rstart is:

[0138]

[0139] Q charge =Q charge1 +Q charge2 =236nC

[0140] Q charge >Q discharge

[0141] The charging amount in each cycle is greater than the discharging amount, which can ensure the normal operation of the system.

[0142] The node voltage waveform using this charging method is as follows: Fig.10 As shown, in this case, the maximum charging current of the chip to the VCC capacitor is 0.4Ipeak_max. When Ipeak_max=1A, the maximum voltage of the base voltage VB1 of T1 is:

[0143] V B1 _max=V cc +0.4*I peak_max *R pm2 +0.4*I peak_max *ESR+2*V BE

[0144] The ESR resistance of the capacitor is 10ohm, the charging voltage of VCC is 5V, and the value of VB1 reaches a maximum of 10.5V during charging, which is lower than the withstand voltage of the device. Working in this way can effectively reduce the risk of chip damage caused by excessive ESR resistance of the capacitor while ensuring sufficient power supply, and improve the stability of the entire system.

[0145] In summary, the self-powered power drive circuit and chip of the present invention have the following beneficial effects:

[0146] 1) The current flowing through the driver tube is led out to the energy storage circuit for charging, that is, self-charging can be achieved without the help of external winding power supply, which solves many defects in the process, power consumption and cost of auxiliary winding charging. Moreover, the timing of charging is selected after receiving each new self-charging signal, in the pre-shutdown stage of the next conduction cycle, which will not affect the normal switching cycle of the driver tube itself, and will not affect the normal output of energy.

[0147] 2) Based on the above charging process, because the Darlington tube is used to replace the traditional triode or MOS tube, compared with the triode, its amplification factor is larger, the required driving current is smaller, and better conversion efficiency can be achieved; compared with the MOS tube, its relatively large Cbe capacitor allows enough time to charge the energy storage circuit in the primary conduction stage, and its cost also has a significant advantage, achieving the same output power at a lower cost;

[0148] 3) The present invention does not directly use an external resistor to sample the current flowing through the Darlington tube, but uses a current sampling switch tube to act as the original sampling resistor, which can be integrated into the chip, saving peripheral components. At the same time, when charging is required, it can be completely turned off, so that the current flowing through the Darlington tube can all be charged to the energy storage circuit through the charging switch tube.

[0149] 4) The start time and duration of charging the energy storage circuit are controlled according to the range of the output feedback voltage, thereby indirectly controlling the charging current, effectively reducing the risk of chip damage caused by excessive ESR resistance of the charging capacitor, and improving the stability of the entire system.

[0150] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0151] Terms containing ordinal numbers such as "first" and "second" used in this specification can be used to describe various constituent elements, but these constituent elements are not limited by these terms. The purpose of using these terms is only to distinguish one constituent element from other constituent elements. For example, without departing from the scope of the present invention, the first constituent element can be named as the second constituent element, and similarly, the second constituent element can also be named as the first constituent element. "Connected" or "connected" between two entities not only includes directly connecting the two entities, but also indirectly connecting them through other entities with beneficial improvement effects.

[0152] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms of deformation without departing from the scope of protection of the purpose of the present invention and the claims, which are all within the protection of the present invention.

Claims

1. An improved self-powered power drive circuit, used for connecting a drive tube (T) to realize power drive and charge an energy storage circuit (1), characterized in that: The power drive circuit comprises: A charging detection circuit (2) connected to the energy storage circuit (1) and used to detect a power supply voltage (VCC) of the energy storage circuit (1) and generate a self-charging signal when the power supply voltage (VCC) is lower than a self-charging threshold (Vth2); A current sampling switch tube (K1), wherein the input of the driving tube (T) is used to connect to an input power supply, and the output of the driving tube (T) is grounded via the current sampling switch tube (K1); A charging switch tube (K2), whose input is connected between the driving tube (T) and the current sampling switch tube (K1), and whose output is connected to the energy storage circuit (1); A sampling circuit (3), whose input is connected between the driving tube (T) and the current sampling switch tube (K1), and is used to obtain the current flowing from the driving tube (T) to the current sampling switch tube (K1) and generate a sampling voltage (Vsense); A control circuit (4) connected to the output of the sampling circuit (3) and acquiring the sampling voltage (Vsense), and connected to the output of the charging detection circuit (2) and the control end of the charging switch tube (K2), and used for controlling the driving tube (T) based on the sampling voltage (Vsense) so that the driving tube (T) periodically and alternately enters an on-cycle and an off-cycle; If the control circuit (4) does not receive the self-charging signal each time it enters a conduction cycle, it is in a first conduction control state after entering the conduction cycle, wherein the first conduction control state is to turn on the current sampling switch tube (K1) and turn off the charging switch tube (K2); If the control circuit (4) receives the self-charging signal each time it enters a conduction cycle, it is in a first conduction control state in the early stage after entering the conduction cycle, and switches to a second conduction control state in the later pre-shutdown stage to charge the energy storage circuit (1) with the current flowing through the drive tube (T) in the pre-shutdown stage, thereby realizing self-power supply, wherein the pre-shutdown stage is the period from stopping driving the drive tube (T) to completely shutting down the drive tube (T) in the conduction cycle, and the second conduction control state is to shut down the current sampling switch tube (K1) and turn on the charging switch tube (K2); The control circuit (4) controls the timing of switching to the second conduction control state in the later pre-shutdown stage, and selects a suitable charging current intensity to charge the energy storage circuit (1).

2. The improved self-powered power supply driving circuit according to claim 1, characterized in that: Also includes: A current input circuit (5) connected to the control end of the driving tube (T) and used for inputting current to drive the driving tube (T) to conduct; A discharge circuit (6) connected to the control end of the driving tube (T) and used for discharging the control end of the driving tube (T); The control circuit (4) is specifically used for being in a first conduction control state after entering a conduction cycle if the self-charging signal is not received each time a conduction cycle is entered, and when the sampling voltage (Vsense) reaches a first reference voltage (Vref1), turning off the current input circuit (5) to stop driving the driving tube (T), and when the sampling voltage (Vsense) continues to rise to reach a second reference voltage (Vref2), turning off the current sampling switch tube (K1) and synchronously controlling the discharge circuit (6) to discharge so as to forcibly and completely turn off the driving tube (T) to enter a shutdown cycle; The control circuit (4) is specifically used for, if the self-charging signal is received each time a conduction cycle is entered, then after entering the conduction cycle, it is first in the first conduction control state and records the time for the sampling voltage (Vsense) to rise from the first charging reference voltage (Vcharge1) to the second charging reference voltage (Vcharge2) as the charging reference time (t1) of the current conduction cycle, obtains the charging execution time (tcharge) based on the charging reference time, and turns off the current input circuit (5) to stop driving the drive tube (T) when the sampling voltage (Vsense) reaches the second charging reference voltage (Vcharge2), synchronously switches to the second conduction control state and starts timing while stopping driving the drive tube (T), and turns off the charging switch tube (K2) when the timing time reaches the charging execution time and synchronously controls the discharge circuit (6) to discharge so as to forcibly completely turn off the drive tube (T) to enter the off cycle.

3. The improved self-powered power drive circuit according to claim 2, characterized in that: in, The charging execution time and the charging reference time of the current conduction cycle satisfy the following relationship: (Vend-Vcharge2) / tcharge=(Vcharge2-Vcharge1) / t1; Vcharge1 represents the first charging reference voltage, Vcharge2 represents the second charging reference voltage, Vend represents the value of Vsense at the end of the charging execution time, t1 represents the charging reference time, that is, the time from the first charging reference voltage Vcharge1 to the second charging reference voltage Vcharge2, and tcharge represents the charging execution time.

4. The improved self-powered power drive circuit according to claim 1, characterized in that: It also includes a power direct charging circuit (7) connected between the input of the driving tube (T) and the energy storage circuit (1), and the power direct charging circuit (7) is used to: when the chip is powered on, directly take power from the input power supply to charge the energy storage circuit (1) until the power supply voltage (VCC) is greater than the chip startup threshold (Vth1); and when the operation of the driving tube (T) cannot meet the self-power supply requirement, directly take power from the input power supply to charge the energy storage circuit (1) and ensure that the power supply voltage (VCC) is greater than the chip startup threshold (Vth1).

5. The improved self-powered power drive circuit according to claim 2, characterized in that: The driving tube (T) is a Darlington tube, which comprises a front-stage triode (T1) and a rear-stage triode (T2); the discharge circuit (6) comprises a first discharge switch (K3) and a second discharge switch (K4); the first discharge switch (K3) is connected between the base of the front-stage triode (T1) and the ground; the second discharge switch (K4) is connected between the base of the rear-stage triode (T2) and the ground; when the first discharge switch (K3) and the second discharge switch (K4) are turned on at the same time, the discharge circuit (6) discharges.

6. The improved self-powered power drive circuit according to claim 5, characterized in that: The current input circuit (5) comprises a current source (Ibase) and a current input switch (K5); the current source (Ibase) generates current by taking power from the power supply voltage (VCC); the current input switch (K5) is connected between the base of the front-stage transistor (T1) and the current source (Ibase); when the current input switch (K5) is turned on, the current input circuit (5) inputs current to drive the driving tube (T) to turn on.

7. The improved self-powered power drive circuit according to claim 2, characterized in that: The control circuit comprises an error amplifier (EA), a first PWM comparator (CP1), a second PWM comparator (CP2), and a logic circuit, wherein: an error amplifier (EA), one input of which is connected to the output feedback voltage pin (FB) and the other input of which is connected to the output reference voltage (Vref), for calculating and amplifying the error between the output feedback voltage and the output reference voltage, and the output of which is used to form the reference voltage in the input of the first PWM comparator (CP1) and the second PWM comparator (CP2); a first PWM comparator (CP1), one input end of which is connected to the first reference voltage (Vref1) and the other input end of which is connected to the output of the sampling circuit (3), and is used to output a first trigger signal (comp_out1) when the sampling voltage (Vsense) rises to the first reference voltage (Vref1); a second PWM comparator (CP2), one input end of which is connected to the second reference voltage (Vref2) and the other input end of which is connected to the output of the sampling circuit (3), and is used to output a second trigger signal (comp_out2) when the sampling voltage (Vsense) rises to the second reference voltage (Vref2); A logic circuit is connected to the error amplifier (EA), the first PWM comparator (CP1), the second PWM comparator (CP2), the charging detection circuit (2), the current sampling switch tube (K1), the current input circuit (5), and the discharge circuit (6) respectively; The logic circuit is used for, if the self-charging signal is not received each time a conduction cycle is entered, first turning on the current sampling switch tube (K1) and turning off the charging switch tube (K2) after entering the conduction cycle, and turning off the current input circuit (5) when the first trigger signal (comp_out1) is received, and turning off the current sampling switch tube (K1) and synchronously controlling the discharge circuit (6) to discharge when the second trigger signal (comp_out2) is received; The logic circuit is also used for, if the self-charging signal is received each time a conduction cycle is entered, first turning on the current sampling switch tube (K1) and turning off the charging switch tube (K2) after entering the conduction cycle, and starting the first timing, ending the first timing to obtain the charging reference time when the first trigger signal (comp_out1) is received, starting the second timing at the same time as the first timing is ended and synchronously turning off the current input circuit (5), turning off the current sampling switch tube (K1) and turning on the charging switch tube (K2), and when the second timing reaches the charging execution time, turning off the charging switch tube (K2) and synchronously controlling the discharge circuit (6) to discharge.

8. The improved self-powered power drive circuit according to claim 7, characterized in that: The control circuit further comprises a third PWM comparator (CP3) and a fourth comparator (CP4), wherein: a third PWM comparator (CP3), one input end of which is connected to the third reference voltage (Vref3) and the other input end of which is connected to the output of the sampling circuit (3), and is used for outputting a third trigger signal (comp_out3) when the sampling voltage (Vsense) rises to the third reference voltage (Vref3); a fourth comparator (CP4), one input end of which is connected to the fourth reference voltage (Vref4) and the other input end of which is connected to the output of the error amplifier (EA), for comparing the output of the error amplifier (EA) with the fourth reference voltage (Vref4) and outputting a comparison result (comp_out4); If the logic circuit receives the self-charging signal each time it enters a conduction cycle, and if the comparison result (comp_out4) output by the fourth comparator (CP4) is a low level, then after entering the conduction cycle, the current sampling switch tube (K1) is first turned on and the charging switch tube (K2) is turned off, and the first timing is started. When the third trigger signal (comp_out3) is received, the first timing is ended to obtain the charging reference time length. When the first timing is ended, the second timing is started and the current input circuit (5) is turned off, the current sampling switch tube (K1) is turned off and the charging switch tube (K2) is turned on. When the second timing reaches the charging execution time length, the charging switch tube (K2) is turned off and the discharge circuit (6) is synchronously controlled to discharge. If the logic circuit receives the self-charging signal each time it enters a conduction cycle, and if the comparison result (comp_out4) output by the fourth comparator (CP4) is a high level, then after entering the conduction cycle, the current sampling switch tube (K1) is first turned on and the charging switch tube (K2) is turned off, and the first timing is started. When the first trigger signal (comp_out1) is received, the first timing is ended to obtain the charging reference time length. When the first timing is ended, the second timing is started and the current input circuit (5) is turned off, the current sampling switch tube (K1) is turned off and the charging switch tube (K2) is turned on. When the second timing reaches the charging execution time length, the charging switch tube (K2) is turned off and the discharge circuit (6) is synchronously controlled to discharge.

9. An improved self-powered power driver chip, characterized in that: An improved self-powered power drive circuit as described in any one of claims 1 to 8 is integrated inside.

Images