Fault-tolerant dual-active bridge converter based on half-bridge multiplexing and control method

Abstract

The invention discloses a fault-tolerant dual-active bridge converter based on half-bridge multiplexing and a control method, and belongs to the technical field of converters. The invention aims to solve the problem that an existing dual-active-bridge converter is poor in fault-tolerant capability for switch tube faults. Comprising the steps that a multiplexing half bridge is connected with a leading bridge through a direct-current inductor Lm, a capacitor C11 and a capacitor C12 are connected in series and then connected with the leading bridge in parallel, the two ends of the primary side of a center-tapped transformer are connected with a direct-current inductor L1 and a direct-current inductor L2 respectively and then connected with the leading bridge, and a center tap of the primary side of the center-tapped transformer is connected between the capacitor C11 and the capacitor C12; the secondary side of the center-tapped transformer is connected with the lag bridge, the capacitor C21 and the capacitor C22 are connected in series and then connected with the lag bridge in parallel, and a center tap of the secondary side of the center-tapped transformer is connected between the capacitor C21 and the capacitor C22. According to the invention, stable output can still be realized under the conditions of wide-range voltage input and part of device faults.

Description

Technical Field

[0001] The invention relates to a fault-tolerant dual-active bridge converter based on half-bridge multiplexing and a control method, belonging to the technical field of converters. Background Art

[0002] With the increasing popularity of new power systems, in high-latitude cold regions, continuous cold and warm cycles may accelerate the aging process of components and cause device failures. In addition, facing the geographical characteristics of severe imbalance in winter and summer sunshine, the periodic and sharp fluctuations in power production will also have a negative impact on the frequency regulation characteristics of the power grid and the stability of the system. The use of bidirectional DC-DC converters as key components connecting photovoltaic DC busbars and energy storage systems can maintain grid voltage stability and improve the power quality of DC grids.

[0003] The dual active bridge converter DAB is widely used in various fields due to its advantages such as current isolation, soft switching, and output voltage in a wide range. In order to improve the reliability of the system, many experts and scholars have conducted in-depth discussions on system failures and the fault tolerance of DAB. In practical applications, when the drain-source voltage of the MOSFET changes too quickly, its equivalent parallel NPN junction will be forced to turn on, which will cause the MOSFET to short-circuit. In addition, problems such as the loss of the MOSFET's driving voltage, the disconnection of the signal line, or poor contact of the connection port can also cause the MOSFET to open-circuit, thereby affecting the stability and reliability of the system.

[0004] At present, for medium and low voltage DC power distribution systems containing DAB converters, it is usually adopted to add fault current blocking modules and compensation capacitor branches in the system, and add current limiting inductors L in the switch tube branches. c and current limiting resistor R c, to slow down the capacitor discharge speed and reduce the current peak before the switch tube is locked after the fault occurs. During the fault period, the system relies on the remaining power of the capacitor to provide short-term power supply to the load, reduce the impact of the voltage drop on the low-voltage side, and minimize the impact of the short-circuit fault between the medium-voltage side and the load. Since the switch short-circuit fault usually causes the switch to be damaged, making the converter unable to operate normally, the existing research on the short-circuit fault of the DAB converter mostly focuses on the fault ride-through of the output short-circuit fault. Some studies have derived the transient expressions of the internal current, output voltage and output current for the transient process of the DAB converter under the output short-circuit fault. This study proposes a method of connecting an inductor in series at the output end to reduce the overcurrent phenomenon and thus achieve short-circuit fault ride-through. This method can ensure that the circuit resumes operation after the fault is cleared, and provides an appropriate range of values ​​for the series inductor at the output end. In order to solve the OCSF problem of open-circuit faults, some literatures propose to use redundancy technology to achieve fault tolerance. There is also a solution that adds an additional redundant switch to the converter to ensure that the system can quickly return to normal working state when an open-circuit fault occurs. The faulty switch can also be identified by the changes in the inductor current waveform and the primary-secondary full-bridge output voltage waveform. This method can detect the location of the faulty switch as soon as the fault occurs. The delay between detection and fault is short, and the OCSF can be detected quickly and the fault-tolerant mode can be enabled immediately. The faulty switch positioning method based on the near-field magnetic field information of the line determines the location of the faulty switch by performing Fourier transform on the waveform containing the magnetic field information and observing the characteristics of specific frequencies. However, the accuracy of this method is affected by the position of the annular magnetic field probe, and Fourier analysis requires one cycle, so the delay between detection and fault is at least one cycle, and the system cannot switch to fault-tolerant mode immediately after the fault occurs. Summary of the invention

[0005] In view of the problem that the existing dual active bridge converter has poor fault tolerance to switch tube faults, the present invention provides a fault-tolerant dual active bridge converter based on half-bridge multiplexing and a control method.

[0006] The present invention discloses a fault-tolerant dual active bridge converter based on half-bridge multiplexing, comprising a multiplexed half-bridge, a DC inductor L m , advanced bridge, capacitor C 11 , capacitor C 12 , a center-tapped transformer with a turns ratio of n:1, a DC inductor L1, a DC inductor L2, a hysteresis bridge, and a capacitor C 21 and capacitor C 22 ,

[0007] The reused half bridge passes through the DC inductor L m Connected to the leading bridge, capacitor C 11 and capacitor C 12After being connected in series, it is connected in parallel with the leading bridge. The two ends of the primary side of the middle-tapped transformer are connected to the DC inductor L1 and the DC inductor L2 respectively, and then connected to the leading bridge. The middle tap of the primary side of the middle-tapped transformer is connected to the capacitor C 11 and capacitor C 12 between;

[0008] The secondary side of the center-tapped transformer is connected to the lag bridge, and the capacitor C 21 and capacitor C 22 After being connected in series with the lagging bridge in parallel, the secondary middle tap of the middle tap transformer is connected to the capacitor C 21 and capacitor C 22 between.

[0009] According to the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, the multiplexed half-bridge includes a switch tube Q1 and a switch tube Q2, the drain of the switch tube Q1 is connected to the positive electrode of the power supply V1, the source of the switch tube Q1 is connected to the drain of the switch tube Q2, and the source of the switch tube Q2 is connected to the negative electrode of the power supply V1; a capacitor C1 is connected between the drain of the switch tube Q1 and the source of the switch tube Q2;

[0010] The leading bridge includes switch tube S1, switch tube S2, switch tube S3 and switch tube S4, the drain of switch tube S1 is connected to the drain of switch tube S3, the source of switch tube S1 is connected to the drain of switch tube S2, the source of switch tube S2 is connected to the source of switch tube S4, and the drain of switch tube S4 is connected to the source of switch tube S3; DC inductor L m Connected between the source of the switch tube Q1 and the source of the switch tube S1;

[0011] The drain of switch tube S1 is connected to capacitor C 11 One end of the capacitor C 11 The other end of the capacitor C 12 One end of the capacitor C 12 The other end of is connected to the source of the switch tube S2; the source of the switch tube S1 is connected to one end of the DC inductor L1, the other end of the DC inductor L1 is connected to one end of the primary side of the middle-tapped transformer, the other end of the primary side of the middle-tapped transformer is connected to one end of the DC inductor L2, the other end of the DC inductor L2 is connected to the drain of the switch tube S4, and the middle tap of the primary side of the middle-tapped transformer is connected to the capacitor C 11 the other end.

[0012] According to the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, the lagging bridge includes switch tube S5, switch tube S6, switch tube S7 and switch tube S8, the drain of switch tube S5 is connected to the drain of switch tube S7, the source of switch tube S5 is connected to the drain of switch tube S6, the source of switch tube S6 is connected to the source of switch tube S8, and the drain of switch tube S8 is connected to the source of switch tube S7; one end of the secondary side of the middle tap transformer is connected to the source of switch tube S5, and the other end of the secondary side of the middle tap transformer is connected to the drain of switch tube S8; the drain of switch tube S7 is connected to capacitor C 21 One end of the capacitor C 21 The other end of the capacitor C 22 One end of the capacitor C 22 The other end of the middle tap transformer is connected to the source of the switch tube S8; the middle tap of the secondary side of the middle tap transformer is connected to the capacitor C 21 The other end of the capacitor C 21 One end and capacitor C 22 Connect a load R between the other ends L .

[0013] The present invention also provides a control method for a fault-tolerant dual active bridge converter based on half-bridge multiplexing, wherein the fault-tolerant dual active bridge converter based on half-bridge multiplexing is controlled, and one control cycle includes five modes;

[0014] Mode 1: In the time period [t0, t1], before the gate drive signal of switch Q1 arrives, switch Q2 is turned off; when the gate drive signal of switch Q1 arrives, switch Q1 is turned on with zero voltage; wherein time t0 is the start time of turning on switch Q1, switch S1 and switch S4, and time t1 is the start time of turning on switch S5 and switch S8;

[0015] Mode 2: In the time period [t1, t2], the switch tubes S6 and S7 are turned off, and the voltage across the switch tubes S5 and S8 is clamped to zero; when the gate drive signals of the switch tubes S1 and S8 arrive at time t1, the switch tubes S5 and S8 are turned on with zero voltage; time t2 is the start time of the switch tube Q1 turning off;

[0016] Mode three: In the time period [t2, t3], the switch tube Q1 is turned off, and the voltage across the switch tube Q2 is clamped to zero; when the gate drive signal of the switch tube Q2 arrives at time t2, the switch tube Q2 is turned on with zero voltage; time t3 is the starting time when the switch tubes S1 and S4 are turned off;

[0017] Mode 4: In the time period [t3, t4], the switch tubes S1 and S4 are turned off, and the voltage across the switch tubes S2 and S3 is clamped to zero; when the gate drive signals of the switch tubes S2 and S3 arrive at time t4, the switch tubes S2 and S3 are turned on with zero voltage; time t4 is the starting time for the switch tubes S5 and S8 to be turned off;

[0018] Mode five, in the time period [t4, t5], the switch tubes S5 and S8 are turned off, and the voltage across the switch tubes S6 and S7 are clamped to zero; at time t5, when the gate drive signals of the switch tubes S6 and S7 arrive, the switch tubes S6 and S7 are turned on with zero voltage; time t5 is the starting time for the switch tubes Q1, S1 and S4 to be turned on again.

[0019] According to the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, in mode 1, the DC inductor L m The current i Lm (t) is:

[0020]

[0021] Where t represents time,

[0022] C 11 =C 12 , let C k =C 11 =C 12 , V Ck Represents C k The voltage across the terminals;

[0023]

[0024] Where v priL Represents the voltage of the primary side AC square wave, v priH Represents the voltage on the primary side AC square wave, v pri represents the primary side AC square wave, v secL Indicates the secondary side AC square wave voltage, v secH Represents the voltage on the secondary side AC square wave, v sec Represents secondary side AC square wave;

[0025]

[0026] Where v L1 is the voltage across the DC inductor L1, v L2 is the voltage across the DC inductor L2;

[0027]

[0028] Where iLp1 is the inductor current on the primary side of the center-tapped transformer, V2 is the load R L Voltage across the two ends; i Lp2 is the inductor current on the primary side of the center-tapped transformer;

[0029] L k =L1=L2.

[0030] According to the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, in mode 2,

[0031]

[0032] According to the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, in mode three,

[0033]

[0034]

[0035] According to the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, in mode four,

[0036] i Lm (t) = i Lm (t3),

[0037]

[0038] According to the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, in mode five,

[0039] i Lm (t) = i Lm (t3),

[0040]

[0041] According to the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention, in mode five,

[0042]

[0043] i L1 =i Lp1 -i Lp2 =0;

[0044] Where k is the converter input-output voltage ratio, f s is the switching frequency, D is the duty cycle of switch tube Q1 and switch tube Q2, d D is the shift ratio between the switch tube S1 and the switch tube S5, i L1is the center-tapped branch current of the center-tapped transformer.

[0045] Beneficial effects of the invention: The invention proposes a converter and a control method for the voltage instability caused by device failure and severe unbalanced sunshine in photovoltaic power generation in high-latitude cold areas. The converter can achieve stable output under the condition of wide-range voltage input and partial device failure, maintain grid voltage stability and improve DC grid power quality.

[0046] Based on the traditional dual-active DC-DC converter, the present invention introduces a multiplexed half-bridge to propose an improved circuit with fault tolerance for switch tube failures. The introduction of the multiplexed half-bridge can be applied to a wider input to cater to the unstable voltage of photovoltaic power generation. After the fault response and system reconstruction occur, two auxiliary inductors and a transformer with a central tap can be used to achieve the equivalent half-bridge circuit to flexibly reconfigure to adapt to the fault scenario. Compared with traditional fault-tolerant measures and existing reconfigurable DAB converters, the topology of the present invention can still maintain efficient and stable power transmission capabilities in the face of various open-circuit faults, showing excellent performance advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 Schematic diagram of the topological structure of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to the present invention; D1 to D8 in the figure are the body diodes corresponding to the switch tubes S1 to S8;

[0048] Figure 2 1 is a driving waveform diagram of the switch tube in one working cycle in the control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing of the present invention; T S is the switching cycle;

[0049] Figure 3 It corresponds to Figure 2 The waveform diagram of each moment of transformation; in the figure, v Lm is the DC inductance L m Voltage across the terminals, i Ls1 is the inductor current on the secondary side of the center-tapped transformer;

[0050] Figure 4 It is the circuit structure diagram of mode one;

[0051] Figure 5 This is the circuit structure diagram of mode 2;

[0052] Figure 6 This is the circuit structure diagram of mode three;

[0053] Figure 7 This is the circuit structure diagram of mode four;

[0054] Figure 8This is the circuit structure diagram of mode five;

[0055] Fig. 9 It is the circuit structure diagram under fault condition 2;

[0056] Fig.10 It is the driving waveform and transformation waveform diagram under fault condition 2;

[0057] Fig.11 This is the circuit structure diagram under fault condition 3;

[0058] Fig.12 It is the driving waveform and transformation waveform diagram under fault condition 3;

[0059] Fig.13 This is a waveform diagram of the normal working condition in the verification experiment; Lp1 is the inductor current on the primary side of the center-tapped transformer, V S1 is the voltage across the switch tube S1, V gs1 is the gate drive voltage of switch tube S1, V S2 is the voltage across the switch tube S2, V gs2 is the gate drive voltage of switch tube S2, V S5 is the voltage across the switch tube S5, V gs5 is the gate drive voltage of switch tube S5, V S6 is the voltage across the switch tube S6, V gs6 is the gate drive voltage of switch tube S6;

[0060] Fig.14 This is the waveform diagram under fault tolerance condition 2 in the verification experiment; Lp2 is the inductor current on the primary side of the center-tapped transformer; V S3 is the voltage across the switch tube S3, V gs3 is the gate drive voltage of switch tube S3, V S4 is the voltage across the switch tube S4, V gs4 is the gate drive voltage of switch tube S4;

[0061] Fig.15 This is the waveform diagram of fault tolerance condition 3 in the verification experiment; V S8 is the voltage across the switch tube S8, V gs8 It is the gate driving voltage of switch tube S8. DETAILED DESCRIPTION

[0062] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0063] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0064] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0065] Specific implementation method 1. Combination Figure 1 As shown, the present invention provides a fault-tolerant dual active bridge converter based on half-bridge multiplexing, including a multiplexed half-bridge, a DC inductor L m , advanced bridge, capacitor C 11 , capacitor C 12 , a center-tapped transformer with a turns ratio of n:1, a DC inductor L1, a DC inductor L2, a hysteresis bridge, and a capacitor C 21 and capacitor C 22 ,

[0066] The reused half bridge passes through the DC inductor L m Connected to the leading bridge, capacitor C 11 and capacitor C 12 After being connected in series, it is connected in parallel with the leading bridge. The two ends of the primary side of the middle-tapped transformer are connected to the DC inductor L1 and the DC inductor L2 respectively, and then connected to the leading bridge. The middle tap of the primary side of the middle-tapped transformer is connected to the capacitor C 11 and capacitor C 12 between;

[0067] The secondary side of the center-tapped transformer is connected to the lag bridge, and the capacitor C 21 and capacitor C 22 After being connected in series with the lagging bridge in parallel, the secondary middle tap of the middle tap transformer is connected to the capacitor C 21 and capacitor C 22 between.

[0068] In this embodiment, the leading bridge and the lagging bridge are connected by a transformer with a turns ratio of n:1. The half-bridge capacitor is divided into two equal parts, namely C 11 / C 12 and C 21 / C 22 In addition, the traditional auxiliary inductor is replaced by two symmetrical inductors L1 and L2. A multiplexed half-bridge consisting of switch tubes Q1 and Q2 is added before the leading bridge, and a DC inductor Lm Connected to the leading bridge. The input and output voltages are defined as V1 and V2 respectively, and their resistance characteristics are related to the specific load and are expressed as equivalent resistance R eq In addition, the center-tapped transformer replaces the traditional direct-connect capacitor C 11 / C 12 or C 21 / C 22 transformer.

[0069] Further, the multiplexed half bridge includes a switch tube Q1 and a switch tube Q2, the drain of the switch tube Q1 is connected to the positive electrode of the power supply V1, the source of the switch tube Q1 is connected to the drain of the switch tube Q2, and the source of the switch tube Q2 is connected to the negative electrode of the power supply V1; a capacitor C1 is connected between the drain of the switch tube Q1 and the source of the switch tube Q2;

[0070] The leading bridge includes switch tube S1, switch tube S2, switch tube S3 and switch tube S4, the drain of switch tube S1 is connected to the drain of switch tube S3, the source of switch tube S1 is connected to the drain of switch tube S2, the source of switch tube S2 is connected to the source of switch tube S4, and the drain of switch tube S4 is connected to the source of switch tube S3; DC inductor L m Connected between the source of the switch tube Q1 and the source of the switch tube S1;

[0071] The drain of switch tube S1 is connected to capacitor C 11 One end of the capacitor C 11 The other end of the capacitor C 12 One end of the capacitor C 12 The other end of is connected to the source of the switch tube S2; the source of the switch tube S1 is connected to one end of the DC inductor L1, the other end of the DC inductor L1 is connected to one end of the primary side of the middle-tapped transformer, the other end of the primary side of the middle-tapped transformer is connected to one end of the DC inductor L2, the other end of the DC inductor L2 is connected to the drain of the switch tube S4, and the middle tap of the primary side of the middle-tapped transformer is connected to the capacitor C 11 the other end.

[0072] The hysteresis bridge includes a switch tube S5, a switch tube S6, a switch tube S7 and a switch tube S8. The drain of the switch tube S5 is connected to the drain of the switch tube S7, the source of the switch tube S5 is connected to the drain of the switch tube S6, the source of the switch tube S6 is connected to the source of the switch tube S8, and the drain of the switch tube S8 is connected to the source of the switch tube S7; one end of the secondary side of the middle tap transformer is connected to the source of the switch tube S5, and the other end of the secondary side of the middle tap transformer is connected to the drain of the switch tube S8; the drain of the switch tube S7 is connected to the capacitor C 21 One end of the capacitor C 21 The other end of the capacitor C 22 One end of the capacitor C 22The other end of the middle tap transformer is connected to the source of the switch tube S8; the middle tap of the secondary side of the middle tap transformer is connected to the capacitor C 21 The other end of the capacitor C 21 One end and capacitor C 22 Connect a load R between the other ends L .

[0073] Specific implementation method 2: Combination Figures 1 to 8 As shown, the present invention also provides a control method for a fault-tolerant dual active bridge converter based on half-bridge multiplexing, which controls the fault-tolerant dual active bridge converter based on half-bridge multiplexing described in the first specific implementation mode, and one control cycle includes five modes;

[0074] Mode 1: In the time period [t0, t1], before the gate drive signal of switch Q1 arrives, switch Q2 is turned off; due to the freewheeling effect of the inductor current, the reverse current discharges the parasitic capacitance of the body diode of switch Q1, so that the voltage across switch Q2 is clamped to zero; when the gate drive signal of switch Q1 arrives, switch Q1 is turned on with zero voltage; wherein time t0 is the starting time of turning on switch Q1, switch S1 and switch S4, at which time the complementary switch Q2, switch S2 and switch S3 are turned off; time t1 is the starting time of turning on switch S5 and switch S8, at which time the complementary switch S6 and switch S7 are turned off; the switch states of the complementary switch tubes are opposite;

[0075] Mode 2: In the time period [t1, t2], the switch tubes S6 and S7 are turned off. Due to the freewheeling effect of the inductor current, the reverse current discharges the parasitic capacitance of the body diodes of the switch tubes S5 and S8, and the voltage across the switch tubes S5 and S8 is clamped to zero. When the gate drive signals of the switch tubes S1 and S8 arrive at time t1, the switch tubes S5 and S8 are turned on with zero voltage. Time t2 is the starting time for the switch tube Q1 to be turned off.

[0076] Mode three: In the time period [t2, t3], the switch tube Q1 is turned off, and the reverse current discharges the parasitic capacitance of the body diode of the switch tube Q2, and the voltage across the switch tube Q2 is clamped to zero; when the gate drive signal of the switch tube Q2 arrives at time t2, the switch tube Q2 is turned on with zero voltage; time t3 is the starting time when the switch tubes S1 and S4 are turned off;

[0077] Mode 4: In the time period [t3, t4], the switch tubes S1 and S4 are turned off, the inductor current discharges the parasitic capacitance of the body diodes of the switch tubes S2 and S3, and the voltage across the switch tubes S2 and S3 is clamped to zero; when the gate drive signals of the switch tubes S2 and S3 arrive at time t4, the switch tubes S2 and S3 are turned on with zero voltage; time t4 is the starting time for the switch tubes S5 and S8 to be turned off;

[0078] Mode five, in the time period [t4, t5], the switch tubes S5 and S8 are turned off, the compensation inductor current discharges the parasitic capacitance of the body diodes of the switch tubes S6 and S7, and the voltage across the switch tubes S6 and S7 is clamped to zero; at time t5, when the gate drive signals of the switch tubes S6 and S7 arrive, the switch tubes S6 and S7 are turned on with zero voltage; time t5 is the starting time for the switch tubes Q1, S1 and S4 to be turned on again.

[0079] Further, Figure 1 The outputs of the upper and lower conduction paths of the primary side full bridge of the converter shown in the figure are respectively in the form of AC square waves with v priH and v priL This design achieves more efficient power transmission and stability under open circuit fault conditions through a symmetrical structure. At the same time, the AC output square wave of the primary full bridge is marked as v pri , the secondary output square wave is recorded as v secH 、v secL and v sec The converter adopts phase shift control strategy. Under normal working conditions, the waveform is as follows: Figure 2 and Figure 3 As shown, there are five working modes, and the working process of each mode is analyzed as follows:

[0080] In mode 1, the DC inductance L m The current i Lm (t) is:

[0081]

[0082] Where t represents time,

[0083] C 11 =C 12 , let C k =C 11 =C 12 , V Ck Represents C k The voltage across the terminals;

[0084] Since S1 / S4, S2 / S3, S5 / S8, S6 / S7 are always on / off at the same time, the relationship between the upper and lower voltages of the primary AC output can be expressed as:

[0085]

[0086] Where v priL Represents the voltage of the primary side AC square wave, v priH Represents the voltage on the primary side AC square wave, v pri represents the primary side AC square wave, v secL Indicates the voltage of the secondary side AC square wave, v secH Represents the voltage on the secondary side AC square wave, v sec Represents secondary side AC square wave;

[0087] The voltage between inductors L1 and L2 can be calculated as:

[0088]

[0089] Where v L1 is the voltage across the DC inductor L1, v L2 is the voltage across the DC inductor L2;

[0090]

[0091] Where i Lp1 is the inductor current on the primary side of the center-tapped transformer, V2 is the load R L Voltage across the two ends; i Lp2 is the inductor current of the primary side of the center-tapped transformer; i Lp1 (t0) and i Lp2 (t0) is the initial inductor current at time t0, L k is the inductance of L1 and L2,

[0092] L k =L1=L2.

[0093] In mode 2,

[0094]

[0095] In mode three,

[0096]

[0097] In mode four,

[0098] i Lm (t) = i Lm (t3),

[0099]

[0100] In mode five,

[0101] i Lm (t) = i Lm (t3),

[0102]

[0103] In summary, the inductor current i at t0 and t2 can be calculated. Lp1 and i Lp2 The expression is:

[0104]

[0105] i L1 =i Lp1 -i Lp2 =0;

[0106] Where k is the converter input-output voltage ratio, f s is the switching frequency, D is the duty cycle of switch tube Q1 and switch tube Q2, d D is the shift ratio between the switch tube S1 and the switch tube S5, i L1 is the center-tapped branch current of the center-tapped transformer.

[0107] This indicates that the upper inductor current i Lp1 and the lower inductor current i Lp2 Always equal.

[0108] In this embodiment, when a switch failure occurs in the converter, if the failure occurs in the primary side S3 / S4 switch, this situation is called fault situation 2, and its structure diagram is as follows: Fig. 9 As shown, the circuit waveform is as follows Fig.10 shown.

[0109] The gate signals of S3 and S4 are disabled to block the faulty device. After that, the conduction path of the inductor current naturally switches to S1, S2 and the midpoint path, and the fault switch S3 has completely crossed. Due to the change of the conduction path, the auxiliary inductor L2 and half of the transformer winding are invalid. At the same time, the secondary side operating conditions remain unchanged.

[0110] According to Kirchhoff's voltage law, the voltage of the conduction path of the circuit in fault-tolerant working mode 2 is listed as follows:

[0111] v L1 +nv secL -v priH =0;

[0112] The relationship between the primary AC output upper and lower voltages can be expressed as:

[0113]

[0114] It can be concluded that the voltage of the auxiliary inductor L1 can be calculated as:

[0115]

[0116] The AC voltage v is passed at different time intervals pri and the secondary AC voltage v sec The amplitude of the inductor current i can be obtained. Lp2 :

[0117]

[0118] At the same time, due to the inductor current i L2 With symmetry, the inductor current i at t0 and t2 can be obtained by rearranging the calculation. Lp1 and i Lp2 The expression is:

[0119]

[0120] It can be seen that the primary side AC voltage v priL The amplitude of mode 1 is only half of that of mode 1. Since the secondary side keeps four switches turned on, v sec The amplitude of is still the same as V2. And, the inductor voltage v in mode 2 is L1 and the primary inductor current i Lp1 Same as the normal working condition of mode 1, but the midpoint branch i L1 Increment from 0 to the same i Lp1 . This shows that the primary inductor current is constant in the working state of fault-tolerant mode 2. L1 Different, because the number of turns of the transformer is relatively small, the secondary inductor current i in mode 2 Ls1 Significantly lower than mode 1.

[0121] When an open circuit fault occurs on a secondary switch such as S5, the situation where the secondary switch has a fault is defined as fault situation 3. Fault situation 3 can isolate and maintain power transmission capabilities. Fault situation 3 is an OCF fault on the secondary switch, and its circuit structure is shown in the figure below. Fig.11 As shown, the waveform is as follows Fig.12 shown.

[0122] Case 3 is similar to Case 2, disabling the gate signals of S5 and S6 to isolate the faulty component S5. Then, the midpoint redundancy circuit works naturally, and the working state of the secondary side is transferred from full bridge to half bridge. At the same time, the primary side of the DAB converter is still operating normally. L1 and i L2 It is symmetrical and the inductor current i at t0 and t2 can be calculated.Lp1 and i Lp2 The expression is:

[0123]

[0124] According to the previous analysis of the inductor current, the RMS value of the primary and secondary inductor currents under normal working conditions can be expressed as:

[0125]

[0126]

[0127] Among them I RMS1 and I RMS2 is the RMS current of the primary and secondary bridges.

[0128] Therefore, the expression for the transmission power under normal working conditions can be calculated:

[0129]

[0130] According to the previous analysis, the steady-state performance of the proposed fault-tolerant half-bridge multiplexed DAB converter can be controlled by phase shift. If one of the switches has an open-circuit fault, it will interfere with normal operation. The OCF on the semiconductor switch will generate large current stress and DC bias current.

[0131] Similarly, the inductor current and transmission power of fault conditions 2 and 3 can be calculated, which are summarized as follows:

[0132]

[0133] Case 1 is the normal working condition.

[0134] The transmission power analysis of the fault-tolerant half-bridge multiplexed DAB converter is carried out. The transmission power expression of the converter in cases 1-3 can also be integrated into:

[0135]

[0136] Primary inductor current effective value I RMS1 The mathematical expression of I is the same in fault conditions and normal conditions. Therefore, under the same phase shift conditions, the I RMS1 is a constant value. This also proves that the primary effective current is not affected by different operating modes. Taking normal operation condition 1 as the benchmark, I RMS2 is significantly greater than case 1 and is twice that of normal operating conditions. Conversely, fault case 2 can ensure the same or lower I RMS2The transmission power in normal case 1 and fault case 3 is equal, and the transmission power in fault case 2 is only half of that in normal working case.

[0137] Experimental verification:

[0138] Based on the above analysis, a comprehensive simulation verification is carried out on the fault-tolerant half-bridge multiplexed DAB converter of the present invention to evaluate its performance and fault tolerance under various working conditions. During the simulation process, a series of different working conditions are set, including normal operating conditions and open circuit faults (OCFs) under various modes, to test the response and performance of the fault-tolerant converter under these conditions. The selection of simulation parameters is shown in Table 1. The setting of parameters follows the typical working conditions in actual applications according to the expected indicators to ensure the reliability and reference of the simulation results.

[0139] Table 1 Simulation experiment parameters

[0140]

[0141] Based on the parameters in Table 1, a simulation circuit is built. The circuit model reflects in detail the actual design of the fault-tolerant half-bridge multiplexed DAB converter, including the connection mode of each inductor, capacitor and switch and the implementation of the control strategy. In the simulation process, the performance of the circuit in the normal working mode is first tested. Then, the fault tolerance of the circuit is verified one by one for different open circuit fault modes.

[0142] The experimental waveforms under each mode are as follows: Figure 13-15 As shown. In the fault-tolerant operation mode, although the rated power is reduced, the current stress and conduction loss on the secondary side are significantly reduced, which is of great significance to extending the life of the equipment and improving the reliability of the system. It can be seen that the input and output voltages in each mode can be stably output as expected, without obvious fluctuations or deviations, which proves the reliability and stability of the circuit. The inductor current waveform is highly consistent with the theoretical analysis results, indicating that the circuit design is reasonable, and the switch tube can achieve zero voltage switching (ZVS) in various modes, effectively reducing switching losses and improving the efficiency and performance of the circuit.

[0143] The above simulation verification results not only fully demonstrate the fault tolerance of the half-bridge multiplexed fault-tolerant DAB converter proposed by the present invention under various fault conditions, but also show that the circuit can maintain stable power transmission under various working conditions. In addition, the simulation verification also shows the current distribution and voltage waveform change rules under different fault conditions, proving that the performance of the present invention is stable and reliable. The present invention can achieve stable output under the conditions of wide range voltage input and partial device failure, maintain grid voltage stability and improve DC grid power quality. It has broad application prospects in the field of photovoltaic power generation in high-latitude cold areas.

[0144] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that the features described in conjunction with a single embodiment may be used in other described embodiments.

Claims

1. A fault-tolerant dual active bridge converter based on half-bridge multiplexing, characterized in that: Including reused half-bridge, DC inductor L m , advanced bridge, capacitor C 11 , capacitor C 12 , a center-tapped transformer with a turns ratio of n:1, a DC inductor L1, a DC inductor L2, a hysteresis bridge, and a capacitor C 21 and capacitor C 22 , The reused half bridge passes through the DC inductor L m Connected to the leading bridge, capacitor C 11 and capacitor C 12 After being connected in series, it is connected in parallel with the leading bridge. The two ends of the primary side of the middle-tapped transformer are connected to the DC inductor L1 and the DC inductor L2 respectively, and then connected to the leading bridge. The middle tap of the primary side of the middle-tapped transformer is connected to the capacitor C 11 and capacitor C 12 between; The secondary side of the center-tapped transformer is connected to the lag bridge, and the capacitor C 21 and capacitor C 22 After being connected in series with the lagging bridge in parallel, the secondary middle tap of the middle tap transformer is connected to the capacitor C 21 and capacitor C 22 between.

2. The fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 1, characterized in that: The multiplexed half bridge includes a switch tube Q1 and a switch tube Q2, the drain of the switch tube Q1 is connected to the positive electrode of the power supply V1, the source of the switch tube Q1 is connected to the drain of the switch tube Q2, and the source of the switch tube Q2 is connected to the negative electrode of the power supply V1; a capacitor C1 is connected between the drain of the switch tube Q1 and the source of the switch tube Q2; The leading bridge includes switch tube S1, switch tube S2, switch tube S3 and switch tube S4, the drain of switch tube S1 is connected to the drain of switch tube S3, the source of switch tube S1 is connected to the drain of switch tube S2, the source of switch tube S2 is connected to the source of switch tube S4, and the drain of switch tube S4 is connected to the source of switch tube S3; DC inductor L m Connected between the source of the switch tube Q1 and the source of the switch tube S1; The drain of switch tube S1 is connected to capacitor C 11 One end of the capacitor C 11 The other end of the capacitor C 12 One end of the capacitor C 12 The other end of is connected to the source of the switch tube S2; the source of the switch tube S1 is connected to one end of the DC inductor L1, the other end of the DC inductor L1 is connected to one end of the primary side of the middle-tapped transformer, the other end of the primary side of the middle-tapped transformer is connected to one end of the DC inductor L2, the other end of the DC inductor L2 is connected to the drain of the switch tube S4, and the middle tap of the primary side of the middle-tapped transformer is connected to the capacitor C 11 the other end.

3. The fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 2, characterized in that: The hysteresis bridge includes a switch tube S5, a switch tube S6, a switch tube S7 and a switch tube S8, the drain of the switch tube S5 is connected to the drain of the switch tube S7, the source of the switch tube S5 is connected to the drain of the switch tube S6, the source of the switch tube S6 is connected to the source of the switch tube S8, and the drain of the switch tube S8 is connected to the source of the switch tube S7; One end of the secondary side of the middle tap transformer is connected to the source of the switch tube S5, and the other end of the secondary side of the middle tap transformer is connected to the drain of the switch tube S8; the drain of the switch tube S7 is connected to the capacitor C 21 One end of the capacitor C 21 The other end of the capacitor C 22 One end of the capacitor C 22 The other end is connected to the source of the switch tube S8; The secondary side of the center-tapped transformer is connected to the center-tapped capacitor C 21 The other end of the capacitor C 21 One end and capacitor C 22 Connect a load R between the other ends L .

4. A control method for a fault-tolerant dual active bridge converter based on half-bridge multiplexing, which controls the fault-tolerant dual active bridge converter based on half-bridge multiplexing as claimed in claim 3, characterized in that: One control cycle includes five modes; Mode 1: In the time period [t0, t1], before the gate drive signal of switch Q1 arrives, switch Q2 is turned off; when the gate drive signal of switch Q1 arrives, switch Q1 is turned on with zero voltage; wherein time t0 is the start time of turning on switch Q1, switch S1 and switch S4, and time t1 is the start time of turning on switch S5 and switch S8; Mode 2: In the time period [t1, t2], the switch tubes S6 and S7 are turned off, and the voltage across the switch tubes S5 and S8 is clamped to zero; when the gate drive signals of the switch tubes S1 and S8 arrive at time t1, the switch tubes S5 and S8 are turned on with zero voltage; time t2 is the start time of the switch tube Q1 turning off; Mode three: In the time period [t2, t3], the switch tube Q1 is turned off, and the voltage across the switch tube Q2 is clamped to zero; when the gate drive signal of the switch tube Q2 arrives at time t2, the switch tube Q2 is turned on with zero voltage; time t3 is the starting time when the switch tubes S1 and S4 are turned off; Mode 4: In the time period [t3, t4], the switch tubes S1 and S4 are turned off, and the voltage across the switch tubes S2 and S3 is clamped to zero; when the gate drive signals of the switch tubes S2 and S3 arrive at time t4, the switch tubes S2 and S3 are turned on with zero voltage; time t4 is the starting time for the switch tubes S5 and S8 to be turned off; Mode five, in the time period [t4, t5], the switch tubes S5 and S8 are turned off, and the voltage across the switch tubes S6 and S7 are clamped to zero; at time t5, when the gate drive signals of the switch tubes S6 and S7 arrive, the switch tubes S6 and S7 are turned on with zero voltage; time t5 is the starting time for the switch tubes Q1, S1 and S4 to be turned on again.

5. The control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 4 is characterized in that: In mode 1, the DC inductance L m The current i Lm (t) is: Where t represents time, C 11 =C 12 , let C k =C 11 =C 12 , V Ck Represents C k The voltage across the terminals; Where v priL Represents the voltage of the primary side AC square wave, v priH Represents the voltage on the primary side AC square wave, v pri represents the primary side AC square wave, v secL Indicates the secondary side AC square wave voltage, v secH Represents the voltage on the secondary side AC square wave, v sec Represents secondary side AC square wave; Where v L1 is the voltage across the DC inductor L1, v L2 is the voltage across the DC inductor L2; Where i Lp1 is the inductor current on the primary side of the center-tapped transformer, V2 is the load R L Voltage across the two ends; i Lp2 is the inductor current on the primary side of the center-tapped transformer; L k =L1=L2。 6. The control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 5 is characterized in that: In mode 2, 7. The control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 6 is characterized in that: In mode three, 8. The control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 7 is characterized in that: In mode four, i Lm (t)=i Lm (t3), 9. The control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 8, characterized in that: In mode five, i Lm (t)=i Lm (t3), 10. The control method of the fault-tolerant dual active bridge converter based on half-bridge multiplexing according to claim 9, characterized in that: In mode five, i L1 =i Lp1 -i Lp2 =0; Where k is the converter input-output voltage ratio, f s is the switching frequency, D is the duty cycle of switch tube Q1 and switch tube Q2, d D is the shift ratio between the switch tube S1 and the switch tube S5, i L1 is the center-tapped branch current of the center-tapped transformer.

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