Clock circuit, communication system, electronic chip and electronic device

Abstract

According to the clock circuit, the electronic chip, the communication system and the electronic equipment provided by the invention, the equivalent capacitance value of the first load capacitor unit and / or the second load capacitor unit is reduced under the condition that the communication system is in the first working mode, so that the power loss of the clock circuit is reduced; and the power loss of the communication system and the electronic equipment is reduced. The clock circuit may be applied to a communication system. The clock circuit may include a regulation module, a clock module, a first load capacitance unit, and a second load capacitance unit. The first load capacitor unit and the second load capacitor unit are electrically connected with the clock module, the adjusting module is electrically connected with the first load capacitor unit, and the adjusting module is electrically connected with the second load capacitor unit. The clock module can be used for outputting a clock signal. The adjusting module can be used for reducing the equivalent capacitance value of the first load capacitor unit and / or the second load capacitor unit when the communication system is in the first working mode.

Description

Technical Field

[0001] The present application relates to the field of circuit technology, and more specifically, to a clock circuit, a communication system, an electronic chip and an electronic device. Background Art

[0002] With the rapid development of electronic devices such as mobile phones, communication systems have been widely used. Communication systems can have normal working mode, sleep mode, etc. The power loss of the communication system in sleep mode directly affects the standby time of the communication system. Therefore, reducing the power loss of the communication system in sleep mode can significantly improve the endurance of the communication system.

[0003] In order to reduce the power consumption of the communication system in sleep mode, the related technology often shuts down the non-working parts of the communication system. However, the clock circuit in the communication system is used to provide a clock signal for the communication system. Therefore, the clock circuit needs to keep working and cannot be shut down. Therefore, a technical solution that can reduce the power consumption of the clock circuit is urgently needed. Summary of the invention

[0004] The present application provides a clock circuit, an electronic chip, a communication system and an electronic device, which reduces the power loss of the clock circuit by reducing the equivalent capacitance of the first load capacitor unit and / or the second load capacitor unit when the communication system is in a first working mode, thereby reducing the power loss of the communication system and the electronic device.

[0005] In a first aspect, the present application provides a clock circuit that can be applied to a communication system. The clock circuit may include a regulating module, a clock module, a first load capacitor unit, and a second load capacitor unit.

[0006] The first load capacitor unit and the second load unit are both electrically connected to the clock module, the adjustment module is electrically connected to the first load capacitor unit, and the adjustment module is electrically connected to the second load capacitor unit.

[0007] Optionally, the clock module can be used to: output a clock signal.

[0008] The adjustment module may be used to reduce the equivalent capacitance of the first load capacitance unit and / or the second load capacitance unit when the communication system is in the first working mode.

[0009] Exemplarily, the communication system may have a first working mode and a second working mode. The first working mode may be used to indicate a low power consumption mode of the communication system in a non-business scenario (i.e., the communication system does not need to send or receive data), which may be called a sleep mode. The second working mode may be used to indicate a normal working mode of the communication system, i.e., a normal power consumption mode of the communication system in a business scenario (i.e., the communication system needs to send and / or receive data).

[0010] In the clock circuit provided by the present application, when the communication system is in the first working mode, the equivalent capacitance of the first load capacitance unit and / or the second load capacitance unit can be reduced by the adjustment module, so that the working current of the clock circuit can be reduced, and thus the power loss of the clock circuit will be reduced as the current decreases. In other words, the clock circuit provided by the present application can reduce its own power loss through the adjustment module, thereby reducing the power loss of the communication system.

[0011] It is conceivable that, since the clock circuit only needs to have a timing function when the communication system is in the first working mode, it can be seen that the clock circuit is not turned off. Then, the adjustment module can reduce the equivalent capacitance of the first load capacitance unit and the second load capacitance unit, and the adjustment module can also reduce the equivalent capacitance of one of the first load capacitance unit and the second load capacitance unit and increase the equivalent capacitance of the other, as long as the power loss of the clock circuit can be reduced.

[0012] In a possible implementation, the adjustment module may also be used to adjust the equivalent capacitance of the first load capacitance unit and the second load capacitance unit to a preset capacitance before the communication system leaves the factory.

[0013] Exemplarily, before the communication system leaves the factory, a calibration and board test (CBT) may be performed on the communication system. Thus, during the CBT process, the equivalent capacitance of the first load capacitance unit and the second load capacitance unit may be adjusted to a preset capacitance. Thus, in the normal working mode of the communication system, the equivalent capacitance of the first load capacitance unit and the second load capacitance unit may be a preset capacitance.

[0014] It is conceivable that, during the CBT process, the equivalent capacitance of the first load capacitance unit can be adjusted to the first preset capacitance, and the equivalent capacitance of the second load capacitance unit can be adjusted to the second preset capacitance. Then, the first preset capacitance and the second preset capacitance may not be equal. Of course, the first preset capacitance and the second preset capacitance may be equal. In other words, the equivalent capacitance of the first load capacitance unit and the second load capacitance unit is adjusted to the same preset capacitance (which can be called the third preset capacitance).

[0015] It is also conceivable that, during the CBT process, the equivalent capacitance of the first load capacitance unit can be increased or decreased to make it the first preset capacitance. The equivalent capacitance of the second load capacitance unit can also be increased or decreased to make it the second preset capacitance. In other words, the equivalent capacitance of the first load capacitance unit and / or the second load capacitance unit can be increased or decreased.

[0016] In another possible implementation, the adjustment module may be specifically configured to adjust the equivalent capacitance of the first load capacitance unit and the second load capacitance unit to be smaller than a preset capacitance when the communication system is in the first working mode.

[0017] In one example, when the communication system is in the first operating mode and the first preset capacitance is equal to the second preset capacitance (i.e., both are equal to the third preset capacitance), the equivalent capacitance of the first load capacitance unit and the second load capacitance unit can be adjusted to be smaller than the third preset capacitance.

[0018] In another example, when the communication system is in the first operating mode and the first preset capacitance is not equal to the second preset capacitance, the equivalent capacitance of the first load capacitance unit can be adjusted to be smaller than the first preset capacitance, and the equivalent capacitance of the second load capacitance unit can be adjusted to be smaller than the second preset capacitance.

[0019] Optionally, when the communication system is in the first operating mode, the equivalent capacitance of the first load capacitance unit and the second load capacitance unit can be adjusted to 0, that is, the equivalent capacitance of the first load capacitance unit and the second load capacitance unit can be adjusted to the minimum to minimize the power loss of the clock circuit.

[0020] It can be seen that during the CBT process, the equivalent capacitance of the first load capacitance unit and / or the second load capacitance unit can be increased or decreased. When the communication system is in the first working mode, the equivalent capacitance of the first load capacitance unit and / or the second load capacitance unit can be decreased to reduce the power loss of the clock circuit.

[0021] Exemplarily, the clock module may include a crystal oscillator, a resistor and an inverter, wherein the resistor, the inverter and the crystal oscillator are connected in parallel.

[0022] Optionally, the resistor can be used to make the inverter operate in the linear region, making the inverter a high-gain inverting amplifier.

[0023] Crystal oscillators can be used to: output clock signals.

[0024] The inverter can be used to amplify and output the clock signal in a linear region.

[0025] It is conceivable that the crystal oscillator, the first load capacitor unit and the second load capacitor unit can form a π-type bandpass filter. It can be seen that the output of the clock signal can be achieved through the crystal oscillator, the resistor and the inverter.

[0026] In one possible implementation, the first end of the first load capacitor unit can be electrically connected to the first end of the clock module (which can be the input end of the inverter), the first end of the second load capacitor unit can be electrically connected to the second end of the clock module (which can be the output end of the inverter), the second end of the clock module can be used as the output end of the clock module, and the second ends of the first load capacitor unit and the second load capacitor unit can each be electrically connected to the reference ground.

[0027] Further, the first load capacitor unit and the second load capacitor unit may each include at least one switch tube and at least one load capacitor, and the switch tube may be connected in series with the load capacitor.

[0028] In an example, the first load capacitor unit and the second load capacitor unit may each include a switch tube and a load capacitor, and the switch tube may be connected in series with the load capacitor.

[0029] In another example, the first load capacitor unit and the second load capacitor unit may include multiple switch tubes and multiple load capacitors. The multiple switch tubes and multiple load capacitors are connected in series one by one to form multiple series branches, and the multiple series branches can be connected in parallel.

[0030] In a possible implementation, the regulating module may be used to control the on or off of at least one switch tube to implement the connection or disconnection of a corresponding load capacitor.

[0031] In one example, the first load capacitor unit and the second load capacitor unit may each include a switch tube and a load capacitor. Thus, when the communication system is in a normal working mode, the regulating module may control the switch tube in the first load capacitor unit and / or the second load capacitor unit to be turned on, thereby realizing the access of the load capacitor in the first load capacitor unit and / or the second load capacitor unit. When the communication system is in the first working mode, the regulating module may control the switch tube in the first load capacitor unit and / or the second load capacitor unit to be turned off, thereby realizing the cut-out of the load capacitor in the first load capacitor unit and / or the second load capacitor unit, that is, realizing the reduction of the equivalent capacitance of the first load capacitor unit and / or the second load capacitor unit, thereby reducing the power loss of the clock circuit.

[0032] In another example, in the first load capacitor unit and the second load capacitor unit, one of the load capacitor units (which may be the first load capacitor unit or the second load capacitor unit) includes a switch tube and a load capacitor. The other load capacitor unit (which may be the second load capacitor unit or the first load capacitor unit) may include multiple switch tubes and multiple load capacitors. Therefore, when the communication system is in a normal working mode, the adjustment module can control all or part of the switch tubes in the first load capacitor unit and / or the second load capacitor unit to be turned on, so as to achieve the access of all or part of the load capacitors in the first load capacitor unit and / or the second load capacitor unit. When the communication system is in the first working mode, the adjustment module can control all or part of the switch tubes in the first load capacitor unit and / or the second load capacitor unit to be turned off, so as to achieve the cut-out of all or part of the load capacitors in the first load capacitor unit and / or the second load capacitor unit, that is, to achieve the reduction of the equivalent capacitance of the first load capacitor unit and / or the second load capacitor unit, thereby reducing the power loss of the clock circuit.

[0033] In another example, the first load capacitor unit and the second load capacitor unit may each include a plurality of switch tubes and a plurality of load capacitors. Thus, when the communication system is in a normal working mode, the regulating module may control all or part of the switch tubes in the first load capacitor unit and / or the second load capacitor unit to be turned on, thereby enabling access to all or part of the load capacitors in the first load capacitor unit and / or the second load capacitor unit. When the communication system is in the first working mode, the regulating module may control all or part of the switch tubes in the first load capacitor unit and / or the second load capacitor unit to be turned off, thereby enabling the cutting out of all or part of the load capacitors in the first load capacitor unit and / or the second load capacitor unit, that is, achieving a reduction in the equivalent capacitance of the first load capacitor unit and / or the second load capacitor unit, thereby minimizing the power loss of the clock circuit.

[0034] It can be imagined that the regulation module can realize the connection and disconnection of all or part of the load capacitors in multiple load capacitors by controlling the on and off of all or part of the switching tubes, thereby realizing the fine-grained adjustment of the equivalent capacitance of the first load capacitor unit and the second load capacitor unit.

[0035] In another possible implementation, the adjustment module may be used to: increase the distance between two plates in at least one load capacitor, and / or decrease the overlapping area of ​​the two plates.

[0036] That is to say, the regulating module can increase the distance between the two plates, or reduce the overlapping area of ​​the two plates, so as to reduce the capacitance of the load capacitor, thereby reducing the equivalent capacitance of the first load capacitor unit and / or the second load capacitor unit. Of course, the regulating module can increase the distance between the two plates while reducing the overlapping area of ​​the two plates, thereby reducing the equivalent capacitance of the first load capacitor unit and / or the second load capacitor unit to the greatest extent.

[0037] In a possible implementation, the clock module may further include an amplifying unit. The input end of the amplifying unit may be electrically connected to the output end of the inverter, and the output end of the amplifying unit serves as the output end of the clock module.

[0038] Optionally, the amplification unit may be used to: amplify and output the clock signal.

[0039] Furthermore, the amplification unit may include one or more serially connected phase converters. Of course, the amplification unit may also include other devices in addition to the phase converter, as long as the clock signal can be amplified and output, and this application does not limit it.

[0040] Exemplarily, the clock module may be a Pierce crystal oscillator.

[0041] In a second aspect, the present application provides a communication system, which may include a processing module, a first functional module, and a clock circuit provided by the above-mentioned first aspect and its possible implementation methods.

[0042] The clock circuit may be configured to provide a clock signal to the first functional module.

[0043] It is conceivable that the clock circuit provides the clock signal to the first functional module, which can, on the one hand, enable the first functional module to operate at a preset operating frequency when the communication system is in a normal operating mode; on the other hand, enable the first functional module to operate at an actual operating frequency when the communication system is in the first operating mode. The preset operating frequency can be used to indicate the operating frequency of the first functional module when the communication system is in a normal operating mode.

[0044] The processing module may be used to: send a control signal to the first functional module when the communication system is in the first working mode, wherein the control signal may be used to instruct the first functional module to operate at an actual working frequency.

[0045] The first functional module can be used to: under the drive of the clock signal, compensate for the timing deviation according to the control signal.

[0046] It can be seen that the communication system provided in the present application can drive the first functional module through the clock signal output by the clock circuit, and control the first functional module through the control signal sent by the processing module to achieve compensation of timing deviation.

[0047] Exemplarily, the control signal may include any one of the equivalent capacitance of the first load capacitor unit and the second load capacitor unit, the actual operating frequency, and the frequency deviation, wherein the frequency deviation may be used to indicate the difference between the actual operating frequency and the preset operating frequency.

[0048] In one example, the first functional module is specifically used for: when the control signal is the equivalent capacitance of the first load capacitance unit and the second load capacitance unit, the timing deviation can be compensated according to the equivalent capacitance of the first load capacitance unit and the second load capacitance unit and the correspondence between the equivalent capacitance of the first load capacitance unit and the second load capacitance unit and the frequency deviation, and according to the frequency deviation and the preset operating frequency.

[0049] In another example, the first functional module is specifically used to: when the control signal is the actual operating frequency, obtain the frequency deviation according to the actual operating frequency and the preset operating frequency, and compensate for the timing deviation according to the frequency deviation and the preset operating frequency.

[0050] In yet another example, the first functional module is specifically configured to: when the control signal is a frequency deviation, compensate for the timing deviation according to the frequency deviation and a preset operating frequency.

[0051] Optionally, the first functional module may include a timing counter. Of course, the first functional module may also include other components, which are not limited in this application.

[0052] Exemplarily, the first functional module may update the count of the timing counter according to the following formula based on the frequency deviation and the preset operating frequency to achieve compensation of the timing deviation (ie, n1-n):

[0053] n1=(△f+f1) / f1*n

[0054] Wherein, n1 represents the count of the timing counter after updating, Δf represents the frequency deviation, f1 represents the preset operating frequency, and n represents the count of the timing counter before updating.

[0055] In a possible implementation, the communication system may further include a power supply module. The power supply module may be used to provide a first direct current to the clock circuit. In other words, the power supply module may be used to supply power to the clock circuit.

[0056] Optionally, the power module may include a converter. The converter may be used to convert the second direct current into the first direct current. That is, the converter may function as a direct current converter. Alternatively, the converter may be used to convert the alternating current into the first direct current. That is, the converter functions as a rectifier.

[0057] Furthermore, the power supply module also includes a voltage stabilizer. The voltage stabilizer can be used to stabilize the first direct current and provide it to the clock circuit. It can be seen that the power supply module provides the clock circuit with the stabilized first direct current.

[0058] In a third aspect, the present application provides an electronic chip, which may include a power supply circuit and a clock circuit provided by the first aspect and possible implementations thereof. The power supply circuit may be electrically connected to the clock circuit to supply power to the clock circuit (which may be a regulating module of the clock circuit, etc.).

[0059] In a fourth aspect, the present application provides an electronic device, which may include a power supply and a communication system provided by the second aspect and its possible implementation. The power supply may be electrically connected to the communication system to power the communication system (which may be a processing module of the communication system, etc.).

[0060] It should be understood that the second to fourth aspects of the present application are consistent with the technical solutions of the first aspect of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] In order to more clearly illustrate the technical solutions in the present application or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0062] Figure 1 is a schematic structural diagram of a clock circuit 10 in an embodiment of the present application;

[0063] Figure 2 is another schematic structural diagram of the clock circuit 10 in the embodiment of the present application;

[0064] Figure 3 is another schematic structural diagram of the clock circuit 10 in the embodiment of the present application;

[0065] Figure 4 is another schematic structural diagram of the clock circuit 10 in the embodiment of the present application;

[0066] Figure 5is another schematic structural diagram of the clock circuit 10 in the embodiment of the present application;

[0067] Figure 6 Schematic diagram of the relationship between the operating current of the clock circuit 10 and the equivalent capacitance C1 of the first load capacitance unit 3 and the equivalent capacitance C2 of the second load capacitance unit 4 in the embodiment of the present application;

[0068] Figure 7 A schematic structural diagram of a communication system 100 in an embodiment of the present application;

[0069] Figure 8 This is another schematic structural diagram of the communication system 100 in the embodiment of the present application. DETAILED DESCRIPTION

[0070] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0071] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in this application will be clearly and completely described below in conjunction with the drawings in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0072] The terms "first", "second", etc. in the specification embodiments, claims, and drawings of the present application are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, including a series of steps or units. The method, system, product, or device is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0073] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0074] With the rapid development of electronic devices such as mobile phones, communication systems have been widely used. Communication systems can have normal working mode, sleep mode, etc. The power loss of the communication system in sleep mode directly affects the standby time of the communication system. Therefore, reducing the power loss of the communication system in sleep mode can significantly improve the endurance of the communication system.

[0075] In order to reduce the power consumption of the communication system in sleep mode, the related technology often shuts down the non-working parts of the communication system. However, the clock circuit in the communication system is used to provide a clock signal for the communication system, so the clock circuit needs to keep working and cannot be shut down.

[0076] In order to overcome the above shortcomings, the present application embodiment provides a clock circuit, such as Figure 1 As shown. The clock circuit 10 can be applied to a communication system. The communication system can have a first working mode and a second working mode. Among them, the first working mode can be used to indicate a low power consumption mode of the communication system in a non-business scenario (i.e., the communication system does not need to send or receive data), which can be called a sleep mode. The second working mode can be used to indicate a normal working mode of the communication system, i.e., a normal power consumption mode of the communication system in a business scenario (i.e., the communication system needs to send and / or receive data).

[0077] refer to Figure 1 The clock circuit 10 may include a clock module 1 , an adjustment module 2 , a first load capacitor unit 3 and a second load capacitor unit 4 .

[0078] The first load capacitor unit 3 and the second load unit 4 are both electrically connected to the clock module 1, the adjustment module 2 is electrically connected to the first load capacitor unit 3, and the adjustment module 2 is electrically connected to the second load capacitor unit 4. OUT represents the output end of the clock circuit 1, and DC1 represents the first direct current provided by the power module in the communication system to the clock module 1.

[0079] Optionally, the clock module 1 can be used to: output a clock signal CLK1.

[0080] The adjustment module 2 can be used to reduce the equivalent capacitance of the first load capacitance unit 3 and / or the second load capacitance unit 4 when the communication system is in sleep mode. That is, when the communication system is in sleep mode, the adjustment module 2 can reduce the equivalent capacitance of the first load capacitance unit 3 (which can be represented by C1) (the equivalent capacitance of the second load capacitance unit 4 remains unchanged or increases), or reduce the equivalent capacitance of the second load capacitance unit 4 (which can be represented by C2) (the equivalent capacitance of the first load capacitance unit 3 remains unchanged or increases). The adjustment module 2 can also reduce the equivalent capacitance of both the first load capacitance unit 3 and the second load capacitance unit 4.

[0081] In the clock circuit 10 provided in the embodiment of the present application, when the communication system is in sleep mode, the equivalent capacitance of the first load capacitor unit 3 and / or the second load capacitor unit 4 can be reduced by the adjustment module 2, so that the working current of the clock circuit 10 can be reduced, and thus the power loss of the clock circuit 10 will be reduced as the current decreases. In other words, the clock circuit 10 provided in the embodiment of the present application can reduce its own power loss through the adjustment module 2, thereby reducing the power loss of the communication system.

[0082] It is conceivable that, since the communication system is in sleep mode, the clock circuit 10 only needs to have a timing function. It can be seen that the clock circuit 10 is not turned off. Then, the adjustment module 2 can reduce the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4. The adjustment module 2 can also reduce the equivalent capacitance of one of the first load capacitance unit 3 and the second load capacitance unit 4 and increase the equivalent capacitance of the other, as long as the power loss of the clock circuit 10 can be reduced.

[0083] In some embodiments, the adjustment module 2 may also be used to adjust the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 to a preset capacitance before the communication system leaves the factory.

[0084] Exemplarily, before the communication system leaves the factory, a calibration and board test (CBT) can be performed on the communication system. Thus, during the CBT process, the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 can be adjusted to a preset capacitance. Thus, in the normal working mode of the communication system, the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 can be a preset capacitance.

[0085] It is conceivable that, during the CBT process, the equivalent capacitance C1 of the first load capacitance unit 3 can be adjusted to a first preset capacitance (which can be expressed as C set1 C1=C set1 ; Adjust the equivalent capacitance C2 of the second load capacitance unit 4 to the second preset capacitance (which can be adjusted by C set2 C2=C set2 Then, the first preset capacitance C set1 With the second preset capacitance C set2 They may not be equal, that is, C1≠C2. Of course, the first preset capacitance C set1 With the second preset capacitance C set2 That is, the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 is adjusted to the same preset capacitance (which can be called the third preset capacitance, which can be expressed as C1 = C2). set3 C1=C2=C set3 .

[0086] It is also conceivable that, during the CBT process, the equivalent capacitance C1 of the first load capacitance unit 3 can be increased or decreased to be the first preset capacitance (ie, C1 = C set1 The equivalent capacitance C2 of the second load capacitance unit 4 can also be increased or decreased to make it a second preset capacitance (ie, C2 = C set2 That is to say, the equivalent capacitance of the first load capacitance unit 3 and / or the second load capacitance unit 4 can be increased or decreased.

[0087] It is conceivable that, during the CBT process, by adjusting the equivalent capacitance of the first load capacitor unit 3 and / or the second load capacitor unit 4, the actual operating frequency of the communication system can be made equal to the preset operating frequency, thereby ensuring stable operation of the communication system.

[0088] In some other embodiments, the adjustment module 2 may be specifically used to adjust the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 to be smaller than a preset capacitance when the communication system is in the sleep mode.

[0089] In one example, when the communication system is in sleep mode and the first preset capacitance C set1 With the second preset capacitance C set2 Equal (i.e. C set1 =C set2 =C set3 ), the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 can be adjusted to be smaller than the third preset capacitance C set3 .

[0090] In another example, when the communication system is in sleep mode and the first preset capacitance C set1 With the second preset capacitance C set2 Not equal (i.e. C set1 ≠C set2 ), the equivalent capacitance C1 of the first load capacitance unit 3 can be adjusted to be smaller than the first preset capacitance C set1 and adjust the equivalent capacitance C2 of the second load capacitance unit 4 to be smaller than the second preset capacitance C set2 .

[0091] Optionally, when the communication system is in sleep mode, the equivalent capacitance C1 of the first load capacitance unit 3 and the equivalent capacitance C2 of the second load capacitance unit 4 can be adjusted to 0, that is, the equivalent capacitance C1 of the first load capacitance unit 3 and the equivalent capacitance C2 of the second load capacitance unit 4 can be adjusted to the minimum to minimize the power loss of the clock circuit 10.

[0092] It can be seen that during the CBT process, the equivalent capacitance of the first load capacitance unit 3 and / or the second load capacitance unit 4 can be increased or decreased. When the communication system is in sleep mode, the equivalent capacitance of the first load capacitance unit 3 and / or the second load capacitance unit 4 can be decreased to reduce the power loss of the clock circuit 10.

[0093] In a possible implementation, the clock module 1 may be a Pierce crystal oscillator. The clock module 1 may include a crystal oscillator X, a resistor R, and an inverter U. The resistor R, the inverter U, and the crystal oscillator X are connected in parallel, such as Figure 2 and Figure 3 shown. Figure 2 and Figure 3 The regulating module 2 is not shown.

[0094] Optionally, the resistor R can be used to make the inverter U operate in a linear region, so that the inverter U becomes a high-gain inverting amplifier.

[0095] The crystal oscillator X can be used to: output a clock signal CLK2.

[0096] The inverter U can be used to amplify and output the clock signal CLK2 in the linear region. It can be understood that the amplified clock signal CLK2 is the clock signal CLK1 mentioned above.

[0097] It is conceivable that the crystal oscillator X and the first load capacitor unit 3 and the second load capacitor unit 4 can form a π-type bandpass filter. It can be seen that the output of the clock signal CLK1 can be achieved through the crystal oscillator X, the resistor R and the inverter U.

[0098] For example, continue to refer to Figure 2 and Figure 3 The first end of the first load capacitor unit 3 can be electrically connected to the first end of the clock module 1 (which can be the input end of the inverter U), the first end of the second load capacitor unit 4 can be electrically connected to the second end of the clock module 1 (which can be the output end of the inverter U), the second end of the clock module 1 can be used as the output end of the clock module 1, and the second ends of the first load capacitor unit 3 and the second load capacitor unit 4 can be electrically connected to the reference ground.

[0099] Furthermore, the first load capacitor unit 3 and the second load capacitor unit 4 may each include at least one switch tube and at least one load capacitor, and the switch tube may be connected in series with the load capacitor.

[0100] In an example, the first load capacitor unit 3 and the second load capacitor unit 4 may each include a switch tube and a load capacitor, and the switch tube S may be connected in series with the load capacitor C. Figure 2 The first load capacitor unit 3 may include a switch tube S3 and a load capacitor C3 connected in series. The second load capacitor unit 4 may include a switch tube S4 and a load capacitor C4 connected in series.

[0101] In another example, the first load capacitor unit 3 and the second load capacitor unit 4 may each include multiple switch tubes and multiple load capacitors. Multiple switch tubes and multiple load capacitors are connected in series one by one to form multiple series branches, and the multiple series branches can be connected in parallel. In the embodiment of the present application, the first load capacitor unit 3 and the second load capacitor unit 4 may each include 4 switch tubes and 4 load capacitors for illustration.

[0102] refer to Figure 3 , the first load capacitor unit 3 may include a switch tube S31 and a load capacitor C31 connected in series, a switch tube S32 and a load capacitor C32 connected in series, a switch tube S33 and a load capacitor C33 connected in series, and a switch tube S33 and a load capacitor C34 connected in series. Similarly, the second load capacitor unit 4 may include a switch tube S41 and a load capacitor C41 connected in series, a switch tube S342 and a load capacitor C42 connected in series, a switch tube S43 and a load capacitor C43 connected in series, and a switch tube S43 and a load capacitor C44 connected in series. It can be seen that the first load capacitor unit 3 and the second load capacitor unit 4 each include 4 series branches, and the 4 series branches can be connected in parallel.

[0103] Exemplarily, the capacitance of the load capacitor C31, the load capacitor C32, the load capacitor C33, and the load capacitor C34 may increase in sequence. For example, the capacitance of the load capacitor C32 may be twice the capacitance of the load capacitor C31, the capacitance of the load capacitor C33 may be four times the capacitance of the load capacitor C31, and the capacitance of the load capacitor C34 may be eight times the capacitance of the load capacitor C31. Similarly, the capacitance of the load capacitor C41, the load capacitor C42, the load capacitor C43, and the load capacitor C44 may also increase in sequence. For example, the capacitance of the load capacitor C42 may be twice the capacitance of the load capacitor C41, the capacitance of the load capacitor C43 may be four times the capacitance of the load capacitor C41, and the capacitance of the load capacitor C44 may be eight times the capacitance of the load capacitor C41.

[0104] Of course, one of the load capacitor units (which may be the first load capacitor unit 3 or the second load capacitor unit 4) may include a switch tube and a load capacitor. The other load capacitor unit (which may be the second load capacitor unit 4 or the first load capacitor unit 3) may include multiple switch tubes and multiple load capacitors. The embodiments of the present application will not be described in detail.

[0105] In a possible implementation, the regulating module 1 may be used to control the on or off of at least one switch tube to implement the connection or disconnection of a corresponding load capacitor.

[0106] against Figure 2 , can be divided into the following two situations:

[0107] Case 1: When the communication system is in normal working mode, the adjustment module 1 can control the switch tube S3 in the first load capacitor unit 3 and / or the switch tube S4 in the second load capacitor unit 4 to be turned on, so as to realize the connection of the load capacitor C3 in the first load capacitor unit 3 and / or the load capacitor C4 in the second load capacitor unit 4.

[0108] That is to say, when the communication system is in a normal working mode, the regulating module 1 can control the switch tube S3 to be turned on to realize the access of the load capacitor C3. The regulating module 1 can control the switch tube S4 to be turned on to realize the access of the load capacitor C4. Of course, the regulating module 1 can also control the switch tube S3 and the switch tube S4 to be turned on to realize the access of the load capacitor C3 and the load capacitor C4.

[0109] Case 2: When the communication system is in sleep mode, the adjustment module 1 can control the switch tube S3 in the first load capacitor unit 3 and / or the switch tube S4 in the second load capacitor unit to be turned off, so as to cut out the load capacitors in the first load capacitor unit and / or the second load capacitor unit, that is, to reduce the equivalent capacitance C1 of the first load capacitor unit and / or the equivalent capacitance C2 of the second load capacitor unit, thereby reducing the power loss of the clock circuit.

[0110] That is to say, when the communication system is in sleep mode, the regulating module 1 can control the switch tube S3 to turn off, realize the cut-out of the load capacitor C3, and then realize the reduction of the equivalent capacitance C1 of the first load capacitor unit 3. The regulating module 1 can control the switch tube S4 to turn off, realize the cut-out of the load capacitor C4, and then realize the reduction of the equivalent capacitance C2 of the second load capacitor unit 4. Of course, the regulating module 1 can also control the switch tube S3 and the switch tube S4 to turn off, realize the cut-out of the load capacitor C3 and the load capacitor C4, and then realize the reduction of the equivalent capacitance C1 of the first load capacitor unit 3 and the equivalent capacitance C2 of the second load capacitor 4.

[0111] against Figure 3 , can be divided into the following two situations:

[0112] Case 1: When the communication system is in normal working mode, the adjustment module 1 can control all or part of the switch tubes in the first load capacitor unit 3 and / or the second load capacitor unit 4 to be turned on, so as to connect all or part of the load capacitors in the first load capacitor unit 3 and / or the second load capacitor unit 4.

[0113] For example, when the communication system is in normal operating mode, the adjustment module 1 can control the switch tube S31, the switch tube S32, the switch tube S33, the switch tube S34, the switch tube S41, the switch tube S42, the switch tube S43 and the switch tube S44 (that is, all the switch tubes) to be turned on, so as to realize the connection of the load capacitor C31, the load capacitor C32, the load capacitor C33, the load capacitor C34, the load capacitor C41, the load capacitor C42, the load capacitor C43 and the load capacitor C44 (that is, all the load capacitors).

[0114] For example, when the communication system is in a normal working mode, the adjustment module 1 can control the switch tube S31, the switch tube S32, the switch tube S33 and the switch tube S34 to be turned on, and control the switch tube S41, the switch tube S42, the switch tube S43 and the switch tube S44 to be turned off, so as to connect the load capacitor C31, the load capacitor C32, the load capacitor C33 and the load capacitor C34, and to disconnect the load capacitor C41, the load capacitor C42, the load capacitor C43 and the load capacitor C44. Alternatively, the adjustment module 1 can control the switch tube S41, the switch tube S42, the switch tube S43 and the switch tube S44 to be turned on, and control the switch tube S31, the switch tube S32, the switch tube S33 and the switch tube S34 to be turned off, so as to connect the load capacitor C41, the load capacitor C42, the load capacitor C43 and the load capacitor C44, and to disconnect the load capacitor C31, the load capacitor C32, the load capacitor C33 and the load capacitor C34.

[0115] For another example, when the communication system is in normal working mode, the adjustment module 1 can control the switch tubes S31, S32, C41 and C42 to be turned on, and control the switch tubes S33, S34, S43 and S44 to be turned off, so as to connect the load capacitors C31, C32, C41 and C42, and disconnect the load capacitors C33, C34, C43 and C44.

[0116] Case 2: When the communication system is in sleep mode, the adjustment module 1 can control all or part of the switch tubes in the first load capacitor unit 3 and / or the second load capacitor unit 4 to be turned off, thereby cutting out all or part of the load capacitors in the first load capacitor unit 3 and / or the second load capacitor unit 4, that is, reducing the equivalent capacitance C1 of the first load capacitor unit 3 and / or the equivalent capacitance C2 of the second load capacitor unit 4, thereby minimizing the power loss of the clock circuit 10.

[0117] For example, when the communication system is in sleep mode, the adjustment module 1 can control the switch tube S31, the switch tube S32, the switch tube S33, the switch tube S34, the switch tube S41, the switch tube S42, the switch tube S43 and the switch tube S44 (i.e. all the switch tubes) to be turned off, so as to realize the cut-out of the load capacitor C31, the load capacitor C32, the load capacitor C33, the load capacitor C34, the load capacitor C41, the load capacitor C42, the load capacitor C43 and the load capacitor C44 (i.e. all the load capacitors). It can be understood that the equivalent capacitance C1 of the first load capacitor unit 3 and the equivalent capacitance C2 of the second load capacitor unit 4 are adjusted to 0, that is, the equivalent capacitance C1 of the first load capacitor unit 3 and the equivalent capacitance C2 of the second load capacitor unit 4 are adjusted to the minimum, so as to minimize the power loss of the clock circuit 10.

[0118] For example, when the communication system is in sleep mode, the adjustment module 1 can control the switch tubes S31, S32, S33 and S34 to be turned on, and control the switch tubes S41, S42, S43 and S44 to be turned off, so as to connect the load capacitors C31, C32, C33 and C34, and disconnect the load capacitors C41, C42, C43 and C44, thereby adjusting the equivalent capacitance C2 of the second load capacitor unit 4 to the minimum to reduce the power loss of the clock circuit 10. Alternatively, the adjustment module 1 can control the switch tubes S41, S42, S43 and S44 to be turned on, and control the switch tubes S31, S32, S33 and S34 to be turned off, so as to connect the load capacitors C41, C42, C43 and C44, and disconnect the load capacitors C31, C32, C33 and C34, thereby adjusting the equivalent capacitance C1 of the first load capacitor unit 3 to the minimum to reduce the power loss of the clock circuit 10.

[0119] For another example, when the communication system is in sleep mode, the adjustment module 1 can control the switch tubes S31, S32, C41 and C42 to be turned on, and control the switch tubes S33, S34, S43 and S44 to be turned off, so as to connect the load capacitors C31, C32, C41 and C42, and disconnect the load capacitors C33, C34, C43 and C44, thereby reducing the equivalent capacitance C1 of the first load capacitance unit 3 and the equivalent capacitance C2 of the second load capacitance unit 4, so as to reduce the power loss of the clock circuit 10.

[0120] It can be seen that the adjustment module 2 can realize the connection and disconnection of all or part of the load capacitors in multiple load capacitors by controlling the on and off of all or part of the switch tubes, thereby realizing the fine adjustment of the equivalent capacitance C1 of the first load capacitance unit 3 and the equivalent capacitance C2 of the second load capacitance unit 4.

[0121] In another possible implementation, the adjustment module 2 may be used to: increase the distance between two plates in at least one load capacitor, and / or decrease the overlapping area of ​​the two plates.

[0122] That is to say, the regulating module 2 can increase the distance between the two plates, or reduce the overlapping area of ​​the two plates, so as to reduce the capacitance of the load capacitor, thereby reducing the equivalent capacitance C1 of the first load capacitor unit 3 and / or the equivalent capacitance C2 of the second load capacitor unit 4. Of course, the regulating module 2 can increase the distance between the two plates while reducing the overlapping area of ​​the two plates, thereby reducing the equivalent capacitance C1 of the first load capacitor unit 3 and / or the equivalent capacitance C2 of the second load capacitor unit 4 to the greatest extent.

[0123] against Figure 2 The adjustment module 2 can increase the distance between the two plates in the load capacitor C3 and reduce the overlapping area of ​​the two plates, so as to adjust the equivalent capacitance C1 of the first load capacitor unit 3 to the minimum. The adjustment module 2 can also increase the distance between the two plates of the load capacitor C4 and reduce the overlapping area of ​​the two plates, so as to adjust the equivalent capacitance C2 of the second load capacitor unit 4 to the minimum.

[0124] against Figure 3 , the adjustment module 2 can increase the distance between the two plates in all load capacitors, and reduce the overlapping area of ​​the two plates in all load capacitors, so as to adjust the equivalent capacitance C1 of the first load capacitor unit 3 and the equivalent capacitance C2 of the second load capacitor unit 4 to the minimum, so as to reduce the power loss of the clock circuit 10. The adjustment module 2 can also increase the distance between the two plates in some load capacitors in the first load capacitor unit 3, or reduce the overlapping area of ​​the two plates in some load capacitors, so as to reduce the equivalent capacitance C1 of the first load capacitor unit 3. Of course, the adjustment module 2 can also increase the distance between the two plates in some load capacitors in the second load capacitor unit 4, or reduce the overlapping area of ​​the two plates in some load capacitors, so as to reduce the equivalent capacitance C1 of the second load capacitor unit 4.

[0125] Alternatively, if Figure 4 and Figure 5As shown, the clock module 1 may further include an amplifying unit 11. The input end of the amplifying unit 11 may be electrically connected to the output end of the inverter U, and the output end of the amplifying unit 11 serves as the output end of the clock module 1.

[0126] Optionally, the amplifying unit 11 may be used to amplify the clock signal CLK2 to obtain and output the clock signal CLK1 .

[0127] Furthermore, the amplifying unit 11 may include one or more serially connected phase converters. Of course, the amplifying unit 11 may also include other devices in addition to the phase converters, as long as the clock signal CLK2 can be amplified and output, which is not limited in the embodiments of the present application.

[0128] For example, Figure 4 As shown, the amplification unit 11 may include a serially connected phase converter A and a phase converter B. The input end of the phase converter A (which may be used as the input end of the amplification unit 11) may be electrically connected to the output end of the inverter U, and the output end of the phase converter B may be used as the output end of the amplification unit 11, that is, the output end OUT of the clock module 1.

[0129] The relationship between the operating current (which can be represented by I) of the clock circuit 10 provided in the embodiment of the present application and the equivalent capacitance C1 of the first load capacitance unit 3 and the equivalent capacitance C2 of the second load capacitance unit 4 is as follows: Figure 6 shown. Figure 6 In FIG. 1 , the Z coordinate represents the operating current I of the clock circuit 10 , the X coordinate represents the equivalent capacitance C2 of the second load capacitance unit 4 , and the Y coordinate represents the equivalent capacitance C1 of the first load capacitance unit 3 . Figure 6 It can be seen that by reducing the equivalent capacitance C1 of the first load capacitance unit 3 and / or the equivalent capacitance C2 of the second load capacitance unit 4, the operating current of the clock circuit 10 can be reduced, thereby reducing the power loss of the clock circuit 10.

[0130] The present application also provides a communication system. Figure 7 The communication system 100 may include a processing module 20 , a first functional module 30 and a clock circuit 10 .

[0131] The clock circuit 10 may be configured to provide a clock signal CLK1 to the first functional module 30 .

[0132] It is conceivable that the clock circuit 10 provides the clock signal CLK1 to the first functional module 30. On the one hand, the first functional module 30 can be made to operate at a preset operating frequency (which can be expressed as f) when the communication system 100 is in a normal working mode. setOn the other hand, the first functional module 30 can be made to operate at an actual operating frequency (which can be represented by f1) when the communication system 100 is in sleep mode. set It can be used to indicate the operating frequency of the first functional module 30 when the communication system 100 is in the normal operating mode.

[0133] The processing module 20 may be used to send a control signal (CS) to the first functional module 30 when the communication system 100 is in the sleep mode. The control signal CS may be used to instruct the first functional module 30 to operate at the actual operating frequency f1.

[0134] The first functional module 30 can be used to compensate for the timing deviation according to the control signal CS under the drive of the clock signal CLK1.

[0135] It can be seen that the communication system 100 provided in the embodiment of the present application can drive the first functional module 30 through the clock signal CLK1 output by the clock circuit 100, and control the first functional module 30 through the control signal sent by the processing module 20 to achieve timing deviation compensation.

[0136] Optionally, the first functional module 30 may include a timing counter. Of course, the first functional module 30 may also include other components, which are not limited in the embodiment of the present application.

[0137] Exemplarily, the control signal CS may include any one of the equivalent capacitance of the first load capacitor unit 3 and the second load capacitor unit 4 (i.e., the equivalent capacitance C1 and the equivalent capacitance C2), the actual operating frequency f1, and the frequency deviation (which can be represented by Δf). The frequency deviation Δf can be used to indicate the difference between the actual operating frequency f1 and the preset operating frequency f set The difference.

[0138] In one example, the first functional module 30 can be specifically used for: when the control signal CS is the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4, the first load capacitance unit 3 and the second load capacitance unit 4 can be used according to the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 and the corresponding relationship between the equivalent capacitance of the first load capacitance unit 3 and the second load capacitance unit 4 and the frequency deviation △f, and according to the frequency deviation △f and the preset working frequency f set Compensate for timing deviation.

[0139] In another example, the first functional module 30 can be specifically used to: when the control signal CS is the actual operating frequency f1, according to the actual operating frequency f1 and the preset operating frequency f set Get the frequency deviation △f, and according to the frequency deviation △f and the preset working frequency f setCompensate for timing deviation.

[0140] In another example, the first functional module 30 can be specifically used to: when the control signal CS is a frequency deviation Δf, the first functional module 30 can be used to: set Compensate for timing deviation.

[0141] It can be seen that in the above three examples, the first functional module 30 can be configured to adjust the frequency deviation Δf and the preset operating frequency f set Compensate for timing deviation.

[0142] Specifically, the first functional module 30 can be configured to generate a frequency deviation Δf and a preset operating frequency f set , update the count of the timing counter according to the following formula to achieve compensation of timing deviation:

[0143] n1=(△f+f1) / f1*n

[0144] Wherein, n1 represents the count of the timing counter after updating, Δf represents the frequency deviation, f1 represents the preset operating frequency, and n represents the count of the timing counter before updating.

[0145] In some embodiments, Figure 8 As shown, the communication system 100 may further include a power module 40. The power module 40 may be used to provide the clock circuit 10 with a first direct current DC1. In other words, the power module 40 may be used to supply power to the clock circuit 10.

[0146] Optionally, the power module 40 may include a converter 41. The converter 41 may be used to convert the second direct current DC2 into the first direct current DC1. That is, the converter 41 may play a role in direct current conversion (which may be step-up or step-down, etc.). Alternatively, the converter 41 may be used to convert the alternating current AC into the first direct current DC1. That is, the converter 41 plays a role in rectification.

[0147] Further, continue to refer to Figure 8 The power module 40 further includes a voltage stabilizer 42. The voltage stabilizer 42 can be used to stabilize the first direct current DC1 and provide it to the clock circuit 10. It can be seen that the power module 40 provides the clock circuit 10 with the stabilized first direct current.

[0148] The embodiment of the present application provides an electronic chip, which may include a power supply circuit and a clock circuit 10. The power supply circuit may be electrically connected to the clock circuit to supply power to the clock circuit 10 (which may be a regulating module 2 of the clock circuit 10, etc.).

[0149] The embodiment of the present application provides an electronic device, which may include a power supply and a communication system 100. The power supply may be electrically connected to the communication system 100 to supply power to the communication system 100 (may be a processing module of the communication system 100, etc.).

[0150] In the embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0151] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0152] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0153] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0154] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A clock circuit, characterized in that: The clock circuit is applied to a communication system, and the clock circuit comprises a regulating module, a clock module, a first load capacitance unit and a second load capacitance unit; Wherein, the first load capacitance unit and the second load unit are both electrically connected to the clock module, the adjustment module is electrically connected to the first load capacitance unit, and the adjustment module is electrically connected to the second load capacitance unit; The clock module is used to: output a clock signal; The adjustment module is used to reduce the equivalent capacitance of the first load capacitance unit and / or the second load capacitance unit when the communication system is in the first working mode.

2. The clock circuit according to claim 1, characterized in that: The adjustment module is further used to adjust the equivalent capacitance of the first load capacitance unit and the second load capacitance unit to a preset capacitance before the communication system leaves the factory.

3. The clock circuit according to claim 2, characterized in that: The adjustment module is specifically used to: when the communication system is in the first working mode, adjust the equivalent capacitance of the first load capacitance unit and the second load capacitance unit to be smaller than the preset capacitance.

4. The clock circuit according to any one of claims 1 to 3, characterized in that: The clock module includes a crystal oscillator, a resistor and an inverter; the resistor, the inverter and the crystal oscillator are connected in parallel; The resistor is used to: make the inverter work in the linear region; The crystal oscillator is used to: output a clock signal; The inverter is used to amplify and output the clock signal in the linear region.

5. The clock circuit according to any one of claims 1 to 4, characterized in that: The first end of the first load capacitor unit is electrically connected to the first end of the clock module, the first end of the second load capacitor unit is electrically connected to the second end of the clock module, the second end of the clock module serves as the output end of the clock module, and the second ends of the first load capacitor unit and the second load capacitor unit are respectively electrically connected to the reference ground.

6. The clock circuit according to any one of claims 1 to 5, characterized in that: The first load capacitor unit and the second load capacitor unit each include at least one switch tube and at least one load capacitor, and the switch tube is connected in series with the load capacitor.

7. The clock circuit according to claim 6, characterized in that: The first load capacitor unit and the second load capacitor unit both include a plurality of switch tubes and a plurality of load capacitors; the plurality of switch tubes and the plurality of load capacitors are connected in series one by one to form a plurality of series branches, and the plurality of series branches are connected in parallel.

8. A communication system, characterized in that: comprising a processing module, a first functional module and a clock circuit as claimed in any one of claims 1 to 7; The clock circuit is used to: provide a clock signal to the first functional module; The processing module is used to: when the communication system is in the first working mode, send a control signal to the first functional module; wherein the control signal is used to instruct the first functional module to operate at an actual working frequency; The first functional module is used to: under the drive of the clock signal, compensate for the timing deviation according to the control signal.

9. The communication system according to claim 8, characterized in that: The control signal includes any one of the equivalent capacitance of the first load capacitance unit and the second load capacitance unit, the actual operating frequency, and the frequency deviation; The frequency deviation is used to indicate the difference between the actual operating frequency and the preset operating frequency, and the preset operating frequency is used to indicate the operating frequency of the first functional module when the communication system is in a normal working mode.

10. The communication system according to claim 9, characterized in that: The first functional module is specifically used for: In a case where the control signal is the equivalent capacitance of the first load capacitance unit and the second load capacitance unit, the timing deviation is compensated according to the equivalent capacitance of the first load capacitance unit and the second load capacitance unit and the correspondence between the equivalent capacitance of the first load capacitance unit and the second load capacitance unit and the frequency deviation, and according to the frequency deviation and the preset operating frequency.

11. The communication system according to claim 9, characterized in that: The first functional module is specifically used for: In the case where the control signal is the actual operating frequency, the frequency deviation is obtained according to the actual operating frequency and the preset operating frequency, and the timing deviation is compensated according to the frequency deviation and the preset operating frequency.

12. The communication system according to claim 9, characterized in that The first functional module is specifically used for: In the case where the control signal is the frequency deviation, the timing deviation is compensated according to the frequency deviation and the preset operating frequency.

13. The communication system according to any one of claims 8 to 12, characterized in that: The first functional module includes a timing counter.

14. The communication system according to any one of claims 8 to 13, characterized in that: The communication system further comprises: A power supply module is used to provide a first direct current to the clock circuit.

15. The communication system according to claim 14, characterized in that: The power module comprises: The converter is used to convert the second direct current into the first direct current, or to convert the alternating current into the first direct current.

16. The communication system according to claim 15, characterized in that: The power module also includes: A voltage stabilizer is used to stabilize the first direct current and provide the voltage to the clock circuit.

17. An electronic chip, characterized in that: It comprises a power supply circuit and a clock circuit as claimed in any one of claims 1 to 7; the power supply circuit is electrically connected to the clock circuit.

18. An electronic device, characterized in that: It comprises a power supply and a communication system as claimed in any one of claims 8 to 16; the power supply is electrically connected to the communication system.

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