A time reference correction system and a clock establishment and maintenance method

Abstract

This invention discloses a time reference correction system, including a clock initialization module and a virtual clock module, wherein the clock initialization module is connected to the virtual clock module. The clock initialization module includes a GPS device, a 5G communication module, an RTC clock, a counter acquisition channel, a trustworthiness calculation module, a priority selector, and an oscillator. It also includes a clock establishment method for the time reference correction system. This invention improves and optimizes the system composition, based on an embedded system solution, and constructs a new time reference correction system through a combination of hardware and software. By combining GPS and 5G time synchronization sources, it eliminates the timing jitter caused by environmental factors when using GPS alone, and has the advantages of no accumulated error and no jitter error from the local oscillator. By calibrating the periodic quasi-local oscillator through a GPS time synchronization source or a 5G network time synchronization source, the local time is kept synchronized with Coordinated Universal Time (UTC).

Description

Technical Field

[0001] This invention belongs to the field of manufacturing, and specifically relates to a time reference correction system and a method for clock establishment and maintenance. Background Technology

[0002] Autonomous driving algorithms need to process the information status of all sensors on the vehicle at the same time to make driving behavior decisions, making autonomous vehicles highly dependent on the vehicle's time synchronization. Current solutions involve GPS devices converting satellite timing signals into second pulse signals and message signals, and then translating the messages to convert the satellite timing information into network PTP timing messages for the vehicle's sensor devices for timing and synchronization. This approach is prone to time discrepancies between sensors with different interfaces. Furthermore, because this approach directly uses the GPS timing source, if the GPS timing source is affected by driving conditions, it is very easy to cause jitter in the PPS pulse signal, leading to fluctuations in the vehicle's time synchronization and affecting the autonomous driving algorithm's decision-making.

[0003] The current plan is as follows Figure 1 As shown, 𝑡1 represents the GPS time synchronization. This indicates the jitter time of the GPS itself. This indicates the fixed latency of the network synchronization device itself. This indicates the fixed delay of the CAN synchronization device itself, because This causes time synchronization issues between different hardware interface devices;

[0004] Furthermore, the PPS (1Hz whole second pulse signal) signal of the GPS timing equipment on current autonomous vehicles directly provides time synchronization for the entire vehicle. However, the quality of GPS signals is easily affected by weather and driving conditions, causing jitter in the output PPS signal. When the vehicle enters a tunnel or under an overpass, inaccurate vehicle time synchronization and discontinuous timestamps may occur, posing potential hazards to autonomous vehicles.

[0005] In addition, the GPS time clock is directly transmitted to different sensors in the vehicle through several conversion devices without any processing, which causes time jumps and asynchrony between the time sensors in the whole vehicle. Summary of the Invention

[0006] Invention purposes: In order to overcome the above shortcomings, the purpose of the present application is to provide a time reference system, which optimizes the composition of the system by improvement, based on the embedded system scheme, and constitutes a new time reference system by combining software and hardware, combines GPS and 5G time source, eliminates the time jitter behavior caused by the environment when using GPS alone, has the advantages of no cumulative error and no jitter error of local oscillator, and synchronizes the local time with the coordinated universal time by the GPS time source or 5G network time source.

[0007] Technical scheme: In order to achieve the above purpose, the present application provides a time reference system, which comprises: system external hardware device, gateway hardware entity and control chip, the system external hardware device comprises GPS device, a group of sensors, the gateway hardware entity comprises 5G communication module, RTC clock and trusted data processing module, wherein the trusted data processing module comprises a group of trustworthiness calculation modules, priority selector and coordinated universal time resolver;

[0008] The control chip comprises a group of counter capture channels, oscillators and virtual clock modules, the GPS device, 5G communication module and RTC clock are respectively connected with the corresponding technical capture channel, each counter capture channel is connected with the corresponding trustworthiness calculation module, and one output end of the trustworthiness calculation module is connected with the priority selector, another port of the GPS device, 5G communication module and RTC clock is connected with UTC through the coordinated universal time resolver, another output port of the trustworthiness calculation module is connected with the coordinated universal time resolver, and the output port of the coordinated universal time resolver is connected with the priority selector;

[0009] The output end of the priority selector is connected with the virtual clock module;

[0010] The ports of the oscillators are connected with the counter capture channels connected with the GPS device and 5G communication module and the virtual clock module.

[0011] The virtual clock module comprises a group of time processing modules and Ethernet communication modules, the output end of the priority selector is connected with the input end of the time processing module, and the output end of the time processing module is connected with the corresponding sensor through the Ethernet communication module.

[0012] Further, the time processing module comprises a time register and a timer, the time register adopts a year-month-day-second register, and the timer adopts a system subsecond timer.

[0013] Preferably, the counter capture channel is provided with an edge capture calculator.

[0014] The clock establishment and maintenance method of the time reference system described in the present application is as follows:

[0015] 1) The local RTC clock periodically sends out a 1Hz PPS pulse and time information;

[0016] 2) The PPS pulse is sent to the counter capture channel in the SOC, and the counter in the counter capture channel automatically accumulates with 10MHz as the clock source inside. Once the PPS edge triggers the capture channel, the value of the counter will be captured at this time;

[0017] 3) After each channel captures two edges, the difference in the count is sent to the trustworthiness calculation module of the channel;

[0018] 4) The trustworthiness calculation module compares the difference in the count with the standard deviation of the empirical value obtained by training. According to statistical theory, a new counter difference value within ±3σ of the training value is considered to be a real and effective signal. The trustworthiness calculation module will release the counter difference value of the channel to let it enter the priority selector;

[0019] 5) The priority selector will send the highest precision data into the local time maintenance system according to the precision priority order, and update the clock of the internal time processing module of the system;

[0020] 6) The system internally stores the year, month, day, hour, minute and second in BCD code in the local year, month, day, hour and minute register, and updates every second. The subsecond is maintained by the internal 32bit physical timer. When the second bit is updated, the difference between the selected trusted channel counter value and the trigger counter value is written into the subsecond timer to calibrate the data processing time of the SOC itself. The source of the subsecond timer and the clock source of the capture channel are the same, both of which are 10MHz. The timestamp accuracy of the internal time source can reach 100ns. Thus, the internal system clock has been established.

[0021] The time service process of the time reference system is as follows: when the system provides external time service, the corresponding interface driver layer directly accesses the local time register 91 and the subsecond timer 92, and multiplies the value of the subsecond timer 92 by a deviation correction coefficient to provide the time service timestamp for external devices.

[0022] The clock establishment and maintenance method of the time reference system described in the application, the time reference system starts in a blank state, and an empirical data needs to be provided as a boundary condition of the entire algorithm for subsequent iterative behavior, after the system is powered on, a clock initialization process is first executed and then a clock maintenance process is entered, and the specific clock initialization process is as follows: 1) initialize three channel timers, set the clock source of the timer to a 10MHz homogenous clock, set the mode of the timer to capture mode, and set three timer overflow interrupts at the same time, and record the carry behavior of the timer;

[0023] 2) wait for the successful initialization of the peripheral device, that is, an empirical data needs to be provided as a boundary condition of the entire algorithm for subsequent iterative behavior, after the system is powered on, a clock initialization process is first executed and then a clock maintenance process is entered;

[0024] 3) three channels start capturing the PPS signals of the GPS device (1), the 5G communication module (2) and the RTC clock (3), and record the value of the counter once every time the rising edge of PPS comes 𝑥,𝑏 , then calculate the counter difference between the two trigger edges, calculate C 𝑥𝑏 according to formula 1, and record C 𝑥𝑏 : Formula 1

[0025] Wherein, C represents the difference between the two times of triggering the counter by the PPS edge, x represents the channel number, and b represents the number of pulses;

[0026] After recording the 11th trigger, the average value μ of the counter is calculated according to formula 2 and formula 3 𝑥 and the standard deviation σ 𝑥 ,

[0027] Formula 2

[0028] Formula 3

[0029] x represents the channel number, and is recorded;

[0030] 4) set the decision condition according to the actual hardware index, the second pulse jitter of the PPS of the GPS device should not be greater than 10us, and the second pulse jitter of the PPS of the 5G device should not be greater than 30us, because the clock source of the counter is 10MHz, the theoretical equivalent clock period is 0.1us, the standard deviation σ1 of channel 1 should not be greater than 100, and the standard deviation σ2 of channel 2 should not be greater than 300; if the standard deviation σ 𝑥 is greater than the set value, it is determined that the data is invalid, the first pulse is discarded, the average value and the standard deviation are recalculated in the interval of the 11th pulse, and the timeout is issued;

[0031] The trustworthiness calculation module (5) will mark the data of the channel as untrustworthy, and the data will be replaced by the program's default empirical value, i.e., the worst-case indicator of the hardware specifications. Otherwise, the TMP of the corresponding channel will directly use the calculated value. 𝑥 With 𝜎 𝑥 Subsequent iterations are performed; while channel 2 calculates the deviation value from the trigger counters of channel 1 and channel 0 according to formula 4 for calculating the PPS edge error between channels, and sets the final deviation as φ. 𝑥 Send it to the priority selector, where x represents the channel number;

[0032] Formula 4;

[0033] 5) The priority selector will select the average value of the highest priority channel counters based on the trust instructions given by the TPM module. 𝑥 The clock signal from the corresponding hardware interface, including the integer second portion, is written to the system local register in BCD code format. The difference between the current count value of the selected trusted channel and the counter value at trigger time is Δt (see Formula 9). Δt is written to the system's 32-bit sub-second timer to eliminate errors generated during system processing and maintain the accuracy of the sub-second timer. Additionally, the correction coefficient N is calculated according to correction formula 5. The correction coefficient represents the ratio of the pulse count in 1 second absolute time to the theoretical pulse count of the local clock. The system clock correction coefficient calculation formula is as follows:

[0034] Formula 5

[0035] 6) Step Six: Transmit the correction factor N to the time synchronization driver layer. When the driver layer synchronizes time with an external device, it directly obtains the value of the internal timer and automatically multiplies it by the correction factor N to obtain the actual UTC time, thus completing the time synchronization of the external device.

[0036] 7): Overwrite the local RTC clock. To synchronize the local RTC clock with the most trusted time source, the step 4's 𝛥 needs to be overwritten during the write process. 𝑥 The parameter is used as a delay parameter to force the PPS clock edge of the local RTC clock to align with the PPS edge with the highest priority. Otherwise, when the reliability selector switches the clock source, sub-second time jitter will occur, causing a decrease in the timing accuracy of the entire system.

[0037] 8): After overwriting the local RTC clock, start the local PPS signal to complete a system clock initialization process.

[0038] The time reference correction system in the application has the following time service process: when the system provides time service to the outside, the corresponding interface driving layer directly accesses the local time register and sub-second timer, and then provides the time service time stamp for the external device after multiplying the value of the sub-second timer by a deviation correction coefficient.

[0039] The clock establishment and maintenance method of the time reference correction system in the application has the following clock maintenance process:

[0040] 1): three capture channels re-capture new pulse edges, and record the difference between the current calculator and the last round calculator ;

[0041] 2): channel 0 and channel 1 make trust judgment channels through the trustworthiness judgment formula 6, the channel data that does not meet the trustworthiness will be discarded, and an untrusted indication is given, so that the subsequent priority selector shields the data of the untrusted channel, and channel 2 belongs to the local oscillator and is not affected by the external environment, and does not need to be judged for trustworthiness, and is always in the lowest priority state, and needs to calculate the of channel 2 and channel 1 and channel 0 according to formula 4 respectively after each trigger, for subsequent PPS edge alignment calibration;

[0042] Formula 6

[0043] 3): when the trust condition is met, the average value of the current channel is re-iterated according to the moving window average value iteration formula 7 and the moving window standard deviation iteration formula 8 ; Formula 7 and formula 8 are as follows: ; Formula 7 and formula 8 are as follows:

[0044] Formula 7

[0045] Formula 8

[0046] 4): the priority selector selects the average value of the highest priority channel counter according to the trust indication given by the TPM module and the time service message of the corresponding hardware interface, the whole second part is written in the local register of the system in the format of BCD code, and the difference between the current count value of the selected trusted channel and the count value of the trigger is obtained, that is, ΔT, see formula 9 for the error generated by the system processing data, and ΔT is written into the 32-bit sub-second timer of the system to eliminate the error generated in the system processing process and maintain the precision of the sub-second timer; the correction coefficient N' is calculated according to the correction formula 5, and the correction coefficient represents the ratio of the pulse count of 1s absolute time to the theoretical pulse number of the local clock; the formula 9 for the error generated by the system processing data is as follows:

[0047] Formula 9;

[0048] Among them, 𝐸 𝑥,𝑏 This indicates the counter value of the channel when triggered, 𝑆 𝑥 The value of the channel counter after the channel data field message has been processed;

[0049] 5): The correction factor R′ is transmitted to the time synchronization driver layer. When synchronizing time with an external device, the driver layer directly obtains the value of the internal timer and automatically multiplies it by the correction factor R′ to obtain the actual UTC time, thus completing the time synchronization of the external device.

[0050] 6): Overwrite the local RTC clock. To synchronize the local RTC clock with the most trusted time source, the data from step two needs to be overwritten during the write process. The parameter is used as a delay parameter to force the PPS clock edge of the local RTC to align with the PPS edge with the highest priority. Otherwise, when the reliability selector switches the clock source, sub-second time jitter will occur, causing the timing accuracy of the entire system to decrease.

[0051] 7): After overwriting the local RTC clock, restart the local PPS signal to complete a system time maintenance process.

[0052] As can be seen from the above technical solution, the present invention has the following beneficial effects:

[0053] 1. The time reference correction system described in this invention improves and optimizes the system composition. Based on an embedded system scheme, a new time reference correction system is constructed through the combination of hardware and software. It combines GPS and 5G time sources, eliminating the time jitter caused by environmental factors when GPS is used alone. It has the advantages of no cumulative error and no jitter error of the local oscillator. By calibrating the periodic quasi-local oscillator through GPS time source or 5G network time source, the local time is kept synchronized with Coordinated Universal Time.

[0054] 2. An internal clock was constructed using a moving average method, effectively isolating the jitter behavior of the time synchronization source and improving the time synchronization accuracy. The larger the moving average window, the smaller the time synchronization jitter, but the more computational resources are consumed. However, the window size is adjustable by the algorithm, and can be adjusted according to the computing power of different systems to achieve a balance between accuracy and resources.

[0055] 3. This invention automatically corrects time deviations through iterative learning, becoming more stable as the system is used for longer periods; it enables the system to adapt to external environmental factors, effectively reducing the system's dependence on the environment.

[0056] 4. This invention effectively increases the accuracy and stability of the timing system by utilizing 5G signals. Attached Figure Description

[0057] Figure 1 This is a schematic diagram of the prior art mentioned in the background section of this invention;

[0058] Figure 2 This is a schematic diagram of the invention.

[0059] Figure 3 This is a flowchart of the clock correction system algorithm in this invention;

[0060] In the diagram: 1. GPS device; 2. 5G communication module; 3. RTC clock; 4. A set of counter capture channels; 5. A set of trustworthiness calculation modules; 6. Priority selector; 7. Coordinated Universal Time resolver; 8. Oscillator; 9. Time processing module; 10. Ethernet communication module; 91. Time register; 92. Subsecond timer. Detailed Implementation

[0061] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments.

[0062] Example

[0063] like Figures 2 to 3 The time reference correction system shown includes: external hardware devices, gateway hardware entities and control chips. The external hardware devices include a GPS device 1 and a set of sensors 10. The gateway hardware entities include a 5G communication module 2, an RTC clock 3 and a trusted data processing module. The trusted data processing module includes a set of trustworthiness calculation modules 5, a priority selector 6 and a Coordinated Universal Time resolver 7.

[0064] The control chip includes a set of counter capture channels 4, an oscillator 8, and a virtual clock module. The GPS device 1, 5G communication module 2, and RTC clock 3 are respectively telecom connected to their corresponding technical capture channels 4. Each counter capture channel 4 is connected to its corresponding trustworthiness calculation module 5, and one output of the trustworthiness calculation module 5 is connected to a priority selector 6. Another port of the GPS device 1, 5G communication module 2, and RTC clock 3 is connected to UTC through a Coordinated World Time (UTC) resolver 7. The other output port of the trustworthiness calculation module 5 is connected to the UTC resolver 7, and the output port of the UTC resolver 7 is connected to the priority selector 6.

[0065] The output of the priority selector 6 is connected to the virtual clock module;

[0066] The ports of the oscillator 8 are connected with the counter capture channel 4 connected with the GPS device 1 and the 5G communication module 2 and the virtual clock module respectively. It should be noted that the trusted data processing module is an embedded module.

[0067] It should be noted that Figure 1 The counter capture channel 4 in the middle is Edge capture-CH0 / 1 / 2, the trusted degree calculation module 5 is TPM / 1 / 2, the priority selector 6 is SWITCH, the coordinated universal time resolver 7 is an UTC chip (Coordinated Universal Time), the oscillator 8 is an XO 10MHz; the time register 91 is Y M D H M S T 1; the sub-second timer 92 is SYSTEM TIMER Sub-second.

[0068] The virtual clock module in the embodiment includes a time processing module 9 and a set of Ethernet communication modules 10, the output end of the priority selector 6 is connected with the input end of the time processing module 9, and the output end of the time processing module 9 is connected with the corresponding sensor through the Ethernet communication module 10; the time processing module 9 includes a time register 91 and a sub-second timer 92, the time register 91 adopts a year-month-day-second register, and the sub-second timer 92 adopts a system sub-second timer.

[0069] The counter capture channel 4 in the embodiment is provided with an edge capture calculator.

[0070] The clock establishment and maintenance method of the time reference correction system in the embodiment is as follows:

[0071] 1): The local RTC clock 3 periodically sends a 1Hz PPS (second pulse, frequency 1Hz) pulse and time service information;

[0072] 2): The PPS pulse is sent to the counter capture channel 4 in the SOC, and the counter in the counter capture channel 4 automatically accumulates with 10MHz as a clock source, and once the PPS edge triggers the capture channel 4, the value of the counter will be captured;

[0073] 3): After capturing the edges twice, the difference value of the counter is sent to the trusted degree calculation module 5 of the channel;

[0074] 4): The trusted degree calculation module 5 compares the difference value of the counter with the experience value obtained by training, and according to the statistical theory, a new counter difference value is considered to be a real and effective signal when the deviation of the new counter difference value from the training value is within ±3σ; the trusted degree calculation module 5 releases the counter difference value of the channel to make it enter the priority selector 6.

[0075] 5) Priority selector 6 will send the highest precision data into the local time maintenance system according to the precision priority order, and update the clock of the system internal time processing module 9;

[0076] 6) The system internally stores the year, month, day, hour, minute and second in BCD code in the local year, month, day, hour and minute register, and updates every second, while the subsecond is maintained by the 32-bit physical timer 92 inside the system, and the difference between the current selected trusted channel counter value and the counter value at the trigger time is written into the subsecond timer to calibrate the data processing time of the SOC itself when the second bit is updated; The source of the subsecond timer is the same as the clock source of the capture channel, both of which are 10MHz, and the timestamp precision of the internal time source can reach 100ns, and thus the system clock inside has been established.

[0077] It should be noted that the process of training in step 5) is to capture the first 10 PPS pulses at startup, and to obtain the reference average value μ and the standard deviation σ. The μ and σ are updated by continuously iterating the effective pulses.

[0078] The clock establishment and maintenance method of the time reference correction system described in the embodiment, the time reference correction system starts in a blank state, and an empirical data needs to be provided as a boundary condition of the entire algorithm for subsequent iterative behavior, after the system is powered on, a clock initialization process is first executed and then enters the clock maintenance process, and the specific clock initialization process is as follows: 1) Initialize the three channel timers, set the clock source of the timer to the same source clock of 10MHz, set the mode of the timer to capture mode, and set the overflow interrupt of the three timers, and record the carry behavior of the timer;

[0079] 2) Wait for the successful initialization of the peripheral device, that is, an empirical data needs to be provided as a boundary condition of the entire algorithm for subsequent iterative behavior, after the system is powered on, a clock initialization process is first executed and then enters the clock maintenance process;

[0080] 3) The three channels start capturing the PPS signals of the GPS device 1, the 5G communication module 2 and the RTC clock 3, and record the value of the counter E every time the PPS rising edge comes 𝑥,𝑏 Then calculate the counter difference value between the two trigger edges according to formula 1 to obtain C 𝑥𝑏 And record as C 𝑥𝑏 : Formula 1

[0081] Wherein, C represents the difference value of the counter triggered by the PPS edge twice, x represents the channel number, and b represents the number of pulses;

[0082] The average value of the counter is calculated according to the following formula 2 and formula 3 after the 11th record is triggered 𝑥 and the standard deviation σ 𝑥 ,

[0083] Formula 2

[0084] Formula 3

[0085] x represents the channel number, and the record is;

[0086] 4): According to the actual hardware index setting decision condition, the second pulse jitter of the PPS of the GPS equipment 1 normally time-granted should not be greater than 10us, and the second pulse jitter of the PPS of the 5G equipment 2 normally time-granted should not be greater than 30us, because the clock source of the counter is 10MHz, the theoretical equivalent clock period is 0.1us, the standard deviation σ1 of the channel 1 should not be greater than 100, and the σ2 of the channel 2 should not be greater than 300; if the standard deviation σ 𝑥 is greater than the set value, it is determined that the data is invalid, the first pulse is discarded, the average value and the standard deviation are recalculated in the 11th pulse interval, and the timeout is issued;

[0087] The credibility calculation module (5) will mark the data of the channel as untrusted, and the data will be replaced by the default experience value of the program, that is, the worst index of the hardware specification, otherwise the TMP of the corresponding channel will directly use the calculated μ 𝑥 and σ 𝑥 for subsequent iteration; and the channel 2 calculates the deviation value of the trigger counter of the channel 1 and the channel 0 according to the PPS edge error calculation formula 4 between the channels, and sends the last deviation Δ 𝑥 to the priority selector, and x represents the channel number.

[0088] Formula 4

[0089] 5): The priority selector will select the average value μ 𝑥 of the channel counter with the highest priority according to the trust indication given by the TPM module, and the time-granted message of the corresponding hardware interface, the whole second part is written in the system local register in the format of BCD code, and the difference between the current count value of the selected trusted channel and the value of the counter at the time of triggering is obtained as ΔT, see formula 9, Δ will be written into the 32bit subsecond timer of the system, eliminating the error generated in the system processing process and maintaining the accuracy of the subsecond timer; in addition, the correction coefficient N is calculated according to the correction formula 5, which represents the ratio of the pulse count of 1s absolute time to the theoretical pulse number of the local clock, and the system clock correction coefficient calculation formula is as follows:

[0090] Formula 5

[0091] 6) Step six: the correction coefficient N is communicated to the time service drive layer. When the drive layer time services external equipment, the drive layer directly obtains the value of the internal timer and automatically multiplies the correction coefficient N to obtain the real UTC time, completing the time synchronization of the external equipment;

[0092] 7) Overwrite the local RTC clock. In order to synchronize the local RTC clock 3 with the time source with the highest current trustworthiness, the Δt in step 4 is written as a delay parameter, forcing the PPS clock edge of the local RTC clock 3 to align with the PPS edge with the highest priority, otherwise, when the reliability selector switches the clock source, the time jitter of sub-second bits will be generated, causing the time service accuracy of the entire system to decrease; 𝑥

[0093] 8) After overwriting the local RTC clock 3, the local PPS signal is started, and a system clock initialization process is completed. It should be noted that the experience data in step 2 refers to the standard deviation σ of the PPS pulse period of the external time source equipment under normal conditions. This index is usually given by the manufacturer of the time service equipment, and is mostly between hundreds of ns and 1 us. Each manufacturer will be different.

[0094] In addition, the timer in step 1 refers to a pulse period capture timer, which is a timer for calculating the pulse period; the sub-second timer is a timer for maintaining the clock inside.

[0095] The clock establishment and maintenance method of the time reference correction system described in the embodiment is as follows:

[0096] 1) The three capture channels re-capture the new pulse edge, and record the difference between the current counter and the last round counter ;

[0097] 2) Channel 0 and channel 1 make a trust judgment through the trustworthiness judgment formula 6. The channel data that does not meet the trustworthiness will be discarded, and an untrusted indication is given, so that the subsequent priority selector shields the data of the untrusted channel. Channel 2 belongs to the local oscillator and is not affected by the external environment, and does not need to be judged for trustworthiness. It is always in the lowest priority state and needs to be calculated according to formula 4 every time it is triggered , for subsequent PPS edge alignment calibration;

[0098] Formula 6

[0099] 3) When the trust condition is met, the average value of the current channel is re-iterated according to the moving window average value iteration formula 7 and the moving window standard deviation iteration formula 8 ​with the standard deviation Equation 7 and Equation 8 are as follows:

[0100] Equation 7

[0101] Equation 8

[0102] 4) The priority selector selects the average value of the priority channel counter according to the trust indication given by the TPM module The time message corresponding to the hardware interface is written into the system local register in the format of BCD code for the whole second part, and the difference between the current count value of the selected trust channel and the value of the trigger counter is ΔT, which is written into the 32-bit sub-second timer of the system to eliminate the error generated in the system processing process and maintain the accuracy of the sub-second timer. The correction coefficient N' is calculated according to the correction formula 5, which represents the ratio of the pulse count of 1s absolute time to the theoretical pulse number of the local clock. The formula 9 for the error generated in the system processing data is as follows:

[0103] Equation 9

[0104] Wherein E 𝑥,𝑏 represents the value of the counter of the channel at the time of triggering, S 𝑥 the value of the counter of the channel after processing the channel data field message;

[0105] 5) The correction coefficient N' is transmitted to the time service driver layer. When time service is provided to external devices, the driver layer directly obtains the value of the internal timer and automatically multiplies the correction coefficient N' to obtain the real UTC time, thereby completing the time synchronization of the external device;

[0106] 6) Overwrite the local RTC clock. In order to synchronize the local RTC clock with the highest trust time source, the parameter S in step 2 is used as a delay parameter when writing, so as to force the PPS clock edge of the local RTC to align with the PPS edge with the highest priority, otherwise the time jitter of the sub-second bit will be generated when the reliability selector switches the clock source, which will cause the time service accuracy of the whole system to decrease;

[0107] 7) After overwriting the local RTC clock, the local PPS signal is restarted, and the system time maintenance process is completed.

[0108] It should be noted that the system internal clock is constructed by the method of sliding average of formula 7 and formula 8 in step 2), which effectively isolates the jitter behavior of the time service source and improves the time accuracy of the time service. The larger the window of the sliding average, the smaller the jitter of the time service, but more computing resources are consumed. However, the window size is adjustable in the algorithm, and the window size can be adjusted according to the operation capacity of different systems to balance between accuracy and resources.

[0109] In actual work process, it should be noted that the time reference of GPS receiver comes from the atomic clock of satellite, which can be considered as a clock without deviation, but the signal of GPS receiver will be affected by external environmental factors, and the clock signal output occasionally will produce jitter, once the jitter disappears, the accuracy of time service will also return to normal, and it can be considered that the GPS time service source will not have cumulative error. The local RTC and XO oscillator are composed of temperature compensated oscillator, which can be considered as not affected by environmental changes, but the absolute accuracy of local RTC and XO has deviation, if not calibrated, the deviation between local time and true coordinated time of GPS will become larger and larger, and it can be considered that the local oscillator will not have jitter error. The present application combines the advantages of both, when the GPS signal is judged effective by TPM (trusted parameter module), the system will use the accurate time of GPS to construct the local system clock, and at the same time, the RTC module is calibrated by higher accuracy source, when the GPS signal is judged as invalid by TPM (trusted parameter module), the SWITCH (priority selector) automatically switches 5G time service, the present application adds 5G communication module, uses the time service message SIB9 of 5G network to calibrate the local time, and increases the redundancy and robustness of the whole time correction system. When GPS and 5G modules are judged as untrusted by TMP, the SWITCH (priority selector) automatically switches to the local RTC time service source to maintain the local system clock without jitter.

[0110] The above only describes the preferred embodiments of the present application, and it should be noted that for ordinary skilled in the art, some improvements can be made without departing from the principles of the present application, and these improvements should also be considered as the protection scope of the present application.

Claims

1. A time reference correction system, characterized by: Include: System external hardware device, gateway hardware entity and control chip, the system external hardware device includes GPS device (1), a group of sensors (10), the gateway hardware entity includes 5G communication module (2), RTC clock (3) and trusted data processing module, wherein, the trusted data processing module includes a group of trustworthiness calculation module (5), priority selector (6) and coordinated universal time resolver (7); The control chip includes a group of counter capture channel (4), oscillator (8) and virtual clock module, the GPS device (1), 5G communication module (2), RTC clock (3) are respectively connected with corresponding counter capture channel (4) electric signal, each counter capture channel (4) is connected with corresponding trustworthiness calculation module (5), and the trustworthiness calculation module (5) one output end is connected with priority selector (6), another port in the GPS device (1), 5G communication module (2), RTC clock (3) is connected with UTC through coordinated universal time resolver (7), another output port of the trustworthiness calculation module (5) is connected with coordinated universal time resolver (7), and the output port of the coordinated universal time resolver (7) is connected with priority selector (6); The output end of the priority selector (6) is connected with the virtual clock module; The port of the oscillator (8) is connected with the counter capture channel (4) connected with the GPS device (1) and 5G communication module (2) and the virtual clock module respectively; The virtual clock module includes time processing module (9), the output end of the priority selector (6) is connected with the input end of the time processing module (9), the CAN-MAC, RGMII, UART terminal of the output end of the time processing module (9) is connected with corresponding external sensor (10) through CAN-PHY, ETH-PHY and RS232-PHY respectively, and the PWM of the output end of the time processing module (9) is connected with RS232-PHY and an external sensor (10) simultaneously; The time processing module (9) includes time register (91) and subsecond timer (92), the time register (91) adopts year-month-day-second register, and the subsecond timer (92) adopts system subsecond timer; The counter capture channel (4) is provided with edge capture calculator The clock establishment and maintenance method of the time reference correction system, the specific method steps are as follows: 1), the local RTC clock (3) will periodically send 1Hz PPS pulse and time service information; 2), the PPS pulse is sent to the counter capture channel (4) in the SOC, the counter in the counter capture channel (4) automatically accumulates with 10MHz as clock source, once the PPS edge triggers the capture channel (4), the value of the counter will be captured; 3), after each channel captures two edges, the difference value is sent to the trustworthiness calculation module (5) of the channel respectively. 4): The trustworthiness calculation module (5) compares the difference of the counter with the standard deviation of the empirical value obtained by training. According to statistical theory, a new counter difference deviating from the training value by ±3σ is considered to be a real and effective signal; the trustworthiness calculation module (5) will release the counter difference of the channel to let it enter the priority selector (6); 5): The priority selector (6) will send the data with the highest precision into the local time maintenance system according to the precision priority order, and update the clock of the system internal time processing module (9); 6): The system internally stores the year, month, day, hour, minute and second in BCD code in the local year, month, day, hour and minute register, and updates it every second, while the subsecond is maintained by the 32-bit physical subsecond timer (92) inside the system. When the second bit is updated, the difference between the currently selected trusted channel counter value and the counter value at the time of triggering is written into the subsecond timer to calibrate the data processing time of the SOC itself. The source of the subsecond timer is the same as the clock source of the capture channel, both of which are 10MHz. The timestamp accuracy of the internal time source can reach 100ns. At this point, the internal system clock has been established; The time reference correction system has the following time service process: When the system provides time service to the outside, the corresponding interface driver layer directly accesses the local time register (91) and the subsecond timer (92), and at the same time, the value of the subsecond timer (92) is multiplied by a deviation correction coefficient to provide the time service timestamp to the external device; The time reference correction system starts in a blank state, and needs to provide an empirical data as the boundary condition of the entire algorithm for subsequent iterative behavior. After the system is powered on, the clock initialization process is executed first, and then the clock maintenance process is entered. The specific clock is as follows: The initialization process is as follows: 1): Initialize the three channel timers, set the clock source of the timer to the same source clock of 10MHz, set the mode of the timer to capture mode, and set the overflow interrupt of the three timers. Record the carry behavior of the timer; 2): Wait for the external device initialization to be successful, that is, provide an empirical data as the boundary condition of the entire algorithm for subsequent iterative behavior. After the system is powered on, the clock initialization process is executed first, and then the clock maintenance process is entered; 3): three channels start to capture the PPS signal of GPS device (1), 5G communication module (2), RTC clock (3), and record the value of the counter when the rising edge of PPS comes each time Then calculate the counter difference between the two trigger edges, and calculate according to formula 1 And record as : Equation 1 Wherein, C represents the difference between the counter triggered by the PPS edge twice, x represents the channel number, and b represents the number of pulses; After the recording 11 is triggered, the average value of the counter is calculated according to the following equation 2 and equation 3 and the standard deviation , Equation 2 Equation 3 x represents the channel number and is recorded; 4): According to the actual hardware index setting decision condition, GPS device (1) normal timing PPS second pulse jitter should not be greater than 10us, for 5G device (2) normal PPS second pulse jitter should not be greater than 30us, because the clock source of the counter is 10MHz, the theoretical equivalent clock period is 0.1us, the standard deviation of channel 0 is calculated should not be greater than 100, the standard deviation of channel 1 should not be greater than 300; if the standard deviation is greater than the set value, it is determined that the data is invalid, the first pulse is discarded, the mean and standard deviation are recalculated in the 11th pulse interval, and the timeout is issued. The trustworthiness calculation module (5) will calibrate the data of the channel as untrustworthy, and the data will be replaced by the default experience value of the program, i.e. the worst indicator of the hardware specification, otherwise the trustworthiness calculation module (5) of the corresponding channel will directly use the calculated With Subsequent iterations are performed; while channel 2 calculates the deviation value of the trigger counter of channel 1 and channel 0 according to the PPS edge error calculation formula 4 between channels, and sends the last deviation to the priority selector, x represents the channel number; Formula 4; 5): priority selector (6) will select the priority of the highest channel counter according to the trust indication given by the TPM module The time message corresponding to the hardware interface, the whole second part is written in the system local register in the format of BCD code, and the difference between the current count value of the selected trust channel and the value of the trigger counter is obtained , see formula 9, delta will be written into the system 32 bit sub-second timer (92), eliminating the error generated in the system processing process, maintaining the accuracy of the sub-second timer (92); in addition, according to the correction formula 5, the correction coefficient N is calculated, which represents the ratio of the pulse count of 1s absolute time to the theoretical pulse number of the local clock, and the system clock correction coefficient calculation formula is as follows: Equation 5 6): Step six: transmit the correction coefficient N to the time service driver layer. When the driver layer provides time service to the external device, the driver layer directly obtains the value of the internal timer, and automatically multiplies the correction coefficient N to obtain the real UTC time, completing the time synchronization of the external device; 7): Overwrite the local RTC clock, in order to synchronize the local RTC clock (3) with the highest trust time source, write step four as a delay parameter, forcing the PPS clock edge of the local RTC clock (3) to align with the highest priority PPS edge, otherwise there will be sub-second bit time jitter when the reliability selector switches the clock source, causing the timing accuracy of the whole system to decrease; 8): After overwriting the local RTC clock (3), start the local PPS signal, and complete the system clock initialization process; The clock maintenance process is as follows: 1): three capture channels recapture the new pulse edge, record the difference between the current counter and the previous counter ; 2): Channel 0 and Channel 1 make trust judgment channel by trust decision formula 6, the channel data that does not satisfy the trust degree will be discarded, and an untrusted indication is given, so that the subsequent priority selector shields the data of the untrusted channel, and Channel 2 belongs to the local oscillator and is not affected by the external environment, and does not need to make trust degree judgment, and is always in the lowest priority state, and the , the PPS edge alignment calibration for the subsequent step; Formula 6 3): When the trust condition is met, the average value of the current channel is re-iterated according to the moving window average value iterative formula 7 and the moving window standard deviation iterative formula 8 and the standard deviation ; The formula 7 and the formula 8 are as follows: Equation 7 Formula 8: 4): the priority selector selects the average value of the priority channel counter according to the trust indication given by the trustworthiness calculation module (5) The time message corresponding to the hardware interface is written into the system local register in the format of BCD code for the whole second part, and the difference between the current count value of the selected trust channel and the value of the trigger counter is obtained See formula 9 for the error generated by the system processing data, The 32-bit sub-second timer to be written into the system eliminates the error generated in the system processing process, maintains the accuracy of the sub-second timer, and calculates the correction coefficient according to the correction formula 5 The correction coefficient represents the ratio of the pulse count of the 1s absolute time to the theoretical pulse number of the local clock; the formula 9 for the error generated by the system processing data is as follows: Equation 9; wherein represents the counter value of the channel at the time of triggering, the value of the counter of the channel after processing the channel data field packet 5): the correction coefficient is communicated to the drive layer of time service When time service is provided to external equipment, the drive layer directly obtains the value of the internal timer and automatically multiplies the correction coefficient to obtain the real UTC time and complete time synchronization of the external equipment 6): override local RTC clock, in order to synchronize local RTC clock with the highest trust time source, write step two parameters as delay parameters, force the local RTC PPS clock edge to align with the highest priority PPS edge, otherwise, when the reliability selector switches the clock source, the sub-second bit time jitter will be generated, which will cause the timing accuracy of the whole system to decrease. 7): After overwriting the local RTC clock, restart the local PPS signal, and complete the system time maintenance process.

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