A post-texturing preparation method for back contact battery

Abstract

The present invention belongs to the technical field of back contact batteries, and specifically relates to a post-texturing preparation method for back contact batteries, comprising: polishing in S01 includes a first pickling step, the first pickling adopts a first mixed solution containing hydrofluoric acid, hydrochloric acid, and ozone, and the concentration of ozone in the first mixed solution is adjusted so that a first oxide layer is formed on the surface of a silicon wafer, and the cleaning process after the texturing in S04 includes alkaline washing A and acid washing B, and the acid washing B is divided into two steps: first, a mask layer of a certain thickness is removed by an acid solution corrosion method containing hydrofluoric acid, and then a second mixed solution containing hydrofluoric acid, hydrochloric acid, and ozone is directly used for a second pickling; the concentration of ozone in the second mixed solution is adjusted so that a second oxide layer is formed on the back and front of the silicon wafer respectively. The present invention can improve the uniformity of each oxide layer and the open circuit voltage of the battery, and ultimately achieve the purpose of reducing production costs and improving battery efficiency.

Description

Technical Field

[0001] The invention belongs to the technical field of back contact batteries, and in particular relates to a post-texturing preparation method of a back contact battery. Background Art

[0002] At present, the method of cleaning the back contact battery after polishing or texturing process includes the following steps: ① alkaline washing: removing organic matter on the surface of the silicon wafer; ② acid washing: removing metal ions on the surface of the silicon wafer; ③ hydrofluoric acid pickling: removing the oxide layer on the surface of the silicon wafer, and a water washing step is required after each solution tank step; in this way, the battery efficiency can be maintained at a high level.

[0003] However, the above-mentioned method for preparing back-contact batteries has the following problems: on the one hand, more equipment tanks are required, which increases the occupied area of ​​the cleaning equipment; on the other hand, the consumption of chemical solution and the volume of wastewater to be treated also increase accordingly, increasing production costs.

[0004] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or known technology. Summary of the invention

[0005] The purpose of the present invention is to overcome the defect that the back contact battery preparation process in the prior art cannot take into account both low production cost and high battery efficiency, and to provide a post-texturing preparation method for a back contact battery, which can improve the uniformity of each oxide layer and the open circuit voltage of the battery, and ultimately achieve the purpose of reducing production costs and improving battery efficiency.

[0006] In order to achieve the above-mentioned purpose, the present invention provides a post-texturing preparation method for a back-contact battery, comprising: S01, double-sided polishing of a silicon wafer; S02, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer, wherein the first semiconductor layer comprises a first tunneling oxide layer and a first doped polysilicon layer; S03, then etching an opening on the back side to form a second semiconductor opening area; S04, then performing texturing and cleaning; S05, then forming a passivation layer and an anti-reflection layer on the front side of the silicon wafer; S06, secondary cleaning, removing the back side plating and backwashing; S07, then depositing a second semiconductor layer on the back side.

[0007] Among them, the polishing in S01 includes a first pickling step, the first pickling adopts a first mixed solution containing hydrofluoric acid, hydrochloric acid and ozone, and the concentration of ozone in the first mixed solution is adjusted to form a first oxide layer with a thickness of 0.5-1.0nm on the surface of the silicon wafer; and the first tunneling oxide layer in S02 is formed on the outer surface of the first oxide layer, and the deposition temperature of the first tunneling oxide layer is controlled at 550-700℃.

[0008] Among them, the cleaning process after texturing in S04 includes alkaline washing A and acid washing B, and the acid washing B is divided into two steps: first, a mask layer of partial thickness is removed by etching with an acidic solution containing hydrofluoric acid, and then a second mixed solution containing hydrofluoric acid, hydrochloric acid, and ozone is directly used for a second acid washing; the concentration of ozone in the second mixed solution is adjusted so that a second oxide layer with a thickness of 0.5-2.0nm is formed on the back and front of the silicon wafer, respectively, and the thickness of the second oxide layer is not less than the thickness of the first oxide layer; and the passivation layer in S05 includes a second tunneling oxide layer and a second doped amorphous silicon layer, the second tunneling oxide layer is formed on the outer surface of the second oxide layer, and the deposition temperature of the second tunneling oxide layer is controlled at 350-500°C.

[0009] In some preferred embodiments of the present invention, the thickness ratio of the first tunneling oxide layer to the first oxide layer is 1-4:1, and the thickness ratio of the second tunneling oxide layer to the second oxide layer is 0.5-6:1.

[0010] In some preferred embodiments of the present invention, the thickness ratio of the first oxide layer to the second oxide layer is 1:0.5-4.

[0011] In some preferred embodiments of the present invention, no water washing is performed between the two steps of pickling B in S04.

[0012] In some preferred embodiments of the present invention, the concentration of ozone in the first mixed solution is 20-30 ppm, and the concentration of ozone in the second mixed solution is 40-70 ppm.

[0013] In some preferred embodiments of the present invention, the concentrations of hydrofluoric acid and hydrochloric acid in the first mixed solution and the second mixed solution independently satisfy the following conditions: the concentration of hydrofluoric acid is 0.5wt%-2wt%, and the concentration of hydrochloric acid is 1wt%-4wt%.

[0014] In some preferred embodiments of the present invention, the pH of the first mixed solution and the second mixed solution are independently between 3.0 and 6.0.

[0015] In some preferred embodiments of the present invention, the conditions of the first pickling and the second pickling independently include: a reaction time of 60-180 s, and a reaction temperature of 20-25°C.

[0016] In some preferred embodiments of the present invention, a solution etching method is used to remove a partial thickness of the mask layer in the pickling B of S04, and the solution in the solution etching method is a third mixed solution containing hydrofluoric acid, hydrochloric acid and water, and the concentration of hydrofluoric acid in the third mixed solution is 5wt%-10wt%, and the concentration of hydrochloric acid is 1wt%-4wt%; the conditions of the solution etching method include: a processing temperature of 30°C-35°C, and a reaction time of 60-180s.

[0017] In some preferred embodiments of the present invention, the solution used for alkaline washing A in S04 is a mixed solution containing alkali and H2O2, wherein the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%; the conditions for alkaline washing A include: reaction temperature of 60-80°C, reaction time of 120-240s.

[0018] Preferably, the thickness of the mask layer partially removed in the pickling B is 50%-80% of the total thickness of the mask layer.

[0019] In some preferred embodiments of the present invention, the texturing liquid used in S04 is a mixed solution containing potassium hydroxide or sodium hydroxide, a texturing additive and water, wherein the mass percentage of potassium hydroxide or sodium hydroxide is 1wt%-5wt%, and the mass percentage of the texturing additive is 0.5wt%-1wt%; the texturing conditions include: the texturing time is 8-12min, and the texturing temperature is 75℃-85℃.

[0020] In some preferred embodiments of the present invention, the polishing in S01 further includes pre-cleaning, rough polishing, and alkali washing performed in sequence, followed by the first acid washing step, and water washing is performed after each of the multiple polishing steps.

[0021] In some preferred embodiments of the present invention, the polishing in S01 adopts at least one of the following processes:

[0022] Process 1: The solution used for the pre-cleaning is a mixed solution containing alkali and H2O2, the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%;

[0023] Process 2: The pre-cleaning conditions include: reaction temperature of 60-80°C, reaction time of 120-240s;

[0024] Process 3: The solution used for the rough polishing is a mixed solution containing alkali, polishing additives and water, the alkali is potassium hydroxide or sodium hydroxide, the concentration of the alkali is 1wt%-3wt%, and the concentration of the polishing additive is 0.5wt%-2wt%;

[0025] Process 4: The rough polishing conditions include: reaction temperature of 60°C-70°C, reaction time of 30-180s, single-side corrosion depth of 1-3μm;

[0026] Process 5: The alkali washing solution is a mixed solution containing alkali and H2O2, the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%;

[0027] Process 6: The conditions for the alkaline washing include: a reaction temperature of 60-80°C and a reaction time of 120-240s.

[0028] In some preferred embodiments of the present invention, the thickness of the first tunnel oxide layer in S01 is 1-2 nm, the thickness of the first doped polysilicon layer is 70-300 nm, and the effective doping concentration is greater than 5e18 cm -3 .

[0029] In some preferred embodiments of the present invention, the thickness of the second tunnel oxide layer in S05 is 1-3 nm, the thickness of the second doped amorphous silicon layer is 1-10 nm, and the effective doping concentration is 1e18 cm -3 -5e19cm -3 .

[0030] In some preferred embodiments of the present invention, a chain cleaning machine is used in S06 to remove the back side plating, and the solution used to remove the back side plating is an aqueous solution containing hydrofluoric acid, and the concentration of hydrofluoric acid in the aqueous solution containing hydrofluoric acid is 5wt%-10wt%. The conditions for removing the back side plating include: the reaction temperature is 20-35°C, and the transmission roller speed of the chain cleaning machine is 1.2-3.0m / min.

[0031] In some preferred embodiments of the present invention, a tank cleaning machine is used for backwashing in S06, and the backwashing process includes alkaline washing, acid washing, and hydrofluoric acid washing in sequence, wherein a water washing step is performed after each solution tank step.

[0032] In some preferred embodiments of the present invention, the second semiconductor layer includes an intrinsic amorphous silicon layer and a second doped silicon layer sequentially formed on the back side; the thickness of the intrinsic amorphous silicon layer is 5-15nm, the thickness of the second doped silicon layer is 5-20nm, and the effective doping concentration is 1e18cm -3 -9e20cm -3 .

[0033] In some preferred embodiments of the present invention, the post-texturing preparation method of the back contact battery further comprises:

[0034] After forming the first semiconductor layer on the back side of the silicon wafer in S02, a cleaning step is further performed to remove the phosphosilicate glass layer naturally formed on the surface of the first semiconductor layer, and then the mask layer is deposited;

[0035] S08, etching an opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region;

[0036] S09, depositing a conductive film layer on the back surface obtained in S08;

[0037] S10, performing a third etching opening on a portion of the conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove;

[0038] S11 , forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

[0039] Beneficial effects:

[0040] The present invention adopts the above-mentioned technical scheme, especially uses a first mixed solution of hydrofluoric acid, ozone and hydrochloric acid to perform the first pickling during polishing, which can micro-polish the surface of the silicon wafer, thereby further improving the flatness of the surface of the silicon wafer, and only requires one step of pickling, without multiple steps of pickling, which can simplify the polishing and cleaning steps, thereby reducing the occupied area and production cost of the cleaning equipment; at the same time; the present invention also adopts specific alkaline washing A and acid washing B in conjunction with the cleaning after the texturing step. The alkaline washing A after the texturing step can effectively remove the organic matter remaining on the surface of the silicon wafer, and the pickling B divided into two specific steps can achieve a good cleaning and passivation effect. At the same time, the surface of the silicon wafer is wet oxidized (i.e., corresponding to the pickling ) can grow an ultra-thin oxide layer, which cooperates with the subsequent high-temperature grown oxide layer to form a tunnel oxide layer structure (such as a structure composed of the first oxide layer and the first tunnel oxide layer, and another structure composed of the second oxide layer and the second tunnel oxide layer). Due to the formation of Si-O bonds in wet oxidation, the surface lattice differences of different orientations are shielded, resulting in the same oxidation rate of each crystal phase during the subsequent high-temperature oxidation of the corresponding tunnel oxide layer, making the subsequent growth of the corresponding tunnel oxide layer more uniform, improving the passivation performance of the film layer, thereby improving the uniformity of the oxide layer and the open circuit voltage of the battery, and ultimately achieving the purpose of reducing production costs and improving battery efficiency. Moreover, changing the corresponding pickling solution components after the polishing or texturing process can not only play the above-mentioned multiple roles, but also simplify the cleaning steps, thereby reducing the occupied area and production costs of the cleaning equipment.

[0041] In the present invention, hydrofluoric acid, hydrochloric acid and ozone are particularly added to the first mixed solution of the first pickling. Due to the strong oxidizing property of ozone, a thin first oxide layer will be immediately formed on the surface of the silicon wafer. Under the action of hydrofluoric acid, at least part of the first oxide layer will be immediately removed. During the reaction time, oxidation and removal are repeated, so that the surface of the silicon wafer can be micro-polished, and the flatness of the silicon wafer surface and the passivation performance of the film layer can be further improved. Compared with the existing process, the reflectivity of the silicon wafer surface after micro-polishing can be increased by about 1%-2%; hydrochloric acid is also added, which can remove metal ions on the surface of the silicon wafer on the one hand, and maintain the pH value of the solution between 3.0-6.0 on the other hand, thereby enhancing the stability of ozone in the solution. Moreover, the present invention controls the ozone concentration in the second pickling to be much higher than the ozone concentration in the first mixed solution in the first pickling of S01. Under this condition, the oxidation rate is much higher than the etching rate, and a relatively thick second oxide layer will grow in the corresponding opening areas on the front and back of the silicon wafer, which is conducive to blocking the plating of the front film layer on the back in the S05 step. In the subsequent cleaning process, the plating can be removed by removing the oxide layer of the bottom layer on the back. Compared with the conventional method, the step of using alkaline solution to remove the passivation film layer is omitted, and the damage of the alkaline solution to the back polycrystalline is avoided, thereby improving the passivation performance of the back film layer.

[0042] In the present invention, no water washing is performed between the two steps of pickling B in S04. That is, there is no need to pass through a water tank between the two steps of pickling B, which saves a water tank compared to the conventional cleaning process; at the same time, after two steps of pickling with a solution of hydrofluoric acid and hydrochloric acid, the interface is cleaner, achieving a good cleaning and passivation effect. DETAILED DESCRIPTION

[0043] In the present invention, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0044] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0045] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article. Among them, the terms "optional" and "optional" all mean that they may be included or not included (or may be present or not).

[0046] In the present invention, the area close to the silicon wafer is referred to as the inside, and the area far from the silicon wafer is referred to as the outside.

[0047] The present invention provides a post-texturing preparation method for a back-contact battery, comprising: S01, double-sided polishing of a silicon wafer; S02, forming a first semiconductor layer and a mask layer on the back side of the silicon wafer, wherein the first semiconductor layer comprises a first tunneling oxide layer and a first doped polysilicon layer; S03, then etching an opening on the back side to form a second semiconductor opening area; S04, then performing texturing and cleaning; S05, then forming a passivation layer and an anti-reflection layer on the front side of the silicon wafer; S06, secondary cleaning, removing the back side wrap plating and backwashing; S07, then depositing a second semiconductor layer on the back side.

[0048] Among them, the polishing in S01 includes a first pickling step, the first pickling adopts a first mixed solution containing hydrofluoric acid, hydrochloric acid and ozone, and the concentration of ozone in the first mixed solution is adjusted so that a first oxide layer with a thickness of 0.5-1.0nm is formed on the surface of the silicon wafer; and the first tunneling oxide layer in S02 is formed on the outer surface of the first oxide layer, and the deposition temperature of the first tunneling oxide layer is controlled at 550-700° C. The preferred S01 polishing and S02 first semiconductor layer preparation process are adopted to effectively improve the passivation performance of the film layer, thereby improving the uniformity of the oxide layer and the open circuit voltage of the battery, and ultimately achieving the purpose of reducing production costs and improving battery efficiency.

[0049] Preferably, the thickness of the mask layer is 60-90 nm.

[0050] Among them, the cleaning process after texturing in S04 includes alkaline cleaning A and acid cleaning B, and the acid cleaning B is divided into two steps: first, a mask layer of a certain thickness is removed by etching with an acid solution containing hydrofluoric acid, and then a second mixed solution containing hydrofluoric acid, hydrochloric acid, and ozone is directly used for a second acid cleaning; the concentration of ozone in the second mixed solution is adjusted so that a second oxide layer with a thickness of 0.5-2.0nm is formed on the back and front of the silicon wafer, respectively, and the thickness of the second oxide layer is not less than the thickness of the first oxide layer; and the passivation layer in S05 includes a second tunneling oxide layer and a second doped amorphous silicon layer, and the second tunneling oxide layer is formed on the outer surface of the second oxide layer, and the deposition temperature of the second tunneling oxide layer is controlled at 350-500°C. The use of this preferred post-texturing cleaning process, combined with the specific structure of the passivation layer and its deposition temperature, is conducive to significantly improving the passivation performance of the film layer.

[0051] In some preferred embodiments of the present invention, the thickness ratio of the first tunneling oxide layer to the first oxide layer is 1-4:1, preferably 1.5-3.0:1, which is more conducive to controlling the overall uniformity of the tunneling oxide layer on the polishing surface.

[0052] Preferably, the thickness ratio of the second tunneling oxide layer to the second oxide layer is 0.5-6:1, preferably 2.0-6.0:1, which is more conducive to controlling the overall uniformity of the tunneling oxide layer on the textured surface.

[0053] The deposition method of the first tunnel oxide layer and the second tunnel oxide layer in the present invention can refer to the method in the prior art, as long as the target thickness is deposited at the above-mentioned target temperature, for example, LPCVD equipment or tubular PECVD equipment can be used.

[0054] Preferably, the first tunnel oxide layer is formed by LPCVD, and the second tunnel oxide layer is formed by tubular PECVD.

[0055] Further preferably, the first tunnel oxide layer is formed by LPCVD method, wherein the deposition condition of the first tunnel oxide layer is oxygen permeation, and the deposition time is 5-60 minutes. Since the first tunnel oxide layer grows at high temperature on the polishing surface, the oxide layer is very uniform and does not need to be controlled by adding nitrogen.

[0056] Further preferably, the second tunnel oxide layer is formed by a tubular PECVD high temperature oxidation method, the deposition conditions are to introduce a mixture of laughing gas and an inert gas (such as nitrogen or argon), and the deposition time is 5-40 minutes. The second tunnel oxide layer grows on the textured surface, adding an inert gas, and slowly depositing the tunnel oxide layer at a low temperature is more conducive to the uniformity of the oxide layer.

[0057] In some preferred embodiments of the present invention, the thickness ratio of the first oxide layer to the second oxide layer is 1:0.5-4, preferably 1:1.2-1.7, which is more conducive to matching the passivation requirements of polycrystalline with different thicknesses on the front and back sides, thereby improving the open circuit voltage of the battery.

[0058] In some preferred embodiments of the present invention, the concentration of ozone in the first mixed solution is 20-30 ppm, and the concentration of ozone in the second mixed solution is 40-70 ppm. The present invention adopts the preferred different ozone concentrations in different processes to meet the requirements of different thicknesses of the first oxide layer and the second oxide layer.

[0059] In some preferred embodiments of the present invention, the concentrations of hydrofluoric acid and hydrochloric acid in the first mixed solution and the second mixed solution independently satisfy: the concentration of hydrofluoric acid is 0.5wt%-2wt%, and the concentration of hydrochloric acid is 1wt%-4wt%. Using appropriate concentrations of hydrofluoric acid and hydrochloric acid is more conducive to improving the cleaning and passivation effect.

[0060] In some preferred embodiments of the present invention, the pH of the first mixed solution and the second mixed solution are independently between 3.0 and 6.0, which is more conducive to improving the stability of ozone, thereby improving the uniformity of the first oxide layer and the second oxide layer.

[0061] In some preferred embodiments of the present invention, the conditions of the first pickling and the second pickling independently include: a reaction time of 60-180 s, and a reaction temperature of 20-25° C. The conditions of the first pickling and the second pickling can be the same or different and can be selected according to requirements.

[0062] In some preferred embodiments of the present invention, a solution etching method is used to remove a portion of the thickness of the mask layer (i.e., thin the mask layer) in the pickling B of S04. The solution in the solution etching method is a third mixed solution comprising hydrofluoric acid, hydrochloric acid and water. The concentration of hydrofluoric acid in the third mixed solution is 5wt%-10wt%, and the concentration of hydrochloric acid is 1wt%-4wt%.

[0063] In some preferred embodiments of the present invention, the conditions of the solution etching method include: a processing temperature of 30° C.-35° C., and a reaction time of 60-180 s.

[0064] Preferably, the thickness of the mask layer partially removed in the pickling B is 50%-80% of the total thickness of the mask layer. Thinning the mask layer to a suitable thickness is more conducive to protecting the passivation layer from damage in subsequent processes.

[0065] In some preferred embodiments of the present invention, the solution used for alkaline washing A in S04 is a mixed solution containing alkali and H2O2, wherein the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%.

[0066] In some preferred embodiments of the present invention, the conditions of alkaline washing A include: reaction temperature of 60-80° C., and reaction time of 120-240 s.

[0067] The present invention adopts the alkaline washing A under the above-mentioned suitable conditions, which is more conducive to ensuring the cleaning effect.

[0068] In some preferred embodiments of the present invention, the texturing liquid used in S04 is a mixed solution containing potassium hydroxide or sodium hydroxide, a texturing additive and water, wherein the mass percentage of potassium hydroxide or sodium hydroxide is 1wt%-5wt%, and the mass percentage of the texturing additive is 0.5wt%-1wt%.

[0069] In some preferred embodiments of the present invention, the texturing conditions include: the texturing time is 8-12 minutes, and the texturing temperature is 75°C-85°C.

[0070] In some preferred embodiments of the present invention, the polishing in S01 further includes pre-cleaning, rough polishing, and alkali washing performed in sequence, followed by the first pickling step, and water washing is performed after each of the multiple steps of polishing. The present invention uses pre-cleaning to remove dirt on the surface of the silicon wafer, rough polishing to remove the cutting damage layer of the silicon wafer and improve the surface flatness, and alkali washing to remove organic matter remaining on the surface of the silicon wafer, which is more conducive to improving the flatness and cleanliness of the silicon wafer surface in conjunction with the first pickling step.

[0071] In some preferred embodiments of the present invention, in S01, the solution used for the pre-cleaning is a mixed solution containing alkali and H2O2, the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%.

[0072] In some preferred embodiments of the present invention, the pre-cleaning conditions include: a reaction temperature of 60-80° C. and a reaction time of 120-240 s.

[0073] In some preferred embodiments of the present invention, the solution used for rough polishing is a mixed solution containing alkali, polishing additives and water, the alkali is potassium hydroxide or sodium hydroxide, the concentration of the alkali is 1wt%-3wt%, and the concentration of the polishing additive is 0.5wt%-2wt%.

[0074] In some preferred embodiments of the present invention, the rough polishing conditions include: reaction temperature of 60°C-70°C, reaction time of 30-180s, and single-side etching depth of 1-3 μm. Controlling the rough polishing conditions is more conducive to ensuring the flatness of the silicon wafer surface.

[0075] In some preferred embodiments of the present invention, the alkali washing solution is a mixed solution containing alkali and H2O2, the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%. The present invention adopts the preferred alkali washing conditions, which is more conducive to effectively removing the residual organic matter on the surface of the silicon wafer.

[0076] In some preferred embodiments of the present invention, the conditions for the alkaline washing include: a reaction temperature of 60-80° C. and a reaction time of 120-240 s.

[0077] In some preferred embodiments of the present invention, the thickness of the first tunnel oxide layer in S01 is 1-2 nm, the thickness of the first doped polysilicon layer is 70-300 nm, and the effective doping concentration is greater than 5e18 cm -3 .

[0078] In some preferred embodiments of the present invention, the thickness of the second tunnel oxide layer in S05 is 0.5-2.5 nm, the thickness of the second doped amorphous silicon layer is 1-10 nm, and the effective doping concentration is 1e18 cm -3 -5e19cm -3 Using a second tunneling oxide layer of suitable thickness and a second doped amorphous silicon layer of specific thickness and doping concentration as the passivation layer is more conducive to reducing the parasitic absorption of the front film layer while ensuring the passivation effect.

[0079] In some preferred embodiments of the present invention, a chain cleaning machine is used in S06 to remove the back-side plating. The chain cleaning machine is used to remove the back-side plating of the film layer. Since the oxide layer generated on the back can prevent the polycrystalline film layer and the anti-reflection film layer from being deposited in the back opening area and the non-opening area, the plating can be removed only by removing the oxide layer. Compared with the conventional method, the step of using alkaline solution to remove the passivation film layer is omitted; at the same time, the damage of the alkaline solution to the back polycrystalline is avoided, and the passivation performance of the back film layer is improved.

[0080] Preferably, the solution used to remove the back side plating is an aqueous solution containing hydrofluoric acid, and the concentration of hydrofluoric acid in the aqueous solution containing hydrofluoric acid is 5wt%-10wt%.

[0081] In some preferred embodiments of the present invention, the conditions for removing the back side coating include: the reaction temperature is 20-35°C, and the transmission roller speed of the chain cleaning machine is 1.2-3.0m / min. This preferred scheme is more conducive to effectively removing the back bottom layer and the coating layer above.

[0082] In some preferred embodiments of the present invention, a tank cleaning machine is used for backwashing in S06, and the backwashing process includes alkali washing, acid washing, and hydrofluoric acid washing in sequence, wherein a water washing step is performed after each solution tank step. This preferred solution is more conducive to improving the interface cleanliness of the back opening area.

[0083] In some preferred embodiments of the present invention, the second semiconductor layer includes an intrinsic amorphous silicon layer and a second doped silicon layer sequentially formed on the back side. The combined passivation structure has a good passivation effect, and is more conducive to improving the open circuit voltage and battery efficiency of the battery in combination with a specific polishing process and a post-texturing cleaning process.

[0084] Preferably, the thickness of the intrinsic amorphous silicon layer is 5-15 nm, the thickness of the second doped silicon layer is 5-20 nm, and the effective doping concentration is 1e18 cm -3 -9e20cm -3 .

[0085] In S02, a phosphosilicate glass layer is naturally formed while forming the first semiconductor layer. In some preferred embodiments of the present invention, the post-texturing preparation method of the back contact battery also includes: after forming the first semiconductor layer on the back of the silicon wafer in S02, a cleaning step is performed to remove the phosphosilicate glass layer naturally formed on the surface of the first semiconductor layer, and then the mask layer is deposited. The removal of the phosphosilicate glass layer naturally formed on the surface of the first semiconductor layer preferably uses a solution containing hydrofluoric acid, the concentration of hydrofluoric acid is 1wt%-5wt%, and the process conditions used include: reaction time of 60-180s, reaction temperature of 20-30°C.

[0086] The types and thicknesses of the mask layer and the anti-reflection layer can refer to the prior art, and can be used in the present invention, so they will not be described in detail here.

[0087] In some preferred embodiments of the present invention, the post-texturing preparation method of the back contact battery further comprises:

[0088] S08, etching an opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region;

[0089] S09, depositing a conductive film layer on the back surface obtained in S08;

[0090] S10, performing a third etching opening on a portion of the conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove;

[0091] S11 , forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

[0092] The embodiments of the present invention are described in detail below, which are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0093] Example 1

[0094] A back contact battery is prepared by the following post-texturing preparation method:

[0095] S1, provide double-sided polished silicon wafers;

[0096] Double-sided polishing and cleaning of N-type single crystal silicon wafers, the polishing and cleaning method comprises the following steps:

[0097] Pre-cleaning - rough polishing - alkali washing - first acid washing, in which a water washing step is required after each solution tank step.

[0098] The pre-cleaning solution is a mixed solution of NH4OH and H2O2, the concentration of NH4OH is 3wt%, the concentration of H2O2 is 4wt%, the reaction temperature is 70°C, and the reaction time is 180s.

[0099] The rough polishing solution is a mixed solution of alkali, polishing additive and water, wherein the alkali is 2wt% potassium hydroxide, the concentration of the polishing additive is 1wt%, the reaction temperature is 70°C, the reaction time is 150s, and the single-side corrosion depth is 2μm.

[0100] The alkaline washing solution is a mixed solution of NH4OH and H2O2, the concentration of NH4OH is 3wt%, the concentration of H2O2 is 4wt%, the reaction temperature is 70°C, and the reaction time is 180s. Alkaline washing after the polishing step can remove organic matter remaining on the surface of the silicon wafer.

[0101] The first pickling solution is a first mixed solution of hydrofluoric acid, hydrochloric acid and ozone, the concentration of hydrofluoric acid is 1wt%, the concentration of hydrochloric acid is 2wt%, the concentration of ozone is 25ppm, the pH of the first mixed solution is 5.8, the reaction time is 100s, and the reaction temperature is 25°C; a first oxide layer with a thickness of 0.8nm is formed on the surface of the silicon wafer. One-step pickling can simplify the polishing and cleaning steps, thereby reducing the occupied area and production cost of the cleaning equipment.

[0102] S2, forming a first semiconductor layer on the back side of the silicon wafer, the first semiconductor layer comprising a first tunneling silicon oxide layer and a first doped N-type polysilicon layer sequentially formed on the back side;

[0103] The thickness of the first tunneling silicon oxide layer is 1.8 nm, and it is formed by LPCVD method, and the deposition conditions are oxygen flow, temperature of 600°C, and deposition time of 30 min; the thickness of the first doped N-type polycrystalline layer is 100 nm, and the effective doping concentration is 5e20 cm -3 , formed by LPCVD method.

[0104] S3, cleaning and removing the PSG layer on the surface of the first semiconductor layer;

[0105] The solution for removing the PSG layer is a solution containing hydrofluoric acid, the concentration of hydrofluoric acid is 2 wt %, the reaction time is 90 s, and the reaction temperature is 25° C.

[0106] S4. Depositing a mask layer of silicon nitride on the first semiconductor layer, the thickness of the mask layer is 80 nm.

[0107] S5, performing a first etching on the first semiconductor on the mask layer on the back side of the S4 silicon wafer to remove the mask layer and a portion of the first semiconductor layer in the target area to form second semiconductor opening areas distributed at intervals;

[0108] S6, forming a texture surface in the second semiconductor opening region on the back side and the front side simultaneously through texturing and cleaning, and removing a portion of the mask layer;

[0109] The texturing liquid used is a mixed solution of potassium hydroxide, texturing additive (commercially available) and water, in which the mass percentage of potassium hydroxide is 2wt%, and the mass percentage of texturing additive is 0.5wt%; the texturing time is 10min, and the texturing temperature is 80℃.

[0110] The post-texturing cleaning method includes alkaline cleaning A and acid cleaning B;

[0111] The solution used for alkaline washing A is a mixed solution of NH4OH and H2O2, with an NH4OH concentration of 3wt%, an H2O2 concentration of 4wt%, a reaction temperature of 70°C, and a reaction time of 180s. Alkaline washing after the texturing step can effectively remove organic matter remaining on the surface of the silicon wafer.

[0112] Pickling B is carried out in two steps:

[0113] The first step is to remove 60% of the thickness of the mask layer (i.e., thinning the mask layer). The method for removing part of the mask layer is a solution etching method. The solution is a mixed solution of hydrofluoric acid, hydrochloric acid and water. The concentration of hydrofluoric acid is 5wt%, the concentration of hydrochloric acid is 1wt%, the processing temperature is 30°C, and the reaction time is 150s.

[0114] The second pickling solution is a second mixed solution of hydrofluoric acid, hydrochloric acid and ozone, with a hydrofluoric acid concentration of 0.5wt%, a hydrochloric acid concentration of 2wt%, an ozone concentration of 50ppm, a reaction time of 160s, a reaction temperature of 25°C, and a second oxide layer with a thickness of 1.2nm formed on the surface of the silicon wafer. The pH of the second mixed solution is 5.6.

[0115] S7. Forming a passivation layer and an anti-reflection layer on the front side of the silicon wafer; the anti-reflection layer is a silicon nitride anti-reflection layer.

[0116] The passivation layer includes a second tunneling silicon oxide layer and a second N-type doped amorphous layer, and the second tunneling silicon oxide layer and the second N-type doped amorphous layer are formed by a tubular PECVD method;

[0117] The thickness of the second tunneling silicon oxide layer is 2.5 nm, and it is formed by high-temperature oxidation. The deposition conditions are as follows: a mixture of nitrogen and nitrous oxide is introduced, the temperature is 450°C, and the deposition time is 20 min. The thickness of the second N-type doped amorphous layer is 5 nm, and the effective doping concentration is 1e19 cm -3 ;

[0118] S8, secondary cleaning, removing the back side of the plating and backwashing;

[0119] A chain cleaning machine is used to remove the wrap-around plating of the back film layer. Since the oxide layer generated on the back can block the polycrystalline film layer and the anti-reflection film layer from being deposited in the back opening area and non-opening area, the wrap-around plating can be removed by removing the oxide layer alone. Compared with conventional methods, the step of using alkali solution to remove the passivation film layer is omitted, and at the same time, the damage of the alkali solution to the back polycrystalline is avoided, thereby improving the passivation performance of the back film layer.

[0120] The solution for removing the wrapping plating is an aqueous solution containing hydrofluoric acid, the concentration of hydrofluoric acid is 8wt%, the reaction temperature is 30°C, and the speed of the chain machine driving roller is 2.0m / min.

[0121] A tank cleaning machine is used for backwashing, and the backwashing process is alkaline washing-acid washing-hydrofluoric acid pickling, wherein a water washing step is required after each solution tank step.

[0122] S9, forming a second semiconductor layer on the back side, wherein the second semiconductor layer includes an intrinsic amorphous silicon layer and a second doped P-type amorphous silicon layer sequentially formed on the back side;

[0123] The thickness of the intrinsic amorphous silicon layer is 10 nm, the thickness of the second doped P-type amorphous silicon layer is 15 nm, and the effective doping concentration is 3e19 cm -3 .

[0124] S10, performing a second etching on the polishing area on the back side of the silicon wafer to remove the second semiconductor layer and the retained mask layer to form a first semiconductor opening area;

[0125] S11, forming a conductive film layer on the back side of the silicon wafer to fully cover the entire surface;

[0126] S12, performing a third etching on the conductive film layer between the texturing area and the polishing area on the back side of the silicon wafer to form an isolation groove, wherein the isolation groove is located between the first semiconductor opening area and the second semiconductor opening area;

[0127] S13, forming metal electrodes on the outer surfaces of the corresponding areas of the first semiconductor opening area and the second semiconductor opening area on the back side of the silicon wafer.

[0128] Example 2

[0129] The method of Example 1 is referred to, except that the thickness of the first oxide layer is adjusted to 0.5 nm, and the ozone concentration in the corresponding preparation is adjusted to 20 ppm to meet this condition. According to calculation, the thickness ratio of the first tunneling oxide layer to the first oxide layer is 3.6:1, and the thickness ratio of the first oxide layer to the second oxide layer is 1:2.4.

[0130] Example 3

[0131] The method of Example 1 is referred to, except that the thickness of the second oxide layer is adjusted to 1.5 nm, and the ozone concentration in the corresponding preparation is adjusted to 60 ppm to meet this condition. After calculation, the thickness ratio of the second tunneling oxide layer to the second oxide layer is 1.67:1, and the thickness ratio of the first oxide layer to the second oxide layer is 1:1.88.

[0132] Example 4

[0133] The method of Example 1 was followed, except that the concentration of hydrofluoric acid in the second mixed solution was adjusted to 0.8 wt %, the concentrations of hydrochloric acid and ozone remained unchanged, and water was used to make up the balance. The pH of the second mixed solution was 5.6.

[0134] Example 5

[0135] The method of Example 1 was followed, except that the concentration of hydrochloric acid in the second mixed solution was adjusted to 3.5 wt %, the concentrations of hydrofluoric acid and ozone remained unchanged, and water was used to make up the balance. The pH of the second mixed solution was 4.5.

[0136] Comparative Example 1

[0137] The method of Example 1 is referred to, except that ozone is not added to the first mixed solution and the first oxide layer is not formed.

[0138] Comparative Example 2

[0139] The method of Example 1 is referred to, except that the thickness of the first oxide layer in S1 is adjusted to 1.5 nm, and the ozone concentration in the corresponding preparation is adjusted to 60 ppm to meet this condition.

[0140] Comparative Example 3

[0141] The method of Example 1 is referred to, except that ozone is not added to the second mixed solution, and the second oxide layer is not formed. In the subsequent cleaning process, the winding plating is removed and then the cold alkali is used for backwashing. The cold alkali cleaning conditions are a solution containing 3wt% potassium hydroxide + 0.5wt% hydrogen peroxide, the solution temperature is 30°C, and the cleaning time is 90s.

[0142] Comparative Example 4

[0143] The method of Example 1 is referred to, except that the thickness of the second oxide layer in S6 is adjusted to 0.5 nm, and the ozone concentration in the corresponding preparation is adjusted to 20 ppm to meet this condition.

[0144] Test Case

[0145] The back contact cells obtained in the above embodiments and comparative examples were subjected to performance tests, and the results are shown in Table 1. Among them, after forming the first tunneling silicon oxide layer and the second tunneling silicon oxide layer, the uniformity of the oxide layer in the corresponding cell was tested respectively (such as after forming the first tunneling silicon oxide layer, the uniformity of the oxide layer formed by the first oxide layer and the first tunneling silicon oxide layer was tested). The uniformity test method of the oxide layer is: using an ellipsometer to detect the oxide layer thickness at different positions in the same cell, and calculating the uniformity according to the following formula: Uniformity = (Dmax-Dmin) / 2Dave×100%, where Dmax is the maximum film thickness in the same cell, Dmin is the minimum film thickness in the same cell, and Dave is the average value of the film thickness at five positions in the same cell (the five positions are the four corners and the middle position on the plane of the same cell). The uniformity must be <5% to meet the standard, and the lower the value within this range, the better.

[0146] Table 1

[0147]

[0148] It can be seen from the above results that, compared with the comparative example, the embodiment scheme of the present invention can improve the uniformity of each oxide layer and increase the open circuit voltage and short circuit current of the battery, ultimately achieving the purpose of reducing production costs and improving battery efficiency.

[0149] Furthermore, according to Example 1 and Examples 2-5, it can be seen that the preferred solution of the present invention is more conducive to improving the uniformity of each oxide layer and increasing the open circuit voltage of the battery, thereby improving the battery efficiency.

[0150] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited thereto. Within the technical concept of the present invention, the technical solution of the present invention can be subjected to a variety of simple modifications, including the combination of various technical features in any other suitable manner, and these simple modifications and combinations should also be regarded as the contents disclosed by the present invention and belong to the protection scope of the present invention.

Claims

1. A post-texturing preparation method for a back contact battery, comprising: S01, double-sided polishing of silicon wafer; S02, forming a first semiconductor layer and a mask layer on the back of the silicon wafer, wherein the first semiconductor layer includes a first tunneling oxide layer and a first doped polysilicon layer; S03, then etching an opening on the back to form a second semiconductor opening area; S04, then performing texturing and cleaning; S05, then forming a passivation layer and an anti-reflection layer on the front of the silicon wafer; S06, performing secondary cleaning to remove the back-plating backwash; S07, then depositing a second semiconductor layer on the back; it is characterized in that, The polishing in S01 includes a first pickling step, wherein the first pickling adopts a first mixed solution comprising hydrofluoric acid, hydrochloric acid and ozone, and the concentration of ozone in the first mixed solution is adjusted so that a first oxide layer with a thickness of 0.5-1.0 nm is formed on the surface of the silicon wafer; and the first tunneling oxide layer in S02 is formed on the outer surface of the first oxide layer, and the deposition temperature of the first tunneling oxide layer is controlled at 550-700° C.; The cleaning process after texturing in S04 includes alkaline washing A and acid washing B, and the acid washing B is divided into two steps: first, a mask layer of part thickness is removed by etching with an acidic solution containing hydrofluoric acid, and then a second mixed solution containing hydrofluoric acid, hydrochloric acid and ozone is directly used for a second acid washing; the concentration of ozone in the second mixed solution is adjusted so that a second oxide layer with a thickness of 0.5-2.0nm is formed on the back and front of the silicon wafer, respectively, and the thickness of the second oxide layer is not less than the thickness of the first oxide layer; and the passivation layer in S05 includes a second tunneling oxide layer and a second doped amorphous silicon layer, the second tunneling oxide layer is formed on the outer surface of the second oxide layer, and the deposition temperature of the second tunneling oxide layer is controlled at 350-500°C.

2. The post-texturing preparation method of the back contact battery according to claim 1, characterized in that: The thickness ratio of the first tunneling oxide layer to the first oxide layer is 1-4:1, and the thickness ratio of the second tunneling oxide layer to the second oxide layer is 0.5-6:1; And / or, the thickness ratio of the first oxide layer to the second oxide layer is 1:0.5-4.

3. The post-texturing preparation method of the back contact battery according to claim 1, characterized in that: No water washing is performed between the two steps of pickling B in S04, and / or, The concentration of ozone in the first mixed solution is 20-30 ppm, and the concentration of ozone in the second mixed solution is 40-70 ppm.

4. The post-texturing preparation method of a back contact battery according to claim 1 or 3, characterized in that: The concentrations of hydrofluoric acid and hydrochloric acid in the first mixed solution and the second mixed solution independently satisfy: the concentration of hydrofluoric acid is 0.5wt%-2wt%, and the concentration of hydrochloric acid is 1wt%-4wt%; the pH of the first mixed solution and the second mixed solution is independently 3.0-6.0; And / or, the conditions of the first acid wash and the second acid wash independently include: reaction time of 60-180s, reaction temperature of 20-25°C.

5. The post-texturing preparation method of a back contact battery according to any one of claims 1 to 3, characterized in that: In the acid pickling B of S04, a solution etching method is used to remove a portion of the mask layer. The solution in the solution etching method is a third mixed solution containing hydrofluoric acid, hydrochloric acid and water. The concentration of hydrofluoric acid in the third mixed solution is 5wt%-10wt%, and the concentration of hydrochloric acid is 1wt%-4wt%. The conditions of the solution etching method include: a processing temperature of 30°C-35°C, and a reaction time of 60-180s. and / or, The solution used for alkaline washing A in S04 is a mixed solution containing alkali and H2O2, wherein the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%; the conditions for alkaline washing A include: reaction temperature of 60-80°C, reaction time of 120-240s.

6. The post-texturing preparation method of the back contact battery according to claim 1, characterized in that: The thickness of the mask layer partially removed in pickling B is 50%-80% of the total thickness of the mask layer; and / or, The texturing liquid used in S04 is a mixed solution containing potassium hydroxide or sodium hydroxide, a texturing additive and water, wherein the mass percentage of potassium hydroxide or sodium hydroxide is 1wt%-5wt%, and the mass percentage of the texturing additive is 0.5wt%-1wt%; the texturing conditions include: the texturing time is 8-12min, and the texturing temperature is 75℃-85℃.

7. The post-texturing preparation method of a back contact battery according to claim 1, characterized in that: The polishing in S01 also includes pre-cleaning, rough polishing, and alkali washing performed in sequence, followed by the first acid washing step, and water washing is performed after each of the multiple polishing steps.

8. The post-texturing preparation method of the back contact battery according to claim 7, characterized in that: Polishing in S01 uses at least one of the following processes: Process 1: The solution used for the pre-cleaning is a mixed solution containing alkali and H2O2, the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%; Process 2: The pre-cleaning conditions include: reaction temperature of 60-80°C, reaction time of 120-240s; Process 3: The solution used for the rough polishing is a mixed solution containing alkali, polishing additives and water, the alkali is potassium hydroxide or sodium hydroxide, the concentration of the alkali is 1wt%-3wt%, and the concentration of the polishing additive is 0.5wt%-2wt%; Process 4: The rough polishing conditions include: reaction temperature of 60°C-70°C, reaction time of 30-180s, single-side corrosion depth of 1-3μm; Process 5: The alkali washing solution is a mixed solution containing alkali and H2O2, the alkali is NH4OH or KOH, the alkali concentration is 2wt%-5wt%, and the H2O2 concentration is 3wt%-5wt%; Process 6: The conditions for the alkaline washing include: a reaction temperature of 60-80°C and a reaction time of 120-240s.

9. The post-texturing preparation method of a back contact battery according to claim 1, characterized in that: The thickness of the first tunnel oxide layer in S01 is 1-2nm, the thickness of the first doped polysilicon layer is 70-300nm, and the effective doping concentration is greater than 5e18cm -3 ; In S05, the thickness of the second tunnel oxide layer is 1-3 nm, the thickness of the second doped amorphous silicon layer is 1-10 nm, and the effective doping concentration is 1e18 cm -3 -5e19cm -3 .

10. The post-texturing preparation method of a back contact battery according to claim 1, characterized in that: In S06, a chain cleaning machine is used to remove the back side plating. The solution used to remove the back side plating is an aqueous solution containing hydrofluoric acid. The concentration of hydrofluoric acid in the aqueous solution containing hydrofluoric acid is 5wt%-10wt%. The conditions for removing the back side plating include: a reaction temperature of 20-35°C, and a transmission roller speed of the chain cleaning machine of 1.2-3.0m / min; In S06, a tank cleaning machine is used for backwashing, and the backwashing process includes alkaline washing, acid washing, and hydrofluoric acid pickling in sequence, wherein a water washing step is performed after each solution tank step.

11. The post-texturing preparation method of a back contact battery according to claim 1, characterized in that: The second semiconductor layer includes an intrinsic amorphous silicon layer and a second doped silicon layer sequentially formed on the back side; the thickness of the intrinsic amorphous silicon layer is 5-15nm, the thickness of the second doped silicon layer is 5-20nm, and the effective doping concentration is 1e18cm -3 -9e20cm -3 .

12. The post-texturing preparation method of a back contact battery according to claim 1, characterized in that: The post-texturing preparation method of the back contact battery also includes: After forming the first semiconductor layer on the back side of the silicon wafer in S02, a cleaning step is further performed to remove the phosphosilicate glass layer naturally formed on the surface of the first semiconductor layer, and then the mask layer is deposited; S08, etching an opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S09, depositing a conductive film layer on the back surface obtained in S08; S10, performing a third etching opening on a portion of the conductive film layer located between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove; S11, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

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