Solar cell and photovoltaic module

Abstract

A solar cell includes a silicon substrate, a back side of the silicon substrate including first and second regions disposed alternately, and an overlapping region disposed between the first and second regions. The first functional layer is arranged in the first area and the overlapping area. The second functional layer is disposed in the second region and extends from the second region to the first functional layer covering the overlapping region. The edge of the second functional layer comprises a side surface, and an included angle theta 1 is formed between the side surface and the back surface of the first region. The second area comprises a groove, the included angle between the side wall and the groove bottom of the groove is theta2, theta1 is smaller than or equal to theta2, and theta2 is larger than 90 degrees. The invention also provides a photovoltaic module. Theta < = theta < 2 >, and theta < 2 > is greater than 90 degrees, so that deposition of a more uniform, compact and continuous functional layer on the side wall of the groove is facilitated, the film forming quality of the functional layer is improved, the areas of the second functional layer and the transparent conductive layer connected with the second functional layer are increased, the carrier receiving and transmitting capability of the second functional layer is enhanced, and the cell performance is finally optimized.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and more specifically, to a solar cell and a photovoltaic module including the solar cell. Background Art

[0002] Compared with solar cells with obstructions on the front, back-contact cells have higher short-circuit current and photoelectric conversion efficiency, and are one of the current technical directions for achieving high-efficiency crystalline silicon cells. Existing back-contact solar cells are usually provided with alternating N-type regions and P-type regions on the back of the silicon substrate, as well as isolation regions between each N-type region and P-type region. Taking the back-contact heterojunction cell as an example, an isolation groove that at least penetrates the transparent conductive layer is formed on each isolation region to isolate the N-type region from the P-type region. In the actual manufacturing process, an isolation region is usually formed on the back of the back-contact cell by step-by-step etching. However, since the etching direction is not deliberately set during the etching process, the left and right sides of the isolation region are both perpendicular or nearly perpendicular to the surface of the silicon substrate, so that the thin films deposited on the vertical sides, such as the dielectric layer, the doped conductive layer and the transparent conductive layer, are not uniform and dense enough, resulting in difficulty in further improving the efficiency and yield of the cell. In addition, the leakage problem of leakage between the conductive layer and the second doped layer on the first doped layer of the back-contact cell is also an important reason affecting the performance of the cell. Summary of the invention

[0003] In view of this, the present application provides a solar cell, which increases the area of ​​the second functional layer by designing the inclination angle of the first functional layer and the second functional layer relative to the back surface, thereby making the transmission of electrons and holes more balanced.

[0004] A solar cell comprises a silicon substrate, wherein the silicon substrate comprises a front side and a back side opposite to each other, the back side comprises a first region and a second region arranged alternately, and also comprises an overlapping region arranged between the first region and the second region; a first functional layer is arranged in the first region and the overlapping region; a second functional layer is arranged in the second region and extends from the second region to the first functional layer covering the overlapping region; an edge of the second functional layer comprises a side surface, and an angle θ1 is formed between the side surface and the back side located in the first region; the second region comprises a groove, and an angle θ2 is formed between the side wall of the groove and the bottom of the groove, wherein θ2>90°, and θ1≤θ2.

[0005] In the present application, the angle θ2 between the side wall of the groove and the bottom of the groove is greater than 90°, and the side wall inclined relative to the bottom of the groove has a larger surface area than the side wall perpendicular to the bottom of the groove, which is conducive to depositing a more uniform, dense and continuous film layer when the second functional layer is subsequently deposited on the side wall and the bottom of the groove, improving the passivation performance and contact performance, and optimizing the battery efficiency. In addition, θ2 is greater than or equal to the angle θ1 between the first side and the back of the first region, which is used to increase the area of ​​the second functional layer attached to the first side 111 and the side wall of the groove. In solar cells, the transmission rate of electrons is usually much greater than the transmission rate of holes. Therefore, the second functional layer 30 is provided with a larger side area, which is easy to accept and transmit more holes, so that the transmission of electrons and holes can be more balanced.

[0006] As a possible implementation manner, 90°≤θ1<130°, 90°<θ2<130°.

[0007] As a possible implementation, the first functional layer is an N-type functional layer, and the second functional layer is a P-type functional layer; the solar cell also includes a transparent conductive layer, which is arranged on a side of the first functional layer and the second functional layer away from the silicon substrate, and the transparent conductive layer includes an opening located in the overlapping area and penetrating the transparent conductive layer, and the opening separates the transparent conductive layer electrically connected to the first functional layer from the transparent conductive layer electrically connected to the second functional layer.

[0008] As a possible implementation manner, the opening is located in the overlapping area and extends to the first area.

[0009] As a possible implementation manner, the bottom surface of the groove is a suede surface; and / or the depth of the groove is 1 μm to 10 μm.

[0010] As a possible implementation manner, the ratio of the thickness of the transparent conductive layer in the first region to the thickness of the transparent conductive layer in the second region is a, where 1≤a≤2.

[0011] As a possible implementation manner, the solar cell further includes an isolation layer, and the isolation layer is located on a side of the second functional layer in the overlapping region away from the silicon substrate.

[0012] As a possible implementation manner, the solar cell further includes an isolation layer, which is located on a side of the second functional layer in the overlapping region away from the silicon substrate and extends to a side surface of the second functional layer.

[0013] As a possible implementation, the first functional layer includes an intrinsic amorphous silicon layer and a first doped amorphous silicon layer which are stacked, and the second functional layer includes an intrinsic amorphous silicon layer and a second doped amorphous silicon layer which are stacked; or, the first functional layer includes a tunneling oxide layer and a first doped polycrystalline silicon layer which are stacked, and the second functional layer includes an intrinsic amorphous silicon layer and a second doped amorphous silicon layer which are stacked.

[0014] In a second aspect, the present application provides a photovoltaic module, comprising the solar cell described in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of a cross section of a solar cell according to the first embodiment of the present application.

[0016] Figure 2 It is a schematic diagram of a cross section of a solar cell according to the second embodiment of the present application.

[0017] Figure 3 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 1 .

[0018] Figure 4 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 2 .

[0019] Figure 5 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 3 .

[0020] Figure 6 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 4 .

[0021] Figure 7 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 5 .

[0022] Figure 8 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 6 .

[0023] Fig. 9 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 7 .

[0024] Fig.10 The schematic diagram of the preparation process of the solar cell of the embodiment of the present application is Figure 8 .

[0025] Description of main component symbols: Solar cell 100, 200, front side 12, back side 11, first functional layer 20, second functional layer 30, The first side surface 111, the second side surface 112, the first transparent conductive layer 40a, the second transparent conductive layer 40b, Sidewall 73, groove bottom 71, isolation layer 50, opening 501, first passivation layer 21a, first doping layer 23a, The second passivation layer 21b, the second doping layer 23b, the third passivation layer 25, the anti-reflection layer 27, the transparent conductive layer 40, A first electrode 61 and a second electrode 62 . DETAILED DESCRIPTION

[0026] Back-contact solar cells refer to solar cells with both the positive and negative electrodes on the back of the cell and no metal electrode blocking the front. Back-contact solar cells have the advantages of a larger light-absorbing area and a lower carrier recombination rate, which has attracted extensive attention from the photovoltaic academic and industrial circles and has become a hot development direction for high-efficiency solar cell technology.

[0027] Existing back-contact cells usually have N-type regions and P-type regions that are alternately distributed, and an isolation region between the N-type region and the P-type region. Taking the back-contact heterojunction cell as an example, an isolation groove that at least penetrates the transparent conductive layer is formed on each isolation region to isolate the N-type region from the P-type region. In the actual manufacturing process, the isolation region is usually formed by step-by-step etching. Since the etching direction is not deliberately set during the etching process, the two sides of the isolation region are perpendicular or nearly perpendicular to the surface of the silicon substrate, and the following problems are prone to occur. Problem 1. When the transparent conductive layer is prepared by physical vapor deposition or reactive plasma deposition, the transparent conductive layer on the first side and the second side also faces the problem of poor film uniformity and density, thereby affecting carrier transport and being unfavorable to the improvement of battery efficiency and yield. Problem 2. The leakage problem in the back-contact battery is also an important reason affecting battery performance. For example, the leakage problem caused by the direct contact of conductive regions of different doping types on the back or the leakage problem caused by the imbalance of carrier concentrations of different doping types.

[0028] In order to solve the above technical problems, the present application provides a solar cell. Figure 1 , the solar cell 100 includes a silicon substrate 10. The silicon substrate 10 includes a front side 12 and a back side 11 opposite to each other. In the present embodiment, the solar cell 100 is a back contact solar cell. The back side 11 includes a first region and a second region alternately arranged, and also includes an overlapping region arranged between the first region and the second region. The first functional layer 20 is arranged in the first region and the overlapping region. The second functional layer 30 is arranged in the second region, and extends from the second region to the first functional layer 20 covering the overlapping region. The edge of the second functional layer 30 includes a side surface, and for ease of reading in conjunction with the schematic diagram, the side surface will be referred to as the second side surface 112 hereinafter. That is, the edge of the second functional layer 30 includes the second side surface 112, and the angle θ1 between the second side surface 112 and the back side 11 located in the first region is. The second region includes a groove, and the angle between the side wall 73 of the groove and the bottom 71 of the groove is θ2, wherein θ2>90°, and θ1≤θ2. To make the diagram clear, Figure 1Only one first region and one second region are presented.

[0029] like Figure 1 As shown, the first area is the position covered by the first functional layer 20, the second area is the position covered by the second functional layer 30, and the overlapping area is the position where the first functional layer 20 and the second functional layer 30 overlap.

[0030] like Figure 1 As shown, in the area where the first functional layer 20 and the second functional layer 30 overlap, the first functional layer 20 includes a first side surface 111, and the second functional layer 30 includes a second side surface 112. The first side surface 111 and the second side surface 112 are inclined relative to the back surface 11 of the first area. In the embodiment of the present application, part of the second functional layer 30 is stacked on the side of the first functional layer 20 away from the silicon substrate 10. The second functional layer 30 covers the groove bottom 71 and the sidewall 73 of the groove, and continues to extend to cover the first side surface 111 and the surface of the first functional layer 20 away from the silicon substrate 10, so that the second functional layer 30 partially overlaps the first functional layer 20.

[0031] The second side surface 112 and the back surface 11 form an angle θ1, and the groove bottom 71 and the side wall 73 of the groove form an angle θ2, wherein θ2>90°, and θ1≤θ2.

[0032] The second side surface 112 may be a plane, a curved surface, or at least two cross-connected surfaces. When the second side surface 112 is a plane, the angle θ1 is the angle between the plane and the back surface 11; when the second side surface 112 is a curved surface, the angle θ1 is the angle between the direction of the line between the two ends of the curved surface and the back surface 11; when the second side surface 112 is at least two cross-connected surfaces, the angle θ1 is the angle between the surface of the second side surface 112 close to the silicon substrate 10 and the back surface 11.

[0033] Similarly, the side wall 73 of the groove can be one of a plane, a curved surface, or at least two cross-connected surfaces. When the side wall 73 of the groove is a plane, the angle θ2 is the angle between the plane and the groove bottom 71 of the groove; when the side wall 73 of the groove is a curved surface, the angle θ2 is the angle between the direction of the line between the two ends of the curved surface and the groove bottom 71 of the groove; when the side wall 73 of the groove is at least two cross-connected surfaces, the angle θ2 is the angle between the surface of the side wall 73 of the groove close to the groove bottom 71 of the groove and the side wall 73 of the groove.

[0034] Compared with the area of ​​the side surface perpendicular to the back surface, the side wall 73 of the groove inclined relative to the groove bottom 71 of the groove can increase the area of ​​the side wall 73, thereby increasing the contact area between the subsequent second functional layer and the side wall 73, which is beneficial to improving the battery performance. Through the inclination treatment of the side wall 73 of the groove, it is beneficial to deposit a more uniform, dense and continuous functional layer on the side wall 73 of the groove, improve the film quality of the functional layer, improve the carrier transmission efficiency, and optimize the battery performance. In addition, θ2 is greater than or equal to the angle θ1 between the first side surface 111 and the back surface 11 of the first region, so as to increase the area of ​​the second functional layer 30 attached to the first side surface 111 and the side wall 73 of the groove. In the solar cell, when the second functional layer 30 and the silicon substrate 10 have opposite doping types, it is beneficial to increase the area of ​​the PN junction and improve the power generation efficiency of the battery. When the second functional layer 30 and the silicon substrate 10 have the same doping type, it is beneficial to increase the area of ​​the surface field formed by the second functional layer 30 and the silicon substrate 10, which is beneficial to the separation of carriers and improve the battery efficiency.

[0035] Furthermore, in some embodiments, 90°≤θ1<100°, 90°≤θ2<120°.

[0036] Furthermore, in some embodiments, 90°≤θ1<130°, 90°≤θ2<130°.

[0037] In the present application, the doping types of the first functional layer 20 and the second functional layer 30 are opposite, for example, the first functional layer 20 is an N-type functional layer and the second functional layer 30 is a P-type functional layer, or the first functional layer 20 is a P-type functional layer and the second functional layer 30 is an N-type functional layer. This embodiment will be described by taking the first functional layer 20 as an N-type functional layer and the second functional layer 30 as a P-type functional layer as an example.

[0038] In some embodiments, the first functional layer 20 is an N-type functional layer, and the second functional layer 30 is a P-type functional layer. The solar cell 100 also includes a transparent conductive layer, and the transparent conductive layer includes a first transparent conductive layer 40a and a second transparent conductive layer 40b. Figure 1 As shown, the first transparent conductive layer 40a conformally covers the first functional layer 20 (N-region functional layer) and the second side surface 112. The first transparent conductive layer 40a includes a first portion 31 and a second portion 32 connected. The first portion 31 is attached to the area of ​​the N-region functional layer that does not overlap with the P-region functional layer, and the second portion 32 is disposed on the second side surface 112. After the first transparent conductive layer 40a covers the second side surface 112, it continues to extend and partially covers the surface of the second functional layer 30 in the isolation region that is away from the first functional layer 20.

[0039] The second transparent conductive layer 40b conformally covers the second functional layer 30 (including the area of ​​the first side surface 111). The second transparent conductive layer 40b includes a third portion 41 and a fourth portion 42. The third portion 41 is attached to the area of ​​the P region function that does not overlap with the N region functional layer, and the fourth portion 42 is disposed on the first side surface 111 and the groove sidewall 73. After the second transparent conductive layer 40b covers the first side surface 111, it continues to extend and partially covers the surface of the first functional layer 20 in the isolation area away from the second functional layer 30.

[0040] Since θ1≤θ2, and θ2>90°, the second transparent conductive layer 40b is deposited on the P-region functional layer in a complex manner, and the larger θ2 is used to increase the area of ​​the second functional layer 30 attached to the first side surface 111 and the groove sidewall 73, thereby increasing the area of ​​the second transparent conductive layer 40b in the corresponding portion (the fourth portion 42). In solar cells, the transmission rate of electrons is usually much greater than the transmission rate of holes, so the second transparent conductive layer 40b provided with the P-region functional layer has a larger side area, which is easy to receive and transmit more holes, so that the transmission of electrons and holes can be more balanced.

[0041] Furthermore, the transparent conductive layer includes an opening 501 located in the overlapping area and penetrating the transparent conductive layer. The opening 501 separates the transparent conductive layer electrically connected to the first functional layer 20 from the transparent conductive layer electrically connected to the second functional layer 30 to avoid short circuit.

[0042] Further, the opening 501 is located in the overlapping region and extends to the overlapping region near the first region. Further expanding the width of the opening 501 can ensure that the transparent conductive layer electrically connected to the first functional layer and the transparent conductive layer electrically connected to the second functional layer are fully isolated, thereby improving the effect of avoiding short circuits.

[0043] In some embodiments, the bottom 71 of the groove is a suede surface; and / or the depth of the groove is 1 μm to 10 μm.

[0044] In the case of adopting the above technical solution, when the size of the groove bottom 71 of the groove is the same, because the suede surface has an undulating surface morphology, compared with the groove bottom 71 of the groove being a flat polished surface, when the groove bottom 71 of the groove is a suede surface, the surface area of ​​the groove bottom 71 of the groove is larger, thereby further increasing the contact area between the second functional layer 30 and the second region, and further improving the passivation effect of the second functional layer 30 on the second region. At the same time, the conductive area of ​​the second region can be further increased, which is more conducive to improving the photoelectric conversion efficiency of the solar cell.

[0045] In some embodiments, the ratio of the thickness of the first transparent conductive layer 40 a in the first region to the thickness of the second transparent conductive layer 40 b in the second region is a, wherein 1≤a≤2.

[0046] In the case of adopting the above technical solution, it can be known from the above description that the second region is provided with a groove, so the surface area of ​​the silicon substrate 10 in the second region is usually greater than the surface area of ​​the silicon substrate 10 in the first region. In the case where the surface areas of the two regions are different, it is necessary to make the thickness of the transparent conductive layer in the second region smaller than the thickness of the transparent conductive layer in the first region, so as to meet the production cycle requirements in the process of depositing the transparent conductive layer of the same material at one time. When the groove bottom 71 of the groove is a velvet structure, the surface area of ​​the silicon substrate 10 in the second region will be further increased, and the beneficial effect of the transparent conductive layer thickness in the second region being smaller than the transparent conductive layer thickness in the first region can refer to the above beneficial effect analysis, which will not be repeated here.

[0047] Please continue reading Figure 2 In another embodiment, the solar cell 200 is different from the solar cell 100 in that it also includes an insulating isolation layer 50. In the area where the first functional layer 20 overlaps with the second functional layer 30, the isolation layer 50 is disposed between the second functional layer 30 and the first transparent conductive layer 40a to isolate the first transparent conductive layer 40a from the second functional layer 30, and to prevent the second functional layer 30 from connecting to the first transparent conductive layer 40a to cause electron and hole recombination. In the embodiment of the present application, in the area where the first functional layer 20 overlaps with the second functional layer 30, the isolation layer 50 not only covers the second side surface 112, but also covers the surface of the second functional layer 30 that is parallel to and away from the silicon substrate 10. The isolation layer 50 includes a first isolation portion extending on the second side surface 112 and a second isolation portion extending parallel to the back surface 11, and the first isolation portion is cross-connected with the second isolation portion.

[0048] Furthermore, the width of the isolation layer 50 is greater than the width of the opening 501, so that the opening 501 can be completely located on the upper surface of the isolation layer 50. In this way, the isolation layer 50 is protected underneath the opening 501, thereby avoiding the phenomenon that the functional layer behind the opening 501 is not protected by the mask layer, which is beneficial to improving the reliability of the battery.

[0049] Furthermore, the size of the angle θ1 or θ2 has a certain relationship with the horizontal width of the opening 501. The maximum angle of the angle θ1 or θ2 increases to adapt to the battery structure when the horizontal width of the opening 501 increases, increase the surface area of ​​the isolation layer 50, and reduce the risk of leakage.

[0050] In some embodiments, the first functional layer 20 includes an intrinsic amorphous silicon layer and a first doped amorphous silicon layer, and the second functional layer 30 includes an intrinsic amorphous silicon layer and a second doped amorphous silicon layer. Alternatively, the first functional layer 20 includes a tunneling oxide layer and a first doped polysilicon layer, and the second functional layer 30 includes an intrinsic amorphous silicon layer and a second doped amorphous silicon layer.

[0051] It should be noted that the doping types of the first functional layer 20 and the second functional layer 30 are opposite.

[0052] In the present application, the silicon substrate 10 may be an N-type silicon substrate or a P-type silicon substrate.

[0053] In the embodiment of the present application, the silicon substrate 10 is an N-type silicon substrate. The first functional layer 20 includes a first passivation layer 21a and a first doping layer 23a, and the second functional layer 30 includes a second passivation layer 21b and a second doping layer 23b.

[0054] The first passivation layer 21a and the second passivation layer 21b are both intrinsic amorphous silicon layers, and the thickness is 1-15nm. The first doped layer 23a is an N-type doped amorphous silicon layer, and the thickness is 3-20nm. The second doped layer 23b is a P-type doped amorphous silicon layer, and the thickness is 3-20nm. The first passivation layer 21a, the first doped layer 23a, the second passivation layer 21b, and the second doped layer 23b can be formed by plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), etc.

[0055] The material of the isolation layer 50 may be an insulating material such as silicon oxide or silicon nitride, and the thickness is 50-500 nm. The isolation layer 50 may be formed by PECVD, atomic layer deposition (ALD), or the like.

[0056] The material of the transparent conductive layer can be fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, etc., with a thickness of 10-1000nm. The transparent conductive layer can be formed by physical vapor deposition (PVD), reactive plasma deposition (RPD), etc.

[0057] The conductive materials such as copper, silver, aluminum, etc. of the electrode can be formed by screen printing, electroplating and laser transfer.

[0058] The material of the third passivation layer 25 may be aluminum oxide, with a thickness of 3-15 nm. The third passivation layer 25 may be formed by PECVD, ALD, etc. The material of the anti-reflection layer 27 may be silicon nitride, silicon oxide, silicon oxynitride, with a thickness of 50-200 nm. The anti-reflection layer 27 may be formed by PECVD, ALD, etc.

[0059] The present application also provides a photovoltaic module, which includes at least one solar cell 100 as described above.

[0060] Please refer to Figures 3 to 10 The present application also provides a method for preparing the above-mentioned solar cell, which comprises the following steps S1 to S7.

[0061] S1: providing a silicon substrate 10 , wherein the silicon substrate 10 comprises a front side 12 and a back side 11 opposite to each other.

[0062] See also Figure 3 The silicon substrate 10 includes a front side 12 and a back side 11 opposite to each other. The distance between the front side 12 and the back side 11 is the thickness of the silicon substrate 10.

[0063] The silicon substrate 10 may be an N-type silicon substrate or a P-type silicon substrate. In the embodiment of the present application, the silicon substrate 10 is an N-type silicon substrate.

[0064] S2 : forming a first functional layer 20 on the back surface 11 and partially covering the back surface 11 , wherein the first functional layer 20 includes a first side surface 111 obliquely connected to the back surface 11 .

[0065] See also Figure 4 and Figure 5 Step S2 is to form the first functional layer 20, specifically including: forming a first passivation layer 21a and a first doping layer 23a that completely cover the back surface 11 and are stacked; then etching to remove a portion of the first passivation layer 21a and the first doping layer 23a, and during the etching process, the first passivation layer 21a and the first doping layer 23a form a first side surface 111 that is obliquely connected to the back surface 11. The first passivation layer 21a and the first doping layer 23a that remain after etching form the first functional layer 20.

[0066] In some embodiments, the first passivation layer 21a is an intrinsic amorphous silicon layer with a thickness of 1-15 nm. The first doped layer 23a is an N-type doped amorphous silicon layer with a thickness of 3-20 nm. The first passivation layer 21a and the first doped layer 23a can be formed by PECVD, LPCVD, etc.

[0067] In some embodiments, during the etching process, a portion of the back side 11 of the silicon substrate 10 is also etched, so that the thickness of the local portion of the silicon substrate 10 is reduced, that is, a groove is formed in the second region of the back side 11 .

[0068] In some embodiments, the etching of the first functional layer 20 in step S2 is performed by wet etching.

[0069] S3: A second functional layer 30 is formed on the back side 11 , wherein the second functional layer 30 partially covers the back side 11 and along the thickness direction of the silicon substrate 10 , the first functional layer 20 and the second functional layer 30 partially overlap to form an overlapping area, and the second functional layer 30 includes a second side surface 112 inclined relative to the back side 11 .

[0070] See also Figure 6 and Figure 7 Step S3 is to form the second functional layer 30, specifically including: forming a second passivation layer 21b and a second doping layer 23b arranged in a stacked manner, wherein the second passivation layer 21b and the second doping layer 23b cover the blank area of ​​the back surface 11 and the surface of the first functional layer 20 (the first passivation layer 21a and the first doping layer 23a) away from the silicon substrate 10; then etching to remove a part of the second passivation layer 21b and the second doping layer 23b, so that the stacked second passivation layer 21b and the second doping layer 23b partially cover the first functional layer 20 (the first passivation layer 21a and the first doping layer 23a) and the back surface 11 along the thickness direction of the silicon substrate 10, and forming a second side surface 112 of the second passivation layer 21b and the second doping layer 23b in the etching process, wherein the second side surface 112 is obliquely connected to the second side surface 112 of the first doping layer 23a. The second passivation layer 21b and the second doping layer 23b retained after etching form the second functional layer 30. The second passivation layer 21 b and the second doping layer 23 b which are stacked together cover the second side surface 112 .

[0071] After step S3, the angle θ1 formed by the second side surface 112 and the back surface 11 is ≤ the angle θ2 formed by the side wall 73 of the groove and the groove bottom 71 of the groove. In some embodiments, 90°≤θ1<130°, 90°<θ2<130°.

[0072] In some embodiments, the second passivation layer 21b is an intrinsic amorphous silicon layer with a thickness of 1-15 nm. The second doped layer 23b is a P-type doped amorphous silicon layer with a thickness of 3-20 nm. The second passivation layer 21b and the second doped layer 23b can be formed by PECVD, LPCVD, etc.

[0073] In some embodiments, the second functional layer 30 is etched in step S3 by a process that can achieve directional etching, such as laser etching or etching paste etching. Laser etching can achieve the angle between the second side surface 112 and the back surface 11 by controlling the laser incident angle.

[0074] In some embodiments, before or after step S3, a third passivation layer 25 and an anti-reflection layer 27 may be sequentially formed on the front surface 12 of the silicon substrate 10. The material of the third passivation layer 25 may be aluminum oxide, and the thickness may be 3-15 nm. The third passivation layer 25 may be formed by PECVD, ALD, etc. The material of the anti-reflection layer 27 may be silicon nitride, silicon oxide, silicon oxynitride, and the thickness may be 50-200 nm. The anti-reflection layer 27 may be formed by PECVD, ALD, etc.

[0075] S4 : forming an isolation layer 50 in the overlapping region between the first functional layer 20 and the second functional layer 30 .

[0076] See also Figure 8 In step S4, in the overlapping area of ​​the first functional layer 20 and the second functional layer 30, specifically the second side surface 112 and the second functional layer 30 (the second doping layer 23b) are away from and parallel to the surface of the silicon substrate 10, an insulating isolation layer 50 is formed. The isolation layer 50 includes a first isolation portion extending from the second side surface 112 and a second isolation portion extending parallel to the back surface 11, and the first isolation portion is cross-connected with the second isolation portion.

[0077] The material of the isolation layer 50 can be an insulating material such as silicon oxide or silicon nitride, with a thickness of 50-500 nm. The isolation layer 50 can be formed by PECVD, ALD, etc.

[0078] S5 : forming a transparent conductive layer 40 on the side of the first functional layer 20 and the second functional layer 30 facing away from the silicon substrate 10 .

[0079] See also Fig. 9 The transparent conductive layer 40 completely covers the back side 11 of the silicon substrate 10, that is, covers the first functional layer 20, the second functional layer 30 and the overlapping area, including covering the first doping layer 23a, the isolation layer 50, and the second doping layer 23b.

[0080] The material of the transparent conductive layer 40 can be fluorine-doped tin oxide, aluminum-doped zinc oxide, tin-doped indium oxide, etc., with a thickness of 10-1000 nm. The transparent conductive layer 40 can be formed by PVD, RPD, etc.

[0081] S6: An opening 501 is opened in the transparent conductive layer 40, and the opening 501 separates the transparent conductive layer 40 into a first transparent conductive layer 40a and a second transparent conductive layer 40b which are separated from each other. The first transparent conductive layer 40a is connected to the first doping layer 23a of the first functional layer 20, and the second transparent conductive layer 40b is connected to the second doping layer 23b of the second functional layer 30.

[0082] See also Fig.10 The opening 501 is located in the overlapping region. The opening 501 penetrates the transparent conductive layer 40 along the thickness direction. The isolation layer 50 is located between the second functional layer 30 and the first transparent conductive layer 40a to prevent the first transparent conductive layer 40a from being connected to the second functional layer 30.

[0083] S7: Electrodes are formed on the surfaces of the first transparent conductive layer 40 a and the second transparent conductive layer 40 b facing away from the silicon substrate 10 .

[0084] After step S7, we obtain Figure 2The solar cell 100 shown in FIG. 1 has a first electrode 61 formed on the first transparent conductive layer 40a, and a second electrode 62 formed on the second transparent conductive layer 40b. The first electrode 61 and the second electrode 62 can be made of conductive materials such as copper, silver, and aluminum, and are formed by printing, electroplating, and laser transfer.

[0085] In the present application, on the one hand, when etching the first functional layer 20 and the second functional layer 30, a process that can achieve directional etching is used to prepare the side surface into an inclined surface with an angle with the back surface 11, which is beneficial to the subsequent deposition of the side film layer to be more continuous, uniform and dense, and the contact between the film layers is better, which can improve the passivation effect and the carrier transport performance, and improve the battery performance; on the other hand, an isolation layer 50 is deposited on the surface corresponding to the isolation area. Since the isolation layer 50 is an insulating material, the part of the second doped layer 23b corresponding to the isolation area can be isolated from the first transparent conductive layer 40a, reducing the rate at which carriers of opposite conductivity types recombine at the cross section between the part of the second doped layer 23b corresponding to the isolation area and the first transparent conductive layer 40a, thereby suppressing leakage and improving the photoelectric conversion efficiency of the back contact battery.

[0086] Since the second side surface 112 is an inclined surface, the surface area of ​​the isolation layer 50 is increased, so that it can play a better insulation effect. On the other hand, the inclined surface with a certain angle has a larger side area than the vertical surface, which improves the light reflection of the back surface 11 of the back-contact solar cell, thereby increasing the utilization rate of sunlight by the cell. The second isolation portion of the isolation layer 50 located at the bottom of the isolation area can reduce or even eliminate the damage caused by laser etching to the film layer below it while ensuring that the transparent conductive layer is completely etched through, thereby improving the efficiency and yield of the cell.

[0087] In the present application, by setting the angle θ2 between the side wall and the bottom of the groove of the second region to be greater than 90°, the side wall inclined relative to the bottom of the groove has a larger surface area than the side wall perpendicular to the bottom of the groove, which is conducive to depositing a more uniform, dense and continuous film layer when the second functional layer 30 is subsequently deposited on the side wall 73 and the bottom 71 of the groove, improving the passivation performance and contact performance, and optimizing the battery efficiency. In addition, θ2 is greater than or equal to the angle θ between the first side surface 111 and the back surface of the first region 1， It is used to increase the area of ​​the second functional layer 30 attached to the first side surface 111 and the side wall 73 of the groove. In solar cells, the transmission rate of electrons is usually much higher than the transmission rate of holes. Therefore, the second functional layer 30 is provided with a larger side area, which is easy to receive and transmit more holes, so that the transmission of electrons and holes can be more balanced, reducing the problem of carrier recombination in the battery caused by electron accumulation.

[0088] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A solar cell, characterized in that: A silicon substrate is provided, wherein the silicon substrate comprises a front side and a back side opposite to each other, wherein the back side comprises first regions and second regions which are alternately arranged, and further comprises an overlapping region which is arranged between the first regions and the second regions; A first functional layer, disposed in the first region and the overlapping region; A second functional layer is arranged in the second area and extends from the second area to the first functional layer covering the overlapping area; the edge of the second functional layer includes a side surface, and an angle θ1 is formed between the side surface and the back surface located in the first area; the second area includes a groove, and an angle θ2 is formed between the side wall and the bottom of the groove, wherein θ1≤θ2, and θ2>90°.

2. The solar cell according to claim 1, characterized in that 90°≤θ1<130°, and / or, 90°<θ2<130°.

3. The solar cell according to claim 1, characterized in that The solar cell also includes a transparent conductive layer, which is arranged on a side of the first functional layer and the second functional layer away from the silicon substrate, and the transparent conductive layer includes an opening located in the overlapping area and penetrating the transparent conductive layer, and the opening separates the transparent conductive layer electrically connected to the first functional layer from the transparent conductive layer electrically connected to the second functional layer.

4. The solar cell according to claim 3, characterized in that: The opening is located in the overlapping area and extends to the first area.

5. The solar cell according to claim 1, characterized in that: The bottom surface of the groove is velvet; and / or, The depth of the groove is 1 μm to 10 μm.

6. The solar cell according to claim 3, characterized in that: A ratio of a thickness of the transparent conductive layer in the first region to a thickness of the transparent conductive layer in the second region is a, wherein 1≤a≤2.

7. The solar cell according to claim 1, characterized in that The solar cell further includes an isolation layer, and the isolation layer is located on a side of the second functional layer in the overlapping region away from the silicon substrate.

8. The solar cell according to claim 1, characterized in that The solar cell further includes an isolation layer, which is located on a side of the second functional layer in the overlapping region away from the silicon substrate and extends to the side surface of the second functional layer.

9. The solar cell according to claim 1, characterized in that: The first functional layer includes an intrinsic amorphous silicon layer and a first doped amorphous silicon layer which are stacked, and the second functional layer includes an intrinsic amorphous silicon layer and a second doped amorphous silicon layer which are stacked; or The first functional layer includes a tunneling oxide layer and a first doped polysilicon layer which are stacked, and the second functional layer includes an intrinsic amorphous silicon layer and a second doped amorphous silicon layer which are stacked.

10. A photovoltaic module, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 9.

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