NAND FLASH life prediction and management method and related equipment

Abstract

The present invention relates to the field of flash memory technology, and discloses a NAND FLASH life prediction and management method and related equipment. The method comprises: obtaining multimodal parameter data by multi-dimensionally collecting and extracting physical electrical parameters and environmental error parameters of the target flash memory, and performing time alignment and preprocessing on the acquired basic feature data; then constructing a multi-dimensional feature space through multi-level feature extraction and association analysis, and generating an initial fusion feature matrix based on feature pairing and fusion analysis, and generating life prediction results through error coefficient and performance degradation calculation and multi-P / E cycle scale performance prediction, and performing threshold division and deviation calculation based on performance state parameters, as well as weighted calculation of margin and state evaluation, to obtain safe operation margin and health state evaluation results; finally, generating operation management results based on state level division and parameter mapping. Efficient and accurate prediction and management of flash memory life are achieved.

Description

Technical Field

[0001] The present invention relates to the field of flash memory technology, and in particular to a NAND FLASH life prediction and management method and related equipment. Background Art

[0002] In the field of NAND FLASH storage technology, life prediction and management are important links in product reliability evaluation and performance optimization, and real-time monitoring of performance parameters, life prediction and management strategy formulation are the most critical and challenging stages in performance evaluation. Accurately predicting the operating status of NAND FLASH and implementing effective management are crucial for manufacturers, R&D institutions and testing centers, which directly affect product reliability evaluation, performance optimization and service life. Therefore, an effective life prediction and management method to monitor performance parameters and formulate management strategies is crucial to ensure the operational stability and reliability of NAND FLASH.

[0003] Nowadays, data processing technology is used to analyze sampling data, establish degradation models to evaluate operating status and formulate management strategies, or try to apply artificial intelligence technology to life prediction and management processes to better evaluate performance degradation trends and optimize management parameters. However, these methods still have challenges in integrating multi-dimensional performance parameters, processing nonlinear characteristics, and adapting to dynamic working environments. In addition, these prediction and management methods often ignore some unique characteristics of NAND FLASH, such as threshold drift, gate interference, temperature effects, etc., which may have a significant impact on life prediction and management decisions. That is, the existing NAND FLASH life prediction and management methods ignore multi-dimensional performance parameters and some unique characteristics of NAND FLASH, resulting in low accuracy of the final life prediction results and poor management strategy effects. Summary of the invention

[0004] The main purpose of the present invention is to solve the problem that the existing NAND FLASH life prediction and management methods ignore the multi-dimensional performance parameters and some unique characteristics of NAND FLASH, resulting in low accuracy of the final life prediction result and poor management strategy effect.

[0005] A first aspect of the present invention provides a NAND FLASH life prediction and management method, the NAND FLASH life prediction and management method comprising: obtaining first multi-source original parameter data corresponding to a first prediction parameter and second multi-source original parameter data corresponding to a second prediction parameter of a target NAND FLASH, and performing time alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multimodal parameter data and second multimodal parameter data; performing multi-level feature extraction on the first multimodal parameter data and the second multimodal parameter data respectively to obtain a first parameter feature vector and a second parameter feature vector, and performing multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multidimensional feature space corresponding to performance degradation of the target NAND FLASH; performing pairing association and feature combination on parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multidimensional feature space to obtain an initial fused feature matrix, and performing error coefficient calculation and performance degradation calculation on the initial fused feature matrix for NAND FLASH life attenuation to obtain a comprehensive feature matrix; based on the comprehensive feature matrix, FLASH performs performance prediction and prediction timing combination of multiple P / E cycle scales to generate a life prediction result, and based on the preset NAND FLASH performance state parameters, the life prediction result is divided into threshold intervals and deviations of multiple state parameters to obtain an initial state margin; based on the performance state parameter relationship corresponding to the NAND FLASH performance state parameter, the initial state margin is weighted calculated to obtain a NAND FLASH safe operation margin, and the NAND FLASH safe operation margin is evaluated at multiple levels to obtain a health status evaluation result of the target NAND FLASH; the health status evaluation result is threshold compared and graded to obtain a working state level set of the NAND FLASH, and based on the preset parameter adjustment strategy, the working state level set is mapped and associated with multiple management parameters to generate an operation management result of the target NAND FLASH.

[0006] Optionally, in a first implementation method of the first aspect of the present invention, the timing alignment and multiple preprocessing of the first multi-source original parameter data and the second multi-source original parameter data to obtain first multimodal parameter data and second multimodal parameter data include: uniformly converting the sampling period of the first multi-source original parameter data to obtain a first parameter time series, aligning the acquisition time of the second multi-source original parameter data to obtain a second parameter time series, and timestamp aligning and interpolating the first parameter time series and the second parameter time series to obtain a synchronization parameter sequence; extracting the corresponding temperature and electromagnetic interference anomaly data in the synchronization parameter sequence, and filtering the temperature and electromagnetic interference anomaly data to generate a steady-state parameter sequence; normalizing the data dimension in the steady-state parameter sequence to obtain a normalized parameter sequence, and removing periodic trends and reducing noise on the normalized parameter sequence to obtain a characteristic parameter sequence; based on the first prediction parameter and the second prediction parameter, segmentally combining the characteristic parameter sequence corresponding to the number of P / E cycles to obtain first multimodal parameter data and second multimodal parameter data.

[0007] Optionally, in a second implementation of the first aspect of the present invention, the first multimodal parameter data includes flash memory cell characteristic parameter data, electrical parameter data and operating parameter data, the second multimodal parameter data includes temperature change data and error parameter data, the first parameter feature vector includes voltage distribution offset characteristics, inter-cell interference strength parameters, conductivity feature matrix, voltage margin parameters, programming rate parameters, charge retention time parameters, inter-block difference parameters, programming feature parameters and reading feature parameters, the second parameter feature vector includes temperature change sequence characteristics, temperature sensitive feature matrix, error distribution characteristics and error correction feature parameters, and the multi-level feature extraction of the first multimodal parameter data and the second multimodal parameter data is performed to obtain the first parameter feature vector and the second parameter feature vector, including: performing probability density calculation and sub-band decomposition on the threshold voltage distribution data corresponding to the flash memory cell characteristic parameter data to obtain the voltage distribution offset characteristics, and performing adjacent cell interference calculation on the gate coupling coefficient data corresponding to the flash memory cell characteristic parameter data to obtain the inter-cell interference strength parameter, and performing channel extraction on the corresponding channel coupling coefficient data in the flash memory cell characteristic parameter data to obtain the inter-cell interference strength parameter. Conductivity is extracted to generate a conductivity characteristic matrix; a boundary scan is performed on the read / write voltage window corresponding to the electrical parameter data to obtain a voltage margin parameter, and a timing characteristic is extracted on the programming slope corresponding to the electrical parameter data to obtain a programming rate parameter, and a leakage current is calculated on the charge retention characteristic corresponding to the electrical parameter data to obtain a charge retention time parameter; a difference calculation is performed on the erase / write rate data corresponding to the operation parameter data to obtain an inter-block difference parameter, and a statistical calculation is performed on the programming time data corresponding to the operation parameter data to obtain a programming characteristic parameter, and a fluctuation calculation is performed on the read time data corresponding to the operation parameter data to obtain a read characteristic parameter; a temperature numerical value calculation is performed on the temperature fluctuation characteristic corresponding to the temperature change data to obtain a temperature change sequence characteristic, and a cross calculation is performed on the electrical parameter data based on the temperature change data to obtain a temperature sensitive characteristic matrix; a statistical calculation is performed on the original error bit corresponding to the error parameter data to obtain an error distribution characteristic, and a numerical correction is performed on the correction strength of the error correction code corresponding to the error parameter data to obtain an error correction characteristic parameter.

[0008] Optionally, in a third implementation of the first aspect of the present invention, multiple feature association calculations are performed on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH, including: state division and overlap calculation of the voltage distribution offset feature to obtain a voltage operating state dimension, and based on the voltage operating state dimension, adjacent unit influence intensity and current change rate calculation are performed on the inter-unit interference intensity parameter and the conductivity characteristic matrix to obtain an interference feature dimension; based on the interference feature dimension, window range and leakage current slope calculation are performed on the voltage margin parameter, programming rate parameter and charge retention time parameter to obtain an electrical feature dimension, and based on the electrical feature dimension, the inter-block difference parameter, the programming feature parameter and the read The wear difference and timing parameter offset of the characteristic parameters are calculated to obtain the operation characteristic dimension; based on the operation characteristic dimension, the threshold drift and conductivity change rate of the temperature change sequence characteristics and the temperature sensitive characteristic matrix are calculated to obtain the temperature characteristic dimension, and based on the temperature characteristic dimension, the error density and error correction capability margin of the error distribution characteristics and the error correction characteristic parameters are calculated to obtain the error characteristic dimension; the voltage working state dimension, the interference characteristic dimension, the electrical characteristic dimension, the operation characteristic dimension, the temperature characteristic dimension and the error characteristic dimension are combined and mapped to obtain a multi-dimensional feature space.

[0009] Optionally, in a fourth implementation method of the first aspect of the present invention, the parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space are paired and associated and feature combined to obtain an initial fused feature matrix, and the initial fused feature matrix is ​​subjected to error coefficient calculation and performance degradation calculation of NAND FLASH life attenuation to obtain a comprehensive feature matrix, including: performing an association calculation of the voltage and error relationship on the voltage working state dimension and the error feature dimension in the multi-dimensional feature space to obtain a voltage and error feature association matrix, and based on the voltage and error feature association matrix, performing gate coupling strength calculation on the interference features in the interference feature dimension to obtain an initial fused feature matrix; based on the initial fused feature matrix, performing an association strength calculation of the temperature and threshold voltage drift amount on the temperature feature dimension to obtain a temperature and error fusion feature, and based on the temperature and error fusion feature, performing a timing change calculation of the read and write performance on the electrical feature dimension to obtain a performance and error fusion feature; based on the performance and error fusion feature, performing a wear balance calculation on the P / E cycle features corresponding to the operation feature dimension to obtain a comprehensive feature matrix of performance degradation corresponding to the target NAND FLASH.

[0010] Optionally, in a fifth implementation of the first aspect of the present invention, based on the comprehensive feature matrix, the target NAND FLASH is subjected to multi-P / E cycle scale performance prediction and prediction timing combination to generate a life prediction result, including: performing sampling segmentation and margin change calculation for the corresponding voltage and error feature association matrix in the comprehensive feature matrix for the preset initial P / E cycle to obtain transition process data of the corresponding voltage state transition, and based on the transition process data, performing variance and deviation calculation for the corresponding programming rate and read time data in the performance and error fusion feature to obtain a short-term performance prediction result; based on the short-term performance prediction result, performing timing superposition and incremental change for the corresponding initial fusion feature matrix in the comprehensive feature matrix for the preset secondary P / E cycle. The rate is calculated to obtain the accumulation process data of the corresponding electron trap accumulation, and based on the accumulation process data, the attenuation rate and threshold offset are calculated for the corresponding retention time and error correction capability data in the temperature and error fusion characteristics to obtain the mid-term performance prediction result; based on the mid-term performance prediction result, the characteristic accumulation and failure probability calculation of the preset three P / E cycles are performed on the corresponding performance and error fusion characteristics in the comprehensive feature matrix to obtain the failure process data of the corresponding storage unit failure, and based on the failure process data, the standard deviation and dispersion of the inter-block wear difference and timing parameter offset corresponding to the operation feature dimension are calculated to obtain the life prediction result.

[0011] Optionally, in a sixth implementation manner of the first aspect of the present invention, based on the preset NAND FLASH performance state parameters, the life prediction result is divided into threshold intervals and deviations of multiple state parameters to obtain an initial state margin, including: based on the preset NAND FLASH performance state parameters, the life prediction result is calculated based on the difference of the threshold voltage window to obtain voltage stability state data, and the overlapping boundaries between each state in the voltage stability state data are calculated to obtain a voltage margin value; based on the voltage margin value, the life prediction result is calculated based on the deviation of electron trap accumulation to obtain storage unit performance data, and the storage unit performance data is calculated based on the distribution of failure states to obtain a reliable state margin value; based on the reliable state margin value, the life prediction result is compared and calculated with the timing parameter offset to obtain storage block wear uniformity data, and the storage block wear uniformity data is calculated based on the threshold of the wear uniformity to obtain an initial state margin.

[0012] The second aspect of the present invention provides a NAND FLASH life prediction and management device, which includes: a preprocessing module, which is used to obtain first multi-source original parameter data corresponding to a first prediction parameter and second multi-source original parameter data corresponding to a second prediction parameter of a target NAND FLASH, and perform time alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multimodal parameter data and second multimodal parameter data; an association calculation module, which is used to perform multi-level feature extraction on the first multimodal parameter data and the second multimodal parameter data respectively to obtain a first parameter feature vector and a second parameter feature vector, and perform multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH; a feature fusion module, which is used to perform pairing association and feature combination on parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space to obtain an initial fused feature matrix, and perform NAND on the initial fused feature matrix The error coefficient calculation and performance degradation calculation of FLASH life attenuation are performed to obtain a comprehensive feature matrix; a life prediction module is used to perform performance prediction and prediction timing combination of multiple P / E cycle scales on the target NAND FLASH based on the comprehensive feature matrix to generate a life prediction result, and based on the preset NAND FLASH performance state parameters, the threshold interval division and deviation calculation of multiple state parameters of the life prediction result are performed to obtain the initial state margin; a margin calculation module is used to perform weighted calculation on the initial state margin based on the performance state parameter relationship corresponding to the NAND FLASH performance state parameter to obtain the NAND FLASH safe operation margin, and perform multi-level operation state evaluation on the NAND FLASH safe operation margin to obtain the health state evaluation result of the target NAND FLASH; a parameter adjustment module is used to perform threshold comparison and level division on the health state evaluation result to obtain a working state level set of NAND FLASH, and based on the preset parameter adjustment strategy, map and associate multiple management parameters on the working state level set to generate the operation management result of the target NAND FLASH.

[0013] The third aspect of the present invention provides a NAND FLASH life prediction and management device, comprising: a memory and at least one processor, wherein the memory stores instructions; the at least one processor calls the instructions in the memory so that the NAND FLASH life prediction and management device performs each step of the above-mentioned NAND FLASH life prediction and management method.

[0014] A fourth aspect of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores instructions, which, when executed on a computer, enable the computer to execute the various steps of the above-mentioned NAND FLASH life prediction and management method.

[0015] The above-mentioned NAND FLASH life prediction and management method and related equipment. In an embodiment of the present invention, by obtaining the first multi-source original parameter data corresponding to the first prediction parameter of the target NAND FLASH and the second multi-source original parameter data corresponding to the second prediction parameter, and performing time alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data, the first multi-modal parameter data and the second multi-modal parameter data are obtained; multi-level feature extraction is performed on the first multi-modal parameter data and the second multi-modal parameter data respectively to obtain the first parameter feature vector and the second parameter feature vector, and multiple feature association calculations are performed on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH; the parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space are paired and associated and feature combined to obtain an initial fused feature matrix, and the initial fused feature matrix is ​​calculated for the error coefficient of NAND FLASH life attenuation and the performance degradation calculation to obtain a comprehensive feature matrix; based on the comprehensive feature matrix, the target NAND FLASH is subjected to performance prediction and prediction timing combination at multiple P / E cycle scales to generate a life prediction result, and based on the preset NAND FLASH performance status parameters, divide the threshold intervals of various status parameters and calculate the deviations of the life prediction results to obtain the initial state margin; based on the performance status parameter relationship corresponding to the NAND FLASH performance status parameters, perform weighted calculation on the initial state margin to obtain the NAND FLASH safe operation margin, and perform multi-level operation status evaluation on the NAND FLASH safe operation margin to obtain the health status evaluation result of the target NAND FLASH; perform threshold comparison and level division on the health status evaluation results to obtain the working status level set of NAND FLASH, and based on the preset parameter adjustment strategy, map and associate multiple management parameters on the working status level set to generate the operation management result of the target NAND FLASH. Compared with the prior art, the present application obtains multimodal parameter data by multi-dimensionally collecting and extracting features of the physical electrical parameters and environmental error parameters of the target NAND FLASH, and performing time alignment and preprocessing on the acquired basic feature data; then, through multi-level feature extraction and association analysis, parameter feature vectors are obtained and a multi-dimensional feature space is constructed, and an initial fusion feature matrix is ​​generated based on feature pairing and fusion analysis, and a comprehensive feature matrix is ​​obtained through error coefficient and performance degradation calculation; then, performance prediction of NAND FLASH is performed at multiple P / E cycle scales to generate life prediction results, and threshold division and deviation calculation are performed based on performance state parameters to obtain initial state margin; then, through weighted calculation and state evaluation, safe operation margin and health state evaluation results are obtained; finally, based on state level division and parameter mapping, operation management results are generated.Through hierarchical data processing and feature analysis, the problem of accurate identification of NAND FLASH life prediction is solved, especially in terms of voltage distribution, gate interference and error accumulation. The physical characteristics and performance degradation characteristics of NAND FLASH are fully considered, which effectively improves the prediction accuracy; and the multi-level feature fusion and state mapping strategy are adopted to realize the correlation analysis between performance parameters and enhance the reliability of life prediction; in addition, by accurately evaluating the operating status and formulating management plans, efficient and accurate prediction and management of flash memory life are achieved as a whole.

[0016] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description, claims and drawings.

[0017] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of a first embodiment of a method for predicting and managing NAND FLASH life in an embodiment of the present invention;

[0019] Figure 2 A schematic diagram of an embodiment of a NAND FLASH life prediction and management device in an embodiment of the present invention;

[0020] Figure 3 Schematic diagram of an embodiment of a NAND FLASH life prediction and management device in an embodiment of the present invention. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] The terms "including" and "having" and any variations thereof mentioned in the embodiments of the present invention are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device end including a series of steps or units is not limited to the listed steps or units, but may optionally include other steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or device ends.

[0023] To facilitate understanding of this embodiment, the specific process of the embodiment of the present invention is described below. Figure 1 The first embodiment of the NAND FLASH life prediction and management method in the embodiment of the present invention includes:

[0024] 101. Obtain first multi-source original parameter data corresponding to a first prediction parameter and second multi-source original parameter data corresponding to a second prediction parameter from a target NAND FLASH, and perform timing alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multi-modal parameter data and second multi-modal parameter data;

[0025] The embodiments of the present application can acquire and process relevant data based on artificial intelligence technology. Artificial Intelligence (AI) is the theory, method, technology and application system that uses digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results.

[0026] AI basic technologies generally include sensors, dedicated AI chips, cloud computing, distributed storage, big data processing technology, operation / interaction systems, mechatronics, etc. AI software technologies mainly include computer vision technology, robotics technology, biometrics technology, speech processing technology, natural language processing technology, and machine learning / deep learning.

[0027] In this embodiment, the first prediction parameter here includes physical characteristic parameters, electrical characteristic parameters and operating characteristic parameters, and the second prediction parameter here includes temperature characteristic parameters and error characteristic parameters; the first multi-source original parameter data is uniformly converted in sampling period to obtain a first parameter time series, and the second multi-source original parameter data is aligned in acquisition time to obtain a second parameter time series, and the first parameter time series and the second parameter time series are timestamp aligned and interpolated to obtain a synchronization parameter sequence; the corresponding temperature and electromagnetic interference abnormal data in the synchronization parameter sequence are extracted, and the temperature and electromagnetic interference abnormal data are filtered to generate a steady-state parameter sequence; the data dimension is normalized in the steady-state parameter sequence to obtain a normalized parameter sequence, and the normalized parameter sequence is subjected to periodic trend removal and noise reduction to obtain a characteristic parameter sequence; based on the first prediction parameter and the second prediction parameter, the characteristic parameter sequence is segmented and combined corresponding to the number of P / E cycles to obtain first multimodal parameter data and second multimodal parameter data.

[0028] In practical applications, firstly, the first multi-source original parameter data corresponding to the first prediction parameter and the second multi-source original parameter data corresponding to the second prediction parameter of the target NAND FLASH are obtained. In terms of the acquisition of physical characteristic parameters, based on the specific test points of the storage device, a dedicated measuring device is used to perform nanometer-level precision scanning on the oxide layer thickness of the storage unit, the interface state density is measured through the capacitance-voltage curve, the electron trap concentration is measured using the subthreshold swing method, and the leakage current change is monitored using a high-precision ammeter. The analog signal is converted into a digital signal for recording through a data acquisition card. At the same time, in the process of acquiring electrical characteristic parameters, the threshold voltage distribution of the storage unit is scanned and measured through a memory tester, the voltage distribution under different programming states is recorded, the voltage-time curve during the programming process is acquired to obtain the programming slope, the charge retention characteristic data is acquired through the retention time test, and the voltage change during the read and write operations is monitored in real time. ; In terms of operation characteristic parameters, the number of P / E (program / erase) cycles of each storage block is recorded through the storage controller, and the time of each programming, erasing and reading operation is monitored. The collection of these operation parameters needs to be synchronized with the command execution process of the memory; then the collected physical characteristic parameters, electrical characteristic parameters and operation characteristic parameters are organized according to a unified time tag to form the initial first multi-source original parameter data set; at the same time, in terms of environmental parameter monitoring, a temperature sensor is used to perform periodic sampling within a preset working range (-40℃ to 85℃) to record the temperature change of the storage chip; in the process of collecting error characteristic parameters, the error detection circuit is used to count the number of original error bits in real time, record the maximum number of error bits of each storage page, and count the number of retries during the reading operation. The collection of these error parameters needs to be synchronized with the read and write operations of the memory. The collected temperature change data and error parameter data are time-aligned to form the initial second multi-source original parameter data set; then the sliding window method is used for secondary sampling, and each parameter is repeatedly sampled multiple times within the time window, and the influence of random noise is eliminated by average calculation, which can not only improve the signal-to-noise ratio of the parameter data, but also maintain the trend characteristics of parameter changes. Through this multi-source parameter collection and preprocessing method, all-round performance monitoring of NAND FLASH storage devices can be achieved.

[0029] Secondly, for the physical and electrical parameters in the first multi-source original parameter data, the sampling periods of parameters such as threshold voltage distribution and programming slope are uniformly converted into reference periods through resampling technology (wherein the selection of reference period needs to satisfy the Nyquist sampling theorem to ensure that important features of the signal are not lost), and then the converted parameter data are reorganized in chronological order to generate a first parameter time series with a uniform time step. At the same time, the reliability parameters in the second multi-source original parameter data, including error rate statistics, number of retries, etc., are time-aligned. Since these parameters are often collected during read and write operations, their sampling time points are uneven, and thus interpolation processing is performed through timestamp information to generate an equally spaced second parameter time series; the first parameter time series and the second parameter time series are then aligned through the timestamp alignment mechanism to achieve synchronization of the two types of parameter sequences, and in the alignment process, linear interpolation or spline interpolation methods are used to supplement data in the case of non-coincidence of sampling points to ensure that all parameters have corresponding values ​​at each time point, thereby obtaining a complete synchronization parameter sequence; then, abnormal data caused by temperature changes and electromagnetic interference in the synchronization parameter sequence are identified and processed, that is, statistical methods are used, such as by calculating the mean and standard deviation of the parameters, to mark data points that exceed the normal range as abnormal, and for the identified abnormal data, median filtering or wavelet filtering is used to eliminate the influence of sudden interference and generate a steady-state parameter sequence; then, the maximum and minimum normalization or Z-score normalization method is used to normalize the steady-state parameter sequence. The columns are normalized, and the values ​​of all parameters are mapped to the same interval to make different parameters comparable. For the normalized parameter sequence, it is also necessary to remove the periodic trend caused by the working cycle or environmental changes. The main periodic components are identified by Fourier analysis, and these periodic changes are removed by a bandpass filter. At the same time, further noise reduction processing is performed using methods such as moving average to obtain a characteristic parameter sequence that reflects the essential changes of the parameters. Then, based on the characteristics of the first prediction parameter and the second prediction parameter, the characteristic parameter sequence is segmented according to the number of P / E cycles, where each segment contains a certain number of P / E cycles. The segmentation needs to consider the degradation characteristics of the FLASH storage unit to ensure that the parameter changes in each segment can reflect the characteristics of performance degradation. Then, by combining and analyzing the parameters in each segment, the characteristics related to the physical and electrical parameters are combined into the first multimodal parameter data, and the parameters related to the temperature and error characteristics are combined into the second multimodal parameter data. Therefore, based on the segmented combination method of the P / E cycle, the performance change characteristics of NANDFLASH in different usage stages can be effectively captured.

[0030] 102. Perform multi-level feature extraction on the first multimodal parameter data and the second multimodal parameter data respectively to obtain a first parameter feature vector and a second parameter feature vector, and perform multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to performance degradation of the target NAND FLASH;

[0031] In this embodiment, the first multimodal parameter data here includes flash memory cell characteristic parameter data, electrical parameter data and operation parameter data, the second multimodal parameter data here includes temperature change data and error parameter data, the first parameter feature vector here includes voltage distribution offset characteristics, inter-cell interference strength parameters, conductivity feature matrix, voltage margin parameters, programming rate parameters, charge retention time parameters, inter-block difference parameters, programming feature parameters and reading feature parameters, and the second parameter feature vector here includes temperature change sequence characteristics, temperature sensitivity feature matrix, error distribution characteristics and error correction feature parameters; the threshold voltage distribution data corresponding to the flash memory cell characteristic parameter data is processed The method comprises the following steps: performing probability density calculation and sub-band decomposition to obtain voltage distribution offset characteristics, performing adjacent cell interference calculation on the gate coupling coefficient data corresponding to the flash memory cell characteristic parameter data to obtain inter-cell interference strength parameters, and performing conductivity feature extraction on the channel conductivity corresponding to the flash memory cell characteristic parameter data to generate a conductivity feature matrix; performing boundary scanning on the read / write voltage window corresponding to the electrical parameter data to obtain voltage margin parameters, and extracting timing characteristics of the programming slope corresponding to the electrical parameter data to obtain programming rate parameters, and performing leakage current calculation on the charge retention characteristics corresponding to the electrical parameter data to obtain charge retention time parameters; performing boundary scanning on the read / write voltage window corresponding to the electrical parameter data to obtain voltage margin parameters, and extracting timing characteristics of the programming slope corresponding to the electrical parameter data to obtain programming rate parameters, and performing leakage current calculation on the charge retention characteristics corresponding to the electrical parameter data to obtain charge retention time parameters; performing operation parameter data The erase rate data corresponding to the operation parameter data are statistically calculated to obtain the inter-block difference parameter, and the programming time data corresponding to the operation parameter data are statistically calculated to obtain the programming characteristic parameter, and the reading time data corresponding to the operation parameter data are fluctuated to obtain the reading characteristic parameter; the temperature fluctuation characteristics corresponding to the temperature change data are calculated to obtain the temperature change sequence characteristics, and the electrical parameter data are cross-calculated based on the temperature change data to obtain the temperature sensitive characteristic matrix; the original error bits corresponding to the error parameter data are statistically calculated to obtain the error distribution characteristics, and the correction strength of the error correction code corresponding to the error parameter data is statistically calculated to obtain the error distribution characteristics. The method comprises the following steps: performing state division and overlapping calculation on the voltage distribution offset characteristic to obtain a voltage working state dimension, and based on the voltage working state dimension, performing adjacent unit influence intensity and current change rate calculation on the inter-unit interference intensity parameter and the conductivity characteristic matrix to obtain an interference characteristic dimension; based on the interference characteristic dimension, performing window range and leakage current slope calculation on the voltage margin parameter, the programming rate parameter and the charge retention time parameter to obtain an electrical characteristic dimension, and based on the electrical characteristic dimension, performing wear difference and timing parameter offset calculation on the inter-block difference parameter, the programming characteristic parameter and the reading characteristic parameter to obtain an operation characteristic dimension;Based on the operation feature dimension, the threshold drift amount and conductivity change rate are calculated for the temperature change sequence feature and the temperature sensitive feature matrix to obtain the temperature feature dimension, and based on the temperature feature dimension, the error density and error correction capability margin are calculated for the error distribution feature and the error correction feature parameter to obtain the error feature dimension; the voltage working state dimension, the interference feature dimension, the electrical feature dimension, the operation feature dimension, the temperature feature dimension and the error feature dimension are combined and mapped to obtain a multi-dimensional feature space. ;

[0032] In practical applications, the flash memory cell characteristics in the first multimodal parameter data are firstly calculated by performing probability density function calculation on the threshold voltage distribution data, the distribution overlap between different voltage states is analyzed, and the sub-band decomposition is performed by wavelet transform to extract the offset trend of the voltage state, thereby obtaining the voltage distribution offset characteristics reflecting the voltage stability of the storage cell; and the gate coupling coefficient data is calculated by calculating the electric field interference intensity between adjacent storage cells, combined with the voltage fluctuation during read and write operations, to obtain the interference intensity parameter characterizing the degree of mutual influence between cells; and the channel conductivity data is analyzed by analyzing the relationship between the source-drain current and the gate voltage, extracting the subthreshold swing characteristics, and constructing a conductivity characteristic matrix reflecting the conduction characteristics of the storage cell; in terms of feature extraction of electrical parameters, the read and write voltage window data is scanned under different programming states The voltage boundary of the program is determined, and the voltage margin between adjacent states is calculated to obtain the voltage margin parameter that characterizes the programming reliability. The programming slope data is analyzed by analyzing the voltage change rate during the programming process and extracting the timing characteristics to obtain the programming rate parameter that reflects the programming efficiency. The charge retention characteristic data is measured by measuring the change trend of the leakage current over time and calculating the charge loss rate to obtain the charge retention time parameter that characterizes the data retention ability. For the operation parameter data, the erase and write rate data is calculated by calculating the erase and write speed differences between different storage blocks to obtain the block difference parameters that reflect the uniformity of the storage blocks. The programming time data is calculated by calculating the distribution characteristics and change trends of the programming time to obtain the programming characteristic parameters that reflect the programming performance. The read time data is calculated by calculating the change law of the read delay to obtain the read characteristic parameters that characterize the read performance. In the processing of the second multimodal parameter data, the temperature change data is obtained by calculating the amplitude, frequency and duration of temperature fluctuations to obtain the temperature change sequence characteristics reflecting the working environment characteristics, and the temperature change data is cross-analyzed with the electrical parameter data to calculate the degree of influence of temperature change on electrical characteristics and construct a temperature sensitive characteristic matrix; and the error parameter data is processed to obtain the error distribution characteristics reflecting data reliability by statistically analyzing the spatial distribution and time evolution characteristics of the original error bits, and the correction strength data of the error correction code is obtained by calculating the margin of correction capability to obtain the error correction characteristic parameters reflecting the error correction performance; and then the original multimodal parameter data is converted into a more representative characteristic vector. The first parameter characteristic vector includes multiple parameters reflecting the physical characteristics, electrical performance and operation characteristics of the storage unit, which characterize the working state and performance changes of NAND FLASH from different angles, while the second parameter characteristic vector includes characteristic parameters of environmental factors and reliability indicators, which reflect the influence of external conditions on storage performance and the ability to ensure data reliability.

[0033] Secondly, the combined method of divergence (JSD) and divergence (KLD) is used to divide the voltage distribution offset characteristics into states and calculate the overlap. That is, by calculating the distribution overlap between different voltage states, the voltage window margin between adjacent states is evaluated. Combined with the separation and stability analysis between states, the voltage working state dimension reflecting the working state of the storage unit is constructed. The distance measurement calculation formula between the distributions is:

[0034] ;

[0035] in, , P and Q are the probability distributions of adjacent voltage states , P, Q are probability distribution functions of adjacent voltage states, M is a mixed distribution, and i is a voltage state index (for example, for the four voltage states (11, 10, 01, 00) of MLC NAND FLASH, the JSD values ​​between adjacent states are calculated, such as the overlap between states 11 and 10. Assuming that P(11) and P(10) are normally distributed, the calculated JSD value can quantify the degree of separation between states); and then combining the interference intensity parameter between cells and the conductivity characteristic matrix, the electric field coupling effect between adjacent storage cells is analyzed, the spatial distribution characteristics of the interference influence are calculated, and the change law of the channel current is evaluated to obtain the interference characteristic dimension that characterizes the mutual influence between cells; and then based on the analysis results of the interference characteristic dimension, the voltage margin parameter, programming rate parameter and charge retention time parameter are calculated by calculating the dynamic range of the programming voltage window and the drift rate of the threshold voltage, and the attenuation trend of the charge retention characteristic is analyzed to obtain the electrical characteristic dimension that reflects the electrical performance of the storage cell, and based on this electrical characteristic dimension, further Analyze the inter-block difference parameters, programming characteristic parameters and reading characteristic parameters, that is, by calculating the uneven degree of wear between different storage blocks, combined with the changes in the timing characteristics of programming and reading operations, evaluate the offset trend of performance parameters, and construct an operation characteristic dimension that characterizes the operation characteristics; then based on the analysis results of the operation characteristic dimension, process the temperature change sequence characteristics and the temperature sensitive characteristic matrix, calculate the threshold voltage drift caused by temperature change, analyze the change law of conductivity characteristics with temperature, and obtain the temperature characteristic dimension that reflects the environmental impact, and on the basis of the temperature characteristic dimension, calculate the spatial distribution density and time evolution characteristics of the error bits, and evaluate the error correction capability margin of the error correction code at the same time, and construct an error characteristic dimension that characterizes reliability; then, these six characteristic dimensions are mapped by establishing the relationship between the dimensions, analyze the contribution of each dimensional feature to the storage performance, and construct a multi-dimensional feature space that can fully reflect the performance status of NAND FLASH (this feature space not only includes the voltage state and interference characteristics at the physical level, but also covers electrical performance, operation characteristics, environmental impact and reliability indicators).

[0036] 103. Pairing and associating parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space and combining the features to obtain an initial fusion feature matrix, and performing NANDFLASH life attenuation error coefficient calculation and performance degradation calculation on the initial fusion feature matrix to obtain a comprehensive feature matrix;

[0037] In this embodiment, the voltage-error relationship is associated with the voltage working state dimension and the error feature dimension in the multi-dimensional feature space to obtain a voltage-error feature association matrix, and based on the voltage-error feature association matrix, the gate coupling strength of the interference feature in the interference feature dimension is calculated to obtain an initial fusion feature matrix; based on the initial fusion feature matrix, the association strength of the temperature and the threshold voltage drift amount is calculated for the temperature feature dimension to obtain a temperature-error fusion feature, and based on the temperature-error fusion feature, the timing change of the read and write performance is calculated for the electrical feature dimension to obtain a performance-error fusion feature; based on the performance-error fusion feature, the wear balance calculation is performed on the P / E cycle feature corresponding to the operation feature dimension to obtain a comprehensive feature matrix of performance degradation corresponding to the target NANDFLASH.

[0038] In practical applications, by performing cross-correlation analysis on the voltage working state dimension and the error feature dimension in the multi-dimensional feature space, the distribution law of error bits under different voltage states is calculated, and the influence of voltage window changes on error generation is evaluated, so as to construct a voltage and error feature association matrix. Based on the voltage and error feature association matrix, a nonlinear coupling model is used to calculate the electric field interference intensity between adjacent storage cells, and the contribution of the interference effect to the error generation is evaluated. These features are combined to form an initial fusion feature matrix. The interference intensity calculation formula of the nonlinear coupling model is:

[0039] ;

[0040] Where Kc is the coupling coefficient matrix, V is the voltage value of the adjacent unit, d is the distance between units, λ is the characteristic attenuation length, (i, j) and (m, n) represent the position coordinates of the target unit and the interference unit respectively (i.e. is the coupling coefficient matrix between the target unit (i, j) and the interference unit (m, n)), is the voltage value of the interference unit (m,n), is the distance between the target cell (i, j) and the interference cell (m, n), so as to describe the degree of influence of the voltage change of the adjacent cell on the target cell (for example, when the programming voltage of the adjacent cell changes from 3V to 4V, it may cause the threshold voltage of the target cell to shift by 0.2V); then based on the analysis results of the initial fusion feature matrix, the threshold voltage drift caused by the temperature change is calculated for the temperature feature dimension, the degree of influence of the temperature fluctuation on the error is analyzed, and the correlation between the temperature change and the voltage stability is established to obtain the temperature and error fusion feature, and based on the temperature and error fusion feature, the read and write performance parameters in the electrical feature dimension are calculated by calculating the changes in the timing characteristics of the read and write operations, the influence of the performance degradation on the error rate is evaluated, and the performance and error fusion feature reflecting the relationship between performance and reliability is constructed; then based on the performance and error fusion feature, the P / E cycle feature in the operation feature dimension is calculated by calculating the wear leveling degree between different storage blocks, the influence of the cycle erase and write on the performance degradation is evaluated, and the reliability problem caused by the uneven wear is considered, so as to construct a complete comprehensive feature matrix, and the construction formula of the comprehensive feature matrix is ​​as follows:

[0041] ;

[0042] in, is the weight of each factor, n is the number of P / E cycles, is the decay rate parameter (indicating the sensitivity of this factor to performance decay), It is a degradation index. For example, it is predicted that after 10,000 P / E cycles, the performance of the storage unit may drop to 85% of the initial value. This matrix not only reflects the relationship between the various performance parameters of NAND FLASH, but also reflects the coupling effect of various factors in the performance degradation process, providing a reliable characteristic basis for subsequent life prediction.

[0043] 104. Based on the comprehensive feature matrix, the target NAND FLASH is subjected to performance prediction and prediction timing combination of multiple P / E cycle scales to generate life prediction results, and based on the preset NAND FLASH performance state parameters, the life prediction results are subjected to threshold interval division and deviation calculation of multiple state parameters to obtain the initial state margin;

[0044] In this embodiment, the sampling segmentation and margin change calculation of the preset initial P / E cycle are performed on the corresponding voltage and error feature association matrix in the comprehensive feature matrix to obtain the transition process data of the corresponding voltage state transition, and based on the transition process data, the variance and deviation calculations are performed on the corresponding programming rate and read time data in the performance and error fusion feature to obtain the short-term performance prediction result; based on the short-term performance prediction result, the timing superposition and incremental change rate calculations of the preset secondary P / E cycle are performed on the corresponding initial fusion feature matrix in the comprehensive feature matrix to obtain the accumulation process data of the corresponding electron trap accumulation, and based on the accumulation process data, the attenuation rate and threshold offset calculations are performed on the corresponding retention time and error correction capability data in the temperature and error fusion feature to obtain the mid-term performance prediction result; based on the mid-term performance prediction result, the feature accumulation and failure probability calculations of the preset three P / E cycles are performed on the corresponding performance and error fusion feature in the comprehensive feature matrix to obtain the failure process data of the corresponding storage unit failure, and based on the failure process data, the standard deviation and dispersion calculations are performed on the inter-block wear difference and timing parameter offset corresponding to the operation feature dimension to obtain the life prediction result. Based on the preset NAND FLASH performance state parameters, the difference of the threshold voltage window is calculated for the life prediction result to obtain voltage stable state data, and the overlapping boundaries between the various states in the voltage stable state data are calculated to obtain the voltage margin value; based on the voltage margin value, the deviation of electron trap accumulation is calculated for the life prediction result to obtain storage unit performance data, and the distribution of failure states is calculated for the storage unit performance data to obtain a reliable state margin value; based on the reliable state margin value, the comparison calculation of the inter-block wear difference and the timing parameter offset is performed on the life prediction result to obtain storage block wear uniformity data, and the threshold value of inter-block wear uniformity is calculated for the storage block wear uniformity data to obtain an initial state margin. The preset NAND FLASH performance status parameters here refer to the voltage window standard parameters (such as the standard threshold voltage distribution range, the minimum separation voltage between adjacent states, the allowable deviation range of the programming voltage, etc.), the electron trap standard parameters (such as the trap density baseline value under normal working conditions, the allowable rate of trap density growth, the voltage offset limit caused by the trap effect, etc.), and the uniformity standard parameters (such as the maximum difference threshold of the number of P / E cycles between blocks, the allowable range of timing parameter offset, the standard value of wear leveling, etc.).

[0045] In practical applications, the voltage and error feature correlation matrix in the comprehensive feature matrix is ​​first analyzed for the initial P / E cycle (i.e., a single P / E cycle). By sampling and segmenting within the preset initial cycle number range, the stability change of each voltage state is focused on, the voltage margin change between different states is calculated, and process data reflecting the dynamic change of the voltage state is constructed. Based on these change process data, the programming rate and read time parameters in the performance and error fusion features are further analyzed. The statistical characteristics of these parameters in the short term are calculated by using nonlinear time series analysis methods, including variance analysis and deviation calculation. The short-term prediction formula is:

[0046] ;

[0047] Among them, R(t) is the performance index function, α and β are the attenuation coefficients, is the feature weight, Fi(t) is the performance feature function of each performance feature, K(t) is the time kernel function, and S(τ) is the system response function. The performance change trend in the short term is predicted by the formula, and the short-term prediction result reflecting the early performance change of the storage unit is obtained; based on the results of the short-term performance prediction, the initial fusion features in the comprehensive feature matrix are further predicted. Within the preset second-stage P / E cycle range (such as 100 P / E cycles), the feature changes are tracked by time series superposition, and the incremental change rate of key parameters is calculated. The accumulation process of electron traps is focused on, and process data characterizing the dynamic formation of electron traps are constructed. Based on these accumulated process data, the key parameters in the temperature and error fusion features are further analyzed, including data retention time and error correction capability. The improved Poisson-Nernst-Planck equations are used to describe the accumulation process of trap charges to calculate the decay rate of these parameters and the offset of the threshold voltage. The medium-term prediction formula is:

[0048] ;

[0049] Among them, n is the trap charge density, D is the diffusion coefficient (the rate at which charges diffuse randomly in space), μ is the mobility (the driving speed of charges under the electric field E), E is the electric field strength, G and R are the trap generation and recombination rates, respectively. These parameters are functions of the temperature T. By solving the equation group, the accumulation characteristics of the trap charge over time are obtained, so as to obtain the prediction results reflecting the mid-term performance changes of the storage unit; then based on the results of the mid-term performance prediction, the performance and error fusion features in the comprehensive feature matrix are predicted in the long term. Within the preset third-stage P / E cycle range (such as 1000 P / E cycles), the failure trend of the storage unit is evaluated through feature accumulation and probability statistics methods, and process data characterizing the failure evolution of the unit is constructed. Based on these failure process data, combined with the key parameters in the operating characteristic dimension, the accelerated degradation model is combined with the Weibull distribution to describe the failure process to calculate the standard deviation of the wear difference between blocks and the discrete degree of the timing parameter offset. The long-term prediction formula is:

[0050] ;

[0051] Where λ(t) is the failure rate function (indicating the failure rate of the system at time t or under specific usage conditions (the probability density of failure per unit time)), is the baseline failure rate (indicating the initial failure rate or inherent failure rate of the system under stress-free conditions), is the acceleration factor (describing the influence of different environments or usage conditions on the failure rate), Si(t) is the stress function (indicating the specific environmental stress (such as temperature, humidity, voltage, frequent read and write operations, etc.) to which the system is subjected at time t), h(t) is the cumulative damage function (indicating the cumulative degree of damage to the system within time t), β is the shape parameter (describing the changing trend of the system failure rate over time) (for example: when a storage block has undergone 100,000 P / E cycles, its remaining life is predicted by the long-term prediction formula), and finally the prediction result reflecting the overall life characteristics of NAND FLASH is obtained.

[0052] Secondly, after obtaining the life prediction results, the voltage characteristics in the prediction results are evaluated. Based on the standard threshold voltage distribution range, the minimum separation voltage between adjacent states, and the allowable deviation range of the programming voltage, the voltage window standard parameters are calculated. The difference between the actual voltage window and the standard parameters is used to obtain the state data reflecting the voltage stability. The voltage margin value that characterizes the programming reliability is calculated by analyzing the distribution overlap between different states. Based on this voltage margin value, the influence of the accumulation of electron traps is analyzed. Combined with the trap density baseline value under normal working conditions, the allowable rate of trap density growth, and the voltage offset limit caused by the trap effect, the voltage margin value is used to determine the programming reliability. The standard parameters are calculated by calculating the deviation between the actual trap density and the expected level (i.e., the standard parameters) to obtain the state data reflecting the performance of the storage unit, and by analyzing the distribution characteristics of performance degradation, the state margin value representing the reliability is calculated; then based on the reliable state margin value, the uniformity characteristics in the prediction results are evaluated, and the uniformity standard parameters such as the maximum difference threshold of the number of P / E cycles between blocks, the allowable range of the timing parameter offset, and the standard value of the wear leveling degree are combined. By comparing the wear degree difference between different storage blocks and the offset of the timing parameters, the data reflecting the uniformity between blocks are obtained, and by calculating the relationship between these data and the preset threshold, the initial margin value representing the overall state of NAND FLASH is finally obtained. Not only the performance change characteristics of the storage unit at different time scales are considered, but also an effective connection between performance prediction and state evaluation is established through margin analysis.

[0053] 105. Based on the performance state parameter relationship corresponding to the NAND FLASH performance state parameter, perform weighted calculation on the initial state margin to obtain the NAND FLASH safe operation margin, and perform multi-level operation state evaluation on the NAND FLASH safe operation margin to obtain the health state evaluation result of the target NAND FLASH;

[0054] In this embodiment, the initial state margin is compared with single thresholds of multiple performance state parameters to obtain an operation state change index, and based on the performance state parameter relationship corresponding to the NAND FLASH performance state parameter, the operation state change index is weightedly calculated to obtain an operation state index; based on the operation state index, the corresponding working state of the target NAND FLASH is graded to obtain the NAND FLASH safe operation margin, and the multi-level characteristic health scores corresponding to the NAND FLASH safe operation margin are calculated; based on the characteristic health score, the target NAND FLASH is evaluated and calculated for the operation stability state to obtain a health state evaluation result.

[0055] In practical applications, the voltage window margin value in the initial state margin is compared with the standard threshold voltage distribution range, the electron trap accumulation margin value is compared with the trap density reference value, and the inter-block wear uniformity value is compared with the wear difference threshold. Through the comparison and calculation of these single thresholds, the operation state change index reflecting the degree of change of each performance parameter is obtained; then, based on the preset parameter weight relationship in the NAND FLASH performance state parameter, including the voltage state stability weight, the trap accumulation influence weight and the wear uniformity weight, the operation state change index is weightedly calculated to comprehensively evaluate the influence of each performance parameter on the overall state, thereby obtaining the operation state index reflecting the comprehensive performance of the storage device; then, based on this operation state index, combined with the preset performance level classification standard, the working state of the target NAND FLASH is graded, that is, by comparing the operation state index with the threshold boundaries of different levels, the working performance state of the storage device is divided into multiple levels such as normal level (all performance parameters are within the normal range), attention level (some parameters begin to show slight degradation), warning level (key parameters are close to critical values) and danger level (some parameters have exceeded the safety threshold), and the margin value reflecting the safe operation state of the storage device is obtained. At the same time, for different levels of safe operation margin, the voltage state stability score, trap effect impact score and wear uniformity score are calculated respectively. Through this multi-level scoring mechanism, the health status of the storage device in different performance dimensions is fully reflected; then based on the multi-level characteristic health score, the operation stability of the target NAND FLASH is comprehensively evaluated, that is, by analyzing the distribution characteristics and change trends of each score, the performance stability of the storage device is evaluated, and the mutual influence and coupling effect between various performance parameters are considered, and finally the health evaluation result reflecting the overall operation status of NAND FLASH is obtained. Through the step-by-step calculation of the operation status change index, operation status index and characteristic health score, an accurate evaluation of the health status of the storage device is achieved.

[0056] 106. Perform threshold comparison and level classification on the health status assessment result to obtain a working status level set of the NAND FLASH, and map and associate multiple management parameters on the working status level set based on a preset parameter adjustment strategy to generate an operation management result of the target NAND FLASH.

[0057] In this embodiment, threshold analysis is performed on data such as voltage state stability index, trap accumulation impact index and wear uniformity index in the health status assessment result, and these indexes are compared with their corresponding warning thresholds and danger thresholds to obtain the state level of each index. Then, according to the combination of state levels of different indicators, the working state of NAND FLASH is divided into multiple levels such as normal (using standard operating parameters), caution (appropriately adjusting operating parameters to delay degradation), warning (adopting conservative operating parameters to ensure reliability) and danger (limiting certain operations to avoid further damage), so as to form a complete working state level set; then, based on this working state level set, combined with preset parameter adjustment strategies, including voltage window adjustment strategy, programming timing adjustment strategy and block selection strategy, etc., a corresponding parameter adjustment scheme is established for each working state level to obtain an initial adjustment strategy, and then parameter optimization is performed on these initial strategies, including accurate calculation of voltage adjustment value, optimal configuration of timing parameters and balanced optimization of block allocation weights, so as to finally obtain a management parameter set that can guide the actual operation of NAND FLASH and generate the operation management result of the target NAND FLASH.

[0058] In the embodiment of the present invention, multi-modal parameter data is obtained by performing multi-dimensional acquisition and feature extraction on the physical electrical parameters and environmental error parameters of NAND FLASH, and performing time alignment and preprocessing on the acquired basic feature data; then, parameter feature vectors are obtained and a multi-dimensional feature space is constructed through multi-level feature extraction and association analysis, and an initial fusion feature matrix is ​​generated based on feature pairing and fusion analysis, and a comprehensive feature matrix is ​​obtained through error coefficient and performance degradation calculation; then, performance prediction of NAND FLASH at multiple P / E cycle scales is performed to generate life prediction results, and threshold division and deviation calculation are performed based on performance state parameters to obtain initial state margin; then, safe operation margin and health state evaluation results are obtained through weighted calculation and state evaluation; finally, operation management results are generated based on state level division and parameter mapping. Through hierarchical data processing and feature analysis, the problem of accurate identification of NAND FLASH life prediction is solved, especially in terms of voltage distribution, gate interference and error accumulation. The physical characteristics and performance degradation characteristics of NAND FLASH are fully considered, which effectively improves the prediction accuracy; and the multi-level feature fusion and state mapping strategy are adopted to realize the correlation analysis between performance parameters and enhance the reliability of life prediction; in addition, by accurately evaluating the operating status and formulating management plans, efficient and accurate prediction and management of flash memory life are achieved as a whole.

[0059] The above describes the NAND FLASH life prediction and management method in the embodiment of the present invention. The following describes the NAND FLASH life prediction and management device in the embodiment of the present invention. Figure 2 In one embodiment of the present invention, a NAND FLASH life prediction and management device includes:

[0060] A preprocessing module 201 is used to obtain first multi-source original parameter data corresponding to the first prediction parameter and second multi-source original parameter data corresponding to the second prediction parameter of the target NAND FLASH, and perform timing alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multi-modal parameter data and second multi-modal parameter data;

[0061] The association calculation module 202 is used to perform multi-level feature extraction on the first multimodal parameter data and the second multimodal parameter data respectively to obtain a first parameter feature vector and a second parameter feature vector, and perform multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH;

[0062] The feature fusion module 203 is used to perform pairing association and feature combination on the parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space to obtain an initial fusion feature matrix, and perform error coefficient calculation and performance degradation calculation of NAND FLASH life attenuation on the initial fusion feature matrix to obtain a comprehensive feature matrix;

[0063] The life prediction module 204 is used to perform performance prediction and prediction timing combination of multiple P / E cycle scales on the target NAND FLASH based on the comprehensive feature matrix to generate a life prediction result, and to perform threshold interval division and deviation calculation of multiple state parameters on the life prediction result based on preset NAND FLASH performance state parameters to obtain an initial state margin;

[0064] A margin calculation module 205 is used to perform weighted calculation on the initial state margin based on the performance state parameter relationship corresponding to the NAND FLASH performance state parameter to obtain the NAND FLASH safe operation margin, and perform multi-level operation state evaluation on the NAND FLASH safe operation margin to obtain the health state evaluation result of the target NAND FLASH;

[0065] The parameter adjustment module 206 is used to perform threshold comparison and level classification on the health status assessment result to obtain a set of working status levels of the NAND FLASH, and based on a preset parameter adjustment strategy, map and associate multiple management parameters on the working status level set to generate an operation management result of the target NAND FLASH.

[0066] In the embodiment of the present invention, multi-modal parameter data is obtained by performing multi-dimensional acquisition and feature extraction on the physical electrical parameters and environmental error parameters of NAND FLASH, and performing time alignment and preprocessing on the acquired basic feature data; then, parameter feature vectors are obtained and a multi-dimensional feature space is constructed through multi-level feature extraction and association analysis, and an initial fusion feature matrix is ​​generated based on feature pairing and fusion analysis, and a comprehensive feature matrix is ​​obtained through error coefficient and performance degradation calculation; then, performance prediction of NAND FLASH at multiple P / E cycle scales is performed to generate life prediction results, and threshold division and deviation calculation are performed based on performance state parameters to obtain initial state margin; then, safe operation margin and health state evaluation results are obtained through weighted calculation and state evaluation; finally, operation management results are generated based on state level division and parameter mapping. Through hierarchical data processing and feature analysis, the problem of accurate identification of NAND FLASH life prediction is solved, especially in terms of voltage distribution, gate interference and error accumulation. The physical characteristics and performance degradation characteristics of NAND FLASH are fully considered, which effectively improves the prediction accuracy; and the multi-level feature fusion and state mapping strategy are adopted to realize the correlation analysis between performance parameters and enhance the reliability of life prediction; in addition, by accurately evaluating the operating status and formulating management plans, efficient and accurate prediction and management of flash memory life are achieved as a whole.

[0067] above Figure 2 The NAND FLASH life prediction and management device in the embodiment of the present invention is described in detail from the perspective of modular functional entities. The NAND FLASH life prediction and management device in the embodiment of the present invention is described in detail from the perspective of hardware processing.

[0068] Figure 3It is a structural diagram of a NAND FLASH life prediction and management device provided by an embodiment of the present invention. The NAND FLASH life prediction and management device 300 may have relatively large differences due to different configurations or performances, and may include one or more processors (central processing units, CPU) 310 (for example, one or more processors) and a memory 320, and one or more storage media 330 (for example, one or more mass storage devices) storing application programs 333 or data 332. Among them, the memory 320 and the storage medium 330 can be short-term storage or permanent storage. The program stored in the storage medium 330 may include one or more modules (not shown in the figure), and each module may include a series of instruction operations in the NAND FLASH life prediction and management device 300. Furthermore, the processor 310 can be configured to communicate with the storage medium 330 to execute a series of instruction operations in the storage medium 330 on the NAND FLASH life prediction and management device 300.

[0069] The NAND FLASH life prediction and management device 300 may also include one or more power supplies 340, one or more wired or wireless network interfaces 350, one or more input and output interfaces 360, and / or one or more operating systems 331, such as Windows Serve, Mac OS X, Unix, Linux, FreeBSD, etc. It will be appreciated by those skilled in the art that Figure 3 The illustrated structure of the NAND FLASH life prediction and management device does not constitute a limitation on the NAND FLASH life prediction and management device, and may include more or less components than illustrated, or a combination of certain components, or a different arrangement of components.

[0070] The present invention also provides a NAND FLASH life prediction and management device, the computer device includes a memory and a processor, the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the processor executes each step of the NAND FLASH life prediction and management method in the above embodiments.

[0071] The present invention also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. Instructions are stored in the computer-readable storage medium. When the instructions are executed on a computer, the computer executes each step of the NAND FLASH life prediction and management method.

[0072] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0073] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program codes.

[0074] The present application can be used in many general or special computer system environments or configurations. For example: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, etc. The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in distributed computing environments, in which tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0075] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A NAND FLASH life prediction and management method, characterized in that: The NAND FLASH life prediction and management method includes: Acquire first multi-source original parameter data corresponding to the first prediction parameter and second multi-source original parameter data corresponding to the second prediction parameter of the target NAND FLASH, and perform timing alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multi-modal parameter data and second multi-modal parameter data; Performing multi-level feature extraction on the first multimodal parameter data and the second multimodal parameter data respectively to obtain a first parameter feature vector and a second parameter feature vector, and performing multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH; Pairing and associating parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space and combining the features to obtain an initial fusion feature matrix, and performing NANDFLASH life attenuation error coefficient calculation and performance degradation calculation on the initial fusion feature matrix to obtain a comprehensive feature matrix; Based on the comprehensive characteristic matrix, the target NAND FLASH is subjected to performance prediction and prediction timing combination of multiple P / E cycle scales to generate a life prediction result, and based on the preset NAND FLASH performance state parameters, the difference of the threshold voltage window is calculated for the life prediction result to obtain voltage stable state data, and the overlapping boundaries between the states in the voltage stable state data are calculated to obtain a voltage margin value; based on the voltage margin value, the deviation of the electron trap accumulation is calculated for the life prediction result to obtain storage unit performance data, and the distribution of the failure state is calculated for the storage unit performance data to obtain a reliable state margin value; based on the reliable state margin value, the life prediction result is subjected to comparison calculation of the inter-block wear difference and the timing parameter offset to obtain storage block wear uniformity data, and the threshold value of the inter-block wear uniformity is calculated for the storage block wear uniformity data to obtain an initial state margin; Based on the performance state parameter relationship corresponding to the NAND FLASH performance state parameter, weighted calculation is performed on the initial state margin to obtain the NAND FLASH safe operation margin, and a multi-level operation state evaluation is performed on the NAND FLASH safe operation margin to obtain a health state evaluation result of the target NAND FLASH; The health status assessment result is threshold-matched and graded to obtain a set of NAND FLASH working status levels, and based on a preset parameter adjustment strategy, the working status level set is mapped and associated with multiple management parameters to generate an operation management result of the target NAND FLASH.

2. The NAND FLASH life prediction and management method according to claim 1, characterized in that: The step of performing time sequence alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multi-modal parameter data and second multi-modal parameter data includes: Performing a uniform conversion of the sampling period of the first multi-source original parameter data to obtain a first parameter time series, performing acquisition time alignment on the second multi-source original parameter data to obtain a second parameter time series, and performing timestamp alignment and interpolation on the first parameter time series and the second parameter time series to obtain a synchronization parameter sequence; Extracting the temperature and electromagnetic interference abnormal data corresponding to the synchronization parameter sequence, and filtering the temperature and electromagnetic interference abnormal data to generate a steady-state parameter sequence; Normalizing the data dimension of the steady-state parameter sequence to obtain a normalized parameter sequence, and performing periodic trend removal and noise reduction on the normalized parameter sequence to obtain a characteristic parameter sequence; Based on the first prediction parameter and the second prediction parameter, the characteristic parameter sequence is segmented and combined corresponding to the number of P / E cycles to obtain first multimodal parameter data and second multimodal parameter data.

3. The NAND FLASH life prediction and management method according to claim 1, characterized in that: The first multimodal parameter data includes flash memory cell characteristic parameter data, electrical parameter data and operation parameter data, the second multimodal parameter data includes temperature change data and error parameter data, the first parameter feature vector includes voltage distribution offset feature, inter-cell interference strength parameter, conductivity feature matrix, voltage margin parameter, programming rate parameter, charge retention time parameter, inter-block difference parameter, programming feature parameter and reading feature parameter, the second parameter feature vector includes temperature change sequence feature, temperature sensitivity feature matrix, error distribution feature and error correction feature parameter, and the first multimodal parameter data and the second multimodal parameter data are respectively subjected to multi-level feature extraction to obtain the first parameter feature vector and the second parameter feature vector, including: Performing probability density calculation and sub-band decomposition on threshold voltage distribution data corresponding to the flash memory cell characteristic parameter data to obtain voltage distribution offset characteristics, performing adjacent cell interference calculation on gate coupling coefficient data corresponding to the flash memory cell characteristic parameter data to obtain inter-cell interference intensity parameters, and performing conductivity feature extraction on channel conductivity corresponding to the flash memory cell characteristic parameter data to generate a conductivity feature matrix; Performing boundary scanning on the read / write voltage window corresponding to the electrical parameter data to obtain voltage margin parameters, extracting timing characteristics of the programming rate corresponding to the electrical parameter data to obtain programming rate parameters, and calculating leakage current on the charge retention characteristics corresponding to the electrical parameter data to obtain charge retention time parameters; Performing difference calculation on the erase rate data corresponding to the operation parameter data to obtain an inter-block difference parameter, performing statistical calculation on the programming time data corresponding to the operation parameter data to obtain a programming characteristic parameter, and performing fluctuation calculation on the reading time data corresponding to the operation parameter data to obtain a reading characteristic parameter; Calculating the temperature value of the temperature fluctuation feature corresponding to the temperature change data to obtain the temperature change sequence feature, and cross-calculating the electrical parameter data based on the temperature change data to obtain a temperature sensitive feature matrix; Statistical calculation is performed on the original error bits corresponding to the error parameter data to obtain error distribution characteristics, and numerical correction is performed on the correction strength of the error correction code corresponding to the error parameter data to obtain error correction characteristic parameters.

4. The NAND FLASH life prediction and management method according to claim 3, characterized in that: The performing of multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH includes: Performing state division and overlap calculation on the voltage distribution offset feature to obtain a voltage working state dimension, and based on the voltage working state dimension, performing adjacent unit influence intensity calculation and current change rate calculation on the inter-unit interference intensity parameter and the conductivity characteristic matrix to obtain an interference characteristic dimension; Based on the interference characteristic dimension, a voltage margin parameter, a programming rate parameter, and a charge retention time parameter are calculated by window range and leakage current slope to obtain an electrical characteristic dimension, and based on the electrical characteristic dimension, a wear difference and a timing parameter offset are calculated for the inter-block difference parameter, the programming characteristic parameter, and the reading characteristic parameter to obtain an operation characteristic dimension; Based on the operation characteristic dimension, the threshold drift amount and the conductivity change rate are calculated for the temperature change sequence characteristics and the temperature sensitive characteristic matrix to obtain the temperature characteristic dimension, and based on the temperature characteristic dimension, the error density and the error correction capability margin are calculated for the error distribution characteristics and the error correction characteristic parameters to obtain the error characteristic dimension; The voltage working state dimension, the interference feature dimension, the electrical feature dimension, the operation feature dimension, the temperature feature dimension and the error feature dimension are combined and mapped to obtain a multi-dimensional feature space.

5. The NAND FLASH life prediction and management method according to claim 4, characterized in that: The parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space are paired and associated and feature combined to obtain an initial fusion feature matrix, and the error coefficient calculation and performance degradation calculation of NAND FLASH life attenuation are performed on the initial fusion feature matrix to obtain a comprehensive feature matrix, including: Performing a correlation calculation of the voltage-error relationship on the voltage working state dimension and the error feature dimension in the multi-dimensional feature space to obtain a voltage-error feature correlation matrix, and performing a gate coupling strength calculation on the interference feature in the interference feature dimension based on the voltage-error feature correlation matrix to obtain an initial fusion feature matrix; Based on the initial fusion feature matrix, the correlation strength between the temperature and the threshold voltage drift is calculated for the temperature feature dimension to obtain the temperature and error fusion feature, and based on the temperature and error fusion feature, the timing change of the read and write performance is calculated for the electrical feature dimension to obtain the performance and error fusion feature; Based on the performance and error fusion features, the wear balance calculation is performed on the P / E cycle features corresponding to the operation feature dimension to obtain a comprehensive feature matrix of the performance degradation corresponding to the target NAND FLASH.

6. The NAND FLASH life prediction and management method according to claim 5, characterized in that: Based on the comprehensive feature matrix, the target NAND FLASH is subjected to performance prediction and prediction timing combination of multiple P / E cycle scales to generate a life prediction result, including: The sampling segmentation and margin change amount calculation of the preset initial P / E cycle are performed on the voltage and error feature association matrix corresponding to the comprehensive feature matrix to obtain the transition process data of the corresponding voltage state transition, and based on the transition process data, the variance and deviation of the programming rate and read time data corresponding to the performance and error fusion feature are calculated to obtain the short-term performance prediction result; Based on the short-term performance prediction result, the corresponding initial fusion feature matrix in the comprehensive feature matrix is ​​subjected to timing superposition and incremental change rate calculation of the preset secondary P / E cycle to obtain accumulation process data of the corresponding electron trap accumulation, and based on the accumulation process data, the corresponding retention time and error correction capability data in the temperature and error fusion feature are subjected to attenuation rate and threshold offset calculation to obtain the mid-term performance prediction result; Based on the mid-term performance prediction result, the feature accumulation and failure probability calculation of the preset three P / E cycles are performed on the corresponding performance and error fusion features in the comprehensive feature matrix to obtain the failure process data of the corresponding storage unit failure, and based on the failure process data, the standard deviation and dispersion of the inter-block wear difference and timing parameter offset corresponding to the operation feature dimension are calculated to obtain the life prediction result.

7. A NAND FLASH life prediction and management device, characterized in that: The NAND FLASH life prediction and management device comprises: A preprocessing module, used for acquiring first multi-source original parameter data corresponding to the first prediction parameter and second multi-source original parameter data corresponding to the second prediction parameter of the target NAND FLASH, and performing timing alignment and multiple preprocessing on the first multi-source original parameter data and the second multi-source original parameter data to obtain first multi-modal parameter data and second multi-modal parameter data; an association calculation module, configured to perform multi-level feature extraction on the first multimodal parameter data and the second multimodal parameter data respectively to obtain a first parameter feature vector and a second parameter feature vector, and perform multiple feature association calculations on the first parameter feature vector and the second parameter feature vector to obtain a multi-dimensional feature space corresponding to the performance degradation of the target NAND FLASH; A feature fusion module is used to perform pairing association and feature combination on parameter features corresponding to the first prediction parameter dimension and the second parameter prediction dimension in the multi-dimensional feature space to obtain an initial fusion feature matrix, and perform error coefficient calculation and performance degradation calculation of NAND FLASH life attenuation on the initial fusion feature matrix to obtain a comprehensive feature matrix; A life prediction module is used to perform performance prediction and prediction timing combination of multiple P / E cycle scales on the target NAND FLASH based on the comprehensive feature matrix to generate a life prediction result, and based on the preset NAND FLASH performance state parameters, perform a difference calculation of a threshold voltage window on the life prediction result to obtain voltage stable state data, and calculate the overlapping boundaries between various states in the voltage stable state data to obtain a voltage margin value; based on the voltage margin value, perform a deviation calculation of electron trap accumulation on the life prediction result to obtain storage unit performance data, and perform a distribution calculation of failure states on the storage unit performance data to obtain a reliable state margin value; based on the reliable state margin value, perform a comparison calculation of inter-block wear difference and timing parameter offset on the life prediction result to obtain storage block wear uniformity data, and perform an inter-block wear uniformity threshold calculation on the storage block wear uniformity data to obtain an initial state margin; A margin calculation module, configured to perform weighted calculation on the initial state margin based on a performance state parameter relationship corresponding to the NAND FLASH performance state parameter to obtain a NAND FLASH safe operation margin, and perform a multi-level operation state evaluation on the NAND FLASH safe operation margin to obtain a health state evaluation result of the target NAND FLASH; The parameter adjustment module is used to perform threshold comparison and level classification on the health status assessment result to obtain a set of NANDFLASH working status levels, and based on a preset parameter adjustment strategy, map and associate multiple management parameters on the working status level set to generate an operation management result of the target NAND FLASH.

8. A NAND FLASH life prediction and management device, characterized in that: The NAND FLASH life prediction and management device comprises: a memory and at least one processor, wherein the memory stores instructions; The at least one processor calls the instruction in the memory to enable the NAND FLASH life prediction and management device to perform each step of the NAND FLASH life prediction and management method as described in any one of claims 1-6.

9. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instructions are executed by the processor, the steps of the NAND FLASH life prediction and management method as described in any one of claims 1 to 6 are implemented.

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