Divider implementation method and device, equipment and medium
By obtaining the standard quotient values of each divisor under different standards, determining the target standard divisor and quotient values, and using multiplication and displacement operations to calculate the target quotient values, the problem of low computing efficiency of existing dividers is solved and more efficient division operations are achieved .
Patent Information
- Application Number
- CN202411450244.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-17
- Publication Date
- 2025-02-18
AI Technical Summary
The existing divider design requires multiple clock cycles to calculate the final quotient value and remainder, resulting in low computational efficiency.
By obtaining the standard quotient values corresponding to each divisor under different standards, in response to the input of the target divisor and the target divisor, the target standard divisor and the target standard quotient values are determined, and the target quotient values are calculated through multiplication and displacement operations.
The target quotient value of the target dividend and the target divisor can be obtained without multiple valid clock cycles, which improves the computing efficiency of the divider.
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Figure CN119473217A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present disclosure relate to the field of computer technology and related technologies, and in particular, to a method, apparatus, device, and medium for implementing a divider. Background Art
[0002] In hardware circuit design, the divider is a commonly used component in arithmetic circuits. The function of the divider is to divide the input dividend by the divisor and output the values of the quotient and remainder.
[0003] There are two methods used in the existing divider design. The first is cyclic subtraction. During initialization, the dividend is input into the remainder register. For each valid clock cycle, the value in the remainder register will be deducted from the divisor value and stored again in the remainder register, and the value of the counter will be increased by one. When the value in the remainder register is greater than the divisor, wait for the clock and repeat the first step of the calculation; when the value in the remainder register is less than the divisor, the value in the counter is the quotient of the original formula, and the value in the remainder register is the remainder of the original formula. The second is long division. The dividend is shifted to the lowest bit of the remainder in the order from the highest bit to the lowest bit, and the remainder value at this time is compared with the divisor. If the remainder is not greater than the divisor, the comparison result of this bit is 0, and wait for the next clock cycle; if the remainder is greater than the divisor, the current remainder is subtracted from the divisor, and the comparison result is recorded as 1. When the next clock cycle arrives, the current remainder (after comparison) will be shifted left by one bit and the dividend corresponding to this clock cycle will be written in the lowest bit, and then compared with the divisor. After the clock cycle of the corresponding number of bits ends, the comparison results of different cycles constitute the values of different bits of the quotient, and the final remainder is the remainder value of the original calculation.
[0004] However, in the prior art, since the method for implementing the divider requires multiple clock cycles to calculate the final quotient and remainder, the operation efficiency is low. Summary of the invention
[0005] The embodiments described herein provide a divider implementation method, apparatus, device, and medium to solve the problems existing in the prior art.
[0006] According to a first aspect of the present disclosure, there is provided a table for obtaining an association relationship between a standard quotient value and a standard dividend and divisor;
[0007] In response to receiving the target dividend and the target divisor submitted by the target object, acquiring an initial standard quotient value corresponding to the target divisor from the association relationship table;
[0008] Determining the target standard dividend according to the selection signal submitted by the target object;
[0009] Determining a target standard quotient value from the initial standard quotient value according to the target standard dividend and the target divisor;
[0010] A target quotient value is determined based on the target dividend, the target standard quotient value and the target standard dividend.
[0011] In some embodiments of the present disclosure, determining a target quotient value according to the target dividend, the target standard quotient value and the target standard dividend includes:
[0012] Determining an intermediate value according to the target dividend and the target standard quotient value;
[0013] A target quotient value is determined based on the intermediate value and the target standard dividend.
[0014] In some embodiments of the present disclosure, determining the intermediate value according to the target dividend and the target standard quotient value includes:
[0015] According to the target standard quotient value, determining sub-target standard quotient values corresponding to different digits of the target standard quotient value;
[0016] After successively multiplying the sub-target standard quotient values corresponding to different digits of the target standard quotient value with the target dividend, the products of the sub-target standard quotient values corresponding to different digits of the target standard quotient value and the target dividend are summed to obtain an intermediate value.
[0017] In some embodiments of the present disclosure, determining a target quotient value according to the intermediate value and the target standard dividend includes:
[0018] Determining the number of shifts according to the target standard dividend;
[0019] Based on the number of shift bits, the intermediate value is shifted left by the number of shift bits to obtain a target quotient value.
[0020] In some embodiments of the present disclosure, in response to receiving the target dividend and the target divisor submitted by the target object, the method further includes:
[0021] Get the status information of the enable signal;
[0022] When the state information of the enable signal is an enable state, the target dividend and the target divisor are latched.
[0023] In some embodiments of the present disclosure, the method further includes:
[0024] If the association table does not include an initial standard quotient value corresponding to the target divisor, inputting the target divisor into a built-in divider;
[0025] Determining a target standard dividend according to a selection signal submitted by the target object, and inputting the target standard dividend into a built-in divider;
[0026] Obtaining a target standard quotient value determined by the built-in divider through the target standard dividend and the target divisor;
[0027] A target quotient value is determined based on the target dividend, the target standard quotient value and the target standard dividend.
[0028] In some embodiments of the present disclosure, the method further includes:
[0029] The target divisor, target standard quotient value and target standard dividend are stored in the association relationship table.
[0030] According to a second aspect of the present disclosure, a divider implementation device is provided, comprising:
[0031] An association relationship table acquisition module is used to obtain an association relationship table between a standard quotient value and a standard dividend and divisor;
[0032] An information acquisition module, configured to acquire an initial standard quotient value corresponding to the target divisor from the association relationship table in response to receiving a target dividend and a target divisor submitted by a target object;
[0033] A target standard dividend determination module is used to determine the target standard dividend according to the selection signal submitted by the target object;
[0034] a target standard quotient value determination module, configured to determine a target standard quotient value from the initial standard quotient value according to the target standard dividend and the target divisor;
[0035] The target quotient value determination module is used to determine the target quotient value according to the target dividend, the target standard quotient value and the target standard dividend.
[0036] According to a third aspect of the present disclosure, there is provided a computer device, comprising:
[0037] one or more processors;
[0038] a storage device for storing one or more programs,
[0039] When the one or more programs are executed by the one or more processors, the one or more processors implement any method as described in the first aspect.
[0040] According to a fourth aspect of the present disclosure, a computer-readable storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, the method described in any one of the first aspects is implemented.
[0041] The divider implementation method, device, equipment and medium provided by the embodiment of the present disclosure first obtain the standard quotient values corresponding to each divisor under different standard dividends; then, in response to receiving the target dividend and target divisor submitted by the target object, obtain the initial standard quotient value corresponding to the target divisor under different standard dividends; and determine the target standard dividend according to the selection signal submitted by the target object; and determine the target standard quotient value according to the target standard dividend and the target divisor; finally, determine the target quotient value according to the target dividend, the target standard quotient value and the target standard dividend. Based on the commutative law of multiplication and division operations, the division operation of the target dividend and the target divisor is changed to the multiplication operation of the target dividend and the target standard quotient value to obtain an intermediate value, and the intermediate value is left-shifted by the corresponding number of shift bits according to the target standard dividend to obtain the final target quotient value. In the divider implementation method provided by the embodiment of the present disclosure, since the standard quotient values corresponding to each divisor under different standard dividends are pre-stored in the system, after receiving the target divisor and the selection signal submitted by the target object, the target standard dividend can be determined based on the selection signal, and the target standard quotient value can be determined based on the target standard dividend and the target divisor, and then a multiplication operation is performed based on the target standard quotient value and the target dividend to obtain an intermediate value, and a shift operation is performed based on the intermediate value and the target standard dividend to obtain a target quotient value. Therefore, the target quotient values of the target dividend and the target divisor can be obtained without multiple effective clock cycles, thereby improving the operational efficiency of the divider. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below. It should be noted that the drawings described below only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure, wherein:
[0043] Figure 1 is a flow chart of a divider implementation method provided by an embodiment of the present disclosure;
[0044] Figure 2 is a structural schematic diagram of a divider implementation device provided by an embodiment of the present disclosure;
[0045] Figure 3 It is a structural diagram of a computer device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION
[0046] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without creative work also fall within the scope of protection of the present disclosure.
[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person skilled in the art to which the subject matter of the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal form unless otherwise explicitly defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together directly or through one or more intermediate components.
[0048] In all embodiments of the present disclosure, terms such as “first” and “second” are used only to distinguish one component (or a part of a component) from another component (or another part of a component).
[0049] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.
[0050] Based on the problems existing in the prior art, the present disclosure provides a divider implementation method. Figure 1 is a flow chart of a divider implementation method provided by an embodiment of the present disclosure, such as Figure 1 As shown, the divider implementation method includes:
[0051] S110, obtaining a correlation table between standard quotient values and standard dividends and divisors.
[0052] In a specific implementation, based on the commutative law of multiplication and division operations, if the divider needs to calculate the result of A÷B, the original calculation equation can be expanded to:
[0053] A÷B=A×(C÷B)÷C
[0054] That is, first calculate C÷B, then calculate A×(C÷B), and finally calculate A×(C÷B)÷C.
[0055] Wherein, C is the standard dividend, the result of C÷B is the standard quotient, A is the target dividend, B is the target divisor, the standard dividend is 2 to the power of N, and the target standard dividend can be determined based on the selection signal submitted by the target object, that is, an exemplary standard dividend includes 2 0 (00000001), 2 1 (00000010), 2 2 (00000100), 2 3 (00001000), 2 4 (00010000), 2 5 (00100000), 2 6 (01000000) and 2 7 (10000000), corresponding to a divisor, corresponds to a standard quotient value under different standard dividends.
[0056] Therefore, in the divider implementation method provided by the embodiment of the present disclosure, in the process of determining the target quotient value of the target dividend and the target divisor, the standard quotient value corresponding to each divisor under different standard dividends is firstly obtained.
[0057] Exemplarily, as shown in Table 1 below, one divisor and one standard dividend correspond to one standard quotient value. When there are multiple standard dividends, one divisor corresponds to multiple standard quotient values.
[0058] Table 1 The relationship between the divisor, standard dividend and standard quotient
[0059]
[0060]
[0061] As shown in Table 1 above, the divisor B1 is the standard dividend 2 0 The corresponding standard quotient is X11, and the divisor B1 is in the standard dividend 2 1 The corresponding standard quotient is X12, and the divisor B1 is within the standard dividend 2 2 The corresponding standard quotient value is X12, ..., the divisor B1 is in the standard dividend 2 7 The corresponding standard quotient value is X18, and the divisor B2 is in the standard dividend 2 0 The corresponding standard quotient is X21, and the divisor B2 is in the standard dividend 2 1 The corresponding standard quotient is X22, and the divisor B2 is in the standard dividend 2 2 The corresponding standard quotient value is X23, ..., the divisor B2 is in the standard dividend 2 7 The corresponding standard quotient value is X28.
[0062] S120 . In response to receiving the target dividend and target divisor submitted by the target object, obtain an initial standard quotient value corresponding to the target divisor from the association relationship table.
[0063] Specifically, after obtaining the standard quotient values corresponding to each divisor under different standard dividends in step S110, when the target object submits the target dividend and target divisor, the initial standard quotient value corresponding to the target divisor submitted by the target object is first obtained, that is, if the target divisor is B1, the standard dividend includes 2 0 , 2 1 , 2 2 , 2 3 , 2 4 , 2 5 , 2 6 and 2 7 When combined with Table 1, the initial standard quotient values corresponding to the target divisor B1 include 8, namely: standard dividend 2 0 Initial standard quotient value X11 corresponding to target divisor B1, standard dividend 2 1 Initial standard quotient value X12 corresponding to target divisor B1, standard dividend 2 2 Initial standard quotient value X13 corresponding to target divisor B1, standard dividend 2 3 Initial standard quotient value X14 corresponding to target divisor B1, standard dividend 2 4 Initial standard quotient value X15 corresponding to target divisor B1, standard dividend 2 5 Initial standard quotient value X16 corresponding to target divisor B1, standard dividend 2 6 Initial standard quotient value X17 corresponding to target divisor B1, standard dividend 2 7 The initial standard quotient value X18 corresponding to the target divisor B1.
[0064] S130. Determine a target standard dividend according to a selection signal submitted by the target object.
[0065] The selection signal is used to select a target standard quotient value.
[0066] The target standard dividend is determined based on the selection signal submitted by the target object.
[0067] S140. Determine a target standard quotient value from the initial standard quotient value according to the target standard dividend and the target divisor.
[0068] Since the initial standard quotient values corresponding to different standard dividends and the target divisor are determined in step S120, after the target standard dividend selected by the target object is determined in step S130, the target standard quotient value corresponding to the target standard dividend can be selected from the initial standard quotient values based on the target standard dividend selected by the target object.
[0069] Specifically, if the target divisor is B1, the target standard dividend is 2 4 , the target standard quotient value can be determined to be X15.
[0070] S150. Determine a target quotient value according to the target dividend, the target standard quotient value and the target standard dividend.
[0071] After determining the target standard quotient value, that is, the value of C÷B1, the target quotient value is obtained by multiplying the target dividend A by the target standard quotient value and then dividing it by the target standard dividend.
[0072] In a specific implementation, determining a target quotient value based on a target dividend, a target standard quotient value and a target standard dividend includes: determining an intermediate value based on the target dividend and the target standard quotient value; and determining a target quotient value based on the intermediate value and the target standard dividend.
[0073] Specifically, the intermediate value is determined according to the target dividend and the target standard quotient value, including: determining the sub-target standard quotient values corresponding to different digits of the target standard quotient value according to the target standard quotient value; multiplying the sub-target standard quotient values corresponding to different digits of the target standard quotient value with the target dividend in turn, and then summing the products of the sub-target standard quotient values corresponding to different digits of the target standard quotient value with the target dividend to obtain the intermediate value.
[0074] In a specific implementation, if the target dividend A is 00100101 and the target standard quotient value is 0100010000, then the sub-target standard quotient value corresponding to the 0th bit of the target standard quotient value is 0000000000, the sub-target standard quotient value corresponding to the 1st bit of the target standard quotient value is 0000000000, the sub-target standard quotient value corresponding to the 2nd bit of the target standard quotient value is 0000000000, the sub-target standard quotient value corresponding to the 3rd bit of the target standard quotient value is 0000000000, the sub-target standard quotient value corresponding to the 4th bit of the target standard quotient value is 0000010000, and the sub-target standard quotient value corresponding to the 5th bit of the target standard quotient value is 00000010000. 00000000, the sub-target standard quotient value corresponding to the 5th digit of the target standard quotient value is 00000000000, the sub-target standard quotient value corresponding to the 7th digit of the target standard quotient value is 0000000000, the sub-target standard quotient value corresponding to the 8th digit of the target standard quotient value is 0100000000, and the sub-target standard quotient value corresponding to the 9th digit of the target standard quotient value is 0000000000, and then the sub-target standard quotient values corresponding to different digits of the target standard quotient value are multiplied by the target dividend respectively, and finally the intermediate value is summed up with the products of the target dividend and the sub-target standard quotient values corresponding to different digits of the target standard quotient value to obtain the value of A×(C÷B1).
[0075] In a specific implementation, the target quotient value is determined based on the intermediate value and the target standard dividend, including: determining the number of shifts based on the target standard dividend; and based on the number of shifts, shifting the intermediate value left by the number of shifts to obtain the target quotient value.
[0076] Specifically, if the selected target standard is divisor 2 4 , then based on the target standard dividend, the number of shift bits is determined to be 4 bits. At this time, after obtaining the intermediate value of the target dividend and the target standard quotient, the target quotient value of the target dividend and the target divisor can be obtained by shifting the intermediate value left by 4 bits.
[0077] In the divider implementation method provided by the embodiment of the present disclosure, firstly, the standard quotient values corresponding to each divisor under different standard dividends are obtained; then, in response to receiving the target dividend and target divisor submitted by the target object, the initial standard quotient values corresponding to the target divisor under different standard dividends are obtained; and according to the selection signal submitted by the target object, the target standard dividend is determined; and according to the target standard dividend and the target divisor, the target standard quotient value is determined; finally, the target quotient value is determined according to the target dividend, the target standard quotient value and the target standard dividend. Based on the commutative law of multiplication and division operations, the division operation of the target dividend and the target divisor is changed to the multiplication operation of the target dividend and the target standard quotient value to obtain an intermediate value, and the intermediate value is left-shifted by the corresponding number of shift bits according to the target standard dividend to obtain the final target quotient value. In the divider implementation method provided by the embodiment of the present disclosure, since the standard quotient values corresponding to each divisor under different standard dividends are pre-stored in the system, after receiving the target divisor and the selection signal submitted by the target object, the target standard dividend can be determined based on the selection signal, and the target standard quotient value can be determined based on the target standard dividend and the target divisor, and then a multiplication operation is performed based on the target standard quotient value and the target dividend to obtain an intermediate value, and a shift operation is performed based on the intermediate value and the target standard dividend to obtain a target quotient value. Therefore, the target quotient values of the target dividend and the target divisor can be obtained without multiple effective clock cycles, thereby improving the operational efficiency of the divider.
[0078] On the basis of the above embodiments, the divider implementation method provided in the embodiments of the present disclosure further includes:
[0079] Acquire the state information of the enable signal; when the state information of the enable signal is the enable state, latch the target dividend and the target divisor.
[0080] In the specific implementation process, the dividend and divisor submitted by the target object may not be valid dividends and divisors. Therefore, by obtaining the enable state of the enable signal, it is determined whether the dividend and divisor received in a certain clock cycle are valid dividends and divisors. Specifically, when the state information of the enable signal is the enable state, the dividend and divisor received when the enable signal is in the enable state are latched, and then the quotient value is calculated. This avoids the phenomenon of system calculation errors caused by the dividend and divisor received in any two adjacent clock cycles, and the dividend and divisor received in the previous clock cycle have not yet calculated the target quotient value, that is, the dividend and initial quotient value received in the next clock cycle are calculated.
[0081] On the basis of the above embodiments, the divider implementation method provided in the embodiments of the present disclosure further includes:
[0082] If the association table does not include an initial standard quotient value corresponding to the target divisor, the target divisor is input into a built-in divider; the target standard dividend is determined based on a selection signal submitted by the target object, and the target standard dividend is input into the built-in divider; the target standard quotient value determined by the built-in divider through the target standard dividend and the target divisor is obtained; the target quotient value is determined based on the target dividend, the target standard quotient value and the target standard dividend.
[0083] As an implementation method, when the acquired association table does not include the initial standard quotient values corresponding to the target divisor under different standard dividends, at this time, the target divisor is input into the built-in divider, and the target standard dividend determined by the target object based on the selection signal is input into the built-in divider. At this time, the built-in divider calculates the target standard quotient value based on the target divisor and the target standard dividend, and feeds back the calculated target standard quotient value, thereby realizing the determination of the target quotient value based on the target dividend, the target standard quotient value and the target standard dividend.
[0084] In addition, by storing the target divisor, target standard quotient value and target standard dividend in an association table, when the target object inputs the target quotient value again, the initial standard quotient value corresponding to the target quotient value can be directly found in the association table, and then steps S130-S150 are executed to improve the operational efficiency of the divider.
[0085] Based on the above embodiments, Figure 2 is a schematic diagram of a structure of a divider implementation device provided by an embodiment of the present disclosure, such as Figure 2 As shown, the divider implementation device includes:
[0086] An association relationship table acquisition module 210 is used to acquire an association relationship table between a standard quotient value and a standard dividend and divisor;
[0087] The information acquisition module 220 is used to obtain an initial standard quotient value corresponding to the target divisor from the association relationship table in response to receiving the target dividend and the target divisor submitted by the target object;
[0088] A target standard dividend determination module 230 is used to determine the target standard dividend according to the selection signal submitted by the target object;
[0089] A target standard quotient value determination module 240 is used to determine a target standard quotient value from an initial standard quotient value according to a target standard dividend and a target divisor;
[0090] The target quotient value determination module 250 is used to determine the target quotient value according to the target dividend, the target standard quotient value and the target standard dividend.
[0091] In the divider implementation device provided by the embodiment of the present disclosure, firstly, the standard quotient values corresponding to each divisor under different standard dividends are obtained; then, in response to receiving the target dividend and target divisor submitted by the target object, the initial standard quotient values corresponding to the target divisor under different standard dividends are obtained; and according to the selection signal submitted by the target object, the target standard dividend is determined; and according to the target standard dividend and the target divisor, the target standard quotient value is determined; finally, the target quotient value is determined according to the target dividend, the target standard quotient value and the target standard dividend. Based on the commutative law of multiplication and division operations, the division operation of the target dividend and the target divisor is changed to the multiplication operation of the target dividend and the target standard quotient value to obtain an intermediate value, and the intermediate value is left-shifted by the corresponding number of shift bits according to the target standard dividend to obtain the final target quotient value. In the divider implementation method provided by the embodiment of the present disclosure, since the standard quotient values corresponding to each divisor under different standard dividends are pre-stored in the system, after receiving the target divisor and the selection signal submitted by the target object, the target standard dividend can be determined based on the selection signal, and the target standard quotient value can be determined based on the target standard dividend and the target divisor, and then a multiplication operation is performed based on the target standard quotient value and the target dividend to obtain an intermediate value, and a shift operation is performed based on the intermediate value and the target standard dividend to obtain a target quotient value. Therefore, the target quotient values of the target dividend and the target divisor can be obtained without multiple effective clock cycles, thereby improving the operational efficiency of the divider.
[0092] In a specific implementation, determining the target quotient value according to the target dividend, the target standard quotient value and the target standard dividend includes:
[0093] Determining an intermediate value according to the target dividend and the target standard quotient value;
[0094] A target quotient value is determined based on the intermediate value and the target standard dividend.
[0095] In a specific implementation, determining the intermediate value according to the target dividend and the target standard quotient value includes:
[0096] According to the target standard quotient value, determining sub-target standard quotient values corresponding to different digits of the target standard quotient value;
[0097] After successively multiplying the sub-target standard quotient values corresponding to different digits of the target standard quotient value with the target dividend, the products of the sub-target standard quotient values corresponding to different digits of the target standard quotient value and the target dividend are summed to obtain an intermediate value.
[0098] In a specific implementation, determining the target quotient value according to the intermediate value and the target standard dividend includes:
[0099] Determining the number of shifts according to the target standard dividend;
[0100] Based on the number of shift bits, the intermediate value is shifted left by the number of shift bits to obtain a target quotient value.
[0101] In a specific implementation, in response to receiving the target dividend and the target divisor submitted by the target object, the method further includes:
[0102] Get the status information of the enable signal;
[0103] When the state information of the enable signal is an enable state, the target dividend and the target divisor are latched.
[0104] In a specific embodiment, the method further comprises:
[0105] If the association table does not include an initial standard quotient value corresponding to the target divisor, inputting the target divisor into a built-in divider;
[0106] Determining a target standard dividend according to a selection signal submitted by the target object, and inputting the target standard dividend into a built-in divider;
[0107] Obtaining a target standard quotient value determined by the built-in divider through the target standard dividend and the target divisor;
[0108] A target quotient value is determined based on the target dividend, the target standard quotient value and the target standard dividend.
[0109] In a specific embodiment, the method further comprises:
[0110] The target divisor, target standard quotient value and target standard dividend are stored in the association relationship table.
[0111] The present application also provides a computer device. Figure 3 , Figure 3 This is a basic structural block diagram of the computer device in this embodiment.
[0112] The computer device includes a memory 510 and a processor 520 that are connected to each other through a system bus. It should be noted that the figure only shows a computer device with components 510-520, but it should be understood that it is not required to implement all the components shown, and more or fewer components can be implemented instead. Among them, those skilled in the art can understand that the computer device here is a device that can automatically perform numerical calculations and / or information processing according to pre-set or stored instructions, and its hardware includes but is not limited to microprocessors, application specific integrated circuits (Application Specific Integrated Circuit, ASIC), programmable gate arrays (Field-Programmable Gate Array, FPGA), digital processors (Digital Signal Processor, DSP), embedded devices, etc.
[0113] Computer devices can be computing devices such as desktop computers, notebooks, PDAs, and cloud servers. Computer devices can interact with users through keyboards, mice, remote controls, touch pads, or voice control devices.
[0114] The memory 510 includes at least one type of readable storage medium, and the readable storage medium includes a non-volatile memory or a volatile memory, for example, a flash memory, a hard disk, a multimedia card, a card-type memory (for example, an SD or DX memory, etc.), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a magnetic disk, an optical disk, etc., and the RAM may include a static RAM or a dynamic RAM. In some embodiments, the memory 510 may be an internal storage unit of a computer device, for example, a hard disk or a memory of the computer device. In other embodiments, the memory 510 may also be an external storage device of the computer device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, or a flash card (FlashCard) equipped on the computer device. Of course, the memory 510 may also include both the internal storage unit of the computer device and its external storage device. In this embodiment, the memory 510 is generally used to store the operating system and various application software installed on the computer device, such as the program code of the above method. In addition, the memory 510 may also be used to temporarily store various data that have been output or are to be output.
[0115] The processor 520 is generally used to perform the overall operation of the computer device. In this embodiment, the memory 510 is used to store program codes or instructions, the program code includes computer operation instructions, and the processor 520 is used to execute the program codes or instructions stored in the memory 510 or process data, such as running the program code of the above method.
[0116] In this article, the bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus system can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.
[0117] Another embodiment of the present application also provides a computer-readable medium, which may be a computer-readable signal medium or a computer-readable medium. A processor in a computer reads a computer-readable program code stored in the computer-readable medium, so that the processor can execute the functional actions specified in each step or a combination of steps in the above method; and generate a device for implementing the functional actions specified in each block or a combination of blocks in the block diagram.
[0118] Computer-readable media include but are not limited to electronic, magnetic, optical, electromagnetic, infrared memory or semiconductor systems, devices or apparatuses, or any appropriate combination of the foregoing, the memory is used to store program codes or instructions, the program codes include computer operating instructions, and the processor is used to execute the program codes or instructions of the above methods stored in the memory.
[0119] For the definitions of memory and processor, please refer to the description of the aforementioned computer device embodiment and will not be repeated here.
[0120] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.
[0121] Each functional unit or module in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0122] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of each embodiment method of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program code.
[0123] Unless the context clearly indicates otherwise, the singular form of the words used herein and in the appended claims includes the plural and vice versa. Thus, when referring to the singular, the plural form of the corresponding term is generally included. Similarly, the words "comprise" and "include" are to be interpreted as inclusive rather than exclusive. Likewise, the terms "include" and "or" should be interpreted as inclusive unless such interpretation is expressly prohibited herein. Where the term "example" is used herein, particularly when it is located after a group of terms, the "example" is merely exemplary and illustrative and should not be considered exclusive or comprehensive.
[0124] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that various aspects of the present application can be implemented individually or in combination with one or more other aspects. It should also be understood that the description and specific embodiments herein are intended for purposes of illustration only and are not intended to limit the scope of the present application.
[0125] Several embodiments of the present disclosure are described in detail above, but it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the attached claims.
Claims
1. A divider implementation method, characterized in that: include: Obtain a correlation table between the standard quotient value and the standard dividend and divisor; In response to receiving the target dividend and the target divisor submitted by the target object, acquiring an initial standard quotient value corresponding to the target divisor from the association relationship table; Determining the target standard dividend according to the selection signal submitted by the target object; Determining a target standard quotient value from the initial standard quotient value according to the target standard dividend and the target divisor; A target quotient value is determined based on the target dividend, the target standard quotient value and the target standard dividend.
2. The method according to claim 1, characterized in that The step of determining a target quotient value according to the target dividend, the target standard quotient value and the target standard dividend comprises: Determining an intermediate value according to the target dividend and the target standard quotient value; A target quotient value is determined based on the intermediate value and the target standard dividend.
3. The method according to claim 2, characterized in that The step of determining an intermediate value according to the target dividend and the target standard quotient value comprises: According to the target standard quotient value, determining sub-target standard quotient values corresponding to different digits of the target standard quotient value; After successively multiplying the sub-target standard quotient values corresponding to different digits of the target standard quotient value with the target dividend, the products of the sub-target standard quotient values corresponding to different digits of the target standard quotient value and the target dividend are summed to obtain an intermediate value.
4. The method according to claim 2, characterized in that: Determining a target quotient value according to the intermediate value and the target standard dividend includes: Determining the number of shifts according to the target standard dividend; Based on the number of shift bits, the intermediate value is shifted left by the number of shift bits to obtain a target quotient value.
5. The method according to claim 1, characterized in that In response to receiving the target dividend and the target divisor submitted by the target object, the method further includes: Get the status information of the enable signal; When the state information of the enable signal is an enable state, the target dividend and the target divisor are latched.
6. The method according to claim 1, characterized in that The method further comprises: If the association table does not include an initial standard quotient value corresponding to the target divisor, inputting the target divisor into a built-in divider; Determining a target standard dividend according to a selection signal submitted by the target object, and inputting the target standard dividend into a built-in divider; Obtaining a target standard quotient value determined by the built-in divider through the target standard dividend and the target divisor; A target quotient value is determined based on the target dividend, the target standard quotient value and the target standard dividend.
7. The method according to claim 6, characterized in that The method further comprises: The target divisor, target standard quotient value and target standard dividend are stored in the association relationship table.
8. A divider implementation device, characterized in that: include: An association relationship table acquisition module is used to obtain an association relationship table between a standard quotient value and a standard dividend and divisor; An information acquisition module, configured to acquire an initial standard quotient value corresponding to the target divisor from the association relationship table in response to receiving a target dividend and a target divisor submitted by a target object; A target standard dividend determination module is used to determine the target standard dividend according to the selection signal submitted by the target object; a target standard quotient value determination module, configured to determine a target standard quotient value from the initial standard quotient value according to the target standard dividend and the target divisor; The target quotient value determination module is used to determine the target quotient value according to the target dividend, the target standard quotient value and the target standard dividend.
9. A computer device, characterized in that: include: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 7.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.