Image processing method and device

Abstract

The invention provides an image processing method, the method is realized based on a model, the model is deployed in an embedded chip, the method comprises the following steps: obtaining n images to be processed, n being an integer greater than 1; preprocessing an image to be processed to obtain a preprocessed image, wherein the format of the preprocessed image conforms to the input format of the embedded chip; and the model performs reasoning by using the preprocessed image to obtain an image processing result. According to the method, the to-be-processed image is preprocessed to obtain the preprocessed image, so that the format of the preprocessed image conforms to the input format of the embedded chip, and deployment of the model on the embedded chip is realized.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to an image processing method and device. Background Art

[0002] In the assisted driving system, in order to improve the recognition accuracy of the system, in addition to the traditional target detection and target classification tasks, more complex visual perception models need to be deployed on the embedded chip, such as target tracking, depth estimation, optical flow estimation and other tasks. These relatively complex network models are characterized by the simultaneous input of multiple images. Low-computing visual chips (computing power does not exceed 2TOPS) are commonly used in the market. These chips are mainly compatible with fixed-format input of a single image.

[0003] However, embedded chips cannot expand the number of image channels, that is, the deployment of multiple input image models is not supported on resource-constrained embedded chips. This problem limits the operation of deep learning models on embedded devices. Summary of the invention

[0004] The embodiments of the present invention provide an image processing method and device, which enable a model to be deployed on an embedded chip and perform image processing operations.

[0005] According to one embodiment of the present invention, there is provided an image processing method, which is implemented based on a model, and the model is deployed on an embedded chip. The method comprises: acquiring n images to be processed, where n is an integer greater than 1; preprocessing the images to be processed to obtain preprocessed images, and the format of the preprocessed images conforms to the input format of the embedded chip; and the model performs reasoning using the preprocessed images to obtain image processing results.

[0006] Optionally, the preprocessing of the images to be processed to obtain the preprocessed image includes: reading the n images to be processed, scaling the n images to be processed to a fixed size respectively, to obtain n images to be spliced; horizontally splicing the n images to be spliced ​​to obtain a spliced ​​image; and dimensional transposing the spliced ​​image to obtain the preprocessed image.

[0007] Optionally, the model uses the preprocessed image to perform inference to obtain an image processing result, including adapting the preprocessed image to obtain a model input image; the model uses the model input image to perform inference to obtain an image processing result.

[0008] Optionally, the method further includes determining whether the model input specification matches the processing specification of the embedded chip; if so, preprocessing the image to be processed.

[0009] Optionally, the adaptation processing includes: customizing a two-dimensional convolution operator to perform convolution processing on the preprocessed image.

[0010] Optionally, the model uses the model input image to perform inference to obtain an image processing result, including: the model is a multi-input image model, the model input image is input into the multi-input image model to obtain an image processing result; and / or, the model is a batch inference model, the model input image is segmented in the dimension of the number of color channels to obtain n segmented images, and the n segmented images are respectively input into the model and n-1 model copies to obtain an image processing result.

[0011] Optionally, the image processing results include: model output results, log information and / or performance evaluation information; the log information includes: resource occupancy information and / or key operation information during the image processing process.

[0012] According to another embodiment of the present invention, there is provided an image processing device, the device is implemented based on a model, the model is deployed on an embedded chip, and the device comprises: a unit for acquiring images to be processed, acquiring n images to be processed, where n is an integer greater than 1; a preprocessing unit, preprocessing the images to be processed to obtain preprocessed images, the format of the preprocessed images conforming to the input format of the embedded chip; a model inference unit, the model performs inference using the preprocessed images to obtain image processing results. Optionally, the TV box is used for: the TV box identifies the green pixels in each frame of the digital human fusion video stream; the TV box removes the green pixels from each frame of the digital human fusion video stream to obtain digital human image data.

[0013] According to yet another embodiment of the present invention, a computer-readable storage medium is provided, wherein a computer program is stored in the storage medium, wherein the computer program is configured to execute the steps of any of the above method embodiments when executed.

[0014] According to another embodiment of the present invention, there is provided an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0015] According to the specific embodiments provided in this application, this application discloses the following technical effects:

[0016] 1) This application preprocesses multiple images to be processed to obtain preprocessed images that meet the input specifications of the embedded chip. The model uses the preprocessed images to perform reasoning operations to obtain image processing results. While deploying the model on the embedded chip, it also realizes image processing requirements for multiple inputs or batch processing.

[0017] 2) This application obtains a preprocessed image by performing scaling, splicing and dimension transposition operations on the image to be processed, and provides a specific preprocessing operation method so that the preprocessed image can meet the input requirements of a single standard color image format of an embedded chip.

[0018] 3) In this application, when the model uses the preprocessed image to perform reasoning operations, the preprocessed image is adapted to match the format of the preprocessed image with the model input format, thereby improving the flexibility of model deployment and reducing the complexity of hardware adaptation while ensuring model performance.

[0019] 4) The model input image of this application can be applied to different types of models. For a multi-input image model, the model input image is input into the multi-input image model to obtain the image processing result, thus achieving compatibility with the multi-input model; for a batch inference model, the model input image is segmented in the dimension of the number of color channels to obtain n segmented images, and the n segmented images are respectively input into the model and n-1 model copies to obtain the image processing result, thus achieving batch inference of multiple targets. This application enables different types of models to be deployed on embedded chips, thus improving the flexibility of model deployment and the operating efficiency of the model on embedded chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0021] Figure 1 A flowchart of the image processing method provided in this application;

[0022] Figure 2 A flowchart of the image processing method provided in this application;

[0023] Figure 3 A schematic diagram of the preprocessing process in the image processing method provided in this application;

[0024] Figure 4 A schematic diagram of the model reasoning process in the image processing method provided in this application;

[0025] Figure 5 A structural block diagram of the image processing device provided by this application;

[0026] Figure 6 A schematic block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only embodiments of a part of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present application. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0029] In the assisted driving system, model reasoning must reach a certain frame rate to ensure stable execution of functions. In current deep learning models, especially visual perception models, high computing resources are often required. This makes it difficult for the model to meet the expected efficiency when reasoning on low-computing embedded chips, which in turn affects the normal operation of product functions. Moreover, current embedded chips are mainly compatible with the [1,3,h,w] format of a single image. Among them, 1 represents the number of simultaneous processing of the model in a single run; 3 represents the number of color channels of the image, which is 3 for color images and 1 for grayscale images; h and w represent the width and resolution of the image. The inability to expand the number of channels of the image also causes the difficulty of deploying the above-mentioned network model, that is, the deployment of multiple input image models is not supported on resource-constrained embedded chips. Batch reasoning is often used for multi-target tasks on CPU or GPU, that is, multiple images are processed at one time, but batch reasoning of models is not supported on resource-constrained embedded chips.

[0030] There are already some technical solutions for deploying deep learning models on low-computing embedded chips. The common solution is to reduce the complexity of the model, such as reducing the number of network layers, reducing the number of channels, using lightweight operators, etc., but this simplification often comes at the expense of accuracy. In addition, due to the high frequency of model calls, system resource occupation and conflicts occur, and the reasoning time of a single target often fluctuates greatly and is unstable.

[0031] In view of this, the present application provides a new idea. Figure 1 The following is a flow chart of an image processing method provided in an embodiment of the present application. The method is implemented based on a model, and the model is deployed on an embedded chip. The method may include the following steps:

[0032] Step 101: Obtain n images to be processed, where n is an integer greater than 1;

[0033] Step 102: preprocessing the image to be processed to obtain a preprocessed image, wherein the format of the preprocessed image complies with the input format of the embedded chip;

[0034] Step 103: The model performs reasoning using the pre-processed image to obtain an image processing result.

[0035] It can be seen from the above process that the present application obtains preprocessed images that meet the input requirements of the embedded chip by preprocessing multiple images to be processed. The model uses the preprocessed images to perform inference operations to obtain image processing results. While deploying the model on the embedded chip, it realizes the image processing requirements of multiple inputs or batch processing by the model.

[0036] First, the above step 101, namely "obtaining n images to be processed, where n is an integer greater than 1", is described in detail in conjunction with the embodiment.

[0037] The image processing method of the present application is implemented based on a model deployed on an embedded chip. The model can be a variety of deep learning models for performing image processing, such as a target tracking model, a depth estimation model, an optical flow estimation model, etc.

[0038] The present application performs image processing operations on N images to be processed, and the images to be processed may be images obtained from various devices in various fields. For example, when the method in the present application is applied to an assisted driving system, the images to be processed may be road images, vehicle images, surrounding environment images, etc. captured by a vehicle-mounted camera. The format and size of the images to be processed are not limited here either, for example, the images to be processed are in JPG or PNG format, and the image size is 50*50 or 500*500, etc.

[0039] The present application performs multi-input image processing or batch processing on multiple images, and the number of images to be processed is at least two, and may be multiple.

[0040] Figure 2 A flowchart of the image processing method provided in this application, such as Figure 2 As shown, as another practicable method, before performing the above-mentioned image processing, the present application first determines whether the input image format of the model matches the input image format of the embedded chip. If they match, the image to be processed is directly input into the model deployed in the embedded chip to perform the image processing operation. If they do not match, the image preprocessing, adaptation processing and other operations in this embodiment are performed.

[0041] The above step 102, namely "preprocessing the image to be processed to obtain a preprocessed image, wherein the format of the preprocessed image complies with the input format of the embedded chip", is described in detail below in conjunction with an embodiment.

[0042] This application preprocesses the image to be processed so that the preprocessed image meets the input specifications of the embedded chip, so that the model can be deployed on the embedded chip and perform image processing operations. The image preprocessing operation ensures that the image data can seamlessly adapt to the input specifications of the embedded chip model quantization.

[0043] Among them, preprocessing the image to be processed can be achieved in a variety of ways, and those skilled in the art can formulate a preprocessing scheme according to the input format of the embedded chip. For example, when the embedded chip only supports single input of a fixed size in RGB format, the image to be processed can be preprocessed by image scaling, color space conversion, image splicing or stacking.

[0044] As a preferred implementation, n images to be processed can be read, and the n images to be processed can be scaled to a fixed size respectively to obtain n images to be spliced; the n images to be spliced ​​are horizontally spliced ​​to obtain a spliced ​​image; the spliced ​​image is dimensionally transposed to obtain a preprocessed image.

[0045] Specifically, taking two images to be processed and the input format of the embedded chip as [1,3,h,w] as an example, first, read the two images to be processed and scale them to a fixed format [h,w,3] respectively; then, horizontally splice the two images to form a new image with the format of [h,w×2,3]; finally, obtain the preprocessed image with the format of [1,3,h,w×2] by dimensional transposition, and the format of the preprocessed image can meet the input requirements of the embedded chip.

[0046] More specifically, the above splicing can be achieved in the following ways:

[0047]

[0048] Where R(x, y, c) is the preprocessed image after preprocessing; I1 is the first image to be processed, I2 is the second image to be processed; x, y, c represent the row index, column index and color channel index of the image to be processed or the preprocessed image, respectively. Formula (1) indicates that for each column of the preprocessed image, if the column index is an even number, the corresponding column of the first image to be processed is taken; if it is an odd number, the corresponding column of the second image to be processed is taken. The rows of each image to be processed remain unchanged, and the images to be processed are finally spliced ​​alternately to obtain the preprocessed image. Figure 3 This is a schematic diagram of the preprocessing process in the image processing method provided in this application. The preprocessing result is as follows: Figure 3 shown.

[0049] Similarly, this method can be extended to preprocess n images to be processed, horizontally splicing n images to form a new image with the format of [h,w×n,3]; finally, the preprocessed image with the format of [1,3,h,w×n] is obtained by dimension transposition. The format of the preprocessed image can meet the input requirements of the embedded chip. n is the image to be processed. The row of each image to be processed remains unchanged, and each column is formed by sequentially interlacing each column of the image to be processed. This method can also be obtained by keeping the row of each image to be processed unchanged and sequentially splicing in the row dimension.

[0050] The above step 103, namely "the model uses the pre-processed image to perform reasoning to obtain an image processing result", is described in detail below in conjunction with an embodiment.

[0051] After the application obtains the preprocessed image, the model uses the preprocessed image to perform reasoning operations. Among them, if the format of the preprocessed image matches the input format of the model, the preprocessed image can be directly input into the model, and the model performs reasoning to obtain the image processing result; if the format of the preprocessed image does not match the input format of the model, the preprocessed image needs to be adapted to meet the input requirements of the model. Specifically, the preprocessed image is adapted to obtain the model input image; the model uses the model input image to perform reasoning to obtain the image processing result.

[0052] As an implementable method, the adaptation processing of the present application can adopt the convolution method. Taking the format of the preprocessed image as [1,3,h,w×2] as an example, where 2 represents two pictures, a two-dimensional convolution operator can be customized to achieve the inverse transformation from [1,3,h,w×2] to [1,6,h,w].

[0053] The specific method is as follows:

[0054] y i,j =(w×x i,j )+b (2)

[0055] In formula (2), x i,j represents the preprocessed image; y i,j represents the model input image; i and j are the position indexes of the preprocessed image and the model input image; b is the bias; w is the weight of the convolution kernel, which is a four-dimensional tensor or matrix. The specific parameters of the two-dimensional convolution operator can be set as follows: 3 input channels, 6 output channels, the size of the convolution kernel (1,2), the step size is set to (1,2), and the bias is set to False.

[0056] The specific values ​​of b and w can be determined by pre-training the model. This process is equivalent to the model quantization process on the embedded chip. About 100 training images can be used to analyze and quantize the data of the fixed-point network model. The total number of images can be adjusted appropriately according to the technical specifications of different embedded chip manufacturers, but usually does not exceed 200 to cover various scenarios and meet diverse needs. The images in the quantization data set are in the widely supported JPG or PNG format.

[0057] After obtaining the model input image, the model uses the model input image for reasoning to obtain the image processing result.

[0058] Among them, if the model is a multi-input image model, the model input image is input into the multi-input image model to obtain the image processing result. For example, taking two images to be processed with a resolution of 256×256 as an example, after preprocessing, the preprocessed image in the format of [1,3,256,512] that meets the chip requirements is obtained, and then the preprocessed image is transformed into a model input image in the format of [1,6,256,256] through adaptation processing, and the model input image can be input into the required multi-input image model, such as the optical flow model for the two input images, and the model can be inferred to obtain the inference result.

[0059] If the model is a batch inference model, the model input image is segmented in the dimension of the number of color channels to obtain n segmented images, and the n segmented images are respectively input into the model and n-1 model copies to obtain the image processing results. For example, if the model input image format is [1,6,256,256], it is segmented to obtain two segmented images in the format of [1,3,256,256], and the two segmented images are respectively input into the model and the model copy, where the model copy has the same parameters and the same structure as the model, and each segmented image can obtain the image processing result after model inference, achieving the technical effect of calling the model once to process two images in parallel.

[0060] After the model reasoning is completed, the image processing results can be obtained. The image processing results of the present application include not only the output results of the model, but also log information and performance evaluation information. Among them, the log information includes resource occupancy information, key operation information, etc. during the image processing process. The log information tracks and records the entire image processing process, including resource occupancy information and key operations of each step. The performance evaluation information is information for measuring the performance of the model, which can be certain parameters for measuring the performance of the model. More specifically, the performance evaluation information can be the accuracy and consistency information obtained by deeply analyzing each layer of the model through quantified loss. Users can verify the correctness and availability through the performance evaluation information combined with model reasoning.

[0061] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0062] According to an embodiment of another aspect, an image processing apparatus is provided. Figure 5 A schematic block diagram of the image processing apparatus according to an embodiment is shown as follows. Figure 5 As shown, the device 500 includes:

[0063] The to-be-processed image acquisition unit 501 is configured to acquire n to-be-processed images, where n is an integer greater than 1.

[0064] The preprocessing unit 502 is configured to preprocess the image to be processed to obtain a preprocessed image, and the format of the preprocessed image complies with the input format of the embedded chip.

[0065] The model reasoning unit 503 is configured to perform reasoning on the model using the preprocessed image to obtain an image processing result.

[0066] As one of the achievable methods, the preprocessing unit 502 is configured to: read the n images to be processed, scale the n images to be processed to a fixed size respectively, and obtain n images to be spliced; horizontally splice the n images to be spliced ​​to obtain a spliced ​​image; and transpose the dimension of the spliced ​​image to obtain the preprocessed image.

[0067] As one of the feasible ways, when the model uses the preprocessed image for reasoning and obtains the image processing result, the model reasoning unit 503 is configured as follows: performing adaptation processing on the preprocessed image to obtain the model input image; and the model uses the model input image for reasoning to obtain the image processing result.

[0068] As one of the implementable ways, the device may further include a judgment unit 504, which is configured to: judge whether the model input specification matches the processing specification of the embedded chip; if so, pre-process the image to be processed.

[0069] As one of the achievable ways, the model inference unit 503 is configured during the adaptation process to: customize a two-dimensional convolution operator to perform convolution processing on the pre-processed image.

[0070] As one of the feasible ways, when the model uses the model input image to perform inference and obtains the image processing result, the model inference unit 503 is configured as follows: the model is a multi-input image model, the model input image is input into the multi-input image model to obtain the image processing result; and / or, the model is a batch inference model, the model input image is segmented in the dimension of the number of color channels to obtain n segmented images, the n segmented images are respectively input into the model and n-1 model copies to obtain the image processing result.

[0071] As one of the achievable methods, the model reasoning unit 503 is configured as follows: the image processing result includes: model output result, log information and / or performance evaluation information; the log information includes: resource occupancy information and key operation information during the image processing process.

[0072] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The device embodiment described above is only schematic, wherein the unit described as a separate component may or may not be physically separated, and the component displayed as a unit may or may not be a physical unit, that is, it may be located in one place, or it may be distributed on multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative work.

[0073] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0074] In addition, an embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, the steps of any one of the methods in the aforementioned method embodiments are implemented.

[0075] And an electronic device, comprising:

[0076] one or more processors; and

[0077] A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of the aforementioned method embodiments.

[0078] in, Figure 6 The architecture of the electronic device is shown as an example, which may include a processor 610, a video display adapter 611, a disk drive 612, an input / output interface 613, a network interface 614, and a memory 620. The processor 610, the video display adapter 611, the disk drive 612, the input / output interface 613, the network interface 614, and the memory 620 may be communicatively connected via a communication bus 630.

[0079] Among them, the processor 610 can be implemented by a general-purpose CPU, a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, etc., to execute relevant programs to implement the technical solutions provided in this application.

[0080] The memory 620 can be implemented in the form of ROM (Read On ly Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 620 can store an operating system 621 for controlling the operation of the electronic device 600, and a basic input and output system (BIOS) 622 for controlling the low-level operation of the electronic device 600. In addition, a web browser 623, a data storage management system 624, and an image processing device 625, etc. can also be stored. The above-mentioned image processing device 625 can be an application program that specifically implements the operations of the aforementioned steps in the embodiment of the present application. In short, when the technical solution provided by the present application is implemented by software or firmware, the relevant program code is stored in the memory 620 and is called and executed by the processor 610.

[0081] The input / output interface 613 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.

[0082] The network interface 614 is used to connect to a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WI FI, Bluetooth, etc.).

[0083] The bus 630 comprises a pathway for transmitting information between the various components of the device (eg, the processor 610, the video display adapter 611, the disk drive 612, the input / output interface 613, the network interface 614, and the memory 620).

[0084] It should be noted that, although the above device only shows a processor 610, a video display adapter 611, a disk drive 612, an input / output interface 613, a network interface 614, a memory 620, a bus 630, etc., in the specific implementation process, the device may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above device may also only include components necessary for implementing the solution of the present application, and does not necessarily include all the components shown in the figure.

[0085] It can be known from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly contributed to the prior art in the form of a computer program product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application or certain parts of the embodiments.

[0086] The technical solution provided by the present application is described in detail above. The principle and implementation method of the present application are described in detail using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present application.

Claims

1. An image processing method, the method is implemented based on a model, the model is deployed on an embedded chip, and is characterized in that: The method comprises: Get n images to be processed, where n is an integer greater than 1; Preprocessing the image to be processed to obtain a preprocessed image, wherein the format of the preprocessed image complies with the input format of the embedded chip; The model performs reasoning using the preprocessed image to obtain an image processing result.

2. According to the method of claim 1, preprocessing the image to be processed to obtain a preprocessed image comprises: Reading the n images to be processed, scaling the n images to be processed to fixed sizes respectively, and obtaining n images to be stitched; horizontally stitching the n images to be stitched to obtain a stitched image; The spliced ​​image is dimensionally transposed to obtain the preprocessed image.

3. According to the method of claim 1, the model uses the pre-processed image to perform reasoning, and the image processing result obtained includes: Performing adaptation processing on the preprocessed image to obtain a model input image; The model uses the model input image to perform reasoning and obtain an image processing result.

4. The method according to claim 1, characterized in that: The method further comprises, Determine whether the model input specification matches the processing specification of the embedded chip; if so, pre-process the image to be processed.

5. The method according to claim 2, wherein the adaptation process comprises: A two-dimensional convolution operator is customized to perform convolution processing on the preprocessed image.

6. According to the method of claim 2, the model uses the model input image to perform reasoning, and obtaining the image processing result comprises: The model is a multi-input image model, and the model input image is input into the multi-input image model to obtain an image processing result; and / or, The model is a batch inference model, which divides the model input image in the dimension of the number of color channels to obtain n segmented images, and inputs the n segmented images into the model and n-1 model copies respectively to obtain image processing results.

7. The method according to claim 1, wherein the image processing result comprises: Model output results, log information and / or performance evaluation information; The log information includes: resource occupancy information and / or key operation information during the image processing process.

8. An image processing device, the device is implemented based on a model, the model is deployed on an embedded chip, characterized in that: The device comprises: The image acquisition unit to be processed acquires n images to be processed, where n is an integer greater than 1; A preprocessing unit, which preprocesses the image to be processed to obtain a preprocessed image, wherein the format of the preprocessed image complies with the input format of the embedded chip; A model reasoning unit, wherein the model performs reasoning using the preprocessed image to obtain an image processing result.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

10. An electronic device, characterized in that: include: one or more processors; as well as A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of claims 1 to 7.

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