High-precision digital-to-analog converter and electronic device

By introducing bridge resistors into digital-to-analog converters and adjusting the proportional relationship of the resistor array, the problem of area and cost increase in the prior art is solved, and the area reduction and speed improvement of high-precision digital-to-analog converters are achieved.

CN119483604BActive Publication Date: 2025-08-05SHENZHEN SINONE CHIP ELECTRONIC CO. LTD.
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Patent Information

Application Number
CN202510067402.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-16
Publication Date
2025-08-05
Estimated Expiration
2045-01-16

AI Technical Summary

Technical Problem

While existing digital-to-analog converters increase their accuracy, they increase their area and cost, resulting in reduced DAC speed and accuracy.

Method used

Using the design of the first resistor array and the second resistor array, the equivalent resistance ratio of the bridge resistor to the first resistor array is 1/(n-1), and the ratio with each resistor in the second resistor array is (n-1)/n, n>2. Through the introduction of the bridge resistor, the resistance area involved in the cascade in the first resistor array is reduced, and the overall area is reduced while maintaining high accuracy.

Benefits of technology

Without affecting accuracy, the area and cost of digital-to-analog converters are significantly reduced, and the speed and efficiency of the DAC are improved.

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Abstract

The present application provides a high-precision digital-to-analog converter and an electronic device. The high-precision digital-to-analog converter includes: a first resistor array, a second resistor array, and a bridge resistor. The first resistor array is configured to convert low-order control bits of digital input data; the second resistor array is configured to convert high-order control bits of digital input data; the bridge resistor is connected between the first resistor array and the second resistor array, and the ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each resistor participating in the cascade in the second resistor array is (n-1) / n, where n>2.
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Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a high-precision digital-to-analog converter and electronic equipment. Background Art

[0002] Currently, DACs (Digital to Analog Converters) are an indispensable bridge between digital and analog circuits, with numerous applications in display technology and signal transmission. To improve DAC accuracy, conventional approaches are to increase resistor precision and reduce the on-resistance of CMOS switches. Improving resistor precision can be achieved by increasing the area of individual resistors or selecting a higher-precision process. Generally, increasing the area of individual resistors is the preferred approach. Reducing the on-resistance of CMOS switches can be achieved by increasing the size of MOS switches or switching to lower-voltage transistors. However, if the application environment is fixed, switching to lower-voltage transistors is not an option, and the only option is to increase the size of the MOS switches. Increasing the area of either individual resistors or the size of the MOS switches significantly increases the DAC area. Excessively large resistors and MOS switches increase the time constant, thus affecting the DAC's speed. Excessive area can lead to internal gradient errors in the DAC, reducing its accuracy. Furthermore, excessive area increases chip cost. Summary of the Invention

[0003] The present application provides a high-precision digital-to-analog converter and an electronic device for improving the accuracy of digital-to-analog conversion while reducing the area of an integrated circuit.

[0004] In a first aspect, an embodiment of the present application provides a high-precision digital-to-analog converter, the high-precision digital-to-analog converter comprising:

[0005] a first resistor array configured to convert a lower control bit of digital input data;

[0006] a second resistor array configured to convert a high-order control bit of the digital input data;

[0007] A bridge resistor connected between the first resistor array and the second resistor array, wherein the ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each cascaded resistor in the second resistor array is (n-1) / n, where n>2.

[0008] In some embodiments, the first resistor array includes: a termination resistor, a first control resistor and a ladder resistor; the first end of the termination resistor is connected to the first end of the first first control resistor, and the second end of the termination resistor is connected to the ground end; the first end of each first control resistor is also connected to the first end of the next first control resistor through a ladder resistor, the second end of each first control resistor is connected to the ground end or a preset reference voltage source through a switch, and the second end of the last first control resistor is connected to the first end of the bridge resistor; the ratio between the termination resistor and the first control resistor and the bridge resistor is 2 / (n-1); the ratio between the ladder resistor and the bridge resistor is 1 / (n-1).

[0009] In some embodiments, the second resistor array includes: second control resistors; the first end of each second control resistor is connected to the second end of the bridge resistor, the second end of the bridge resistor is the output end of the high-precision digital-to-analog converter, and the second end of the second control resistor is connected to the ground end or the preset reference voltage source through a switch; the ratio of the second control resistor to the bridge resistor is n / (n-1).

[0010] In some embodiments, the value range of the high-order control bit includes: 2 to m, where m is the number of bits of the digital input data.

[0011] In some embodiments, the low-order control bit is used to control switches of the first resistor array.

[0012] In some embodiments, the high-order control bit is converted into a thermometer code, and the thermometer code is used to control switches of the second resistor array.

[0013] In a second aspect, an embodiment of the present application provides an electronic device, comprising a high-precision digital-to-analog converter as described in any one of the embodiments of the present application.

[0014] An embodiment of the present application provides a high-precision digital-to-analog converter, which includes: a first resistor array, a second resistor array, and a bridge resistor, wherein the first resistor array is configured to convert low-order control bits of digital input data; the second resistor array is configured to convert high-order control bits of digital input data; the bridge resistor is connected between the first resistor array and the second resistor array, and the ratio between the bridge resistor and the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio between the bridge resistor and each resistor participating in the cascade in the second resistor array is (n-1) / n, where n>2. In the above-mentioned high-precision digital-to-analog converter, the voltage of the first resistor array is converted. Since the first resistor array is responsible for converting the low-order control bits and the second resistor array is responsible for converting the high-order control bits, as the precision of the high-precision digital-to-analog converter increases, the number of resistors participating in the cascade in the first resistor array increases, while the number of resistors participating in the cascade in the second resistor array remains substantially unchanged. By introducing bridge resistors, a small number of bridge resistors and resistors participating in the cascade in the second resistor array are increased while a large number of resistors participating in the cascade in the first array are reduced. Therefore, the area of the resistors participating in the cascade in the first resistor array is reduced to 1 / (n-1) of the original value. At the same time, the error of the first resistor array is also scaled to 1 / n of the original value, which is essentially negligible. This not only maintains the precision of the high-precision digital-to-analog converter, but also achieves an overall reduction in the area of the high-precision digital-to-analog converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0016] Figure 1 A circuit diagram of a ten-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application;

[0017] Figure 2 A schematic diagram of the Thevenin equivalent circuit of a 10-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application;

[0018] Figure 3 A circuit diagram of a first improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application;

[0019] Figure 4 A schematic diagram of a first-order Thevenin equivalent circuit of an improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application;

[0020] Figure 5A schematic diagram of a seventh-order Thevenin equivalent circuit of an improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application;

[0021] Figure 6 This is a circuit diagram of a second improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0023] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, combined, or partially merged, so the actual execution order may vary depending on the actual situation.

[0024] It should also be understood that the terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit the present application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0025] It should be further understood that the term "and / or" used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0026] Currently, digital-to-analog converters are often designed in the form of resistor ladders.

[0027] See also Figure 1 , Figure 1 FIG. 1 is a circuit diagram of a ten-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application. Figure 1 As shown, the 10-bit high-precision digital-to-analog converter before the improvement is controlled by a 10-bit binary code, wherein the 10-bit binary code is divided into a lower seven-bit control code and an upper three-bit control code. The upper three-bit control code is converted into a thermometer code and then input into the 10-bit high-precision digital-to-analog converter before the improvement. The 10-bit high-precision digital-to-analog converter before the improvement includes: a low-bit resistor array (b0-b6) and a high-bit resistor array (t0-t6), wherein the low-bit resistor array (b0-b6) is configured to convert the lower seven-bit control code, and the high-bit resistor array (t0-t6) is configured to convert the seven-bit thermometer code.

[0028] See also Figure 2 , Figure 2 Schematic diagram of the Thevenin equivalent circuit of a ten-bit high-precision digital-to-analog converter before improvement provided in an embodiment of the present application. Figure 2 As shown, the Thevenin equivalent is performed on the B area (b0b1b2...b6) of the 10-bit high-precision digital-to-analog converter before the improvement, where B is the decimal form of b0b1b2...b6. The resistance of the B area is ultimately equivalent to 2R, N is the number of resistors corresponding to the low-bit resistor array (b0-b6) for the Thevenin equivalent, and the equivalent voltage of the B area is V eq0 , V eq0 The specific calculation formula is:

[0029] ;

[0030] The error in area B (b0b1b2...b6) is smaller than that in area T (t0t1t2...t6). However, due to the ladder resistors (resistance value R) and the termination resistors (resistance value 2R, with one end fixed to ground) in area B, the area of area B is much larger than that of area T. In other words, a lot of area in area B is wasted to improve accuracy.

[0031] An embodiment of the present application provides a high-precision digital-to-analog converter, comprising: a first resistor array, a second resistor array, and a bridge resistor. The first resistor array is configured to convert low-order control bits of digital input data. The second resistor array is configured to convert high-order control bits of digital input data. The bridge resistor is connected between the first resistor array and the second resistor array. The ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each cascaded resistor in the second resistor array is (n-1) / n, where n>2.

[0032] For the sake of convenience and improvement of the ten-bit high-precision digital-to-analog converter before, the embodiment of the present application uses the improved ten-bit high-precision digital-to-analog converter as a specific embodiment of the high-precision digital-to-analog converter provided in the above-mentioned embodiment of the present application. It should be noted that this embodiment is only used for explanation and is not intended to limit the present application.

[0033] Exemplarily, in order to reduce the area under the same integral nonlinearity (INL) and differential nonlinearity (DNL), taking a 10-bit high-precision digital-to-analog converter as an example, the following adjustment is proposed.

[0034] See also Figure 3 , Figure 3 This is a circuit diagram of the first improved 10-bit high-precision digital-to-analog converter provided by the embodiment of the present application. Figure 3 As shown, the resistance of the smallest resistor is R, and in area B, the termination resistor R DThe resistance value of the ladder resistor R0 is 2*R, and the first control resistor (R b0 、R b1 、R b2 、R b3 、R b4 、R b5 and R b6 ) are all 2*R. The second control resistor (R t0 、R t1 、R t2 、R t3 、R t4 、R t5 and R t6 ) are all n*R, and the bridge resistor R connected between the T area and the B area QJ The resistance is (n-1)*R.

[0035] like Figure 3 The components in Area B shown are all linear devices, so the superposition theorem can be applied to simplify the analysis. The equivalent model for Area B can be obtained by performing the Thevenin equivalent and superimposing each step in Area B. Each step in Area B consists of the first control resistor and the corresponding ladder resistor R0.

[0036] First, the first control resistor R of the lowest bit b0 b0 Performing Thevenin equivalence, assuming that the first control resistor (R b1 、R b2 、R b3 、R b4 、R b5 and R b6 ) are grounded.

[0037] See also Figure 4 , Figure 4 This is a schematic diagram of a first-order Thevenin equivalent circuit of an improved 10-bit high-precision digital-to-analog converter provided in an embodiment of the present application. Figure 4 As shown in the figure, after the improved 10-bit high-precision digital-to-analog converter performs a Thevenin equivalent, the open-circuit voltage V open and short-circuit current I short The specific calculation formula is:

[0038] ;

[0039] ;

[0040] The specific calculation formulas for the first equivalent voltage and the first equivalent resistance are as follows:

[0041] ;

[0042] ;

[0043] At this time, the other first control resistor (R b1 、R b2 、R b3 、R b4 、R b5 and R b6) As in the previous case, we can therefore proceed with the Thevenin equivalence.

[0044] See also Figure 5 , Figure 5 This is a schematic diagram of the seventh-order Thevenin equivalent circuit of an improved ten-bit high-precision digital-to-analog converter provided in an embodiment of the present application. Figure 5 As shown, the specific calculation formulas for the seventh equivalent voltage and the seventh equivalent resistance at the output end of area B are:

[0045] ;

[0046] ;

[0047] Among them, since the resistance ratio of the equivalent resistance of area B and the bridge resistance is 1:(n-1), the error of area B will be scaled to 1 / n of the original value and can be basically ignored. At the same time, since the bridge resistance R QJ Due to the scaling effect, the resistance value of the resistor in area B no longer needs to be modified according to the resistance value of the resistor in area T, thereby eliminating unnecessary resistors.

[0048] like Figure 1 If the accuracy of the 10-bit high-precision digital-to-analog converter before improvement is to be increased, the resistance of the B and T regions needs to be increased simultaneously. Figure 3 As shown, the first improved 10-bit high-precision digital-to-analog converter provided in the embodiment of the present application realizes that only the resistance of the T region is increased without adjusting the resistance of the B region, thereby improving the accuracy while avoiding a large amount of unnecessary area.

[0049] An embodiment of the present application provides a high-precision digital-to-analog converter, which includes: a first resistor array, a second resistor array, and a bridge resistor, wherein the first resistor array is configured to convert low-order control bits of digital input data; the second resistor array is configured to convert high-order control bits of digital input data; the bridge resistor is connected between the first resistor array and the second resistor array, and the ratio between the bridge resistor and the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio between the bridge resistor and each resistor participating in the cascade in the second resistor array is (n-1) / n, where n>2. In the above-mentioned high-precision digital-to-analog converter, the voltage of the first resistor array is converted. Since the first resistor array is responsible for converting the low-order control bits and the second resistor array is responsible for converting the high-order control bits, as the precision of the high-precision digital-to-analog converter increases, the number of resistors participating in the cascade in the first resistor array increases, while the number of resistors participating in the cascade in the second resistor array remains substantially unchanged. By introducing bridge resistors, a small number of bridge resistors and resistors participating in the cascade in the second resistor array are increased while a large number of resistors participating in the cascade in the first array are reduced. Therefore, the area of the resistors participating in the cascade in the first resistor array is reduced to 1 / (n-1) of the original value. At the same time, the error of the first resistor array is also scaled to 1 / n of the original value, which is essentially negligible. This not only maintains the precision of the high-precision digital-to-analog converter, but also achieves an overall reduction in the area of the high-precision digital-to-analog converter.

[0050] In order to more clearly introduce the technical solution of the present application, the technical solution of the present application will be introduced through specific embodiments below. It should be noted that the specific embodiments are used to expand the technical solution of the present application, but are not intended to limit the present application.

[0051] In some embodiments, see Figure 6 This is a circuit diagram of a second improved ten-bit high-precision digital-to-analog converter provided in an embodiment of the present application.

[0052] like Figure 6 As shown, the first resistor array (area B) includes: terminating resistor R D 、The first control resistor (R b0 、R b1 、R b2 、R b3 、R b4 、R b5 and R b6 ) and ladder resistance R0. Termination resistance R D The first end and the first control resistor R b0 The first end is connected to the terminating resistor R D The second end of each first control resistor (R b0 、R b1 、R b2、R b3 、R b4 、R b5 and R b6 ) is connected to the first control resistor (R b0 、R b1 、R b2 、R b3 、R b4 、R b5 and R b6 ) is connected to the first end of each first control resistor (R b0 、R b1 、R b2 、R b3 、R b4 、R b5 and R b6 ) is connected to the ground terminal GND or the preset reference voltage source V ref Connect the last first control resistor R b6 The second end of the bridge resistor R QJ The first end of the terminating resistor R D 、The first control resistor (R b0 、R b1 、R b2 、R b3 、R b4 、R b5 and R b6 ) and the bridge resistor R QJ The proportional relationship between the ladder resistance and the bridge resistance is 2 / (n-1). The proportional relationship between the ladder resistance and the bridge resistance is 1 / (n-1).

[0053] Therefore, the resistance value of any resistor in area B is proportional to that before and after the improvement, which is 1 / (0.5n), thereby reducing the area of area B.

[0054] In some embodiments, the second resistor array (T region) includes: a second control resistor (R t0 、R t1 、R t2 、R t3 、R t4 、R t5 and R t6 Each second control resistor (R t0 、R t1 、R t2 、R t3 、R t4 、R t5 and R t6 ) are connected to the first end of the bridge resistor R QJ The second end is connected to the bridge resistor R QJThe second end is the output end of the high-precision digital-to-analog converter, and the second control resistor (R t0 、R t1 、R t2 、R t3 、R t4 、R t5 and R t6 ) is connected to the ground terminal GND or the preset reference voltage source V ref Connect the second control resistor (R t0 、R t1 、R t2 、R t3 、R t4 、R t5 and R t6 ) and the bridge resistor R QJ The proportional relationship is n / (n-1).

[0055] Therefore, the final equivalent resistance of area B and the bridge resistance R QJ The sum of the resistance values is equal to the resistance value of any second control resistor.

[0056] In a conventional cascade resistor ladder, the resistors in the B region consist of R and 2R, and the resistors in the T region consist of 2R. To improve accuracy, the conventional approach is to increase R while maintaining the original proportional relationship. However, this approach increases the area by a considerable amount, which has very little effect on the improvement of accuracy. Figure 6 The second improved 10-bit high-precision digital-to-analog converter shown here reduces the resistance of the B region without adjusting the resistance of the T region, thereby improving the accuracy while avoiding a large amount of unnecessary area.

[0057] In some embodiments, the value range of the high-order control bit includes: 2 to m, where m is the number of bits of the digital input data.

[0058] For example, since the maximum values of INL and DNL are taken in most application environments, in order to control the area, the T region is usually only responsible for converting the upper 3 bits of the binary code. For a higher resolution DAC, the lower control bits will be more, that is, the first control resistor R bn The number of corresponding ladder resistors R0 will be greater. By using the high-precision digital-to-analog converter provided in the embodiment of the present application, the area of each resistor in the B region is reduced, and the resistors in the T region and the bridge resistor R QJ The area of zone B remains basically unchanged, which can effectively deal with the problem of exponential growth in area caused by the improvement of resolution in zone B.

[0059] In one embodiment, the schematic diagram of the T region corresponding to the 3-bit high-order control bit is as follows: Figure 6 As shown, when the value of the high-order control bit changes, the second control resistor in the T region also needs to increase or decrease accordingly.

[0060] In some embodiments, the low-order control bit is used to control switches of the first resistor array.

[0061] In some embodiments, the high-order control bits are converted into a thermometer code, and the thermometer code is used to control the switches of the second resistor array.

[0062] Exemplarily, the high-precision digital-to-analog converter provided in the present application also includes a switch control unit, which is used to control the switch of the first resistor array according to the low-order control bit, or to convert the high-order control bit into a thermometer code and control the switch of the second resistor array according to the thermometer code.

[0063] An embodiment of the present application further provides an electronic device, comprising a high-precision digital-to-analog converter as described in any one of the embodiments of the present application.

[0064] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A high-precision digital-to-analog converter, characterized in that: The high-precision digital-to-analog converter comprises: a first resistor array configured to convert a lower control bit of digital input data; a second resistor array configured to convert a high-order control bit of the digital input data; A bridge resistor connected between the first resistor array and the second resistor array, wherein the ratio of the bridge resistor to the equivalent resistance of the first resistor array is 1 / (n-1), and the ratio of the bridge resistor to each cascaded resistor in the second resistor array is (n-1) / n, where n>2.

2. The high-precision digital-to-analog converter according to claim 1, wherein: The first resistor array includes: a termination resistor, a first control resistor and a ladder resistor; the first end of the termination resistor is connected to the first end of the first first control resistor, and the second end of the termination resistor is connected to the ground end; the first end of each first control resistor is also connected to the first end of the next first control resistor through a ladder resistor, the second end of each first control resistor is connected to the ground end or a preset reference voltage source through a switch, and the second end of the last first control resistor is connected to the first end of the bridge resistor; the ratio between the termination resistor and the first control resistor and the bridge resistor is 2 / (n-1); the ratio between the ladder resistor and the bridge resistor is 1 / (n-1).

3. The high-precision digital-to-analog converter according to claim 2, wherein: The second resistor array includes: second control resistors; the first end of each second control resistor is connected to the second end of the bridge resistor, the second end of the bridge resistor is the output end of the high-precision digital-to-analog converter, and the second end of the second control resistor is connected to the ground end or a preset reference voltage source through a switch; the ratio of the second control resistor to the bridge resistor is n / (n-1).

4. The high-precision digital-to-analog converter according to claim 1, wherein: The value range of the high-order control bit includes: 2 to m, where m is the number of bits of the digital input data.

5. The high-precision digital-to-analog converter according to claim 1, wherein: The low-order control bit is used to control the switch of the first resistor array.

6. The high-precision digital-to-analog converter according to claim 5, wherein: The high-order control bit is converted into a thermometer code, and the thermometer code is used to control switches of the second resistor array.

7. An electronic device, characterized in that: The method comprises the high-precision digital-to-analog converter according to any one of claims 1 to 6.

Citation Information

Patent Citations

  • Digital-to-analog converter layout structure of segmented resistor structure

    CN117955499A