Fire-fighting power two-bus power supply and communication method and device based on PWM

Abstract

The invention provides a PWM-based fire-fighting power two-bus power supply and communication method and device, and relates to the technical field of fire-fighting monitoring, and the method comprises the steps: taking a PWM voltage signal sent by a master station to a slave station as a downlink signal, taking a PWM current signal sent by the slave station to the master station as an uplink signal, representing the signal logic based on the combination of PWM frequency and PWM duty ratio, and carrying out the communication of the PWM frequency and the PWM duty ratio; the time length of a timer is defined as a unit pulse width count value according to the minimum pulse width of PWM, a comparison table containing a hexadecimal number, a binary number, a PWM frequency, a PWM duty ratio, a PWM low-level pulse width count value, a PWM high-level pulse width count value and a PWM period value is made, and coding and code sending are carried out based on the comparison table by using a single-byte table look-up method. And decoding and receiving codes based on the comparison table by using a single-byte offset compression look-up table method. Bidirectional PWM communication and PWM waveform coding are adopted, the overall loading capacity of the bus is improved, the bus distance is increased, the error problem can be solved through a verification mechanism based on digital communication of PWM coding, and the communication anti-interference capacity is improved.

Description

Technical Field

[0001] The present application relates to the field of fire monitoring technology, and more specifically, to a PWM-based fire power two-bus power supply and communication method and device. Background Art

[0002] In the field of fire monitoring, a two-wire system is used to connect the alarm controller to bus products such as smoke detectors and manual alarm buttons, where the controller is the master station and the bus products such as smoke detectors are the slave stations. The two wires connecting the controller and bus products such as smoke detectors are called the fire system alarm bus. The alarm bus is also called the fire second bus. When the second bus provides power for the bus products and provides master-slave communication for the bus products, it is a power second bus. The current problems with power second bus products are: on the one hand, the load capacity is poor and the communication distance is short, generally not exceeding 1 kilometer; on the other hand, the communication anti-interference ability is poor and the communication rate is low, and the effective communication baud rate generally does not exceed 1.2Kbps. The technical solutions based on two-bus communication in the existing technology are: (1) The Chinese invention patent with publication number CN112711215A discloses a bus terminal controller, a bus communication power supply system, and a communication power supply method thereof. The system uses full-scale voltage transmission through an external MOS tube module to modulate the control signal on the power supply cable. A microprocessor high-resolution counter is used to modulate the duty cycle of the square wave to encode the level of a specific analog signal. The system uses a small current signal for return transmission, with voltage signals used for downlink data and current signals used for uplink data. This system provides stability and anti-interference capabilities in applications with multiple points, long distances, and complex wiring. The system uses full-scale voltage transmission and current signal return to provide high communication anti-interference capabilities.

[0003] (2) The Chinese utility model patent with publication number CN206012357U discloses a battery thermal runaway detection system based on PWM communication, which sets different duty cycles according to the current battery normal state, thermal runaway alarm, and start-up action execution device. The fundamental frequency of PWM is set to 2.5Hz, and the duty cycles of 97.5%, 50%, and 75% are used to represent the battery normal state, thermal runaway alarm, and fire extinguisher activation state respectively. After the CPU core processing module determines the current warning level based on the thermal runaway model, the PWM generation circuit converts the pulse duty cycle according to the current battery thermal runaway state. After passing through the drive circuit, it is sent to the transmission line for the battery management system BMS, the vehicle control system VCU or the intelligent instrument to receive. After receiving the PWM signal, it undergoes shaping and fault tolerance processing, measures the pulse period and width, and calculates the duty cycle, which corresponds to different thermal runaway information.

[0004] However, although the existing technology uses duty cycle to express information and realizes two-bus communication with full-scale voltage transmission and current signal return, it still has the problem of insufficient communication rate. Summary of the Invention

[0005] To solve the above problems, the technical solution adopted in this application is a PWM-based fire power two-bus power supply and communication method, which includes the following steps: The master station sends a PWM voltage signal to the slave station as a downlink signal, and the slave station sends a PWM current signal to the master station as an uplink signal. The signal logic is represented based on the combination of PWM frequency and PWM duty cycle. The time length of the timer is defined as the unit pulse width count value according to the minimum pulse width of PWM. A comparison table containing hexadecimal numbers, binary numbers, PWM frequency, PWM duty cycle, PWM low-level pulse width count value, PWM high-level pulse width count value and PWM period value is prepared. A single-byte lookup table method is used to encode and send codes based on the comparison table, and a single-byte offset compression lookup table method is used to decode and receive codes based on the comparison table.

[0006] Optionally, the circuit of the master station includes: power supply from the power supply to the 24V-36V pulse switching circuit through the current protection circuit, sending data through the UART input circuit and inputting the PWM waveform encoding circuit to convert the digital signal into a PWM signal, the PWM output control circuit controls the switching state of the 0-15V pulse switching circuit and the 24V-36V pulse switching circuit according to the output of the PWM waveform encoding circuit, the current in the circuit is detected by the current sampling circuit, the detected current is improved by the differential amplifier circuit and the PWM hysteresis shaping circuit adjusts the phase of the PWM signal, and then inputs the PWM waveform decoding circuit to convert the PWM signal into a digital signal, outputs the received data through the UART output circuit, and performs power supply and signal transmission through the PWM-based fire power bus 2. Before connecting to the PWM-based fire power bus 2, a capacitive absorption circuit and an electromagnetic compatibility protection circuit are provided to ensure stable operation of the circuit.

[0007] Optionally, the circuit of the slave station includes: power supply and signal transmission through the PWM-based fire power bus 2, and before being connected from the PWM-based fire power bus 2, an electromagnetic compatibility and polarity protection circuit is provided to protect the circuit, the level of the input signal is converted by the level conversion and PWM hysteresis circuit, the PWM signal is converted into a digital signal by the PWM waveform decoding circuit, the UART receiving circuit receives the signal for the bus product function module, and the UART sending circuit sends the bus product function module signal, the PWM waveform encoding circuit converts the digital signal into a PWM signal, a 40mA constant current source circuit provides a stable current source, and a stable low-voltage power supply is provided for the slave station circuit through a low-power linear regulator.

[0008] Optionally, the bus product functional modules include a smoke detection module, a manual fire alarm button module, a temperature detection module and a fire bus input and output interface module.

[0009] Optionally, the PWM frequencies representing the signal logic are 1.6 KHz, 2.0 KHz, 2.4 KHz, and 2.8 KHz, and the PWM duty cycles are 35%, 45%, 55%, and 65%.

[0010] Optionally, encoding and transmitting using a single-byte lookup table method includes: splitting a byte of data into an upper half byte and a lower half byte, performing a lookup using the lower half byte and the upper half byte as a lookup table offset, respectively, to obtain a count value of a PWM low-level pulse width and a high-level pulse width, and setting the single-byte hexadecimal number as X; S1: Mask the high nibble of X: X and the hexadecimal number 0x0F are ANDed together, and the result is Y, Y=X&&0F, where Y is the low nibble of X. S2: Use Y as the offset to look up the table and obtain the low-level and high-level pulse width count values ​​LL and LH of the lower 4-bit PWM of the byte; Shift X right 4 times, move the high half byte to the low half byte position, repeat the above steps S1 and S2, obtain the low-level and high-level pulse width count values ​​HL and HH of the high 4-bit PWM of the byte, and send the PWM waveform in the order of sending the low bit first, the high bit second, and the stop bit last.

[0011] Optionally, using a single-byte offset compression lookup table method for decoding and receiving includes: defining a received first offset, defining a redundant error of a PWM period value, comparing the values ​​of the PWM period values ​​in a table corresponding to four PWM periods of a PWM waveform and four PWM frequencies, sorting the values ​​from small to large in combination with a redundant error range, compressing the lookup table offset by dividing by 4, listing and looking up the table to determine the upper two bits of the half-byte data represented by the frequency PWM; determining the lower two bits of the half-byte data by counting the low-level pulse width of the frequency PWM in a similar manner; and performing an OR operation on the values ​​obtained from the two table lookups to obtain the half-byte logic value of the PWM. The table lookup for the PWM low-level pulse width count value is as follows: Define the received second offset and redundant error, look up the four low-level pulse width count values ​​corresponding to the PWM frequency in the table in sequence, sort them from small to large according to the four duty cycles of the PWM frequency, and use the redundant error to compress the lookup offset by dividing by 2. Then list and look up the table, and repeat the table lookup process for the PWM low-level pulse width count value for all PWM frequencies; Through the above process, the upper two bits of the half-byte obtained by looking up the table are ORed with the lower two bits of the half-byte obtained by looking up the table to obtain the lower half-byte data in a byte; the same method is used to process the second PWM signal received to obtain the upper half-byte data in a byte, and finally, the data of the byte is obtained through shifting and ORing.

[0012] Optionally, the power PWM bus frame format adopts a half-duplex communication mode, and one frame of data consists of three time periods: an idle field, a downlink field, and an uplink field.

[0013] Optionally, during the idle domain, the power PWM bus is maintained at a high level of 24-36V by the master station, which is used to power the slave bus products. The downstream domain is sent by the master station to the slave station. The signal data is composed of a group address command byte, a frame length byte, a data byte, and a check byte. The group address command byte is one byte, the upper 4 bits represent the group address, and the lower 4 bits are the command word. The upstream domain is controlled by the master station to generate 16 groups of 1ms high levels and 1.5ms low levels on the power PWM bus, wherein the 1ms high level is 24V-36V, which is used to replenish power for the slave bus products; the 1.5ms low level is 8V-15V, which is used as an uplink response mark for the slave bus products. The slave station can upload data during this period.

[0014] The present application also provides a PWM-based fire power two-bus power supply and communication device, which uses any of the aforementioned PWM-based fire power two-bus power supply and communication methods for communication.

[0015] The beneficial effects of the PWM-based fire protection power two-bus power supply and communication method and device provided in this application are: 1. Traditional fire protection bus data transmission is one bit at a time, with a low data rate, which may cause the risk of delayed fire alarms. The power PWM bus of this application uses bidirectional PWM communication and PWM waveform encoding, which increases the data transmission speed by 4 times and reduces the risk of delayed alarms.

[0016] 2. During the response period of the traditional fire protection bus, data transmission requires a one-bit reply. Each bit of the reply consumes current, which is very power-consuming and affects the bus load capacity and bus distance. The power PWM bus of this application uses PWM waveform encoding to reply data. One waveform represents 4 bits, which improves efficiency by 4 times. The current consumption during the data reply period is reduced by 4 times, thus reducing the average power consumption by 4 times, improving the overall bus load capacity and bus distance.

[0017] 3. Traditional fire protection bus-2 uses current magnitude to transmit signals during bus product response, which is an analog communication method with poor anti-interference capabilities. The power PWM bus of this application uses digital communication based on PWM coding for both upstream and downstream communication. This can resolve errors through verification, feedback confirmation, and retransmission mechanisms, improving communication anti-interference capabilities.

[0018] 4. This application proposes a fire protection power bus 2 based on PWM, which improves the load capacity and communication rate of the fire protection bus 2, and can increase the communication rate to 9.6Kbps; since PWM generator and PWM capture function have become basic configurations of high-, medium- and low-end microcontrollers, the use of PWM communication will not increase additional costs; the power PWM bus uses PWM duty cycle and PWM frequency to represent digital communication logic, which can improve communication performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments or descriptions of the prior art.

[0020] Figure 1 This is a power PWM bus topology diagram provided in an embodiment of the present application; Figure 2 This is the uplink and downlink signaling method provided in the embodiment of the present application; Figure 3 This is a principle block diagram of the power PWM bus master interface provided by an embodiment of the present application; Figure 4 This is a block diagram of the power PWM bus slave interface provided by an embodiment of the present application; Figure 5 is the duty cycle of the PWM current signal provided in the embodiment of the present application; Figure 6 It is a PWM waveform coding diagram provided in the embodiment of the present application; Figure 7 This is a schematic diagram of single-byte transmission of the power PWM bus provided in an embodiment of the present application; Figure 8 This is a diagram of the PWM waveform coding process using the offset lookup table method provided in an embodiment of the present application; Figure 9 This is a diagram of the PWM waveform decoding process using the offset compression lookup table method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to make the technical problems, technical solutions and beneficial effects to be solved by this application more clearly understood, this application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0022] Example 1 Power PWM (Pulse Width Modulation, hereinafter referred to as PWM) bus protocol physical layer: The transmission medium is copper twisted pair with a thickness of 1.0 mm² or more.

[0023] Topology diagram Figure 1-Figure 2 As shown: like Figure 1 As shown, the PWM-based fire protection power bus 2 significantly improves the load capacity of the fire protection bus 2 and significantly increases the communication rate, which can be increased to 9.6Kbps. This application refers to this bus method as the power PWM bus, abbreviated as PPB, written as P2B, and pronounced as P square B. The controller is the power PWM bus master station, and the bus products are the power PWM bus slave stations.

[0024] The master station sends signals to the slave station as downlink, and the slave station sends signals to the master station as uplink. The master station and slave stations, as well as the slave bus products, are connected with twisted pair cables.

[0025] like Figure 2 As shown, the PWM signal on the downstream side of the power PWM bus is a voltage signal, with a high level of 24-36V (corresponding to the idle level) and a low level of 8-15V. The PWM signal on the upstream side of the power PWM bus is a current signal, with a high level of 35-55mA and a low level of 0-10mA (idle value).

[0026] The power PWM bus uses current as the uplink signal because slave devices on the bus cannot supply power but can only receive, or consume, electricity. Therefore, a customizable power consumption state is used to represent the uplink information, essentially using current pulses to represent the uplink signal. Since interference signals are mostly expressed in voltage form, milliampere-level interference currents are unlikely to occur, so using current as the uplink signal offers the advantage of strong anti-interference capabilities.

[0027] like Figure 3As shown in the figure, the power PWM bus master circuit consists of an overcurrent protection circuit, a 24-36V pulse switching circuit, a 0-15V pulse switching circuit, a UART (Universal Asynchronous Receiver / Transmitter, hereinafter referred to as UART) input / output circuit, a PWM waveform encoding / decoding circuit, a PWM output control circuit, a line capacitive absorption circuit, an EMC (Electromagnetic Compatibility, hereinafter referred to as EMC) protection circuit, a current sampling circuit, a differential amplifier circuit, and a PWM hysteresis shaping circuit.

[0028] The power supply is supplied to the 24V-36V pulse switching circuit through the current protection circuit, and the sent data is input into the PWM waveform encoding circuit through the UART input circuit to convert the digital signal into a PWM signal. The PWM output control circuit controls the switching state of the 0-15V pulse switching circuit and the 24V-36V pulse switching circuit according to the output of the PWM waveform encoding circuit. The current in the circuit is detected by the current sampling circuit. The detected current is improved by the differential amplifier circuit and the PWM hysteresis shaping circuit adjusts the phase of the PWM signal. The PWM waveform decoding circuit converts the PWM signal into a digital signal, and the received data is output through the UART output circuit. The power supply and signal transmission are carried out through the PWM-based fire power bus 2. Before connecting to the PWM-based fire power bus 2, a capacitive absorption circuit and an electromagnetic compatibility protection circuit are provided to ensure stable operation of the circuit.

[0029] like Figure 4 As shown in the figure, the power PWM bus slave circuit consists of EMC and polarity protection circuits, level conversion and PWM hysteresis circuits, a 40mA constant current source circuit, PWM waveform encoding / decoding circuits, UART transceiver / receiver circuits, bus product functional module circuits, and a low-power LDO (Low Dropout Regulator). The bus product functional modules are specific functional modules, such as the smoke detection module for smoke detection, the manual fire alarm button module, the temperature detection module, and the fire bus input and output interface module.

[0030] Power supply and signal transmission are carried out through the PWM-based fire power bus 2. Before being connected from the PWM-based fire power bus 2, an electromagnetic compatibility and polarity protection circuit is provided to protect the circuit. The level of the input signal is converted by the level conversion and PWM hysteresis circuit. The PWM waveform decoding circuit converts the PWM signal into a digital signal. The UART receiving circuit receives the signal for the bus product function module, and the UART transmitting circuit sends the bus product function module signal. The PWM waveform encoding circuit converts the digital signal into a PWM signal. The 40mA constant current source circuit provides a stable current source, and a low-power linear regulator is used to provide a stable low-voltage power supply for the slave circuit.

[0031] Logic definition and PWM waveform encoding: like Figure 5 As shown in the figure, the high level of the signal here is represented by voltage amplitude in the downstream signal, while the high and low levels are represented by current magnitude in the upstream signal. Unlike ordinary logic representation, the high and low levels of the signal are not represented by the signal level. Instead, the duty cycle of the PWM signal waveform is used to represent the logic 0 or logic 1, with the occupied position on the right and the empty position on the left.

[0032] To increase signal transmission speed, a combination of multiple PWM frequencies and PWM duty cycles is used to represent signal logic. Thus, a PWM signal cycle waveform represents not just one logic bit, but a logic group. As shown in Table 1, a PWM cycle waveform represents 4 bits of logic.

[0033] Table 1 Half-byte PWM encoding method

[0034] Table 1 and Figure 6 What is represented is the PWM with frequencies of 1.6KHz, 2.0KHz, 2.4KHz, and 2.8KHz and duty cycles of 35%, 45%, 55%, and 65% respectively, which represent the logic 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111, a total of 16 logics.

[0035] The PWM range of 1.6KHz-2.8KHz and 35%-65% duty cycle is adopted because the PWM signal in this range can avoid the large loss of too narrow pulses on the power PWM bus, so as to ensure better signal quality on the 1km twisted pair cable commonly used in the fire protection field.

[0036] Power PWM bus single-byte signal transmission method: Because of the Figure 6 PWM waveform encoding, to transmit one byte (8bit) of data, only Figure 6 The two waveforms are used, so the baud rate is increased by 4 times compared to the traditional single-bit transmission with 8 waveforms per byte. In the uplink signal, for example, uploading a byte of data only requires two current signals instead of eight. This significantly reduces the power consumption of bus products on the power PWM bus, which helps improve the bus load capacity.

[0037] The following randomly selects the downlink hexadecimal number 3A (binary 0011 1010) and the uplink signal hexadecimal number 91 (1001 0001) as an example to further illustrate the power PWM bus signal transmission method.

[0038] Since the idle voltage of the power PWM bus is a high level in the power supply state, it defines Figure 7 The stop bit and start bit shown in the figure can be represented by the falling edge of the first PWM idle bit of each byte; similarly, since the idle current of the power PWM bus is 0-10mA, the Figure 7 The start bit shown in the figure can be used for byte synchronization. The stop bit of each byte in the downstream direction can be represented by the falling edge of the current at the end of the last PWM waveform.

[0039] The pulse width of the start bit and stop bit is preferably defined in the range of 0.1-1ms.

[0040] Power PWM bus baud rate and minimum pulse width calculation: From Table 1 and Figure 6 It can be seen that PWM waveform encoding usually requires sending four logic 1s or logic 0s. This application replaces this process with a single PWM waveform, thereby increasing the bus transmission rate. Compared with one waveform per bit, the baud rate is increased by nearly 4 times. According to the average PWM frequency of 2.4KHz in the table, the following is calculated: 2.4KHz×4=9.6KHz; This allows for baud rate transmission close to 9.6K.

[0041] 1) Minimum pulse width calculation Signal period T=1 / F, F is PWM frequency Figure 6 The highest frequency PWM is 2.8KHz, and the minimum duty cycle is 35%. Then the minimum pulse width = (1 / 2.8KHz) × 0.35 = 0.125ms; Usually, the pulse width signal that can be transmitted on a twisted pair cable of no less than 1mm² and 1km in length is no less than 0.1ms, so a pulse width of 0.125ms can ensure communication quality.

[0042] 2) Calculation of minimum pulse resolution width The minimum pulse width is 0.125ms=125us; The second smallest pulse width = (1 / 2.8KHz) × 0.45 = 0.161ms = 161us; The minimum resolution width of pulse width = 161us-125us = 36us; Therefore, a timer of no more than 18us can be used to realize PWM generation and capture defined by the power PWM bus.

[0043] The clock frequency corresponding to 18us is: F=1 / (18us×2)=0.028MHz=28KHz; Therefore, a system clock of 500KHz or above will suffice for the CPU.

[0044] Table lookup method to realize byte sending and receiving: According to the calculation of the power PWM bus baud rate and minimum pulse width, the minimum pulse width of the power PWM bus is 125us.

[0045] The timer for PWM and pulse width capture is set to 5us, and t=5us is defined.

[0046] Table 2 shows the PWM occupied (high level waveform) and empty (low level waveform) pulse widths at different frequencies used by the power PWM bus, where H is the high-level pulse width count value and L is the low-level pulse width count value.

[0047] T=H+L is the PWM period value.

[0048] The stop bit and start bit are defined as 250us, and the count value of the 5us timer is 250 / 5=50.

[0049] Table 2 Hexadecimal 0-F PWM low level L and high level H pulse width count values ​​in units of 5us

[0050] Calculation example of Table 2: Taking the hexadecimal number 1 as an example, the PWM frequency f=1.6kHz; Then the PWM period is 1 / f=1 / 1.6k=0.625ms=625us; H=(625us×0.45) / 5us=56.25=56; L=[625us×(1-0.45)] / 5us=68.75=69; T=H+L=56+69=125.

[0051] Single-byte lookup table encoding method: like Figure 8 As shown, one byte of data is split into high nibble and low nibble.

[0052] The low half byte and the high half byte are used as the table lookup offset to perform table lookup to obtain the PWM low level pulse width and high level count value.

[0053] Let this single-byte hexadecimal number be X.

[0054] a) First, mask the upper half byte of X: Perform an AND operation on X and the hexadecimal number 0x0F, and the result is Y. If Y = X&&0F, then Y is the lower half byte of X.

[0055] b) Then use Y as the offset to look up the tables of TAB271L and TAB271H respectively to obtain the low-level and high-level pulse width count values ​​LL and LH of the lower 4-bit PWM of the byte.

[0056] According to the offset and Table 2, we can get Table 3: Table 3 Comparison table of offset Y pulse width count values

[0057] Next, shift X right 4 times to move the upper half byte to the lower half byte position, and repeat steps a) and b) above to obtain the low-level and high-level pulse width count values ​​HL and HH of the upper 4-bit PWM of the byte.

[0058] For example, assuming X = 0x3A, the offset of the lower nibble is Y = 0x0A, and the table TAB271L obtains LL = 38, and the table TAB271H obtains LH = 46; the offset of the upper nibble is Y = 0x03, and the table TAB271L obtains HL = 44, and the table TAB271H obtains HH = 81; Then the PWM waveform is sent in the traditional order of sending the low bit first, the high bit second, and the stop bit last: Define the PWM output terminal as PO and execute in the following order: P0 is set to 1 (high level idle), the 5us timer is started, the counter sends LL, P0 is set to 0, the counter counts down to 0, the counter sends LH, P0 is set to 1, the counter counts down to 0, the counter sends HL, P0 is set to 0, the counter counts down to 0, the counter sends HH, P0 is set to 1, the counter counts down to 0, the counter sends STOP, P0 is set to 0, the counter counts down to 0, P0 is set to 1 and ends.

[0059] 2) Single-byte offset compression lookup table decoding and receiving method First, according to Table 2, the following definitions are made: Define the first received offset as Y1 and the allowable margin error of T as ±5. The values ​​of T in Table 2 are 125, 100, 84, and 71, respectively, corresponding to the four PWM cycles of the PWM waveform and four PWM frequencies. To reduce the number of table elements and to account for the allowable margin error, sort the table elements in ascending order and compress the lookup offsets by dividing by 4.

[0060] Take Y1=T / 4 and perform table lookup offset compression. Divide T=71, 84, 100, and 125 by 4 and express them as hexadecimal numbers 11, 15, 19, and 1F respectively. That is, the center offset of Y1 is hexadecimal 11, 15, 19, and 1F. The list is shown in Table 4: Table 4 Offset Y1 comparison table

[0061] In the table, FF in TAB271R is an invalid data flag, indicating that the PWM pulse width count value is too far off, allowing for communication error handling. The 0C, 08, 04, and 00 bits correspond to the four PWM frequencies, respectively, thus determining the upper two bits of the nibble data represented by that PWM frequency.

[0062] Next, using the same method as above, we determine the lower two bits of the nibble data by counting the low-level pulse width of the PWM frequency. Using the TAB271R table, if the result is 0C, we look up TAB271R4. If the result is 08, we look up TAB271R3. If the result is 04, we look up TAB271R2. If the result is 00, we look up TAB271R1. By ORing these two results, we get the logical value of the PWM nibble.

[0063] The table lookup for the PWM low-level pulse width count value is as follows: Define the second received offset as Y2 and the allowable margin error as ±3. The four L values ​​corresponding to a 1.6kHz PWM in Table 2 are 81, 69, 56, and 44, respectively, corresponding to the four duty cycles of this PWM frequency. To reduce the number of table elements and to account for the allowable margin error, sort the table elements from smallest to largest and compress the lookup offsets by dividing by 2.

[0064] Take Y2=L / 2, perform table lookup offset compression, divide L=44, 56, 69, 81 by 2 and express them as hexadecimal numbers 16, 1C, 22, 28, that is, the center offset of Y2 is hexadecimal 16, 1C, 22, 28. The list is shown in Table 5: Table 5 Offset Y2 comparison table

[0065] The same method is used to define the four L values ​​corresponding to the 2.0kHz PWM in Table 2. Take Y3=L / 2, and divide L=35, 45, 55, and 65 by 2 respectively and express them as hexadecimal numbers 11, 16, 1B, and 20. That is, the center offset of Y3 is hexadecimal 11, 16, 1B, and 20. The list is shown in Table 6: Table 6 Offset Y3 comparison table

[0066] The same method is used to define the four L values ​​corresponding to the 2.4kHz PWM in Table 2. Take Y4=L / 2, and divide L=30, 38, 46, and 54 by 2 respectively and express them as hexadecimal numbers 0F, 13, 17, and 1B. That is, the center offset of Y4 is hexadecimal 0F, 13, 17, and 1B. The list is shown in Table 7: Table 7 Offset Y4 comparison table

[0067] The same method is used to define the four L values ​​corresponding to the 2.8kHz PWM in Table 2. Take Y5=L / 2, and divide L=25, 32, 39, and 46 by 2 respectively and express them as hexadecimal numbers 0C, 10, 13, and 17. That is, the center offset of Y5 is hexadecimal 0C, 10, 13, and 17. The list is shown in Table 8: Table 8 Offset Y5 comparison table

[0068] Through the above process, the upper two bits (bit3, bit2) of the half byte obtained by looking up the table TAB271R and the lower two bits (bit1, bit0) of the half byte obtained by looking up the table TAB271R1-4 are ORed to obtain the lower half byte data in a byte; the same method is used to process the second PWM signal received to obtain the upper half byte data in a byte, and finally, through shifting and ORing, the data of the byte is obtained.

[0069] The complete process is as follows: Define the PWM input terminal as Pi and execute in the following order: For master reception, the start bit waveform is received first, followed by the 1-byte data PWM waveform. For slave reception, the 1-byte data PWM waveform is received first, followed by the stop bit waveform. This section uses master reception as an example to illustrate how the start bit is removed for slave reception.

[0070] The following process is carried out in sequence: Pi receives a rising edge, starts the timer, receives a falling edge and saves the count value to St, the counter is cleared and counts the PWM low level, receives the rising edge of Pi and saves the count value to LL, the counter is cleared and counts the PWM high level, receives the falling edge of Pi and saves the count value to LH, the counter is cleared and counts the PWM low level, receives the rising edge of Pi and saves the count value to HL, the counter is cleared and counts the PWM high level, receives the falling edge of Pi and saves the count value to HH, and the counting of the four pulse widths of one byte and two PWM signals is completed.

[0071] The complete offset compression lookup table method PWM waveform decoding process is as follows Figure 9 As shown: Power PWM bus frame format As shown in Table 9, half-duplex communication is adopted, and a frame of data consists of three periods: idle field, downlink field, and uplink field.

[0072] During the idle domain, the power PWM bus is always maintained at a high level of 24-36V by the master station to power the slave bus products.

[0073] The downlink domain, which sends signal data from the master to the slave, consists of a group address command byte, a frame length byte, a data byte, and a check byte. The group address command byte is a single byte, with the upper 4 bits representing the group address and the lower 4 bits representing the command word. Command and data definitions are detailed in Table 10. Status values ​​are defined in Table A, data values ​​in Table B, and bus product type values ​​in Table C. The upper 4 bits of the group address correspond to the upper 4 bits of the slave bus product address. Each power PWM bus can carry up to 254 slave bus products.

[0074] The upstream domain is controlled by the master station, which generates 16 groups of 1ms high-level and 1.5ms low-level signals on the power PWM bus. The 1ms high-level signal ranges from 24V to 36V and is used to replenish power for the slave bus products. The 1.5ms low-level signal ranges from 8V to 15V and serves as the slave bus product's upstream response marker. During this period, the slave can upload data. Only when the bus product's high-order address is equal to the downstream group address can it respond upstream. Otherwise, it will wait for the next frame.

[0075] The 16 low-level response tags in the upstream domain of groups 1-16 are sequenced from first to last. Only when the lower 4-bit address of the slave bus product is the same as the sequence can it send upstream response data during the low-level period of the sequence.

[0076] Table 9 Power PWM bus frame format

[0077] Table 10 Command and data definition table

[0078] Table A Status value definition table

[0079] Table B Data definition table

[0080] Table C Bus Product Type Value Definition Table

[0081] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A fire power two-bus power supply and communication method based on PWM, characterized in that: The following steps are involved: The master station sends a PWM voltage signal to the slave station as a downlink signal, and the slave station sends a PWM current signal to the master station as an uplink signal. The signal logic is represented based on the combination of PWM frequency and PWM duty cycle. The time length of the timer is defined as the unit pulse width count value according to the minimum pulse width of PWM. A comparison table including hexadecimal numbers, binary numbers, PWM frequency, PWM duty cycle, PWM low-level pulse width count value, PWM high-level pulse width count value and PWM period value is prepared. A single-byte table lookup method is used to encode and send codes based on the comparison table, and a single-byte offset compression table lookup method is used to decode and receive codes based on the comparison table.

2. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 1, characterized in that: The circuit of the master station includes: power supply from the power supply to the 24V-36V pulse switch circuit through the current protection circuit, sending data through the UART input circuit and inputting the PWM waveform encoding circuit to convert the digital signal into a PWM signal, the PWM output control circuit controls the switching state of the 0-15V pulse switch circuit and the 24V-36V pulse switch circuit according to the output of the PWM waveform encoding circuit, the current in the circuit is detected by the current sampling circuit, the detected current is input into the PWM waveform decoding circuit to convert the PWM signal into a digital signal after the differential amplifier circuit improves the signal resolution and the PWM hysteresis shaping circuit adjusts the phase of the PWM signal, and the received data is output through the UART output circuit, and power supply and signal transmission are carried out through the PWM-based fire power bus II. Before connecting to the PWM-based fire power bus II, a capacitive absorption circuit and an electromagnetic compatibility protection circuit are provided to ensure stable operation of the circuit.

3. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 1, characterized in that: The circuit of the slave station includes: power supply and signal transmission through a PWM-based fire power bus 2, before being connected from the PWM-based fire power bus 2, an electromagnetic compatibility and polarity protection circuit is provided to protect the circuit, the level of the input signal is converted by a level conversion and PWM hysteresis circuit, the PWM signal is converted into a digital signal by a PWM waveform decoding circuit, the UART receiving circuit receives the signal for the bus product function module, and the UART sending circuit sends the bus product function module signal, the PWM waveform encoding circuit converts the digital signal into a PWM signal, a 40mA constant current source circuit provides a stable current source, and a stable low-voltage power supply is provided for the slave station circuit through a low-power linear regulator.

4. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 3, characterized in that: The bus product functional modules include a smoke detection module, a manual fire alarm button module, a temperature detection module and a fire bus input and output interface module.

5. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 1, characterized in that: The PWM frequencies representing the signal logic are 1.6KHz, 2.0KHz, 2.4KHz, and 2.8KHz, and the PWM duty ratios are 35%, 45%, 55%, and 65%.

6. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 5, characterized in that: The encoding and sending of the code by using the single-byte table lookup method includes: splitting a byte of data into a high half byte and a low half byte, using the low half byte and the high half byte as the lookup table offset of the comparison table to look up the table, obtaining the count value of the PWM low-level pulse width and the high-level pulse width, and setting the single-byte hexadecimal number as X; S1: Mask the high nibble of X: X and the hexadecimal number 0x0F are ANDed, and the result is Y, Y=X && 0F, where Y is the low nibble data of X; S2: Use Y as the offset to look up the table and obtain the low-level and high-level pulse width count values ​​LL and LH of the lower 4-bit PWM of the byte; Shift X right 4 times, move the high half byte to the low half byte position, repeat the above steps S1 and S2, obtain the low and high level pulse width count values ​​HL and HH of the high 4-bit PWM of the byte, and send the PWM waveform in the order of sending the low bit first, the high bit second, and the stop bit last.

7. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 6, characterized in that: The method of using a single-byte offset compression table lookup method to decode and receive codes includes: defining a received first offset, defining a redundant error of a PWM cycle value, wherein the values ​​of the PWM cycle values ​​in the comparison table correspond to four PWM cycles of a PWM waveform and four PWM frequencies, respectively, and are sorted from small to large in combination with a redundant error range, and the table lookup offset is compressed by a division by 4 method, and a table is listed and looked up to determine the upper two bits of the half-byte data represented by the frequency PWM; the lower two bits of the half-byte data are determined by counting the low-level pulse width of the frequency PWM in the same way; and the numbers obtained from the two table lookups are ORed to obtain the half-byte logic value of the PWM; The table lookup for the PWM low level pulse width count value is as follows: Define the second offset received, define the redundant error, look up the 4 low-level pulse width count values ​​corresponding to the PWM frequency in the table in turn, sort the 4 duty cycles of the PWM frequency from small to large in combination with the redundant error, compress the lookup offset by dividing by 2, list and look up the table, and repeat the table lookup process for the PWM low-level pulse width count value for all PWM frequencies; Through the above process, the upper two bits of the half-byte obtained by looking up the table and the lower two bits of the half-byte obtained by looking up the table are ORed to obtain the lower half-byte data in a byte; the same method is used to process the second PWM signal received to obtain the upper half-byte data in a byte, and finally the data of the byte is obtained through shifting and ORing.

8. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 7, characterized in that: The power PWM bus frame format adopts half-duplex communication mode. One frame of data consists of three time periods: idle domain, downlink domain and uplink domain.

9. The PWM-based fire-fighting power two-bus power supply and communication method according to claim 8, characterized in that: During the idle domain, the power PWM bus is maintained at a high level of 24-36V by the master station, which is used to power the slave bus products. The downlink domain is sent by the master station to the slave station. The signal data consists of a group address command byte, a frame length byte, a data byte, and a check byte. The group address command byte is one byte, the upper 4 bits represent the group address, and the lower 4 bits are the command word. The uplink domain is controlled by the master station to generate 16 groups of 1ms high level and 1.5ms low level on the power PWM bus, of which the 1ms high level is 24V-36V, which is used to supplement the power of the slave bus products. The 1.5ms low level is 8V-15V, which is used as the uplink response mark of the slave bus product. The slave can upload data during this period.

10. A PWM-based fire-fighting power two-bus power supply and communication device, characterized in that: The communication is carried out by using the PWM-based fire power two-bus power supply and communication method as described in any one of claims 1 to 9.

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