Indium-free heterojunction solar cell, preparation method thereof and photovoltaic module
By setting an indium-free transparent conductive oxide layer on the substrate surface of the HJT battery and performing ion heavy doping, the problem of poor conductivity of the TCO layer is solved, and efficient conversion and cost reduction of the HJT battery is achieved.
Patent Information
- Application Number
- CN202411581458.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-02-18
AI Technical Summary
The TCO layer of the existing low-indium/indium-free heterojunction batteries have poor conductivity, resulting in a significant reduction in the conversion efficiency of HJT batteries.
The first and second transparent conductive oxide layer and the second transparent conductive oxide layer are respectively provided on the first and second surfaces of the substrate, and ion doping is performed at the contact between these layers and the upper and lower gate lines. to improve conductivity.
Through the indium-free HJT battery, the cost is reduced, the battery's parasitic absorption and carrier absorption are reduced, the short-circuit current and filling factor are improved, thereby improving the battery's conversion efficiency.
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Figure CN119486367A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of solar cells, and specifically provides an indium-free heterojunction solar cell and a preparation method thereof, and a photovoltaic module. Background Art
[0002] In order to solve the problem of poor electrical conductivity of the doped microcrystalline / amorphous layer itself, silicon-based heterojunction solar cells add an additional layer of TCO film (Transparent Conductive Oxid, TCO) between the metal electrode and the doped microcrystalline layer to enhance the lateral conductivity of carriers. This is also a more significant feature of HJT cells (intrinsic thin-layer heterojunction cells, Heterojunction with Intrinsic Thin-layer, HJT) that distinguishes it from other cells.
[0003] TCO thin film is a type of thin film material that has both light transmittance and conductivity. In terms of physical properties, TCO thin film is also a semiconductor optoelectronic material that can increase the number of carriers through doping and other means to make the system present degenerate characteristics. Due to its excellent optoelectronic properties such as wide bandgap, low resistivity, high light transmittance in the visible light region and high light reflectivity in the infrared spectrum region, it has long been widely used in optoelectronic devices such as solar cells, flat panel displays, organic light-emitting diodes, low-emissivity glass, special functional window coatings, transparent thin film transistors and flexible electronic devices.
[0004] In HJT cells, the TCO film must allow more photons to enter the absorption layer, so the transmittance of visible light must be high; at the same time, it must have excellent conductivity to transfer electrons and holes to the gate electrode, and then the metal gate will lead out the carriers. TCO film can also be used as an anti-reflection layer to reduce the reflectivity of the front surface of the HJT cell. TCO films mainly include oxides of In, Sb, Zn and Cd and their composite multi-element oxide film materials. Commonly used TCO materials include In2O3 system, SnO2 system and ZnO system.
[0005] At present, indium-based TCO represented by ITO (Indium Tin Oxide) is still used in HJT batteries. Because it has good conductivity, light transmittance and weather resistance. However, since indium is a rare element and is expensive, this also leads to a high production cost of HJT batteries, limiting the large-scale mass production of HJT batteries. On the other hand, conventional HJT batteries have a low short-circuit current due to the parasitic absorption of the front and back ITO and the n-type amorphous / microcrystalline layer. The current low-indium / indium-free heterojunction battery can reduce the demand for indium and reduce costs, but due to the poor conductivity of its TCO layer, the conversion efficiency of the HJT battery is greatly reduced. Summary of the invention
[0006] The present invention aims to solve the above technical problem, that is, to solve the problem that the TCO layer of the existing low-indium / no-indium heterojunction battery has poor conductivity, resulting in a significant decrease in the conversion efficiency of the HJT battery.
[0007] In a first aspect, the present invention provides an indium-free heterojunction solar cell, comprising: a substrate having a first surface and a second surface relative to each other, wherein the first surface is closer to the light-facing surface of the cell, and the second surface is closer to the backlight surface of the cell; a first passivation layer, a first indium-free transparent conductive oxide layer and an anti-reflection layer are sequentially arranged on the first surface; a second passivation layer, a P-type microcrystalline silicon thin film layer and a second indium-free transparent conductive oxide layer are sequentially arranged on the second surface; an upper grid line is arranged on the first indium-free transparent conductive oxide layer, and a first ion heavy doping region is arranged at a junction of the first indium-free transparent conductive oxide layer and the upper grid line; a lower grid line is arranged on the second indium-free transparent conductive oxide layer, and a second ion heavy doping region is arranged at a junction of the second indium-free transparent conductive oxide layer and the lower grid line.
[0008] Furthermore, the first indium-free transparent conductive oxide layer is a zinc oxide layer, which is used as an electron transport layer.
[0009] Furthermore, the first heavily ion-doped region is an aluminum ion heavily doped region.
[0010] Furthermore, the thickness of the first heavily ion-doped region along a direction perpendicular to the substrate is 2-5 nm.
[0011] Furthermore, the second indium-free transparent conductive oxide layer is an amorphous tin oxide layer.
[0012] Furthermore, the second ion heavily doped region is a donor ion heavily doped region.
[0013] Furthermore, the thickness of the second heavily ion-doped region in a direction perpendicular to the substrate is 2-20 nm.
[0014] Furthermore, the donor ions are fluoride ions or antimony ions.
[0015] Furthermore, the doping ion concentrations of the first ion heavily doped region and the second ion heavily doped region are both 10 20 ~10 22 / cm 3 .
[0016] In a second aspect, the present invention also provides a method for preparing an indium-free heterojunction solar cell, comprising the following steps: preparing a substrate; sequentially preparing a first passivation layer and a first indium-free transparent conductive oxide layer on a first surface of the substrate; sequentially preparing a second passivation layer, a P-type microcrystalline silicon thin film layer and a second indium-free transparent conductive oxide layer on a second surface of the substrate; preparing a first ion heavily doped region on the first indium-free transparent conductive oxide layer; and preparing a second ion heavily doped region on the second indium-free transparent conductive oxide layer.
[0017] Furthermore, before preparing the first ion re-doping region and the second ion re-doping region, the following steps are also included: depositing a first mask layer and a second mask layer on the first indium-free transparent conductive oxide layer and the second indium-free transparent conductive oxide layer, respectively; graphically designing the substrate, forming a first set area on the first indium-free transparent conductive oxide layer, forming a second set area on the second indium-free transparent conductive oxide layer, and forming a preset pattern of upper gate lines and lower gate lines.
[0018] Furthermore, the step of preparing a first ion heavily doped region in the first indium-free transparent conductive oxide layer includes: heavily doping the first set area with aluminum ions to form a first ion heavily doped region; the thickness of the first ion heavily doped region in a direction perpendicular to the substrate is 2-5 nm.
[0019] Furthermore, the step of preparing a second ion heavily doped region in the second indium-free transparent conductive oxide layer includes: heavily doping the second set area with donor ions to form a second ion heavily doped region; the thickness of the second ion heavily doped region in a direction perpendicular to the substrate is 2-20 nm.
[0020] Furthermore, after preparing the first ion re-doping region and the second ion re-doping region, the following steps are also included: removing the second mask layer and retaining the first mask layer as an anti-reflection layer; screen-printing the upper gate line and the lower gate line on the surface of the anti-reflection layer and the surface of the second indium-free transparent conductive oxide layer according to the preset patterns of the upper gate line and the lower gate line, respectively, to form a first surface electrode and a second surface electrode.
[0021] Furthermore, the doping ion concentrations of the first ion heavily doped region and the second ion heavily doped region are both 10 20 ~10 22 / cm 3 .
[0022] In a third aspect, the present invention further provides a photovoltaic module, comprising a plurality of indium-free heterojunction solar cells connected in series and / or in parallel; the indium-free heterojunction solar cell comprises: a substrate having a first surface and a second surface opposite to each other, wherein the first surface is closer to the light-facing surface of the cell, and the second surface is closer to the backlight surface of the cell; a first passivation layer, a first indium-free transparent conductive oxide layer and an anti-reflection layer are sequentially arranged on the first surface; a second passivation layer, a P-type microcrystalline silicon thin film layer and a second indium-free transparent conductive oxide layer are sequentially arranged on the second surface; an upper grid line is arranged on the first indium-free transparent conductive oxide layer, and a first ion heavy doping region is arranged at a junction with the first indium-free transparent conductive oxide layer; a lower grid line is arranged on the second indium-free transparent conductive oxide layer, and a second ion heavy doping region is arranged at a junction with the second indium-free transparent conductive oxide layer; or , comprising a plurality of indium-free heterojunction solar cells prepared by a method for preparing indium-free heterojunction solar cells connected in series and / or in parallel; the indium-free heterojunction solar cell comprises: a substrate having a first surface and a second surface opposite to each other, wherein the first surface is closer to the light-facing surface of the cell, and the second surface is closer to the backlight surface of the cell; a first passivation layer, a first indium-free transparent conductive oxide layer and an anti-reflection layer are sequentially arranged on the first surface; a second passivation layer, a P-type microcrystalline silicon thin film layer and a second indium-free transparent conductive oxide layer are sequentially arranged on the second surface; an upper grid line is arranged on the first indium-free transparent conductive oxide layer, and a first ion heavy doping region is arranged at a junction of the first indium-free transparent conductive oxide layer and the upper grid line; a lower grid line is arranged on the second indium-free transparent conductive oxide layer, and a second ion heavy doping region is arranged at a junction of the second indium-free transparent conductive oxide layer and the lower grid line.
[0023] In the case of adopting the above technical solution, the present invention not only realizes the indium-free HJT battery and reduces the cost by arranging the first indium-free transparent conductive oxide layer and the second indium-free transparent conductive oxide layer on the first surface and the second surface of the substrate, but also reduces the parasitic absorption of the light-facing surface of the battery, reduces the carrier absorption of the battery, and improves the short-circuit current of the battery device. By performing ion heavy doping in the area where the upper gate line and the lower gate line intersect with the first indium-free transparent conductive oxide layer and the second indium-free transparent conductive oxide layer respectively, the contact resistivity of the indium-free heterojunction battery is reduced and the fill factor of the device is improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0025] In the attached figure:
[0026] Figure 1 is a schematic structural diagram of an indium-free heterojunction solar cell in an embodiment of the present application;
[0027] Figure 2 It is a flow chart of a method for preparing an indium-free heterojunction solar cell in an embodiment of the present application.
[0028] Reference numerals:
[0029] 1. Substrate; 2. First passivation layer; 3. First indium-free transparent conductive oxide layer; 4. Anti-reflection layer; 5. Second passivation layer; 6. Second indium-free transparent conductive oxide layer; 7. P-type microcrystalline silicon thin film layer; 8. Upper gate line; 9. Lower gate line; 10. First ion heavily doped region; 11. Second ion heavily doped region. DETAILED DESCRIPTION
[0030] The preferred embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood by those skilled in the art that these embodiments are only used to explain the technical principles of the present invention and are not intended to limit the scope of protection of the present invention. Those skilled in the art can make adjustments to them as needed to adapt to specific application scenarios.
[0031] First, it should be noted that in the description of the present invention, the terms "upper", "lower", "left", "right", "vertical", "horizontal", "longitudinal", "inner", "outer" and the like indicating directions or positional relationships are based on the directions or positional relationships shown in the drawings, which are only for the convenience of description, and do not indicate or imply that the device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.
[0032] In addition, it should be noted that in the description of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0033] like Figure 1 As shown, an embodiment of the present application provides an indium-free heterojunction solar cell, including: a substrate 1, a first passivation layer 2, a first indium-free transparent conductive oxide layer 3, an anti-reflection layer 4, a second passivation layer 5, a P-type microcrystalline silicon thin film layer 7 and a second indium-free transparent conductive oxide layer 6.
[0034] The substrate 1 has a first surface and a second surface relative to each other. The first surface is closer to the light-facing surface of the battery and is used to absorb the light irradiated on the first surface, and the second surface is closer to the backlight surface of the battery. Preferably, the substrate 1 is made of N-type single crystal silicon. The substrate 1 made of N-type single crystal silicon has the characteristic of being insensitive to metal impurities and many non-metallic defects, which makes the minority carriers of N-type single crystal silicon have a long and stable diffusion length. This characteristic is particularly important in the manufacture of high-efficiency solar cells, because the longer carrier diffusion length helps to improve the photoelectric conversion efficiency of solar cells. At the same time, it also has many advantages of single crystal silicon wafers, such as high purity, high mechanical strength, small thermal expansion coefficient, high thermal conductivity and good electrical conductivity. These characteristics together guarantee the superior performance and stability of N-type single crystal silicon in high-efficiency applications.
[0035] The thickness of the substrate 1 can be set to 130-200 μm, preferably 150 μm; and the resistivity thereof can be set to 1-2 Ω·cm.
[0036] A first passivation layer 2, a first indium-free transparent conductive oxide layer 3, and an anti-reflection layer 4 are sequentially arranged on the first surface (i.e., the front surface or the light-facing surface) of the substrate 1. An upper gate line 8 is arranged on the first indium-free transparent conductive oxide layer 3; a first ion heavily doped region 10 is arranged at the junction of the first indium-free transparent conductive oxide layer 3 and the upper gate line 8.
[0037] A second passivation layer 5, a P-type microcrystalline silicon thin film layer 7 and a second indium-free transparent conductive oxide layer 6 are sequentially arranged on the second surface (i.e., the back surface) of the substrate 1. A lower gate line 9 is arranged on the second indium-free transparent conductive oxide layer 6; a second ion heavily doped region 11 is arranged at the junction of the second indium-free transparent conductive oxide layer 6 and the lower gate line 9.
[0038] Disposing the first passivation layer 2 and the second passivation layer 5 on the first surface and the second surface of the substrate 1 respectively can reduce the surface defects of the first surface and the second surface of the substrate 1; it can also inhibit the recombination of photogenerated carriers and promote the selective contact of carriers, thereby achieving passivation contact.
[0039] Preferably, the first passivation layer 2 and the second passivation layer 5 are both intrinsic hydrogenated amorphous silicon layers. Since more hydrogen is added to hydrogenated amorphous silicon during the preparation process, the silicon atoms are arranged more closely, and the crystal structure of the formed hydrogenated amorphous silicon is more compact, thereby improving the optical and electrical properties of amorphous silicon. For example, by optimizing the post-deposition annealing temperature and the appropriate hydrogen introduction process, the light absorption and electrical properties of the amorphous silicon film can be reduced by more than one order of magnitude. Compared with amorphous silicon, hydrogenated amorphous silicon has higher conductivity and lower bandgap.
[0040] Preferably, the first indium-free transparent conductive oxide layer 3 is a zinc oxide layer (ZnOx), and the lower end of the upper gate line 8 is connected to the zinc oxide layer. When light is irradiated to the first indium-free transparent conductive oxide layer 3 disposed on the first surface of the substrate 1, the zinc oxide layer is used as an electron selective contact layer material. Because it has a suitable energy band position, it can effectively block holes and realize the selective transmission of electrons; at the same time, because it has a wider optical band gap and no parasitic absorption, it can improve the short-circuit current of the HJT battery.
[0041] Furthermore, the zinc oxide layer as the first indium-free transparent conductive oxide layer 3 and the lower end of the upper gate line 8 are heavily doped with aluminum ions to form a first heavily doped ion region 10 composed of aluminum zinc oxide (Al-doped Zinc Oxide, AZO). By performing localized aluminum ion doping on the local area of the zinc oxide layer where the lower end of the upper gate line 8 is located, a layer of heavily doped AZO is formed in the local area of the zinc oxide layer located at the lower end of the upper gate line 8 as a contact conductive layer, thereby increasing the contact performance between the first indium-free transparent conductive oxide layer 3 and the metal in the upper gate line 8, improving the conductivity, and thus improving the conversion efficiency of the overall device.
[0042] The width of the first ion heavily doped region 10 is the same as the width of the upper gate line 8. The thickness of the first ion heavily doped region 10 in the direction perpendicular to the substrate 1 is preferably 2-5 nm. The doping ion concentration (aluminum ions in this embodiment) in the first ion heavily doped region 10 is 10 20 ~10 22 / cm 3 .
[0043] As shown in Table 1 below, different aluminum ion doping depths (i.e., doping thicknesses) are combined with different aluminum ion doping concentrations, and then the relevant performance of each combination is measured, for example, Voc (open circuit voltage), FF (fill factor), Isc (short circuit current), and the product of the three is Eta (photoelectric conversion efficiency). Experiment number <![CDATA[Al 3+ Doping depth / nm]]> <![CDATA[Al 3+ Doping concentration / cm 3 ]]> Eta / % <![CDATA[V OC / V]]> FF / % <![CDATA[l SC / A]]> Reference group 1 1 1.23xE19 1 1 1 1 Comparison group 1 1 1.15xE22 1.0019 1 1.0019 1 Comparison group 2 3 1.19XE22 1.0034 1 1.0034 1 Comparison group 3 6 1.16xE22 0.999 0.9953 1.0038 1 Table 1
[0044] The combination of appropriate ion doping depth and ion doping concentration maximizes the Eta value. The ion doping depth must be appropriate. Too shallow a depth will result in insufficient ion doping concentration; too deep a depth will damage the passivation layer, resulting in a decrease in Voc (for example, comparison group 3). At the same time, the ion doping concentration must also be appropriate. A high doping concentration allows the heavily doped area to be in contact with the metal electrode, thereby improving FF. However, the ion doping concentration will be saturated when it reaches a certain level, and the doping depth will be too deep, affecting the passivation effect and resulting in a decrease in Voc. As can be seen from Table 1, when the aluminum ion doping thickness is 3nm and the doping concentration is 1.19*10 22 / cm 3 When , the Eta value of the first ion heavily doped region 10 is the largest (1.0034).
[0045] Preferably, the second indium-free transparent conductive oxide layer 6 is an amorphous tin oxide layer (a-SnO x ), and its thickness can be 70-80nm. The upper end of the lower gate line 9 is connected to the amorphous tin oxide layer. Amorphous tin oxide is used as the TCO layer on the second surface of the substrate 1, and an indium-free TCO structure is adopted, thereby reducing the production cost of the HJT battery.
[0046] In order to improve the contact performance between the second indium-free transparent conductive oxide layer 6 and the metal in the lower gate line 9, the amorphous tin oxide layer as the second indium-free transparent conductive oxide layer 6 is heavily doped with donor ions at the junction with the upper end of the lower gate line 9 to form a second ion heavily doped area 11. Only the local area of the amorphous tin oxide layer at the junction with the upper end of the lower gate line 9 can be heavily doped with localized donor ions by masking and ion implantation. The doping ions can be donor ions such as fluorine ions and antimony ions, thereby forming a layer of FTO (fluorine-doped tin oxide, Fluorine-doped TinOxide) and ATO in the local area as described above, thereby reducing the contact resistivity between the amorphous tin oxide layer and the metal in the lower gate line 9 and improving the filling factor of the HJT battery.
[0047] The width of the second ion heavily doped region 11 is the same as the width of the lower gate line 9. The thickness of the second ion heavily doped region 11 in the direction perpendicular to the substrate 1 is preferably 2-20 nm. The doping ion concentration (in this embodiment, donor ions such as fluorine ions and antimony ions) in the second ion heavily doped region 11 is 10 20~10 22 / cm 3 .
[0048] As shown in Table 2 below, different fluorine ion doping depths (i.e., doping thicknesses) are combined with different fluorine ion doping concentrations, and then the relevant performance of each combination is measured, for example, Voc (open circuit voltage), FF (fill factor), Isc (short circuit current), and the product of the three is Eta (photoelectric conversion efficiency). Experiment number <![CDATA[F - Doping depth / nm]]> <![CDATA[F - Doping concentration / cm 3 ]]> Eta / % <![CDATA[V OC / V]]> FF / % <![CDATA[l SC / A]]> Reference group 1 2 5.23xE19 1 1 1 1 Comparison group 1 2 5.11xE22 1.0008 1 1.0008 1 Comparison group 2 15 4.98XE22 1.0051 1 1.0051 1 Comparison group 3 30 5.04xE22 0.99996 0.9943 1.0057 1 Table 2
[0049] The combination of appropriate ion doping depth and ion doping concentration maximizes the Eta value. The ion doping depth must be appropriate. Too shallow a depth will result in insufficient ion doping concentration; too deep a depth will damage the passivation layer, resulting in a decrease in Voc (for example, comparison group 3). At the same time, the ion doping concentration must also be appropriate. A high doping concentration allows the heavily doped area to be in contact with the metal electrode, thereby increasing FF. However, the ion doping concentration will be saturated when it reaches a certain level, and the doping depth will be too deep, affecting the passivation effect and resulting in a decrease in Voc. As can be seen from Table 2, when the fluorine ion doping thickness is 15nm and the doping concentration is 4.98*10 22 / cm 3 When , the Eta value of the second ion heavily doped region 11 is the largest (1.0051).
[0050] Preferably, boron ions are doped in the P-type microcrystalline silicon thin film layer 7 disposed between the second indium-free transparent conductive oxide layer 6 and the second passivation layer 5. The boron-doped P-type microcrystalline silicon thin film layer 7 cooperates with the amorphous tin oxide layer as the second indium-free transparent conductive oxide layer 6 to achieve separation and selective transmission of carrier holes in the HJT battery.
[0051] By also heavily doping the junction between the amorphous tin oxide layer as the second indium-free transparent conductive oxide layer 6 and the upper end of the lower gate line 9, the carrier concentration in the region where the amorphous tin oxide layer contacts the upper end of the lower gate line 9 is increased. The non-gate line region where the amorphous tin oxide layer does not contact the upper end of the lower gate line 9 maintains a relatively low carrier concentration. Thus, while reducing the contact resistivity between the amorphous tin oxide layer and the lower gate line 9, no additional parasitic absorption is added, and ultimately the short-circuit current and fill factor of the HJT battery are improved.
[0052] In the indium-free heterojunction solar cell in the embodiment of the present application, a first indium-free transparent conductive oxide layer 3 and a second indium-free transparent conductive oxide layer 6 are respectively arranged on the first surface and the second surface of the substrate 1, so as to realize the indium-free HJT battery and reduce the cost of the HJT battery. The zinc oxide layer is used as the first indium-free transparent conductive oxide layer 3, and the parasitic absorption of the first surface of the HJT battery is reduced. The amorphous tin oxide layer is used as the second indium-free transparent conductive oxide layer 6 to reduce the carrier absorption in the HJT battery and improve the short-circuit current of the HJT battery device. By heavily doping the corresponding ions in the area where the first indium-free transparent conductive oxide layer 3 is connected to the upper grid line 8 and the area where the second indium-free transparent conductive oxide layer 6 is connected to the lower grid line 9, the contact resistivity of the indium-free heterojunction battery is reduced and the fill factor of the device is improved.
[0053] like Figure 2 As shown, the embodiment of the present application also provides a method for preparing an indium-free heterojunction solar cell, the method comprising the following steps:
[0054] Step S100: preparing a substrate 1.
[0055] The substrate 1 is textured and cleaned in sequence. By textured and cleaned the substrate 1, a pyramid-like textured light-trapping structure can be formed on the first surface and the second surface of the substrate 1. Preferably, the substrate 1 is made of N-type single crystal silicon.
[0056] Step S200 : sequentially preparing a first passivation layer 2 and a first indium-free transparent conductive oxide layer 3 on a first surface of a substrate 1 .
[0057] Specifically, an intrinsic hydrogenated amorphous silicon layer is deposited on the first surface of the substrate 1 to form the first passivation layer 2, thereby reducing surface defects on the first surface of the substrate 1 and achieving passivation contact. Then, zinc oxide is deposited on the first passivation layer 2 to form the first indium-free transparent conductive oxide layer 3.
[0058] Preferably, an atomic layer deposition (ALD) method is used to deposit a zinc oxide layer on the first passivation layer 2 as the first indium-free transparent conductive oxide layer 3, which is used as an electron selective contact layer and has a thickness of 10-15 nm.
[0059] Step S300 : sequentially preparing a second passivation layer 5 , a P-type microcrystalline silicon thin film layer 7 and a second indium-free transparent conductive oxide layer 6 on the second surface of the substrate 1 .
[0060] Specifically, an intrinsic hydrogenated amorphous silicon layer is deposited on the second surface of the substrate 1 to form a second passivation layer 5, thereby reducing the surface defects of the second surface of the substrate 1 and achieving passivation contact. Then, a P-type microcrystalline silicon thin film layer 7 is deposited on the second passivation layer 5. Preferably, a plasma enhanced chemical vapor deposition (PECVD) method is used to deposit a P-type microcrystalline silicon thin film layer 7 with boron doped atoms on the second passivation layer 5 to achieve carrier separation and selective transmission. Afterwards, amorphous tin oxide is deposited on the P-type microcrystalline silicon thin film layer 7 to form a second indium-free transparent conductive oxide layer 6. Preferably, a PVD method is used to deposit amorphous tin oxide with a thickness of 70-80nm on the P-type microcrystalline silicon thin film layer 7 as the second indium-free transparent conductive oxide layer 6.
[0061] Step S200 and step S300 may be performed simultaneously.
[0062] Step S400 : preparing a first ion heavily doped region 10 on the first indium-free transparent conductive oxide layer 3 .
[0063] Step S500 : preparing a second ion heavily doped region 11 in the second indium-free transparent conductive oxide layer 6 .
[0064] Before preparing the first ion re-doping region 10 and the second ion re-doping region 11, that is, before step S400 and step S500, the following steps are also included:
[0065] Step S310: depositing a first mask layer and a second mask layer on the first indium-free transparent conductive oxide layer 3 and the second indium-free transparent conductive oxide layer 6 respectively.
[0066] The thickness of the first mask layer can be set to 120-150 nm, and the thickness of the second mask layer can be set to 20-30 nm. The thickness of the first mask layer is greater than the thickness of the second mask layer.
[0067] Silicon nitride or silicon oxide may be used for deposition. Preferably, a plasma enhanced chemical vapor deposition method is used to deposit the first mask layer and the second mask layer on the first indium-free transparent conductive oxide layer 3 and the second indium-free transparent conductive oxide layer 6, respectively.
[0068] Step S320: Graphically design the substrate 1, form a first set area on the first indium-free transparent conductive oxide layer 3, form a second set area on the second indium-free transparent conductive oxide layer 6, and form a preset pattern of upper gate lines 8 and lower gate lines 9.
[0069] The substrate 1 may be patterned and grooved by using a mask and a laser to form a first set area and a second set area, and to form a preset pattern of the upper gate line 8 and the lower gate line 9 .
[0070] Further, step S400 includes: heavily doping the first set area with aluminum ions to form a first ion heavily doped area 10. An ion implanter can be used to heavily dope the first set area with aluminum ions to form the first ion heavily doped area 10. The width of the first ion heavily doped area 10 is the same as the width of the upper gate line 8. The thickness of the first ion heavily doped area 10 in a direction perpendicular to the substrate 1 is preferably 2-5 nm. The doping ion concentration (aluminum ions in this embodiment) in the first ion heavily doped area 10 is 10 20 ~10 22 / cm 3 .
[0071] For the influence of the thickness of the first ion heavily doped region 10 and the depth of aluminum ion doping on the battery performance, please refer to the above Table 1 and its description, which will not be repeated here.
[0072] Further, step S500 includes: heavily doping the second set area with donor ions to form a second heavily doped area 11. An ion implanter can be used to heavily dope the second set area with donor ions, and the doped ions include donor-type impurity ions such as fluorine ions and antimony ions. The width of the second heavily doped area 11 is the same as the width of the lower gate line 9. The thickness of the second heavily doped area 11 in a direction perpendicular to the substrate 1 is preferably 2-20 nm. The doping ion concentration (donor ions such as fluorine ions and antimony ions in this embodiment) in the second heavily doped area 11 is 10 20 ~10 22 / cm 3 .
[0073] For the influence of the thickness of the second ion heavily doped region 11 and the donor ion doping depth on the battery performance, please refer to the above Table 2 and its description, which will not be repeated here.
[0074] Step S400 and step S500 may be performed simultaneously.
[0075] After the first ion heavily doped region 10 and the second ion heavily doped region 11 are prepared, that is, after step 400 and step 500, the following steps are further included:
[0076] Step S600 : removing the second mask layer and retaining the first mask layer as the anti-reflection layer 4 .
[0077] The second mask layer can be removed by using hydrofluoric acid (HF), and the first mask layer can be retained as the anti-reflection layer 4 .
[0078] Step 700: screen-printing upper gate lines 8 and lower gate lines 9 according to preset patterns of upper gate lines 8 and lower gate lines 9 on the surface of the anti-reflection layer 4 and the surface of the second indium-free transparent conductive oxide layer 6 to form a first surface electrode and a second surface electrode.
[0079] After completing step S600, the entire structure is subjected to laser annealing treatment to repair ion implantation damage and activate impurity ions. Afterwards, the surface of the anti-reflection layer 4 and the surface of the amorphous tin oxide layer as the second indium-free transparent conductive oxide layer 6 are screen-printed with upper grid lines 8 and lower grid lines 9 to form a first surface electrode and a second surface electrode. At this point, the preparation process of the indium-free heterojunction solar cell is completed.
[0080] An embodiment of the present application also provides a photovoltaic module, which includes a plurality of indium-free heterojunction solar cells as described above connected in series and / or in parallel; or, includes a plurality of indium-free heterojunction solar cells prepared by the preparation method of the indium-free heterojunction solar cells as described above connected in series and / or in parallel.
[0081] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.
Claims
1. An indium-free heterojunction solar cell, characterized in that: include: A substrate having a first surface and a second surface opposite to each other, wherein the first surface is closer to a light-facing surface of the battery, and the second surface is closer to a backlight surface of the battery; A first passivation layer, a first indium-free transparent conductive oxide layer and an anti-reflection layer are sequentially arranged on the first surface; A second passivation layer, a P-type microcrystalline silicon thin film layer, and a second indium-free transparent conductive oxide layer are sequentially disposed on the second surface; An upper gate line is arranged on the first indium-free transparent conductive oxide layer, wherein the first indium-free transparent conductive oxide layer is provided with a first ion heavily doped region at a junction with the upper gate line; A lower gate line is arranged on the second indium-free transparent conductive oxide layer, and a second ion heavily doped region is arranged at a position where the second indium-free transparent conductive oxide layer is connected to the lower gate line.
2. The solar cell according to claim 1, characterized in that The first indium-free transparent conductive oxide layer is a zinc oxide layer, which is used as an electron transport layer.
3. The solar cell according to claim 2, characterized in that: The first heavily ion-doped region is an aluminum ion heavily doped region.
4. The solar cell according to claim 3, characterized in that: The thickness of the first heavily ion-doped region along a direction perpendicular to the substrate is 2-5 nm.
5. The solar cell according to claim 1, characterized in that: The second indium-free transparent conductive oxide layer is an amorphous tin oxide layer.
6. The solar cell according to claim 5, characterized in that The second heavily ion doped region is a donor ion heavily doped region.
7. The solar cell according to claim 6, characterized in that: The thickness of the second heavily ion-doped region in a direction perpendicular to the substrate is 2-20 nm.
8. The solar cell according to claim 6, characterized in that: The donor ions are fluoride ions or antimony ions.
9. The solar cell according to any one of claims 1 to 8, characterized in that The doping ion concentrations of the first ion heavily doped region and the second ion heavily doped region are both 10 20 ~10 22 / cm 3 .
10. A method for preparing an indium-free heterojunction solar cell, characterized in that: The following steps are involved: preparing a substrate; Sequentially preparing a first passivation layer and a first indium-free transparent conductive oxide layer on the first surface of the substrate; On the second surface of the substrate, a second passivation layer, a P-type microcrystalline silicon thin film layer and a second indium-free transparent conductive oxide layer are sequentially prepared; Prepare a first ion heavily doped region on the first indium-free transparent conductive oxide layer; A second ion heavily doped region is prepared in the second indium-free transparent conductive oxide layer.
11. The preparation method according to claim 10, characterized in that: Before preparing the first ion heavily doped region and the second ion heavily doped region, the method further includes the following steps: Depositing a first mask layer and a second mask layer on the first indium-free transparent conductive oxide layer and the second indium-free transparent conductive oxide layer, respectively; The substrate is graphically designed, a first set area is formed on the first indium-free transparent conductive oxide layer, a second set area is formed on the second indium-free transparent conductive oxide layer, and a preset pattern of upper gate lines and lower gate lines is formed.
12. The preparation method according to claim 11, characterized in that: The step of preparing the first ion heavily doped region on the first indium-free transparent conductive oxide layer comprises: Heavy-doping the first set region with aluminum ions to form a first heavily-doped region; The thickness of the first heavily ion-doped region along a direction perpendicular to the substrate is 2-5 nm.
13. The preparation method according to claim 11, characterized in that: The step of preparing a second ion heavily doped region on the second indium-free transparent conductive oxide layer comprises: Performing donor ion heavy doping on the second set area to form a second ion heavy doping area; The thickness of the second heavily ion-doped region in a direction perpendicular to the substrate is 2-20 nm.
14. The preparation method according to claim 11, characterized in that: After the first ion re-doping region and the second ion re-doping region are prepared, the method further includes the following steps: removing the second mask layer and retaining the first mask layer as an anti-reflection layer; The upper gate lines and the lower gate lines are screen-printed on the surface of the anti-reflection layer and the surface of the second indium-free transparent conductive oxide layer according to the preset patterns of the upper gate lines and the lower gate lines to form a first surface electrode and a second surface electrode.
15. The preparation method according to any one of claims 10 to 14, characterized in that: The doping ion concentrations of the first ion heavily doped region and the second ion heavily doped region are both 10 20 ~10 22 / cm 3 .
16. A photovoltaic module, characterized in that: It includes a plurality of indium-free heterojunction solar cells connected in series and / or in parallel; The indium-free heterojunction solar cell comprises: A substrate having a first surface and a second surface opposite to each other, wherein the first surface is closer to a light-facing surface of the battery, and the second surface is closer to a backlight surface of the battery; A first passivation layer, a first indium-free transparent conductive oxide layer and an anti-reflection layer are sequentially arranged on the first surface; A second passivation layer, a P-type microcrystalline silicon thin film layer, and a second indium-free transparent conductive oxide layer are sequentially disposed on the second surface; An upper gate line is arranged on the first indium-free transparent conductive oxide layer, wherein the first indium-free transparent conductive oxide layer is provided with a first ion heavily doped region at a junction with the upper gate line; A lower gate line is arranged on the second indium-free transparent conductive oxide layer, wherein the second indium-free transparent conductive oxide layer is provided with a second ion heavily doped region at a junction with the lower gate line; or, A plurality of indium-free heterojunction solar cells prepared by the method for preparing an indium-free heterojunction solar cell are connected in series and / or in parallel; The method for preparing the indium-free heterojunction solar cell comprises the following steps: preparing a substrate; Sequentially preparing a first passivation layer and a first indium-free transparent conductive oxide layer on the first surface of the substrate; On the second surface of the substrate, a second passivation layer, a P-type microcrystalline silicon thin film layer and a second indium-free transparent conductive oxide layer are sequentially prepared; Prepare a first ion heavily doped region on the first indium-free transparent conductive oxide layer; A second ion heavily doped region is prepared in the second indium-free transparent conductive oxide layer.