A method for improving Micro LED table topography using multi-layer mask and segmented etching

Abstract

A method for improving the morphology of Micro LED table tops by using a multi-layer mask and segmented etching belongs to the field of semiconductor processing technology. First, a SiO2 mask layer is deposited on the surface of an epitaxial layer, and then a photoresist through-hole structure is obtained by coating, exposing, and developing; then a chromium metal film layer is deposited and the photoresist is lifted off to prepare a patterned chromium metal film layer; then the patterned chromium metal film layer is used as a mask to etch and prepare a patterned SiO2 mask layer; etching gas with a high Cl2 / BCl3 flow ratio is used to etch the patterned chromium metal film layer + the upper area of ​​the epitaxial layer, and etching gas with a low Cl2 / BCl3 flow ratio is used to etch the patterned SiO2 mask layer + the lower area of ​​the epitaxial layer; the present invention can control the time point when the chromium metal film layer is completely consumed by adjusting the time of the two-stage etching process and the flow parameters of the etching gas, thereby achieving the effect of controlling the upper and lower diameters of the table top and controlling the etching angle.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor processing technology, and specifically relates to a method for improving the morphology of Micro LED tables by using multi-layer masks and segmented etching. Background Art

[0002] The most popular Micro LED mesa etching solution is to use inductively coupled plasma (ICP) to etch the epitaxial layer (Guo, W., Tai, J., Liu, J. et al. Process Optimization of Passive Matrix GaN-Based Micro-LED Arrays for Display Applications. J. Electron. Mater. 48, 5195–5201 (2019)). Specifically, common etching gases are a certain proportion of boron trichloride (BCl3), chlorine (Cl2), and argon (Ar), and common etched materials are gallium nitride (GaN) / indium gallium nitride (InGaN) or aluminum indium phosphide (AlInP). In order to form a patterned mesa, silicon oxide (SiO2) or chromium (Cr) + silicon oxide (SiO2) is used as a mask to block the ICP process from etching the undesired area. The specific process is as follows Figure 1 As shown, the epitaxial layer is Al x Ga y In 1-x-y P or In x Ga 1-x N; First, a SiO2 mask layer is prepared on the surface of the epitaxial layer, and then a patterned photoresist mask is prepared on the SiO2 mask layer through a photolithography process. Then, the SiO2 mask layer not covered by the photoresist is etched away using an ICP process. After stripping, a patterned SiO2 mask layer is formed. The patterned SiO2 mask layer is then used to protect the Micro LED mesa. Through the second step of the ICP process, a mesa of a specified shape is obtained, which is the basic unit of light emission in the Micro LED.

[0003] The principle of ICP process is: RF current flows through the coil to generate an electromagnetic field in the chamber to excite the gas to produce plasma, the bias source controls the ion bombardment energy, and bombards the sample surface to form physical / chemical etching. The main etching process includes:

[0004] i. Formation of reactive particles;

[0005] ii. The reaction particles reach the wafer surface and are adsorbed;

[0006] iii. Wafer surface chemical adsorption reaction, forming chemical bonds and reaction products;

[0007] iv. Desorb the chemical reaction products and remove them from the wafer surface and withdraw them from the chamber;

[0008] Due to the complex physical and chemical reactions in the etching process, the interaction between the fields (electric field, flow field, force field, etc.) between different neutral particles and charged particles makes the etching process difficult to describe (Nasser, "Fundamentals of Gaseous Ionization and Plasma Electronics", John Wiley & Sons, 1971, Chapman, "Glow Discharge Processes", John Wiley & Sons). In general, the adjustment parameters of the ICP process are as follows:

[0009] i. Gas and flow: Etching gas directly determines the selectivity and material etching ability;

[0010] ii. Air pressure: Air pressure determines the mean free path and average energy of particles;

[0011] iii. Power: When the power increases, the plasma density increases;

[0012] iv. Bias voltage: Bias voltage determines the bombardment energy of the ions.

[0013] Specifically in the Micro LED mesa etching process, the main performance indicators are: etching rate, etching surface flatness, etching angle, etc., but these indicators are often difficult to achieve at the same time, which will lead to the degradation and abnormality of the Micro LED mesa performance, such as Figure 2 As shown in the figure, the scanning electron microscope photo of the device sidewall morphology shows that the etching rate is too slow and the sidewall angle does not meet the design expectations; Figure 3 As shown in the figure, the scanning electron microscope photograph of the device sidewall morphology with rough etched surface and lateral underetching; the rough surface may lead to poor electrical contact and deterioration of subsequent film quality; the non-adjustable etched shape will make it difficult to adjust the mesa diameter and pixel spacing, introducing additional complexity in the subsequent process. Summary of the invention

[0014] The purpose of the present invention is to provide a method for improving the morphology of Micro LED mesas by using a multi-layer mask and segmented etching, so as to solve the problem that core indicators such as etching rate, etching surface flatness, and etching angle are difficult to achieve simultaneously in the current Micro LED mesas process, thereby realizing high-quality Micro LED mesas etching with high flatness, specified etching angle and etching rate.

[0015] The present invention improves the original process flow in the prior art, uses a high Cl2 / BCl3 flow ratio etching gas to etch the patterned chromium metal film layer + the upper area of ​​the epitaxial layer, and then uses a low Cl2 / BCl3 flow ratio etching gas to etch the patterned SiO2 mask layer + the lower area of ​​the epitaxial layer, thereby forming a Micro LED table on the substrate.

[0016] The method of improving the morphology of Micro LED table tops by using multi-layer masks and segmented etching according to the present invention has a process flow as follows: Figure 4 As shown, the steps are as follows:

[0017] (a) Deposit a SiO2 mask layer with a thickness of 100~500 nm on the surface of the epitaxial layer:

[0018] The deposition method is plasma enhanced chemical vapor deposition, the reaction gas is N2O + SiH4, the power of the plasma source is 80~200 W, and the deposition temperature is 200~300℃;

[0019] (b) Graphical process (spinning, exposure, development):

[0020] Spin-coat a photoresist on the SiO2 mask layer obtained in step (a), the photoresist being LOR resist + positive resist; perform UV mask exposure after curing, and then use a developer to remove the exposed photoresist; the mask is a periodically arranged circular through-hole structure, that is, the Micro LED mesa structure to be prepared, the area inside the through-hole is a light-transmitting part, and the photoresist inside the through-hole is exposed to UV light; the aperture of the circular through-hole is 2 to 5 microns, and the center spacing of the through-hole is 4 to 8 microns;

[0021] (c) After depositing the chromium metal film layer, the photoresist is lifted off to prepare a patterned chromium metal film layer:

[0022] A chromium metal film layer with a thickness of 10 to 300 nm is deposited on the surface of the device obtained in step (b), and then the obtained device is immersed in an organic solvent, and the surface of the device is purged so that the chromium metal film layer with photoresist on the lower surface is separated from the device surface together with the photoresist, and a patterned chromium metal film layer is obtained on the Micro LED table to be prepared; the deposition method is electron beam evaporation, the deposition rate is 1 to 3 nm / s, and the electron beam current is 5 to 10 mA;

[0023] (d) Using the patterned chromium metal film layer as a mask, etching is performed to prepare a patterned SiO2 mask layer:

[0024] Under the mask of the patterned chromium metal film layer obtained in step (c), the SiO2 mask layer is etched using an ICP process, the etching gas is CF4+Ar or C4F8+Ar, the CF4 or C4F8 flow rate is 1-100 sccm, the Ar flow rate is 0-100 sccm, and the etching time is 100-1000 s; the SiO2 mask layer not covered by the patterned chromium metal film layer is etched through to the surface of the epitaxial layer, and a patterned SiO2 mask layer is obtained under the patterned chromium metal film layer, and the patterned chromium metal film layer and the patterned SiO2 mask layer together constitute a Micro LED mesa mask layer; the etching rate of the SiO2 mask layer is 1-3 nm / s;

[0025] (e) Etching the patterned chromium metal film layer + the upper area of ​​the epitaxial layer using an etching gas with a high Cl2 / BCl3 flow ratio:

[0026] The patterned chromium metal film layer obtained in step (d) and the upper region of the epitaxial layer covered by the non-patterned chromium metal film layer are etched by an ICP process, wherein the etching gas is Cl2+BCl3+Ar, the Cl2 flow rate is 1-100 sccm, the BCl3 flow rate is 1-100 sccm, the Cl2 flow rate is 1.5-3 times the BCl3 flow rate; the Ar flow rate is 0-100 sccm; the etching time is 1-500 s, and the patterned chromium metal film layer and the upper region of the epitaxial layer originally covered by the non-patterned chromium metal film layer are etched through, that is, a portion of the upper surface of the epitaxial layer originally covered by the non-patterned chromium metal film layer is etched away; the etching rate of the patterned chromium metal film layer is 8-15 Å / s, and the etching rate of the upper region of the epitaxial layer is 30-40 Å / s;

[0027] (f) Etching of the patterned SiO2 mask layer + lower epitaxial layer using an etching gas with a low Cl2 / BCl3 flow ratio

[0028] The patterned SiO2 mask layer and the lower region of the epitaxial layer obtained in step (e) are etched using an ICP process. The etching gas is Cl2+BCl3+Ar. The Cl2 flow rate is 1-50 sccm, the BCl3 flow rate is 1-100 sccm, and the BCl3 flow rate is 1.5-3 times the Cl2 flow rate. The Ar flow rate is 0-100 sccm. The etching time is 1-500 s. The patterned SiO2 mask layer and the lower region of the epitaxial layer originally covered by the unpatterned SiO2 mask layer are etched through to expose the substrate material outside the Micro LED table top, thereby improving the morphology of the Micro LED table top by using a multi-layer mask and segmented etching. The etching rate of the patterned SiO2 mask layer is 20-40 Å / s, and the etching rate of the lower region of the epitaxial layer is 20-40 Å / s.

[0029] The principle of the present invention is as follows:

[0030] The surface of the commonly used Cr mask is relatively rough (due to the certain conformality of the etching process, the roughness will be brought into the lower SiO2 and Mesa surfaces), but the advantage is that the selectivity is relatively high, which can protect the lower epitaxial layer at a suitable thickness. The etching gas with a high Cl2 / BCl3 flow ratio has a more obvious effect on Cr etching, and can quickly penetrate the Cr mask layer, so that the subsequent etching process has a flattening effect on the surface. But at the same time, the etching rate of the etching gas with a high Cl2 / BCl3 flow ratio is too fast, and it will react with the substrate material to form a flocculent uneven surface, and react with the epitaxial layer laterally rather than vertically to form an inward side etching. Therefore, in the later stage etching, the etching gas with a low Cl2 / BCl3 flow ratio is used, the etching selectivity is lower, the etching rate is slower, it will not react with the bottom layer, and the side etching effect is very small. Furthermore, by adjusting the time and specific flow parameters of the two-stage etching process, the time point when the Cr mask is consumed can be controlled, thereby achieving the effect of controlling the upper and lower diameters of the console and controlling the etching angle.

[0031] Effects and benefits of the present invention:

[0032] The present invention uses a patterned chromium metal film layer to prepare a patterned SiO2 mask layer, and uses a high Cl2 / BCl3 flow ratio etching gas to etch the chromium metal film layer + epitaxial layer upper region, and uses a low Cl2 / BCl3 flow ratio etching gas to etch the SiO2 mask layer + epitaxial layer lower region. Using the method of the present invention, a high-quality Micro LED table with high flatness, a specified etching angle and an etching rate can be obtained, thereby improving the optoelectronic performance of the Micro LED chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1:A typical Micro LED mesa process flow chart described in the background technology;

[0034] Figure 2 : Scanning electron microscope photo of the device sidewall morphology where the sidewall angle does not meet the design expectations;

[0035] Figure 3 : Scanning electron microscope photo of the device sidewall morphology with rough etched surface and lateral undercut;

[0036] Figure 4 : Process flow chart of the present invention;

[0037] Figure 5 : A scanning electron microscope photograph of the side wall morphology of the device prepared using the process of the present invention. DETAILED DESCRIPTION

[0038] Example 1: (a) Depositing a 300 nm thick SiO2 mask layer on the surface of the epitaxial layer:

[0039] A 300 nm thick SiO2 mask layer is deposited on the surface of the epitaxial layer (typical material is AlGaInP material, thickness ~1 micron) using PECVD (plasma enhanced chemical vapor deposition); the reaction gas is N2O (flow rate 1200 sccm) + SiH4 (flow rate 300 sccm), the power of the plasma source is 100 W, and the deposition temperature is 250 °C; micro-nano structures such as electrodes can be prepared in advance on the surface of the epitaxial layer;

[0040] (b) Graphical process (spinning, exposure, development):

[0041] Spin-coat a photoresist (500-3000 nm, preferably 1500 nm) on the SiO2 mask layer obtained in step (a), using a double-layer photoresist process of LOR photoresist + positive photoresist (LOR photoresist is optional, and 5214 positive photoresist is preferred); perform UV mask exposure after curing, and then use a developer to remove the exposed photoresist (the developer is a TMAH aqueous solution), and the development time is 2 minutes; the mask is a periodically arranged circular through-hole structure, that is, the Micro LED mesa structure to be prepared, the area inside the through-hole is a light-transmitting part, the photoresist in the through-hole is exposed to UV light, the through-hole aperture is 2 microns, and the through-hole center interval is 4 microns;

[0042] (c) After depositing the chromium metal film layer, the photoresist is lifted off to prepare a patterned chromium metal film layer:

[0043] Depositing a chromium metal film layer with a thickness of 100 nm on the surface of the device obtained in step (b) using an Ebeam (electron beam evaporation) process, with a deposition rate of 1 nm / s and an electron beam current of 8 mA; soaking the obtained device in an organic solvent (acetone or isopropanol), and sweeping the surface of the device so that the chromium metal film layer with photoresist on the lower surface is separated from the device surface together with the photoresist, thereby obtaining a patterned chromium metal film layer;

[0044] (d) Using the patterned chromium metal film layer as a mask, etching is performed to prepare a patterned SiO2 mask layer:

[0045] Under the mask of the patterned chromium metal film layer in step (c), the SiO2 mask layer is etched using an ICP process, the etching gas is CF4+Ar, the CF4 flow rate is 25 sccm, the Ar flow rate is 0 sccm, the etching time is 400 s, the etching rate of the SiO2 mask layer is 1.2 nm / s, and the SiO2 mask layer not covered by the patterned chromium metal film layer is etched through to obtain a patterned SiO2 mask layer under the patterned chromium metal film layer. The patterned chromium metal film layer and the patterned SiO2 mask layer together constitute the mask layer of the Micro LED table;

[0046] (e) Etching the patterned chromium metal film layer + the upper area of ​​the epitaxial layer using an etching gas with a high Cl2 / BCl3 flow ratio:

[0047] The patterned chromium metal film layer and the upper region of the epitaxial layer covered by the non-patterned chromium metal film layer were etched using the ICP process. The etching gas was Cl2+BCl3+Ar, the Cl2 flow rate was 40 sccm, the BCl3 flow rate was 20 sccm, and the Ar flow rate was 0 sccm. The etching time was 200 s, the etching rate for the patterned chromium metal film layer was 10 Å / s, and the etching rate for the upper region of the epitaxial layer was 40 Å / s, and the patterned chromium metal film layer and the upper region of the epitaxial layer covered by the non-patterned chromium metal film layer were etched through;

[0048] (f) Etching of the lower area of ​​the patterned SiO2 mask layer + epitaxial layer using an etching gas with a low Cl2 / BCl3 flow ratio:

[0049] The ICP process is used to etch the lower area of ​​the epitaxial layer covered by the patterned SiO2 mask layer and the unpatterned SiO2 mask layer. The etching gas is Cl2+BCl3+Ar, the Cl2 flow rate is 10 sccm, the BCl3 flow rate is 20 sccm, the Ar flow rate is 10 sccm, the etching time is 200 s, the etching rate of the patterned SiO2 mask layer is 30 Å / s, and the etching rate of the lower area of ​​the epitaxial layer is 30 Å / s. The patterned SiO2 mask layer is etched through to expose the epitaxial layer originally covered by the patterned SiO2 mask layer, and the lower area of ​​the epitaxial layer originally covered by the unpatterned SiO2 mask layer is etched through to expose the substrate material outside the Micro LED table, and the Micro LED table is prepared on the substrate, thereby realizing the change of the Micro LED table morphology. Figure 5 As shown, it can be seen that the side wall is relatively smooth, there is no side erosion at the bottom of the side wall, the side wall inclination angle is ~70° and can be adjusted according to process requirements, and the substrate surface is smooth, which meets the requirements of subsequent process technology.

Claims

1. A method for improving the morphology of Micro LED mesas using multi-layer masks and segmented etching, characterized in that: The steps are as follows: (a) Depositing a SiO2 mask layer with a thickness of 100~500 nm on the surface of the epitaxial layer; (b) Graphics process: Spin-coat a photoresist on the SiO2 mask layer obtained in step (a), the photoresist being LOR resist + positive resist; perform UV mask exposure after curing, and then use a developer to remove the exposed photoresist; the mask is a periodically arranged circular through-hole structure, that is, the Micro LED mesa structure to be prepared, the area inside the through-hole is a light-transmitting part, and the photoresist inside the through-hole is exposed to UV light; (c) After depositing the chromium metal film layer, the photoresist is lifted off to prepare a patterned chromium metal film layer: Depositing a chromium metal film layer with a thickness of 10 to 300 nm on the surface of the device obtained in step (b); then soaking the obtained device in an organic solvent, and sweeping the surface of the device so that the chromium metal film layer with photoresist on the lower surface is separated from the device surface together with the photoresist, and obtaining a patterned chromium metal film layer on the Micro LED table to be prepared; (d) Using the patterned chromium metal film layer as a mask, etching is performed to prepare a patterned SiO2 mask layer: Under the mask of the patterned chromium metal film layer obtained in step (c), the SiO2 mask layer is etched using an ICP process; the SiO2 mask layer not covered by the patterned chromium metal film layer is etched through to the surface of the epitaxial layer, and a patterned SiO2 mask layer is obtained under the patterned chromium metal film layer, and the patterned chromium metal film layer and the patterned SiO2 mask layer together constitute a Micro LED mesa mask layer; (e) Etching the patterned chromium metal film layer + the upper area of ​​the epitaxial layer using an etching gas with a high Cl2 / BCl3 flow ratio: The patterned chromium metal film layer obtained in step (d) and the upper region of the epitaxial layer covered by the non-patterned chromium metal film layer are etched by an ICP process, wherein the Cl2 flow rate is 1.5 to 3 times the BCl3 flow rate, and the patterned chromium metal film layer and the upper region of the epitaxial layer originally covered by the non-patterned chromium metal film layer are etched through, i.e., a portion of the upper surface of the epitaxial layer originally covered by the non-patterned chromium metal film layer is etched away; (f) Etching of the lower area of ​​the patterned SiO2 mask layer + epitaxial layer using an etching gas with a low Cl2 / BCl3 flow ratio: The patterned SiO2 mask layer and the lower region of the epitaxial layer obtained in step (e) are etched using an ICP process, with a BCl3 flow rate of 1.5 to 3 times that of the Cl2 flow rate. The patterned SiO2 mask layer and the lower region of the epitaxial layer originally covered by the unpatterned SiO2 mask layer are etched through to expose the substrate material outside the Micro LED table, thereby improving the morphology of the Micro LED table by using a multi-layer mask and segmented etching.

2. The method for improving the morphology of Micro LED mesas by using multi-layer mask and segmented etching according to claim 1, characterized in that: In step (a), the deposition method is plasma enhanced chemical vapor deposition, the reaction gas is N2O+SiH4, the power of the plasma source is 80~200 W, and the deposition temperature is 200~300℃.

3. The method for improving Micro LED mesa morphology by using multi-layer mask and segmented etching according to claim 1, characterized in that: In step (b), the diameter of the circular through hole is 2-5 microns, and the center interval of the through hole is 4-8 microns.

4. The method for improving Micro LED mesa morphology by using multi-layer mask and segmented etching according to claim 1, characterized in that: In step (c), the deposition method is electron beam evaporation, the deposition rate is 1-3 nm / s, and the electron beam current is 5-10 mA.

5. The method for improving Micro LED mesa morphology by using multi-layer mask and segmented etching according to claim 1, characterized in that: In step (d), the etching gas used to etch the SiO2 mask layer using the ICP process is CF4+Ar or C4F8+Ar, the CF4 or C4F8 flow rate is 1~100 sccm, the Ar flow rate is 0~100 sccm, and the etching time is 100~1000 s; the etching rate of the SiO2 mask layer is 1~3 nm / s.

6. The method for improving Micro LED mesa morphology by using multi-layer mask and segmented etching according to claim 1, characterized in that: In step (e), the etching gas is Cl2+BCl3+Ar, the Cl2 flow rate is 1~100 sccm, the BCl3 flow rate is 1~100 sccm; the Ar flow rate is 0~100 sccm; the etching time is 1~500 s; the etching rate for the patterned chromium metal film layer is 5~15Å / s, and the etching rate for the upper area of ​​the epitaxial layer is 20~60Å / s.

7. The method for improving Micro LED mesa morphology by using multi-layer mask and segmented etching according to claim 1, characterized in that: In step (f), the etching gas is Cl2+BCl3+Ar, the Cl2 flow rate is 1~50 sccm, the BCl3 flow rate is 1~100 sccm; the Ar flow rate is 0~100 sccm, and the etching time is 1~500 s; the etching rate of the patterned SiO2 mask layer is 20~40Å / s, and the etching rate of the lower area of ​​the epitaxial layer is 20~40Å / s.

Images