Method for supporting automatic power-on of electronic equipment and electronic equipment

Abstract

The invention discloses a method for supporting automatic power-on of electronic equipment and the electronic equipment. The electronic equipment comprises an EEPROM (Electrically Erasable Programmable Read-Only Memory), a CPU (Central Processing Unit) or a chipset matched with the CPU and a microcontroller for controlling the power-on action, and the CPU or the chipset matched with the CPU and the microcontroller for controlling the startup action are connected with the EEPROM. The method comprises the steps that a CPU writes a first mark or a second mark into a first address of an EEPROM; wherein the first address is a power-on startup function configuration address, the first address is written into the first mark to indicate that the power-on startup function is started, and the first address is written into the second mark to indicate that the power-on startup function is not started; after the electronic equipment is inserted into a power supply, the standby voltage supplies power to the microcontroller for controlling the startup action, the microcontroller completes initialization, inquires a first address and judges whether the first address is written into a first mark or not so as to confirm whether the power-on startup action is executed or not, and if yes, the microcontroller executes the power-on startup action; otherwise, the shutdown state is kept, and other startup actions are waited.

Description

Technical Field

[0001] The present application belongs to the field of control technology, and specifically relates to a method for supporting automatic power-on of an electronic device and an electronic device. Background Art

[0002] Some existing electronic devices, such as motherboards, have a function of automatically starting up after being plugged in to a power source. However, some electronic devices do not have this function, and do not automatically start up after being plugged in to a power source, but remain in a shutdown state and need to wait for other startup actions, such as pressing a power button to start up.

[0003] For electronic devices that do not have the function of automatically starting up when powered on, they are not convenient to use. Therefore, it is necessary to provide a new method and device to solve the above problems. Summary of the invention

[0004] The purpose of the present invention is to provide a method and electronic device for supporting automatic power-on of an electronic device, which can realize the automatic power-on function of the electronic device.

[0005] The solutions provided in this application are as follows:

[0006] In a first aspect, the present application provides a method for supporting automatic power-on of an electronic device, wherein the electronic device includes an EEPROM, a CPU or a chipset supporting the CPU, and a microcontroller for controlling a power-on action; the CPU or the chipset supporting the CPU and the microcontroller for controlling a power-on action are both connected to the EEPROM, thereby accessing the EEPROM;

[0007] The method comprises:

[0008] The CPU writes a first flag or a second flag to a first address of the EEPROM; wherein the first address is a configuration address for the power-on function, and writing the first flag to the first address indicates turning on the power-on function, and writing the second flag to the first address indicates not turning on the power-on function; wherein the second flag is different from the first flag;

[0009] When the electronic device is plugged into a power source, the standby voltage supplies power to the microcontroller that controls the power-on action. The microcontroller completes initialization and queries the first address to determine whether the first flag is written to the first address to confirm whether to execute the power-on action. If so, the microcontroller executes the power-on action; otherwise, it remains in the shutdown state and waits for other power-on actions.

[0010] In a possible implementation, the CPU or a chipset supporting the CPU and a microcontroller for controlling the power-on action are all connected to the EEPROM, including: the CPU or a chipset supporting the CPU and a microcontroller for controlling the power-on action are all connected to the EEPROM via an IIC bus.

[0011] In one possible implementation, it is set that from the stage between microcontroller power-on initialization and execution of the boot action, only the microcontroller has the authority to access the EEPROM through the IIC bus, and the CPU cannot access the EEPROM at this time; it is set that from the stage between CPU power-on startup and the CPU sending a shutdown or restart instruction to the microcontroller unit, only the CPU has the authority to access the EEPROM through the IIC bus, and the microcontroller has no access right.

[0012] In a possible implementation, when the electronic device completes booting and enters the BIOS setup interface, the CPU writes a first flag or a second flag to a first address of the EEPROM through the IIC bus to select whether to enable the power-on function.

[0013] In a possible implementation, the microcontroller determines whether the first address is written into the first flag to confirm whether to perform a power-on action. If yes, the microcontroller performs the power-on action; otherwise, the microcontroller remains in a shutdown state and waits for other power-on actions, including:

[0014] The microcontroller determines whether the first address is written with the first flag to confirm whether to execute the power-on and power-on action. If yes, the microcontroller sets the power-on and power-on action flag bit to the third flag, and directly executes the power-on and power-on action. After executing the power-on and power-on action, the microcontroller sets the power-on and power-on action flag bit to the fourth flag; otherwise, the power-on and power-on action flag bit is set to the fourth flag, and the shutdown state is maintained, waiting for other power-on actions; wherein, the power-on and power-on action flag bit is set to the third flag, indicating that the power-on and power-on are effective; the power-on and power-on action flag bit is set to the fourth flag, indicating that the power-on and power-on are not effective; the fourth flag is different from the third flag;

[0015] If the microcontroller responds to an interrupt request of other startup actions with higher priority than the power-on startup during the power-on startup action and executes the startup action, the microcontroller sets the power-on startup action flag to the fourth flag when executing the shutdown action.

[0016] In a second aspect, the present application provides an electronic device, comprising: an EEPROM, a CPU or a chipset supporting the CPU, and a microcontroller; the CPU or the chipset supporting the CPU and the microcontroller for controlling the power-on action are both connected to the EEPROM;

[0017] The EEPROM is used to provide a first address as a configuration address for the power-on function, wherein a first flag is written into the first address to indicate that the power-on function is enabled, and a second flag is written into the first address to indicate that the power-on function is not enabled; wherein the second flag is different from the first flag;

[0018] The CPU is used to write the first mark or the second mark to the first address of the EEPROM;

[0019] The microcontroller is used to control the power-on action, and also includes: when the electronic device is plugged into a power source, a standby voltage supplies power to the microcontroller that controls the power-on action, the microcontroller completes initialization, and queries the first address to determine whether the first address is written with the first flag to confirm whether to execute the power-on action. If so, the microcontroller executes the power-on action; otherwise, it remains in the shutdown state and waits for other power-on actions.

[0020] In a possible implementation, the CPU or a chipset matching the CPU and a microcontroller for controlling the power-on action are all connected to the EEPROM via an IIC bus.

[0021] In one possible implementation, it is set that from the stage between microcontroller power-on initialization and execution of the boot action, only the microcontroller has the authority to access the EEPROM through the IIC bus, and the CPU cannot access the EEPROM at this time; it is set that from the stage between CPU power-on startup and the CPU sending a shutdown or restart instruction to the microcontroller unit, only the CPU has the authority to access the EEPROM through the IIC bus, and the microcontroller has no access right.

[0022] In a possible implementation, when the electronic device completes booting and enters the BIOS setup interface, the CPU writes a first flag or a second flag to a first address of the EEPROM through the IIC bus to select whether to enable the power-on function.

[0023] In a possible implementation, the microcontroller determines whether the first address is written into the first flag to confirm whether to perform a power-on action. If yes, the microcontroller performs the power-on action; otherwise, the microcontroller remains in a shutdown state and waits for other power-on actions, including:

[0024] The microcontroller determines whether the first address is written with the first flag to confirm whether to execute the power-on and power-on action. If yes, the microcontroller sets the power-on and power-on action flag bit to the third flag, and directly executes the power-on and power-on action. After executing the power-on and power-on action, the microcontroller sets the power-on and power-on action flag bit to the fourth flag; otherwise, the power-on and power-on action flag bit is set to the fourth flag, and the shutdown state is maintained, waiting for other power-on actions; wherein, the power-on and power-on action flag bit is set to the third flag, indicating that the power-on and power-on are effective; the power-on and power-on action flag bit is set to the fourth flag, indicating that the power-on and power-on are not effective; the fourth flag is different from the third flag;

[0025] If the microcontroller responds to an interrupt request of other startup actions with higher priority than the power-on startup during the power-on startup action and executes the startup action, the microcontroller sets the power-on startup action flag to the fourth flag when executing the shutdown action.

[0026] Beneficial effects:

[0027] The present application introduces an EEPROM storage chip whose data is not lost after power failure, configures and reads the EEPROM to realize the automatic power-on function of the electronic device, thereby improving the convenience of using the electronic device. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a schematic diagram of the circuit connection relationship in the implementation of this application. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

[0030] It should be noted that the terms such as "first", "second" and the like in the specification and claims of the present application and the above-mentioned drawings are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is a specific relationship or order between these entities or operations. It should be understood that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first" and "second" and the like do not limit them to be necessarily different. It should be understood that the data used in this way can be interchanged under appropriate circumstances. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, so that the process, method, article or device including a series of elements includes not only those elements clearly listed, but also other elements that are not clearly listed, or may also include elements inherent to such process, method, product or device. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0031] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in this application can be understood according to specific circumstances.

[0032] In addition, the terms "installed", "set", "provided with", "connected", "connected", and "socketed" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0033] Embodiment 1

[0034] The present embodiment provides a method for supporting automatic startup of an electronic device when powered on, wherein the electronic device includes an EEPROM, a CPU or a chipset supporting the CPU, and a microcontroller for controlling the startup action; the CPU or the chipset supporting the CPU and the microcontroller for controlling the startup action are all connected to the EEPROM, thereby accessing the EEPROM.

[0035] Among them, EEPROM is a storage chip whose data will not be lost after power failure, similar to 24C02.

[0036] The above-mentioned CPU and chipset can be two separate chips or integrated into one chip. Among them, regarding the case where the CPU and chipset are two separate chips, for example, the Intel Core I5 ​​CPU desktop platform, in addition to the CPU itself, is also equipped with a chipset. The Core I5 ​​CPU basically performs logical operations, while the matching chipset is mainly responsible for the peripheral bus, control and communication of the device. Such a Core I5 ​​CPU must be equipped with a corresponding chipset to run; in this case, the CPU is connected to the EEPROM through the IIC bus through its matching chipset. Another case is that the function of the chipset is also integrated into the CPU, such as the CPU of many mobile platforms. In this case, the CPU is directly connected to the EEPROM through the IIC bus.

[0037] The microcontroller for controlling the power-on action may be an embedded controller EC or a microcontroller unit MCU chip.

[0038] In some embodiments, the CPU or the chipset supporting the CPU and the microcontroller for controlling the power-on action are connected to the EEPROM via an IIC bus, such as Figure 1 shown.

[0039] The IIC bus, or integrated circuit bus, is a multi-host serial communication bus.

[0040] The method comprises:

[0041] The CPU writes a first flag or a second flag to a first address of the EEPROM; wherein the first address is a configuration address for the power-on function, and writing the first flag to the first address indicates turning on the power-on function, and writing the second flag to the first address indicates not turning on the power-on function; wherein the second flag is different from the first flag;

[0042] The first address is a specific address on the EEPROM.

[0043] Exemplarily, the EEPROM

[00] unit can be set as the power-on function configuration address, and setting the EEPROM

[00] unit to write 0x55 indicates that the power-on function is enabled, and setting the EEPROM

[00] unit to write a value other than 0x55 indicates that the power-on function is not enabled.

[0044] The microcontroller sets a power-on action flag;

[0045] When the electronic device is plugged into a power source, the standby voltage supplies power to the microcontroller that controls the power-on action. The microcontroller completes initialization and queries the first address to determine whether the first flag is written to the first address to confirm whether to execute the power-on action. If so, the microcontroller executes the power-on action; otherwise, it remains in the shutdown state and waits for other power-on actions.

[0046] For example, the EEPROM

[00] unit can be set as the power-on function configuration address, and the EEPROM

[00] unit is set to write 0x55 to indicate that the power-on function is turned on, and the EEPROM

[00] unit is written to non-0x55 to indicate that the power-on function is not turned on, and the power-on state is maintained, waiting for other power-on actions. The third flag can be set to 1 and the fourth flag can be set to 0. After completing the initialization, the microcontroller will actively read the value of the EEPROM

[00] unit through the IIC bus. If the read value is 0x55, the third flag is set to 1, and the power-on action is executed immediately without waiting for other power-on actions; if the read value is non-0x55, the third flag is set to 0, and the power-on state is maintained, waiting for other power-on actions.

[0047] Further, the microcontroller determines whether the first address is written into the first flag to confirm whether to execute the power-on action. If yes, the microcontroller executes the power-on action; otherwise, the microcontroller remains in the shutdown state and waits for other power-on actions, including:

[0048] The microcontroller determines whether the first address is written with the first flag to confirm whether to execute the power-on and power-on action. If yes, the microcontroller sets the power-on and power-on action flag to the third flag, and directly executes the power-on and power-on action. After executing the power-on and power-on action, the microcontroller sets the power-on and power-on action flag to the fourth flag; otherwise, the power-on and power-on action flag is set to the fourth flag, and the shutdown state is maintained, waiting for other power-on actions (such as pressing the power button, the timed power-on action and the network wake-up power-on action); wherein, the power-on and power-on action flag is set to the third flag, indicating that the power-on and power-on are effective; the power-on and power-on action flag is set to the fourth flag, indicating that the power-on and power-on are not effective; the fourth flag is different from the third flag;

[0049] If the microcontroller responds to an interrupt request of other startup actions with higher priority than the power-on startup during the power-on startup action and executes the startup action, the microcontroller sets the power-on startup action flag to the fourth flag when executing the shutdown action.

[0050] It should be understood that when the first flag is written to the first address, the microcontroller will set the power-on action flag to the third flag and execute the power-on action. During the execution of the power-on action, if the microcontroller receives other power-on action interrupt requests with higher priority (such as timed power-on action and network wake-up power-on action request interrupt requests), when any of these higher priority interrupt-type power-on actions takes effect, the power-on action will be executed through the path of the corresponding interrupt source. After executing the power-on action in this way, the power-on action flag remains as the third flag. Then after shutting down, the microcontroller may read the first address and write the first flag again, and the power-on action flag is the third flag, thereby starting to execute the power-on action. In other words, this will cause the microcontroller to treat the last unprocessed power-on action flag as a new power-on action after shutting down, thereby turning the shutdown into an actual restart. To prevent this abnormal problem from occurring, the microcontroller sets the power-on action flag to the fourth flag when executing the shutdown action. By processing the power-on action flag in this way, the abnormal problem caused by setting the power-on action flag to the third flag can be eliminated.

[0051] In some embodiments, it is set that from the stage between the microcontroller power-on initialization and the execution of the boot action, only the microcontroller has the authority to access the EEPROM through the IIC bus, and the CPU cannot access the EEPROM at this time.

[0052] In addition, from the stage when the CPU is turned on to the stage when the CPU sends a shutdown or restart instruction to the microcontroller unit, the CPU has access rights to the EEPROM, while the microcontroller does not have access rights.

[0053] From the stage after the microcontroller unit receives the shutdown or restart command sent by the CPU to the stage when the microcontroller unit executes the startup action, the microcontroller can have the permission to access the EEPROM through the IIC bus, but the CPU cannot access the EEPROM.

[0054] This prevents contention on the IIC bus and avoids the problem of the CPU and microprocessor accessing the EEPROM at the same time.

[0055] In some embodiments, when the electronic device completes booting and enters the BIOS setup interface, it can be selected whether to enable the power-on function. Specifically, the CPU configures the power-on function configuration address of the EEPROM through the IIC bus, that is, the CPU writes the first flag or the second flag to the first address of the EEPROM through the IIC bus to select whether to enable the power-on function.

[0056] For example, when the option is turned on, the CPU writes 0x55 to the EEPROM

[00] unit through the IIC bus; when the option is not turned on, the CPU writes non-0x55 to the EEPROM

[00] unit through the IIC bus, for example, it can be set to 0xAA; save the configuration and restart, and it will take effect the next time you start the computer.

[0057] Embodiment 2

[0058] This embodiment provides an electronic device, including: an EEPROM, a CPU or a chipset supporting the CPU, and a microcontroller; the CPU or the chipset supporting the CPU and the microcontroller for controlling the power-on action are connected to the EEPROM, so as to access the EEPROM;

[0059] The EEPROM is used to provide a first address as a configuration address for the power-on function, wherein a first flag is written into the first address to indicate that the power-on function is enabled, and a second flag is written into the first address to indicate that the power-on function is not enabled; wherein the second flag is different from the first flag;

[0060] The CPU is used to write the first mark or the second mark to the first address of the EEPROM;

[0061] The microcontroller is used to control the power-on action, including: when the electronic device is plugged into a power source, the standby voltage supplies power to the microcontroller that controls the power-on action, the microcontroller completes initialization, and queries the first address to determine whether the first address is written with a first flag to confirm whether to execute the power-on action. If so, the microcontroller executes the power-on action; otherwise, it remains in a shutdown state and waits for other power-on actions.

[0062] The specific implementation of the second embodiment can refer to the specific implementation of the first embodiment, which will not be described in detail here.

[0063] The above description of the embodiments of the present application is only a partial embodiment of the present application, which is used to enable professionals in the field to implement or use the content of the present application, and is not used to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A method for supporting automatic power-on of an electronic device, characterized in that: The electronic device includes an EEPROM, a CPU or a chipset supporting the CPU, and a microcontroller for controlling a power-on action; the CPU or the chipset supporting the CPU, and the microcontroller for controlling a power-on action are both connected to the EEPROM, thereby accessing the EEPROM; The method comprises: The CPU writes a first flag or a second flag to a first address of the EEPROM; wherein the first address is a configuration address for the power-on function, and writing the first flag to the first address indicates turning on the power-on function, and writing the second flag to the first address indicates not turning on the power-on function; wherein the second flag is different from the first flag; When the electronic device is plugged into a power source, the standby voltage supplies power to the microcontroller that controls the power-on action. The microcontroller completes initialization and queries the first address to determine whether the first flag is written to the first address to confirm whether to execute the power-on action. If so, the microcontroller executes the power-on action; otherwise, it remains in the shutdown state and waits for other power-on actions.

2. The method according to claim 1, characterized in that: The CPU or the chipset matched with the CPU and the microcontroller for controlling the power-on action are all connected with the EEPROM, including: the CPU or the chipset matched with the CPU and the microcontroller for controlling the power-on action are all connected with the EEPROM through the IIC bus.

3. The method according to claim 2, characterized in that Set the stage from microcontroller power-on initialization to power-on execution, only the microcontroller has the authority to access EEPROM through the IIC bus, and the CPU cannot access EEPROM at this time; set the stage from CPU power-on startup to the CPU sending a shutdown or restart command to the microcontroller unit, only the CPU has the authority to access EEPROM through the IIC bus, and the microcontroller has no access rights.

4. The method according to claim 2, characterized in that When the electronic device completes booting and enters the BIOS setting interface, the CPU writes the first flag or the second flag to the first address of the EEPROM through the IIC bus to select whether to enable the power-on function.

5. The method according to any one of claims 1 to 4, characterized in that: The microcontroller determines whether the first address is written into the first flag to confirm whether to perform the power-on action. If yes, the microcontroller performs the power-on action; otherwise, the microcontroller remains in the shutdown state and waits for other power-on actions, including: The microcontroller determines whether the first address is written with the first flag to confirm whether to execute the power-on and power-on action. If yes, the microcontroller sets the power-on and power-on action flag bit to the third flag, and directly executes the power-on and power-on action. After executing the power-on and power-on action, the microcontroller sets the power-on and power-on action flag bit to the fourth flag; otherwise, the power-on and power-on action flag bit is set to the fourth flag, and the shutdown state is maintained, waiting for other power-on actions; wherein, the power-on and power-on action flag bit is set to the third flag, indicating that the power-on and power-on are effective; the power-on and power-on action flag bit is set to the fourth flag, indicating that the power-on and power-on are not effective; the fourth flag is different from the third flag; If the microcontroller responds to an interrupt request of other startup actions with higher priority than the power-on startup during the power-on startup action and executes the startup action, the microcontroller sets the power-on startup action flag to the fourth flag when executing the shutdown action.

6. An electronic device comprising: It includes an EEPROM, a CPU or a chipset supporting the CPU, and a microcontroller; the CPU or the chipset supporting the CPU and the microcontroller for controlling the power-on action are all connected to the EEPROM; The EEPROM is used to provide a first address as a configuration address for the power-on function, wherein a first flag is written into the first address to indicate that the power-on function is enabled, and a second flag is written into the first address to indicate that the power-on function is not enabled; wherein the second flag is different from the first flag; The CPU is used to write the first mark or the second mark to the first address of the EEPROM; The microcontroller is used to control the power-on action, and also includes: when the electronic device is plugged into a power source, a standby voltage supplies power to the microcontroller that controls the power-on action, the microcontroller completes initialization, and queries the first address to determine whether the first address is written with the first flag to confirm whether to execute the power-on action. If so, the microcontroller executes the power-on action; otherwise, it remains in the shutdown state and waits for other power-on actions.

7. The electronic device according to claim 6, characterized in that: The CPU or the chipset matched with the CPU and the microcontroller for controlling the startup action are all connected to the EEPROM via the IIC bus.

8. The electronic device according to claim 7, characterized in that: Set the stage from microcontroller power-on initialization to power-on execution, only the microcontroller has the authority to access EEPROM through the IIC bus, and the CPU cannot access EEPROM at this time; set the stage from CPU power-on startup to the CPU sending a shutdown or restart command to the microcontroller unit, only the CPU has the authority to access EEPROM through the IIC bus, and the microcontroller has no access rights.

9. The electronic device according to claim 7, characterized in that: When the electronic device completes booting and enters the BIOS setting interface, the CPU writes the first flag or the second flag to the first address of the EEPROM through the IIC bus to select whether to enable the power-on function.

10. The electronic device according to any one of claims 6 to 9, characterized in that: The microcontroller determines whether the first address is written into the first flag to confirm whether to perform the power-on action. If yes, the microcontroller performs the power-on action; otherwise, the microcontroller remains in the shutdown state and waits for other power-on actions, including: The microcontroller determines whether the first address is written with the first flag to confirm whether to execute the power-on and power-on action. If yes, the microcontroller sets the power-on and power-on action flag bit to the third flag, and directly executes the power-on and power-on action. After executing the power-on and power-on action, the microcontroller sets the power-on and power-on action flag bit to the fourth flag; otherwise, the power-on and power-on action flag bit is set to the fourth flag, and the shutdown state is maintained, waiting for other power-on actions; wherein, the power-on and power-on action flag bit is set to the third flag, indicating that the power-on and power-on are effective; the power-on and power-on action flag bit is set to the fourth flag, indicating that the power-on and power-on are not effective; the fourth flag is different from the third flag; If the microcontroller responds to an interrupt request of other startup actions with higher priority than the power-on startup during the power-on startup action and executes the startup action, the microcontroller sets the power-on startup action flag to the fourth flag when executing the shutdown action.

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