Constant axis flipping and modular addition method and circuit based on dirty quantum bits

By adopting the constant axis flip method based on dirty qubits in quantum computers, the problem of the number of clean bits restricted in the axis flip operation is solved, and the effect of improving encryption/decryption efficiency is achieved.

CN119494415AActive Publication Date: 2025-02-21ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD
View PDF 7 Cites 0 Cited by

Patent Information

Application Number
CN202311038037.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-17
Publication Date
2025-02-21
Estimated Expiration
2043-08-17

AI Technical Summary

Technical Problem

When performing axis flip operations, quantum computers are limited by the number of clean bits, making it difficult to fully utilize the computing efficiency of quantum computers and improve the efficiency of encryption/decryption.

Method used

The constant axis flip method based on dirty qubits is adopted to realize the axis flip operation through the interoperability of the first clean bit and the first dirty bit, and the calculation process is optimized through the modulo K-1 inverse operation.

Benefits of technology

Effectively utilize dirty qubit resources, improve the efficiency of encryption/decryption operations, and give full play to the computing advantages of quantum computers.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119494415A_ABST
    Figure CN119494415A_ABST
Patent Text Reader

Abstract

The embodiment of the invention provides a constant axis flipping and modular addition method and circuit based on dirty quantum bits. The constant axis flipping quantum circuit based on the dirty quantum bits comprises a first clean bit, a first dirty bit, a first calculation module and a second calculation module, the first calculation module is used for comparing the state of the first clean bit with the size of a preset constant, and performing logical NOT operation on the first clean bit; and the second calculation module is used for comparing the state of the first clean bit with the preset constant, performing logical NOT operation on the first clean bit, and outputting a number represented by the state of the first clean bit as an axis flipping result of the A for the K. The dirty bits can be used for encryption / decryption, and the encryption / decryption efficiency is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of quantum computing technology, and in particular to a constant axis flipping and modular addition method and circuit based on dirty quantum bits. Background Art

[0002] The computer may need to perform axis-flipping calculations during the processing process. For example, in an encryption / decryption application scenario, the computer needs to calculate the sum of two numbers multiple times and divide the sum by a specified divisor to obtain a remainder (hereinafter referred to as modular addition, or modular addition for short). In the process of modular addition, an axis-flipping operation is required, that is, for value A, if value A is greater than a specified threshold K, the value of A remains unchanged, otherwise the value of A changes to KA-1.

[0003] In order to fully improve the efficiency of encryption / decryption, quantum computers can be used in related technologies to implement the aforementioned axis flipping operations, thereby realizing modular addition operations and encryption / decryption. However, in the process of axis flipping operations, quantum computers in related technologies record values ​​in clean bits, and due to hardware resource constraints, the number of clean bits in quantum computers is often limited, making it difficult to fully improve the efficiency of encryption / decryption by using the advantage of high computational efficiency of quantum computers. Summary of the invention

[0004] The purpose of the embodiment of the present invention is to provide a constant axis flipping and modular addition method and circuit based on dirty quantum bits, so as to make full use of the resources of quantum computers to improve the encryption / decryption efficiency. The specific technical solution is as follows:

[0005] In a first aspect of the present application, a constant axis flipping method based on dirty quantum bits is provided, the method comprising:

[0006] Step 1: If the number represented by the state of the first clean bit is less than a preset constant K, flip the state of the first dirty bit; if the number represented by the state of the first clean bit is not less than K, keep the state of the first dirty bit, wherein the state of the first clean bit initially represents the number A to be processed;

[0007] Step 2: If the state of the first dirty bit is a preset first state after step 1, perform an inverse operation modulo K-1 on the state of the first clean bit; if the state of the first dirty bit is a preset second state after step 1, maintain the state of the first clean bit;

[0008] Step 3: If the number represented by the state of the first clean bit after step 2 is less than K, flip the state of the first dirty bit; if the number represented by the state of the first clean bit after step 2 is not less than K, keep the state of the first dirty bit;

[0009] Step 4: If the state of the first dirty bit is the preset first state after step 3, perform an inverse operation modulo K-1 on the state of the first clean bit; if the state of the first dirty bit is the preset second state after step 3, maintain the state of the first clean bit;

[0010] Output the number represented by the state of the first clean bit after step 4 as the axis flipping result of A with respect to K.

[0011] In a possible implementation manner, performing a modulo K-1 inversion operation on the state of the first clean bit includes:

[0012] Adding negative K to the state of the first clean bit through a dirty bit-based constant adder;

[0013] A logical NOT operation is performed on the state of the first clean bit.

[0014] In a second aspect of the present application, a constant modular addition method based on dirty quantum bits is provided, the method comprising:

[0015] Taking the first variable as the number to be processed, and taking the difference between the preset first constant and the preset second constant as the preset constant, the axis flip result is calculated according to the aforementioned constant axis flip method as the first intermediate quantity;

[0016] Taking the first intermediate quantity as the number to be processed and the first constant as the preset constant, the axis flip result is calculated according to the aforementioned constant axis flip method as the second intermediate quantity;

[0017] Taking the second intermediate quantity as the number to be processed and the second constant as the preset constant, the axis flipping result is calculated according to the aforementioned constant axis flipping method as the modulus addition result obtained by applying the first variable and the second constant modulo the first constant to the sum of the first variable and the second constant.

[0018] In a third aspect of the present application, a variable axis flipping method based on dirty quantum bits is provided, the method comprising:

[0019] Step 5: If the state of the second clean bit is less than the state of the third clean bit, flip the state of the second dirty bit; if the state of the second clean bit is not less than the state of the third clean bit, keep the state of the second dirty bit, wherein the state of the second clean bit initially represents the number to be processed A, and the state of the third clean bit initially represents the threshold number B;

[0020] Step 6: If the state of the second dirty bit is the preset first state after step 5, perform an inverse operation modulo B-1 on the state of the second clean bit; if the state of the second dirty bit is the preset second state after step 5, maintain the state of the second clean bit;

[0021] Step 7: If the state of the second clean bit is less than the state of the third clean bit after step 6, flip the state of the second dirty bit; if the state of the second clean bit is not less than the state of the third clean bit after step 6, keep the state of the second dirty bit;

[0022] Step 8: If the state of the second dirty bit is the preset first state after step 7, perform an inverse operation modulo B-1 on the state of the second clean bit; if the state of the second dirty bit is the preset second state after step 7, maintain the state of the second clean bit;

[0023] The state of the second clean bit after step 8 is output as the axis flip result of A with respect to B.

[0024] In a possible implementation, the method further includes:

[0025] The state of the second clean bit and the state of the third clean bit are compared by a variable comparator based on the dirty bit.

[0026] In a fourth aspect of the present application, a variable modular addition method based on dirty quantum bits is provided, the method comprising:

[0027] The second variable is used as the number to be processed, and the difference between the preset third constant and the third variable is used as the threshold value, and the axis flip result is calculated according to the aforementioned variable axis flip method as the third intermediate quantity;

[0028] Using the third intermediate quantity as the number to be processed and the third constant as the preset constant, the axis flip result is calculated according to the above constant axis flip method as the fourth intermediate quantity;

[0029] Taking the fourth intermediate quantity as the number to be processed and the third variable as the threshold number, the axis flipping result is calculated according to the aforementioned variable axis flipping method as the modulus addition result obtained by adding the sum of the second variable and the third variable modulo the third constant.

[0030] In a fifth aspect of the present application, a constant axis flipping quantum circuit based on a dirty quantum bit is provided, the quantum circuit comprising a first clean bit, a first dirty bit, a first computing module and a second computing module, the first clean bit initially represents a number A to be processed, the first clean bit and the first dirty bit sequentially pass through the first computing module and the second computing module;

[0031] The first calculation module is configured to flip the state of the first dirty bit if the number represented by the state of the first clean bit is less than a preset constant K; maintain the state of the first dirty bit if the number represented by the state of the first clean bit is not less than the K; perform a modulo K-1 inversion operation on the state of the first clean bit if the state of the first dirty bit is a preset first state; and maintain the state of the first clean bit if the state of the first dirty bit is a preset second state;

[0032] The second calculation module is used to flip the state of the first dirty bit if the number represented by the state of the first clean bit is less than the K; maintain the state of the first dirty bit if the number represented by the state of the first clean bit is not less than the K; perform an inverse operation modulo K-1 on the state of the first clean bit if the state of the first dirty bit is a preset first state; maintain the state of the first clean bit if the state of the first dirty bit is a preset second state; and output the number represented by the state of the first clean bit as the axis flipping result of A with respect to K.

[0033] In a possible implementation manner, the first calculation module includes a first constant comparator, a first constant adder with the first dirty bit as a control bit, and a first X gate, the first clean bit passes through the first constant comparator, the first constant adder, and the first X gate in sequence, and the first dirty bit passes through the first constant comparator;

[0034] The first constant comparator is used to compare the state of the first clean bit with a preset constant K, and if the state of the first clean bit is less than K, flip the state of the first dirty bit; if the state of the first clean bit is not less than K, keep the state of the first dirty bit;

[0035] The first constant adder is used for adding the negative K to the state of the first clean bit if the control bit is in the preset first state; and for maintaining the state of the first clean bit if the control bit is in the preset first state;

[0036] The first X gate is used for performing a logical negation operation on the state of the first clean bit if the control bit is in a preset first state; and maintaining the state of the first clean bit if the control bit is in a preset second state.

[0037] In a possible implementation manner, the second calculation module includes a second constant comparator, a second constant adder with the first dirty bit as a control bit, and a second X gate, the first clean bit passes through the second constant comparator, the second constant adder, and the second X gate in sequence, and the first dirty bit passes through the second constant comparator;

[0038] The second constant comparator is used to compare the state of the first clean bit with the size of K, and if the state of the first clean bit is smaller than K, flip the state of the first dirty bit; if the state of the first clean bit is not smaller than K, keep the state of the first dirty bit;

[0039] The second constant adder is used for adding the negative K to the state of the first clean bit if the control bit is in the preset first state; and for maintaining the state of the first clean bit if the control bit is in the preset first state;

[0040] The second X gate is used for performing a logical NOT operation on the state of the first clean bit if the control bit is in a preset first state; maintaining the state of the first clean bit if the control bit is in a preset second state; and outputting the state of the first clean bit as an axis flip result of A with respect to K.

[0041] In a sixth aspect of the present application, a constant modulus addition quantum circuit based on a dirty quantum bit is provided, wherein the quantum circuit comprises a fourth clean bit, a first constant axis flipping quantum circuit, a second constant axis flipping quantum circuit, and a third constant axis flipping quantum circuit;

[0042] The state of the fourth clean bit initially represents the first variable, and the fourth clean bit sequentially passes through the first constant axis flipping quantum circuit, the second constant axis flipping quantum circuit, and the third constant axis flipping quantum circuit;

[0043] The first constant axis flipping quantum circuit is used to perform a constant axis flipping on the number represented by the state of the fourth clean bit according to the constant axis flipping method with respect to the difference between the first constant and the second constant;

[0044] The second constant axis flipping quantum circuit is used to perform a constant axis flipping on the state of the fourth clean bit with respect to the first constant according to the aforementioned constant axis flipping method;

[0045] The third constant axis flipping quantum circuit is used to perform a constant axis flipping on the state of the fourth clean bit with respect to the second constant according to the aforementioned constant axis flipping method, and output the state of the fourth clean bit as a modulus addition result obtained by adding the sum of the first variable and the second constant modulo the first constant.

[0046] In a seventh aspect of the present application, a variable axis flipping quantum circuit based on a dirty quantum bit is provided, the quantum circuit comprising a second clean bit, a third clean bit, a second dirty bit, a third computing module and a fourth computing module;

[0047] The state of the second clean bit initially represents the number to be processed A, the state of the third clean bit initially represents the threshold number B, and the second clean bit, the third clean bit and the second dirty bit are sequentially passed through the third calculation module and the fourth calculation module;

[0048] The third calculation module is used for flipping the second dirty bit if the state of the second clean bit is less than the state of the third clean bit; maintaining the state of the second dirty bit if the state of the second clean bit is not less than the state of the third clean bit; performing a modulo B-1 inversion operation on the state of the second clean bit if the state of the second dirty bit is a preset first state; and maintaining the state of the second clean bit if the state of the second dirty bit is a preset second state;

[0049] The fourth calculation module is used to flip the second dirty bit if the state of the second clean bit is less than the state of the third clean bit; maintain the state of the second dirty bit if the state of the second clean bit is not less than the state of the third clean bit; perform a modulo B-1 inversion operation on the state of the second clean bit if the state of the second dirty bit is a preset first state; maintain the state of the second clean bit if the state of the second dirty bit is a preset second state; and output the state of the second clean bit as the axis flip result of A with respect to B.

[0050] In a possible implementation manner, the third calculation module includes a first variable comparator, a first variable adder using the second dirty bit as a control bit, and a third X gate;

[0051] The second clean bit passes through the first variable comparator, the first variable adder and the third X gate in sequence; the third clean bit passes through the first variable comparator and the first variable adder in sequence; the second dirty bit passes through the first variable comparator;

[0052] The first variable comparator is used to compare the state of the second clean bit with the state of the third clean bit, and if the state of the second clean bit is smaller than the state of the third clean bit, flip the second dirty bit; if the state of the second clean bit is not smaller than the state of the third clean bit, keep the state of the second dirty bit;

[0053] The first variable adder is used for adding the negative B to the state of the second clean bit if the control bit is in the preset first state; and for maintaining the state of the second clean bit if the control bit is in the preset second state;

[0054] The third X gate is used to perform a logical NOT operation on the second clean bit if the control bit is in a preset first state, and to maintain the state of the second clean bit if the control bit is in a preset second state.

[0055] In a possible implementation manner, the fourth calculation module includes a second variable comparator, a second variable adder using the second dirty bit as a control bit, and a fourth X gate;

[0056] The second clean bit passes through the second variable comparator, the second variable adder and the fourth X gate in sequence; the third clean bit passes through the second variable comparator and the second variable adder in sequence; the second dirty bit passes through the second variable comparator;

[0057] The second variable comparator is used to compare the state of the second clean bit with the state of the third clean bit, and if the state of the second clean bit is smaller than the state of the third clean bit, flip the second dirty bit; if the state of the second clean bit is not smaller than the state of the third clean bit, keep the state of the second dirty bit;

[0058] The second variable adder is used for adding the negative B to the state of the second clean bit if the control bit is in the preset first state; and for maintaining the state of the second clean bit if the control bit is in the preset second state;

[0059] The fourth X gate is used to perform a logical NOT operation on the second clean bit if the control bit is in a preset first state, and to maintain the state of the second clean bit if the control bit is in a preset second state; and output the state of the second clean bit as the axis flip result of A with respect to B.

[0060] In an eighth aspect of the present application, a variable modulus addition quantum circuit based on dirty quantum bits is provided, the quantum circuit comprising:

[0061] a fifth clean bit, a sixth clean bit, a first variable flipping module, a second variable flipping module, and a fourth constant flipping quantum circuit, wherein the state of the fifth clean bit initially represents the fourth variable, the state of the sixth clean bit initially represents the fifth variable, and the fifth clean bit and the sixth clean bit sequentially pass through the first variable flipping module, the second variable flipping module, and the fourth constant flipping quantum circuit;

[0062] The first variable flipping module is used to perform a logical negation operation on the state of the fifth clean bit and add the sum of a preset fourth constant and 1, and perform a variable axis flipping on the state of the sixth clean bit with respect to the state of the fifth clean bit according to the aforementioned variable axis flipping method;

[0063] The fourth constant axis flipping quantum circuit is used to perform a constant axis flipping on the number represented by the state of the sixth clean bit with respect to a preset fourth constant according to the aforementioned constant axis flipping method;

[0064] The second variable flipping module is used to perform a logical negation operation on the state of the fifth clean bit and add the sum of a preset fourth constant and 1, and perform a variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the aforementioned variable axis flipping method, and output the state of the sixth clean bit as the modulus addition result obtained by the sum of the fourth variable and the fifth variable modulo the fourth constant.

[0065] In a possible implementation, the first variable flipping module includes:

[0066] a fifth X-gate, a third constant adder, and a first variable axis flipping quantum circuit;

[0067] The fifth clean bit passes through the fifth X gate, the third constant adder and the first variable axis flipping quantum circuit in sequence, and the sixth clean bit passes through the first variable axis flipping quantum circuit;

[0068] The fifth X gate is used to perform a logical NOT operation on the state of the fifth clean bit;

[0069] The third constant adder is used to add the state of the fifth clean bit to the sum of a preset fourth constant and 1;

[0070] The first variable axis flipping quantum circuit is used to perform variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the aforementioned variable axis flipping method.

[0071] In a possible implementation manner, the second variable flipping module includes:

[0072] a sixth X-gate, a fourth constant adder, and a second variable axis flipping quantum circuit;

[0073] The fifth clean bit passes through the sixth X gate, the fourth constant adder and the second variable axis flipping quantum circuit in sequence, and the sixth clean bit passes through the second variable axis flipping quantum circuit;

[0074] The sixth X gate is used to perform a logical NOT operation on the state of the fifth clean bit;

[0075] The fourth constant adder is used to add the state of the fifth clean bit to the sum of a preset fourth constant and 1;

[0076] The second variable axis flipping quantum circuit is used to perform variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the aforementioned variable axis flipping method, and output the state of the sixth clean bit as the modulus addition result obtained by adding the sum of the fourth variable and the fifth variable modulo the fourth constant.

[0077] Beneficial effects of the embodiments of the present invention:

[0078] The constant axis flipping and modular addition method and circuit based on dirty quantum bits provided in the embodiments of the present invention can improve the encryption / decryption efficiency.

[0079] Of course, it is not necessary to achieve all of the advantages described above at the same time to implement any product or method of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0081] Figure 1 A schematic diagram of a flow chart of a constant axis flipping method based on dirty quantum bits provided in this application;

[0082] Figure 2 The application provided for implementing Figure 1 The quantum circuit of the method shown;

[0083] Figure 3 A schematic diagram of a flow chart of a variable axis flipping method based on dirty quantum bits provided in this application;

[0084] Figure 4 The application provided for implementing Figure 3 The quantum circuit of the method shown;

[0085] Figure 5 A schematic diagram of a flow chart of a constant modular addition method based on dirty quantum bits provided in this application;

[0086] Figure 6 The application provided for implementing Figure 5 The quantum circuit of the method shown;

[0087] Figure 7 A flow chart of a variable modular addition method based on dirty quantum bits provided in this application;

[0088] Figure 8 The application provided for implementing Figure 7 Quantum circuit for the method shown. DETAILED DESCRIPTION

[0089] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field based on this application belong to the scope of protection of the present invention.

[0090] In order to more clearly illustrate the constant axis flipping method based on dirty quantum bits provided by the present application, some concepts in this article are explained below:

[0091] Clean bit: A clean bit refers to a quantum bit whose quantum state is known. Since data in a quantum computer is represented by the quantum state of the quantum bit (hereinafter referred to as the state of the bit), a clean bit can be regarded as a quantum bit in which the data recorded is a known quantum bit.

[0092] Dirty bit: In contrast to a clean bit, a dirty bit is a quantum bit whose quantum state is unknown. Therefore, a dirty bit can be regarded as a quantum bit in which the data recorded is unknown. In a real quantum computer, the number of logical bits is generally much larger than the number of physical bits, which makes the logical bits in a quantum computer be regarded as a valuable computing resource, while the number of physical bits is relatively less important. Dirty bits can be replaced by physical bits.

[0093] Logical negation operation: flip each bit of the state of the quantum bit. Assuming that the state of a quantum bit is |0011>, after performing a logical negation operation on the state of the quantum bit, the state of the quantum bit changes to |1100>. In this paper, the logical negation operation is referred to as the operator For example, Indicates a logical NOT operation on X. If X is the state of a quantum bit with a bit length of N bits, then

[0094] Modulo inverse operation: Performing the modulo inverse operation on X is equivalent to calculating the remainder of dividing X by Y, and then subtracting the remainder from Y. The difference is the result of the operation, that is, the result of the operation is Y-(X mod Y). If X is less than Y, X mod Y = X, so the result of the operation is YX. As can be seen from the description of the logical negation operation above, Considering that the bit length of the quantum bit is N bits, 2^N+YX is equivalent to YX. It can be seen that the inversion modulo Y can be achieved by adding negative Y+1 and then performing a logical NOT operation. Therefore, the inversion modulo K-1 in the following text refers to adding negative K and then performing a logical NOT operation, and the same is true for the inversion modulo B-1 in the following text.

[0095] Axis flip operation: Assume that X is flipped relative to Y. When X<Y, the result is YX-1. When X≥Y, the result is X. For example, when 3 is flipped relative to 8, the result is 4. When 11 is flipped relative to 9, the result is 11. In the following, the axis flip operation of X relative to Y is denoted as Flip<Y(X). According to the above description of the modular inversion operation, the result of inverting X modulo Y-1 is It can be seen that performing an axis flip operation on X with respect to Y is equivalent to performing an inversion modulo Y-1 on X when X<Y, and keeping X unchanged when X≥Y.

[0096] Modular addition operation: Calculate the sum of the value to be processed and another value, and then calculate the remainder of the sum divided by a specific value. The remainder is the result of the modular addition operation. For example, if you need to add 3 modulo 8 to 7, first calculate the sum of 7 and 3 to be 10, and then calculate the remainder of 10 divided by 8 to be 2, so the result is 2. In the following, the modular addition operation is recorded as +Y mod Z(X), which means calculating the sum of X and Y, and then calculating the remainder of the sum divided by Z, that is, the result is (X+Y) mod Z. The modular addition operation can be implemented by axis flipping operation. For specific implementation methods, please refer to the specific examples below.

[0097] Encryption / decryption: The process of using a key to convert plaintext into ciphertext or ciphertext into plaintext. For data security reasons, the relevant encryption algorithm needs to make it difficult for illegal personnel to reverse the plaintext based on the ciphertext. Therefore, in the encryption / decryption process, some calculations need to have the following characteristics: the calculation result is difficult to reverse the data involved in the calculation. For ordinary addition operations, such as +7 operation, if the operation result is 10, the operation result can be reversed to the data involved in the budget as 3. Therefore, ordinary addition operations do not have this characteristic, while modular addition operations have this characteristic. For example, for modular addition operations +3mod 8 (·), whether the data involved in the calculation is 7 or 15, the operation result is 2. It can be seen that when only knowing that the operation result is 2, it is impossible to infer whether the data involved in the calculation is 7, 15, or 23 or other values. Therefore, modular addition operations are often involved in the encryption / decryption process.

[0098] The amount of calculation in the encryption / decryption process is often large. In the related technology, the high computing efficiency of quantum computers can be used to accelerate the encryption / decryption process. In the process of encryption / decryption, quantum computers need to use the state of quantum bits to record relevant data. Since the data in dirty bits cannot be known, dirty bits cannot be used to record relevant data. Therefore, in the related technology, in the application scenario of encryption / decryption, dirty bits are not used to participate in the encryption / decryption process. However, as can be seen from the above description, there are a certain number of dirty bits in a real quantum computer. If dirty bits cannot be used for encryption / decryption, it will lead to a waste of quantum computer resources, thereby failing to fully utilize the advantages of the high computing efficiency of quantum computers to improve the efficiency of encryption / decryption.

[0099] Based on this, the present application provides a constant axis flipping method based on dirty quantum bits. As described above, the encryption / decryption process requires modular addition operations, and modular addition operations are implemented through axis flipping operations. Therefore, the constant axis flipping method based on dirty quantum bits provided in the present application can enable dirty bits to be used to implement constant axis flipping operations in encryption / decryption application scenarios, thereby utilizing dirty quantum bits to implement encryption / decryption, so as to fully utilize the high computing efficiency of quantum computers to improve the efficiency of encryption / decryption.

[0100] The constant axis flipping method based on dirty quantum bits provided in this application is as follows Figure 1 As shown, including:

[0101] Step S101: if the number represented by the state of the first clean bit is less than a preset constant K, the state of the first dirty bit is flipped.

[0102] Step S102: If the number represented by the state of the first clean bit is not less than K, the state of the first dirty bit is maintained.

[0103] The state of the first clean bit initially represents the number to be processed A. The number to be processed is the data that needs to be axis flipped, that is, X in the aforementioned Flip<Y(X). The preset constant is the threshold value when performing the axis flip operation, that is, Y in the aforementioned Flip<Y(X).

[0104] The number to be processed is a variable, the preset constant is a constant, and the comparison between the variable and the constant can be realized by a constant comparator. The constant comparator records the comparison result through the first dirty bit. When A is less than K, the constant comparator will flip the state of the dirty bit (i.e., execute the aforementioned step S101), and when A is not less than K, the constant comparator will maintain the state of the first dirty bit (i.e., execute the aforementioned step S102).

[0105] The bit length of the first clean bit can be one bit or multiple bits, and the bit length of the first dirty bit is one bit. Therefore, the state of the first dirty bit is |0> or |1>. If the state of the first dirty bit is |0>, the state of the first dirty bit becomes |1> after flipping. If the state of the first dirty bit is |1>, the state of the first dirty bit becomes |0> after flipping. It can be seen that flipping the state of the first dirty bit is equivalent to adding 1 to the state of the first dirty bit. Similarly, keeping the state of the first dirty bit is equivalent to adding 0 to the state of the first dirty bit.

[0106] Therefore, the principle of the constant comparator can be to compare the size of A and K, and output a comparison result with a bit length of 1 bit, and add the state of the first dirty bit to the comparison result, wherein, if A < K, the value of the comparison result is 1, if the data recorded in the first clean bit is not less than the preset constant, if A ≥ K, the value of the comparison result is 0, so if the comparison result is recorded as but It should comply with formula (1):

[0107]

[0108] It can be understood that, in the actual process of axis flipping operation, according to the relationship between the number represented by the state of the first clean bit and K, only one step of step S101 and step S102 will be executed. Therefore, step S101 and step S102 can be regarded as one step, recorded as step 1. When the number represented by the state of the first clean bit is less than K, step 1 is specific to step S101, and when the number represented by the state of the first clean bit is not less than K, step 1 is specific to step S102.

[0109] Step S103: If the state of the first dirty bit is the preset first state, an inverse operation modulo K-1 is performed on the state of the first clean bit.

[0110] Step S104: if the state of the first dirty bit is the preset second state, the state of the first clean bit is maintained.

[0111] The first state is one of |0> and |1>, and the second state is the other of |0> and |1>. For convenience of description below, the first state is |1> and the second state is |0> as an example for explanation. The same can be said for the case where the first state is |0> and the second state is |1>, which will not be repeated below.

[0112] It can be understood that, in the actual process of axis flipping operation, according to the state of the first dirty bit, only one step of step S103 and step S104 will be executed, so step S103 and step S104 can be regarded as one step, recorded as step 2. When the state of the first dirty bit is the preset first state, step 2 is specific to step S103, and when the state of the first dirty bit is the preset second state, step 2 is specific to step S104.

[0113] Step S105: if the number represented by the state of the first clean bit is less than K, flip the state of the first dirty bit.

[0114] Step S106: If the number represented by the state of the first clean bit is not less than K, the state of the first dirty bit is maintained.

[0115] When executing step S105 or step S106, if the state of the first clean bit is previously inverted modulo K-1 (i.e., executing step S103), the number represented by the state of the first clean bit at this time is If the state of the first clean bit has not been inverted modulo K-1 (ie, step S104 is executed), the number represented by the state of the first clean bit is A.

[0116] For the case of A ≥ K, if the number represented by the state of the first clean bit is A, then step S106 is obviously executed, and if the number represented by the state of the first clean bit is According to the above description of logical NOT operation, Since 2^NA-1≥0, 2^N-A+K-1 must not be less than K. Therefore, the number represented by the state of the first clean bit is still not less than K, so step S106 is still executed. It can be seen that for the case of A≥K, no matter whether step S103 or step S104 is executed before, step S106 will be executed at this time.

[0117] For the case of A<K, if the number represented by the state of the first clean bit is A, then obviously step S105 is executed, and if the number represented by the state of the first clean bit is According to the above description of logical NOT operation, Therefore, KA-1 must be smaller than K. Therefore, the number represented by the state of the first clean bit is still smaller than K, so step S105 is still executed. It can be seen that for the case of A<K, no matter step S103 or step S104 is executed before, step S105 will be executed at this time.

[0118] It can be understood that, in the actual process of axis flipping operation, according to the relationship between the number represented by the state of the first clean bit and K, only one step of step S105 and step S106 will be executed, so step S105 and step S106 can be regarded as one step, recorded as step 3. When the number represented by the state of the first clean bit is less than K, step 3 is specific to step S105, and when the number represented by the state of the first clean bit is not less than K, step 3 is specific to step S106.

[0119] Step S107: if the state of the first dirty bit is the preset first state, an inverse operation modulo K-1 is performed on the state of the first clean bit.

[0120] Step S108: If the state of the first dirty bit is the preset second state, the state of the first clean bit is maintained.

[0121] It can be understood that, in the actual process of axis flipping operation, according to the state of the first dirty bit, only one step of step S107 and step S108 will be executed, so step S107 and step S108 can be regarded as one step, recorded as step 4. When the state of the first dirty bit is the preset first state, step 4 is specific to step S107, and when the state of the first dirty bit is the preset second state, step 4 is specific to step S108.

[0122] Step S109: output the number represented by the state of the first clean bit as the axis flipping result of A with respect to K.

[0123] The first clean bit at this time is the first clean bit processed by step S107 or step S108 , so the output of step S109 is the number represented by the state of the first clean bit after step 4 .

[0124] It can be understood that the operations performed by steps S101-S104 and steps S105-S108 are consistent, the only difference is that the state of each quantum bit may change. Therefore, for the convenience of description, steps S101-S104 are referred to as the first calculation process, and steps S105-S108 are referred to as the second calculation process.

[0125] For the case of A≥K, step S102 and step S106 will be executed before, so the state of the first dirty bit will not be flipped in step 1 and step 3, that is, the state of the first dirty bit will always remain the initial state. Therefore, the state of the first dirty bit is the same in the first calculation process and the second calculation process, so the state of the first clean bit will be maintained (that is, step S104 and step S108 will be executed) or the state of the first clean bit will be inverted modulo K-1 (that is, step S103 and step S107 will be executed).

[0126] In the case of executing step S104 and step S108, the state of the first clean bit does not change, so the number represented by the state of the first clean bit is A. In the case of executing step S103 and step S107, after executing step S103, the number represented by the state of the first clean bit will change to After executing step S107, the number represented by the state of the first clean bit will change to That is, the number represented by the state of the first clean bit is still A.

[0127] For the case of A≥K, no matter the initial state of the first dirty bit is |0> or |1>, the number represented by the state of the first clean bit is still A.

[0128] For the case of A<K, step S101 and step S105 will be executed before, and the state of the first dirty bit will be flipped twice. Therefore, the state of the first dirty bit must be different in the first calculation process and the second calculation process. Therefore, in the first calculation process and the second calculation process, the state of the first clean bit must be inverted once and only once modulo K-1. Therefore, the number represented by the state of the first clean bit at this time is

[0129] From the above, it can be seen that when A≥K, the number output by step S109 is A, and when A<K, the number output by step S109 is KA-1. According to the above description of the axis flip operation, it can be known that the number output by step S109 is the result of Flip<K(A), that is, the axis flip operation is successfully realized through the constant axis flip method based on dirty quantum bits provided in this application.

[0130] By selecting the constant axis flipping method based on dirty quantum bits provided in the present application, the influence of the initial state of the first dirty bit on the calculation result is offset through the first calculation process and the second calculation process, so that the dirty bit can be used in the axis flipping calculation process, thereby effectively improving the utilization rate of resources in the quantum computer, so that the high efficiency of the quantum computer can be fully utilized in the encryption / decryption application scenarios, thereby improving the efficiency of encryption / decryption.

[0131] See also Figure 2 , this application provides a constant axis flipping method based on dirty quantum bits. Figure 2 The quantum circuit shown realizes, Figure 2 The quantum circuit shown includes a first clean bit, a first dirty bit, a first computing module 210 and a second computing module 220. The first clean bit initially represents a number A to be processed. The first clean bit and the first dirty bit pass through the first computing module 210 and the second computing module 220 in sequence.

[0132] The first calculation module 210 is used to implement the aforementioned related calculations of S101-S104, and the second calculation module 220 is used to implement the aforementioned related calculations of S105-S109. The calculations implemented by the first calculation module 210 and the second calculation module 220 can be found in the relevant description of the aforementioned method embodiment, which will not be repeated here. The structure of the first calculation module 210 and the second calculation module 220 will be described below.

[0133] Still see Figure 2 , the first calculation module 210 includes a first constant comparator 211, a first constant adder 212 with a first dirty bit as a control bit, and a first X-gate 213, the first clean bit passes through the first constant comparator 211, the first constant adder 212 and the first X-gate 213 in sequence, and the first dirty bit passes through the first constant comparator 211;

[0134] In a possible implementation, the first constant comparator 211 is Figure 2 The following contains inputA and Similarly, the second constant comparator 221 in the following text is represented by Figure 2 It also contains inputA and The box represents.

[0135] The first constant comparator 211 is used to compare the state of the first clean bit with the size of the preset constant K, and implement the above steps S101-S102;

[0136] The first constant adder 212 is used to add negative K to the state of the first clean bit if the control bit is in the preset first state; if the control bit is in the preset first state, keep the state of the first clean bit.

[0137] The first X gate 213 is used to perform a logical negation operation on the state of the first clean bit if the control bit is in the preset first state; and to maintain the state of the first clean bit if the control bit is in the preset second state;

[0138] The second calculation module 220 includes a second constant comparator 221, a second constant adder 222 with the first dirty bit as a control bit, and a second X-gate 223; the first clean bit passes through the second constant comparator 221, the second constant adder 222, and the second X-gate 223 in sequence, and the first dirty bit passes through the second constant comparator 221;

[0139] The second constant comparator 221 is used to compare the state of the first clean bit with the size of the preset constant K, and implement the aforementioned steps S105-S106;

[0140] The second constant adder 222 is used to add negative K to the state of the first clean bit if the control bit is in the preset first state; if the control bit is in the preset first state, keep the state of the first clean bit;

[0141] The second X-gate 223 is used to perform a logical NOT operation on the state of the first clean bit if the control bit is in the preset first state; to maintain the state of the first clean bit if the control bit is in the preset second state; and to output the state of the first clean bit as the axis flip result of A with respect to K.

[0142] In some application scenarios, the threshold in the aforementioned axis flipping operation, i.e., K in the aforementioned example, is also a variable. Therefore, the present application also provides a variable axis flipping method based on dirty quantum bits, such as Figure 3 As shown, including:

[0143] S301, if the state of the second clean bit is less than the state of the third clean bit, flip the state of the second dirty bit;

[0144] S302, if the state of the second clean bit is not less than the state of the third clean bit, the state of the second dirty bit is maintained, wherein the state of the second clean bit initially represents the number to be processed A, and the state of the third clean bit initially represents the threshold number B.

[0145] It can be understood that, in the actual process of axis flipping operation, according to the relationship between the number represented by the state of the second clean bit and B, only one step of step S301 and step S302 will be executed. Therefore, step S301 and step S302 can be regarded as one step, recorded as step 5. When the number represented by the state of the second clean bit is less than B, step 5 is specific to step S301, and when the number represented by the state of the second clean bit is not less than B, step 5 is specific to step S302.

[0146] S303, if the state of the second dirty bit is the preset first state, performing a modulo B-1 inversion operation on the state of the second clean bit;

[0147] S304, if the state of the second dirty bit is the preset second state, maintaining the state of the second clean bit;

[0148] It can be understood that, in the actual process of axis flipping operation, according to the state of the second dirty bit, only one step of step S303 and step S304 will be executed, so step S303 and step S304 can be regarded as one step, recorded as step 6. When the state of the second dirty bit is the preset first state, step 6 is specific to step S303, and when the state of the second dirty bit is the preset second state, step 6 is specific to step S304.

[0149] S305, if the state of the second clean bit is less than the state of the third clean bit, flip the state of the second dirty bit;

[0150] S306, if the state of the second clean bit is not less than the state of the third clean bit, maintaining the state of the second dirty bit;

[0151] It can be understood that, in the actual process of axis flipping operation, according to the relationship between the number represented by the state of the second clean bit and B, only one step of step S305 and step S306 will be executed. Therefore, step S305 and step S306 can be regarded as one step, recorded as step 7. When the number represented by the state of the second clean bit is less than B, step 7 is specific to step S305, and when the number represented by the state of the second clean bit is not less than B, step 7 is specific to step S306.

[0152] S307, if the state of the second dirty bit is the preset first state, performing a modulo B-1 inversion operation on the state of the second clean bit;

[0153] S308, if the state of the second dirty bit is the preset second state, maintaining the state of the second clean bit;

[0154] It can be understood that, in the actual process of axis flipping operation, according to the state of the second dirty bit, only one step of step S307 and step S308 will be executed, so step S307 and step S308 can be regarded as one step, recorded as step 8. When the state of the second dirty bit is the preset first state, step 8 is specific to step S307, and when the state of the second dirty bit is the preset second state, step 8 is specific to step S308.

[0155] S309, output the state of the second clean bit as the axis flip result of A with respect to B.

[0156] The second clean bit at this time is the first clean bit processed by step S307 or step S308 , so the output of step S309 is the number represented by the state of the second clean bit after step S8 .

[0157] S301-S309 are the same as the aforementioned S101-S109, the only difference is that the preset constant of S101-S109 is replaced by the third variable, so the comparison in S301 and S305 changes from the comparison between the variable and the constant to the comparison between two variables, so S301 and S305 can be implemented by a variable comparator, and as described above about the modulo inverse operation, in S303, the state of the second clean bit needs to be added with negative B during the modulo B-1 operation. The number represented by the state of the second clean bit during the addition process is a variable, and B is also a variable, so the addition can be implemented by a variable adder. Similarly, the modulo B-1 inverse operation in S307 can also be implemented by a variable adder.

[0158] See also Figure 4 , the present application provides a variable axis flipping method based on dirty quantum bits, which can be based on Figure 4 The quantum circuit shown realizes, Figure 4 The quantum circuit shown includes a second clean bit, a third clean bit, a second dirty bit, a third computing module 410, and a fourth computing module 420. The state of the second clean bit initially represents the number A to be processed, and the state of the third clean bit initially represents the threshold number B. The second clean bit, the third clean bit, and the second dirty bit sequentially pass through the third computing module 410 and the fourth computing module 420.

[0159] The third calculation module 410 is used to implement the related calculations of the aforementioned S301-S304, and the fourth calculation module 420 is used to implement the related calculations of the aforementioned S305-S308. For the calculations implemented by the third calculation module 410 and the fourth calculation module 420, please refer to the relevant description of the aforementioned method embodiment, which will not be repeated here. The structure of the third calculation module 410 and the fourth calculation module 420 will be explained below.

[0160] Still see Figure 4 , the third calculation module 410 includes a first variable comparator 411, a first variable adder 412 with the second dirty bit as a control bit, and a third X gate 413;

[0161] In a possible implementation, the first variable comparator 411 Figure 4 In the figure, it is represented by a box including inputA, inputB and ⊕B<A. Similarly, the first variable adder 412 is represented by a box including inputA and -A.

[0162] The first variable comparator 411 is used to compare the state of the second clean bit with the state of the third clean bit, and implement the aforementioned steps S301-S302;

[0163] The first variable adder 412 is used to add negative B to the state of the second clean bit if the control bit is in the preset first state; if the control bit is in the preset second state, keep the state of the second clean bit;

[0164] The third X-gate 413 is used to perform a logical NOT operation on the second clean bit if the control bit is in the preset first state, and to maintain the state of the second clean bit if the control bit is in the preset second state.

[0165] The fourth calculation module 420 includes a second variable comparator 421, a second variable adder 422 with the second dirty bit as the control bit, and a fourth X-gate 423; the second clean bit passes through the second variable comparator 421, the second variable adder 422, and the fourth X-gate 423 in sequence; the third clean bit passes through the second variable comparator 421 and the second variable adder 422 in sequence; the second dirty bit passes through the second variable comparator 421;

[0166] In a possible implementation, the second variable comparator 421 Figure 4 In the figure, it is represented by a box containing inputA, inputB and ⊕B<A. Similarly, the second variable adder 422 is represented by a box containing inputA and -A.

[0167] The second variable comparator 421 is used to compare the state of the second clean bit with the state of the third clean bit, and implement the aforementioned steps S305-S306;

[0168] The second variable adder 422 is used to add negative B to the state of the second clean bit if the control bit is in the preset first state; if the control bit is in the preset second state, keep the state of the second clean bit;

[0169] The fourth X-gate 423 is used to perform a logical NOT operation on the second clean bit if the control bit is in the preset first state, and to maintain the state of the second clean bit if the control bit is in the preset second state; and output the state of the second clean bit as the axis flip result of A with respect to B.

[0170] As described above, the modular addition involved in the encryption / decryption process can be realized based on the axis flipping operation. The following will describe how to realize the modular addition based on the axis flipping method based on dirty quantum bits provided in this application. Figure 5 , Figure 5 The figure shows a flow chart of a constant modular addition method based on dirty quantum bits provided by the present application, including:

[0171] S501, using the first variable as the number to be processed, and using the difference between the preset first constant and the preset second constant as the preset constant, and calculating the axis flip result according to the aforementioned constant axis flip method as the first intermediate value;

[0172] In this embodiment, the modular addition operation to be performed is to calculate: the remainder obtained by dividing the sum of the first variable and the second constant by the first constant. For the convenience of description, the first variable is denoted as A, the second constant is denoted as K, and the first constant is denoted as R. Then the modular addition operation to be implemented in this embodiment is (A+K) mod R.

[0173] This step is to implement the axis flip operation on A with RK as the threshold.

[0174] S502, using the first intermediate quantity as the number to be processed and the first constant as the preset constant, and calculating the axis flip result according to the above constant axis flip method to obtain the axis flip result as the second intermediate quantity;

[0175] This step is to implement an axis flip operation with R as a threshold value on the first intermediate quantity.

[0176] S503, using the second intermediate quantity as the number to be processed and the second constant as the preset constant, calculating the axis flip result according to the aforementioned constant axis flip method as the modulus addition result obtained by adding the sum of the first variable and the second constant modulo the first constant.

[0177] This step is to implement the axis flip operation with K as the threshold for the second intermediate quantity.

[0178] For the case of A<RK, according to the above description of the axis flip operation, the first intermediate quantity obtained by S501 is RKA-1. Since K, A, and 1 are all positive numbers, the first intermediate quantity is less than R. According to the above description of the axis flip operation, the second intermediate quantity obtained by S502 is R-(RKA-1)-1, that is, A+K. Since K is a positive number, the second intermediate quantity is greater than K. According to the above description of the axis flip operation, the result obtained by S503 is A+K. In the case of A<RK, A+K<R, so (A+K)mod R is equal to A+K. It can be seen that the result obtained by S503 is the correct modulus addition result.

[0179] For the case of A≥RK, according to the above description of the axis flip operation, the first intermediate quantity obtained by S501 is A. Since K is a positive number, the first intermediate quantity is less than R. According to the above description of the axis flip operation, the second intermediate quantity obtained by S502 is RA-1. Since RA≤K and 1 is a positive number, RA-1 is less than K. According to the above description of the axis flip operation, the result obtained by S503 is K-(RA-1)-1, that is, A+KR. In the case of A≥RK, A+K≥R, so (A+K)mod R is equal to A+KR. It can be seen that the result obtained by S503 is the correct modulus addition result.

[0180] In summary, it can be seen that the constant modular addition method based on dirty quantum bits provided in the present application can accurately implement modular addition operations, and because the axis flipping operation therein is implemented based on dirty bits, it can effectively improve the utilization rate of resources in quantum computers, thereby making full use of the high efficiency of quantum computers in encryption / decryption application scenarios, thereby improving the efficiency of encryption / decryption.

[0181] See also Figure 6 , this application provides a constant modular addition method based on dirty quantum bits that can be based on Figure 6 The quantum circuit shown realizes, Figure 6 The quantum circuit shown includes a fourth clean bit, a first constant axis flipping quantum circuit 610, a second constant axis flipping quantum circuit 620, and a third constant axis flipping quantum circuit 630; the state of the fourth clean bit initially represents the first variable, and the fourth clean bit sequentially passes through the first constant axis flipping quantum circuit 610, the second constant axis flipping quantum circuit 620, and the third constant axis flipping quantum circuit 630;

[0182] The first constant axis flipping quantum circuit 610 is used to perform a constant axis flipping on the number represented by the state of the fourth clean bit according to the constant axis flipping method with respect to the difference between the first constant and the second constant;

[0183] In a possible implementation, the first constant axis flipping quantum circuit 610 is Figure 6 In the figure, the first constant axis flipping quantum circuit 610 is represented by a box containing Flip<RK, the second constant axis flipping quantum circuit 620 is represented by a box containing Flip<R, and the third constant axis flipping quantum circuit 630 is represented by a box containing Flip<K. In a possible implementation, the first constant axis flipping quantum circuit 610, the second constant axis flipping quantum circuit 620 and the third constant axis flipping quantum circuit 630 are all implemented based on 2 dirty bits;

[0184] The second constant axis flipping quantum circuit 620 is used to perform a constant axis flipping on the state of the fourth clean bit with respect to the first constant according to the aforementioned constant axis flipping method;

[0185] The third constant axis flipping quantum circuit 630 is used to perform a constant axis flipping on the state of the fourth clean bit with respect to the second constant according to the aforementioned constant axis flipping method, and output the state of the fourth clean bit as a modulus addition result obtained by adding the first variable and the second constant modulo the first constant.

[0186] The structures of the first constant axis flipping quantum circuit 610, the second constant axis flipping quantum circuit 620 and the third constant axis flipping quantum circuit 630 can be found in Figure 2 The constant axis flipping quantum circuit based on dirty bits shown will not be described in detail here.

[0187] See also Figure 7 , Figure 7 The figure shows a flow chart of a variable modular addition method based on dirty quantum bits provided by the present application, including:

[0188] S701, using the second variable as the number to be processed, and using the difference between the preset third constant and the third variable as the threshold value, and calculating the axis flip result according to the aforementioned variable axis flip method as the third intermediate value;

[0189] In this embodiment, the modular addition operation to be performed is to calculate: the remainder obtained by dividing the sum of the second variable and the third variable by the third constant. For the convenience of description, the second variable is denoted as A, the third variable is denoted as K, and the third constant is denoted as R. The modular addition operation to be implemented in this embodiment is (A+K) mod R.

[0190] This step is to implement the axis flip operation on A with RK as the threshold.

[0191] S702, using the third intermediate quantity as the number to be processed and the third constant as the preset constant, and calculating the axis flip result according to the above constant axis flip method as the fourth intermediate quantity;

[0192] This step is to implement an axis flip operation on A with R as the threshold.

[0193] S703, taking the fourth intermediate quantity as the number to be processed and the third variable as the threshold number, the axis flipping result is calculated according to the aforementioned variable axis flipping method, and the result of the modulus addition is obtained by adding the sum of the second variable and the third variable modulo the third constant.

[0194] This step is to implement an axis flip operation on A with K as the threshold.

[0195] Similar to the above Figure 5 Description, Figure 7 The illustrated embodiment can accurately calculate the result of the modular addition operation.

[0196] See also Figure 8 , this application provides a variable modular addition method based on dirty quantum bits that can be based on Figure 8 The quantum circuit shown realizes, Figure 8 The quantum circuit shown includes a fifth clean bit, a sixth clean bit, a first variable flip module 810, a second variable flip module 820, and a fourth constant flip quantum circuit 841. The state of the fifth clean bit initially represents the fourth variable, and the state of the sixth clean bit initially represents the fifth variable. The fifth clean bit and the sixth clean bit sequentially pass through the first variable flip module 810, the second variable flip module 820, and the fourth constant flip quantum circuit 841.

[0197] A first variable flipping module 810, configured to perform a logical negation operation on the state of the fifth clean bit and add the sum of a preset fourth constant and 1, and perform a variable axis flipping on the state of the sixth clean bit with respect to the state of the fifth clean bit according to the aforementioned variable axis flipping method;

[0198] The fourth constant flipping quantum circuit 841 is used to perform a constant axis flipping on the number represented by the state of the sixth clean bit with respect to a preset fourth constant according to the aforementioned constant axis flipping method;

[0199] The second variable flipping module 820 is used to perform a logical negation operation on the state of the fifth clean bit and add the sum of a preset fourth constant and 1, and perform variable axis flipping on the state of the sixth clean bit with respect to the state of the fifth clean bit according to the aforementioned variable axis flipping method, and output the state of the sixth clean bit as the modulus addition result obtained by the sum of the fourth variable and the fifth variable modulo the fourth constant.

[0200] The first variable flip module 810 includes: a fifth X gate 811, a third constant adder 821, and a first variable axis flip quantum circuit 831;

[0201] In a possible implementation, the first variable axis flipping quantum circuit 831 is Figure 8 It is represented by a box containing inputA and Flip<A.

[0202] The fifth clean bit passes through the fifth X gate 811, the third constant adder 821 and the first variable axis flipping quantum circuit 831 in sequence, and the sixth clean bit passes through the first variable axis flipping quantum circuit 831;

[0203] a fifth X-gate 811, configured to perform a logical NOT operation on the state of the fifth clean bit;

[0204] A third constant adder 821, used for adding the state of the fifth clean bit to the sum of a preset fourth constant and 1;

[0205] The first variable axis flipping quantum circuit 831 is used to perform variable axis flipping on the state of the sixth clean bit with respect to the state of the fifth clean bit according to the aforementioned variable axis flipping method;

[0206] The second variable flip module 820 includes: a sixth X gate 812, a fourth constant adder 822 and a second variable axis flip quantum circuit 832;

[0207] In a possible implementation, the second variable axis flipping quantum circuit 832 is Figure 8 It is represented by a box containing inputA and Flip<A.

[0208] The fifth clean bit passes through the sixth X gate 812, the fourth constant adder 822, and the second variable axis flipping quantum circuit 832 in sequence, and the sixth clean bit passes through the second variable axis flipping quantum circuit 832;

[0209] The sixth X-gate 812 is used to perform a logical NOT operation on the state of the fifth clean bit;

[0210] The fourth constant adder 822 is used to add the state of the fifth clean bit to the sum of a preset fourth constant and 1;

[0211] The second variable axis flipping quantum circuit 832 is used to perform variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the aforementioned variable axis flipping method, and output the state of the sixth clean bit as the modulus addition result obtained by adding the fourth variable and the fifth variable modulo the fourth constant.

[0212] The third constant adder 821 and the fourth constant adder 822 are constant adders implemented based on 1 dirty bit, and the first variable axis flipping quantum circuit 831 and the second variable axis flipping quantum circuit 832 are implemented based on 2 dirty bits.

[0213] In another embodiment provided by the present invention, a computer-readable storage medium is also provided, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned constant axis flipping and modular addition methods based on quantum bits are implemented.

[0214] In another embodiment provided by the present invention, a computer program product containing instructions is also provided, which, when executed on a computer, enables the computer to execute any of the constant axis flipping and modular addition methods based on quantum bits in the above embodiments.

[0215] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state hard disk Solid State Disk (SSD)), etc.

[0216] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0217] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for other embodiments, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0218] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A constant axis flipping method based on dirty quantum bits, characterized in that: The method comprises: Step 1: If the number represented by the state of the first clean bit is less than a preset constant K, flip the state of the first dirty bit; if the number represented by the state of the first clean bit is not less than K, keep the state of the first dirty bit, wherein the state of the first clean bit initially represents the number A to be processed; Step 2: If the state of the first dirty bit is a preset first state after step 1, perform an inverse operation modulo K-1 on the state of the first clean bit; if the state of the first dirty bit is a preset second state after step 1, maintain the state of the first clean bit; Step 3: If the number represented by the state of the first clean bit after step 2 is less than K, flip the state of the first dirty bit; if the number represented by the state of the first clean bit after step 2 is not less than K, keep the state of the first dirty bit; Step 4: If the state of the first dirty bit is the preset first state after step 3, perform an inverse operation modulo K-1 on the state of the first clean bit; if the state of the first dirty bit is the preset second state after step 3, maintain the state of the first clean bit; Output the number represented by the state of the first clean bit after step 4 as the axis flipping result of A with respect to K.

2. The method according to claim 1, characterized in that: The performing a modulo K-1 inversion operation on the state of the first clean bit includes: Adding negative K to the state of the first clean bit through a dirty bit-based constant adder; A logical NOT operation is performed on the state of the first clean bit.

3. A constant modular addition method based on dirty quantum bits, characterized in that: The method comprises: Taking the first variable as the number to be processed, and taking the difference between the preset first constant and the preset second constant as the preset constant, the axis flip result is calculated according to the constant axis flip method of claim 1 as the first intermediate quantity; Taking the first intermediate quantity as the number to be processed and the first constant as the preset constant, the axis flip result is calculated according to the constant axis flip method of claim 1 to be used as the second intermediate quantity; Taking the second intermediate quantity as the number to be processed and the second constant as the preset constant, the axis flipping result is calculated according to the constant axis flipping method of claim 1 as the modulus addition result obtained by adding the sum of the first variable and the second constant modulo the first constant.

4. A variable axis flipping method based on dirty quantum bits, characterized in that: The method comprises: Step 5: If the state of the second clean bit is less than the state of the third clean bit, flip the state of the second dirty bit; if the state of the second clean bit is not less than the state of the third clean bit, keep the state of the second dirty bit, wherein the state of the second clean bit initially represents the number to be processed A, and the state of the third clean bit initially represents the threshold number B; Step 6: If the state of the second dirty bit is the preset first state after step 5, perform an inverse operation modulo B-1 on the state of the second clean bit; if the state of the second dirty bit is the preset second state after step 5, maintain the state of the second clean bit; Step 7: If the state of the second clean bit is less than the state of the third clean bit after step 6, flip the state of the second dirty bit; if the state of the second clean bit is not less than the state of the third clean bit after step 6, keep the state of the second dirty bit; Step 8: If the state of the second dirty bit is the preset first state after step 7, perform an inverse operation modulo B-1 on the state of the second clean bit; if the state of the second dirty bit is the preset second state after step 7, maintain the state of the second clean bit; The state of the second clean bit after step 8 is output as the axis flip result of A with respect to B.

5. The method according to claim 4, characterized in that The method further comprises: The state of the second clean bit and the state of the third clean bit are compared by a variable comparator based on the dirty bit.

6. A variable modular addition method based on dirty quantum bits, characterized in that: The method comprises Taking the second variable as the number to be processed, and taking the difference between the preset third constant and the third variable as the threshold value, the axis flip result is calculated according to the variable axis flip method of claim 4 as the third intermediate quantity; Taking the third intermediate quantity as the number to be processed and the third constant as the preset constant, the axis flip result is calculated according to the constant axis flip method of claim 1 as the fourth intermediate quantity; Taking the fourth intermediate quantity as the number to be processed and the third variable as the threshold number, the axis flipping result is calculated according to the variable axis flipping method of claim 4 as the modulus addition result obtained by adding the sum of the second variable and the third variable modulo the third constant.

7. A constant axis flipping quantum circuit based on dirty quantum bits, characterized in that: The quantum circuit includes a first clean bit, a first dirty bit, a first computing module and a second computing module, the first clean bit initially represents a number A to be processed, and the first clean bit and the first dirty bit pass through the first computing module and the second computing module in sequence; The first calculation module is configured to flip the state of the first dirty bit if the number represented by the state of the first clean bit is less than a preset constant K; maintain the state of the first dirty bit if the number represented by the state of the first clean bit is not less than the K; perform a modulo K-1 inversion operation on the state of the first clean bit if the state of the first dirty bit is a preset first state; and maintain the state of the first clean bit if the state of the first dirty bit is a preset second state; The second calculation module is used to flip the state of the first dirty bit if the number represented by the state of the first clean bit is less than the K; maintain the state of the first dirty bit if the number represented by the state of the first clean bit is not less than the K; perform an inverse operation modulo K-1 on the state of the first clean bit if the state of the first dirty bit is a preset first state; maintain the state of the first clean bit if the state of the first dirty bit is a preset second state; and output the number represented by the state of the first clean bit as the axis flipping result of A with respect to K.

8. The quantum circuit according to claim 7, characterized in that: The first calculation module includes a first constant comparator, a first constant adder with the first dirty bit as a control bit, and a first X gate, the first clean bit passes through the first constant comparator, the first constant adder, and the first X gate in sequence, and the first dirty bit passes through the first constant comparator; The first constant comparator is used to compare the state of the first clean bit with a preset constant K, and if the state of the first clean bit is less than K, flip the state of the first dirty bit; if the state of the first clean bit is not less than K, keep the state of the first dirty bit; The first constant adder is used for adding the negative K to the state of the first clean bit if the control bit is in the preset first state; and for maintaining the state of the first clean bit if the control bit is in the preset first state; The first X gate is used for performing a logical NOT operation on the state of the first clean bit if the control bit is in a preset first state; and maintaining the state of the first clean bit if the control bit is in a preset second state.

9. The quantum circuit according to claim 8, characterized in that: The second calculation module includes a second constant comparator, a second constant adder with the first dirty bit as a control bit, and a second X gate, the first clean bit passes through the second constant comparator, the second constant adder, and the second X gate in sequence, and the first dirty bit passes through the second constant comparator; The second constant comparator is used to compare the state of the first clean bit with the size of K, and if the state of the first clean bit is smaller than K, flip the state of the first dirty bit; if the state of the first clean bit is not smaller than K, keep the state of the first dirty bit; The second constant adder is used for adding the negative K to the state of the first clean bit if the control bit is in the preset first state; and for maintaining the state of the first clean bit if the control bit is in the preset first state; The second X gate is used for performing a logical NOT operation on the state of the first clean bit if the control bit is in a preset first state; maintaining the state of the first clean bit if the control bit is in a preset second state; and outputting the state of the first clean bit as an axis flip result of A with respect to K.

10. A constant modulus addition quantum circuit based on dirty quantum bits, characterized in that: The quantum circuit includes a fourth clean bit, a first constant axis flipping quantum circuit, a second constant axis flipping quantum circuit and a third constant axis flipping quantum circuit; The state of the fourth clean bit initially represents the first variable, and the fourth clean bit sequentially passes through the first constant axis flipping quantum circuit, the second constant axis flipping quantum circuit, and the third constant axis flipping quantum circuit; The first constant axis flipping quantum circuit is used to perform a constant axis flipping on the number represented by the state of the fourth clean bit according to the constant axis flipping method of claim 1 with respect to the difference between the first constant and the second constant; The second constant axis flipping quantum circuit is used to perform a constant axis flipping on the state of the fourth clean bit with respect to the first constant according to the constant axis flipping method of claim 1; The third constant axis flipping quantum circuit is used to perform a constant axis flip on the state of the fourth clean bit with respect to the second constant according to the constant axis flipping method described in claim 1, and output the state of the fourth clean bit as a modulus addition result obtained by adding the sum of the first variable and the second constant modulo the first constant.

11. A variable axis flipping quantum circuit based on dirty quantum bits, characterized in that: The quantum circuit includes a second clean bit, a third clean bit, a second dirty bit, a third computing module and a fourth computing module; The state of the second clean bit initially represents the number to be processed A, the state of the third clean bit initially represents the threshold number B, and the second clean bit, the third clean bit and the second dirty bit are sequentially passed through the third calculation module and the fourth calculation module; The third calculation module is used for flipping the second dirty bit if the state of the second clean bit is less than the state of the third clean bit; maintaining the state of the second dirty bit if the state of the second clean bit is not less than the state of the third clean bit; performing a modulo B-1 inversion operation on the state of the second clean bit if the state of the second dirty bit is a preset first state; and maintaining the state of the second clean bit if the state of the second dirty bit is a preset second state; The fourth calculation module is used to flip the second dirty bit if the state of the second clean bit is less than the state of the third clean bit; maintain the state of the second dirty bit if the state of the second clean bit is not less than the state of the third clean bit; perform a modulo B-1 inversion operation on the state of the second clean bit if the state of the second dirty bit is a preset first state; maintain the state of the second clean bit if the state of the second dirty bit is a preset second state; and output the state of the second clean bit as the axis flip result of A with respect to B.

12. The quantum circuit according to claim 11, characterized in that: The third calculation module includes a first variable comparator, a first variable adder with the second dirty bit as a control bit, and a third X gate; The second clean bit passes through the first variable comparator, the first variable adder and the third X gate in sequence; the third clean bit passes through the first variable comparator and the first variable adder in sequence; the second dirty bit passes through the first variable comparator; The first variable comparator is used to compare the state of the second clean bit with the state of the third clean bit, and if the state of the second clean bit is smaller than the state of the third clean bit, flip the second dirty bit; if the state of the second clean bit is not smaller than the state of the third clean bit, keep the state of the second dirty bit; The first variable adder is used for adding the negative B to the state of the second clean bit if the control bit is in the preset first state; and for maintaining the state of the second clean bit if the control bit is in the preset second state; The third X gate is used to perform a logical NOT operation on the second clean bit if the control bit is in a preset first state, and to maintain the state of the second clean bit if the control bit is in a preset second state.

13. The quantum circuit according to claim 12, characterized in that: The fourth calculation module includes a second variable comparator, a second variable adder using the second dirty bit as a control bit, and a fourth X gate; The second clean bit passes through the second variable comparator, the second variable adder and the fourth X gate in sequence; the third clean bit passes through the second variable comparator and the second variable adder in sequence; the second dirty bit passes through the second variable comparator; The second variable comparator is used to compare the state of the second clean bit with the state of the third clean bit, and if the state of the second clean bit is smaller than the state of the third clean bit, flip the second dirty bit; if the state of the second clean bit is not smaller than the state of the third clean bit, keep the state of the second dirty bit; The second variable adder is used for adding the negative B to the state of the second clean bit if the control bit is in the preset first state; and for maintaining the state of the second clean bit if the control bit is in the preset second state; The fourth X gate is used to perform a logical NOT operation on the second clean bit if the control bit is in a preset first state, and to maintain the state of the second clean bit if the control bit is in a preset second state; and output the state of the second clean bit as the axis flip result of A with respect to B.

14. A variable modulus addition quantum circuit based on dirty quantum bits, characterized in that: The quantum circuit comprises: a fifth clean bit, a sixth clean bit, a first variable flipping module, a second variable flipping module, and a fourth constant flipping quantum circuit, wherein the state of the fifth clean bit initially represents the fourth variable, the state of the sixth clean bit initially represents the fifth variable, and the fifth clean bit and the sixth clean bit sequentially pass through the first variable flipping module, the second variable flipping module, and the fourth constant flipping quantum circuit; The first variable flipping module is used to perform a logical negation operation on the state of the fifth clean bit and add the sum of a preset fourth constant and 1, and perform a variable axis flipping on the state of the sixth clean bit with respect to the state of the fifth clean bit according to the variable axis flipping method of claim 4; The fourth constant axis flipping quantum circuit is used to perform a constant axis flipping on the number represented by the state of the sixth clean bit with respect to a preset fourth constant according to the constant axis flipping method of claim 1; The second variable flipping module is used to perform a logical negation operation on the state of the fifth clean bit and add the sum of a preset fourth constant and 1, and perform a variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the variable axis flipping method described in claim 4, and output the state of the sixth clean bit as the modulus addition result obtained by the sum of the fourth variable and the fifth variable modulo the fourth constant.

15. The quantum circuit according to claim 14, characterized in that: The first variable flipping module includes: a fifth X-gate, a third constant adder, and a first variable axis flipping quantum circuit; The fifth clean bit passes through the fifth X gate, the third constant adder and the first variable axis flipping quantum circuit in sequence, and the sixth clean bit passes through the first variable axis flipping quantum circuit; The fifth X gate is used to perform a logical NOT operation on the state of the fifth clean bit; The third constant adder is used to add the state of the fifth clean bit to the sum of a preset fourth constant and 1; The first variable axis flipping quantum circuit is used to perform variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the variable axis flipping method of claim 4.

16. The quantum circuit according to claim 14, characterized in that: The second variable flipping module comprises: a sixth X-gate, a fourth constant adder, and a second variable axis flipping quantum circuit; The fifth clean bit passes through the sixth X gate, the fourth constant adder and the second variable axis flipping quantum circuit in sequence, and the sixth clean bit passes through the second variable axis flipping quantum circuit; The sixth X gate is used to perform a logical NOT operation on the state of the fifth clean bit; The fourth constant adder is used to add the state of the fifth clean bit to the sum of a preset fourth constant and 1; The second variable axis flipping quantum circuit is used to perform variable axis flipping on the state of the sixth clean bit relative to the state of the fifth clean bit according to the variable axis flipping method described in claim 4, and output the state of the sixth clean bit as the modulus addition result obtained by adding the sum of the fourth variable and the fifth variable modulo the fourth constant.

Citation Information

Patent Citations

  • Quantum AND logic gate, inverse quantum AND logic gate and logic operation line generation method

    CN114399052A

  • Quantum computer bit quantum flipping early warning and threshold setting method

    CN115660091A

  • Quantum symmetric encryption key searching method and device, equipment and medium

    CN115913538A

  • Numerical value comparison method and device based on quantum technology and quantum computer

    CN115936127A

  • Compilation, memory management, and fault localization with ancillas in an unknown state

    US20180144262A1