Image processing circuit and method

Abstract

The invention discloses an image processing circuit and method. The image processing circuit comprises a receiver, at least one memory, an identification circuit, a calculation circuit and a compensation circuit. The receiver is used for receiving a current image frame and a plurality of previous image frames. The at least one memory is configured to store the plurality of previous image frames. The identification circuit is configured to select a first previous image frame or a second previous image frame of the plurality of previous image frames from the at least one memory. The calculation circuit is configured to calculate a compensation value for the current image frame by referring to a lookup table according to at least one of the first previous image frame and the second previous image frame. The compensation circuit is used for modifying current image data of the current image frame by using the compensation value.

Description

Technical Field

[0001] The present invention relates to an image processing circuit and method, and in particular to an image processing circuit and method that can be used for a display screen. Background Art

[0002] When the image content of an organic light emitting diode (OLED) panel changes, image sticking (also known as image retention or ghost image) is prone to occur, especially when the grayscale value changes significantly. For example, when an image changes from a lower grayscale to a higher grayscale with a large voltage change, it may happen that the brightness on multiple consecutive image frames cannot fully reach the target value corresponding to the higher grayscale. In the prior art, an organic light emitting diode panel can be driven by allocating three phases: an initial phase, a compensation phase, and a light emitting phase. An organic light emitting diode pixel includes a plurality of control switches that can be switched between different phases to eliminate the mismatch between the organic light emitting diode and / or the driving thin film transistor (TFT) in the organic light emitting diode pixel, thereby compensating for the decrease in brightness. However, this internal compensation scheme requires a large number of thin film transistors to be set in each pixel, resulting in lower panel penetration and lower pixel density, while reducing product yield.

[0003] Since the brightness drop cannot be well compensated, the residual smear on the OLED panel causes the image quality to degrade. For example, due to the smear effect, a square block dragged on the panel may appear as a rectangle. Furthermore, OLED pixels of different colors may have different degrees of smear, which further causes color deviation. In addition, in one application example, the light emitted by the OLED panel is used for optical fingerprint sensing, and the brightness drop over multiple image frames may reduce the sensitivity of fingerprint sensing, thereby increasing the sensing time and reducing the user experience. Summary of the invention

[0004] Therefore, the main purpose of the present invention is to provide an image processing circuit and method that can be used for a display screen (such as an organic light emitting diode (OLED) panel) to solve the above problems.

[0005] An embodiment of the present invention discloses an image processing circuit, which includes a receiver, at least one memory, an identification circuit, a calculation circuit and a compensation circuit. The receiver is used to receive a current image frame and multiple previous image frames. The at least one memory is coupled to the receiver and is used to store the multiple previous image frames. The identification circuit is coupled to the at least one memory and is used to select a first previous image frame or a second previous image frame from the multiple previous image frames from the at least one memory. The calculation circuit is coupled to the identification circuit and is used to calculate a compensation value for the current image frame by referring to a lookup table based on at least one of the first previous image frame and the second previous image frame. The compensation circuit is coupled to the calculation circuit and is used to modify a current image data of the current image frame using the compensation value.

[0006] Another embodiment of the present invention discloses an image processing method, which includes the following steps: receiving a current image frame and multiple previous image frames; storing the multiple previous image frames in at least one memory; selecting a first previous image frame or a second previous image frame from the multiple previous image frames from the at least one memory; calculating a compensation value for the current image frame by referring to a lookup table based on at least one of the first previous image frame and the second previous image frame; and determining whether to use the compensation value to modify a current image data of the current image frame. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 A series of image frames with different grayscale values ​​are shown.

[0008] Figure 2 is a schematic diagram of an image processing circuit.

[0009] Figure 3 for Figure 2 A timing diagram of the operation of the image processing circuit in FIG.

[0010] Figure 4 For use Figure 2 Flow chart of an image processing flow of an image processing circuit in FIG.

[0011] Figure 5 FIG. 1 is a schematic diagram of an image processing circuit according to an embodiment of the present invention.

[0012] Figure 6 for Figure 5 A timing diagram of the operation of the image processing circuit in FIG.

[0013] Figure 7 The figure is a flowchart of an image processing process according to an embodiment of the present invention.

[0014] Figure 8 FIG. 4 is a schematic diagram of another image processing circuit according to an embodiment of the present invention.

[0015] Fig. 9 FIG. 4 is a schematic diagram of another image processing circuit according to an embodiment of the present invention.

[0016] Fig.10 for Fig. 9 A timing diagram of the operation of the image processing circuit in FIG.

[0017] Fig.11 The figure is a flowchart of an image processing process according to an embodiment of the present invention.

[0018] Fig.12 FIG. 1 is a schematic diagram of an image processing circuit according to an embodiment of the present invention.

[0019] Fig.13A The brightness of a series of image frames without brightness drop compensation is shown.

[0020] Fig. 13B The waveform of the brightness measured on a display screen without brightness drop compensation is shown.

[0021] Fig.14A The brightness of a series of image frames after brightness drop compensation is shown.

[0022] Fig. 14B The waveform of the brightness measured on the display screen after brightness drop compensation is shown.

[0023] Fig.15 The figure is a flowchart of an image processing process according to an embodiment of the present invention.

[0024] The reference numerals are described as follows:

[0025] F_0~F_n frames

[0026] W0, W224 Grayscale

[0027] 20, 50, 80, 90, 120 Image processing circuit

[0028] 200, 500 Receivers

[0029] 202, 502 downsampling circuit

[0030] 204, 504 upsampling circuit

[0031] 206, 506 computing circuit

[0032] 208, 508 compensation circuit

[0033] 210, 510, 810 memory controllers

[0034] 220, 520 Lookup Table

[0035] 230, 530_1, 530_2, 930_1, 930_2, 930_3, 1230_1 to 1230_X memory

[0037] F_(NX)~F_(N+4) Image frame

[0038] 40, 70, 110, 150 Image processing flow

[0039] Steps 402-406, 702-712, 1502-1510

[0040] DIFF

[0041] TH1, TH2, TH3 thresholds

[0042] 505 Identification Circuit DETAILED DESCRIPTION

[0043] Figure 1 A series of image frames with different grayscale values ​​are shown. Figure 1 As shown, the grayscale of frame F_0 is W0, and the grayscale changes to a higher value W224 in frame F_1 and remains at W224 from frame F_1 to frame F_n, where n is an integer greater than or equal to 3, and the grayscale W0 can be the minimum grayscale value and the grayscale W224 can be approximately or equal to the maximum grayscale value.

[0044] In this example, the images displayed on frames F_1 to F_n with the same grayscale W224 are required to reach the same brightness, but the brightness cannot reach its target value until frame F_n, so compensation is required. As mentioned above, the existing internal compensation scheme uses a large number of thin-film transistors (TFT) in pixels, which is accompanied by side effects such as low panel penetration, low pixel density, and low product yield. In addition to internal compensation, an external compensation scheme can also be used to compensate for the brightness drop by overdriving technology. However, the existing external compensation can only compensate for the brightness of a single image frame after the grayscale is changed.

[0045] exist Figure 1 In the example of , the grayscale changes between frames F_0 and F_1, so the existing external compensation can be performed on frame F_1. Figure 1 It can be seen that frames F_2, F_3, etc. also have a certain degree of brightness reduction problem.

[0046] Figure 2 2 is a schematic diagram of an image processing circuit 20 . The image processing circuit 20 includes a receiver 200 , a down-sampling circuit 202 , an up-sampling circuit 204 , a calculation circuit 206 , a compensation circuit 208 and a memory controller 210 .

[0047] The receiver 200 may be used to receive a plurality of image frames, including a current image frame (hereinafter referred to as the current frame) F_N and a previous image frame (hereinafter referred to as the previous frame) F_(N-1).

[0048] The down-sampling circuit 202 may be used to compress the received image frames (or may maintain the original frame data without compression) for storage in the memory 230. Generally speaking, the image processing circuit 20 is usually not provided with a large enough frame buffer to record a complete frame of data, so image compression needs to be performed before the data is stored. For example, the down-sampling circuit 202 may convert the image data of each frame into compressed data including image features, and the compressed image data may be stored in the memory 230 (e.g., via the memory controller 210). In this example, the down-sampling circuit 202 may compress the previous frame F_(N-1) before storing it in the memory 230.

[0049] The up-sampling circuit 204 may be used to decompress the image data stored in the memory 230 to restore the frame data. In this example, when the up-sampling circuit 204 obtains the previous frame F_(N-1) from the memory 230, the previous frame F_(N-1) may be decompressed.

[0050] The calculation circuit 206 may be coupled to a look-up table (LUT) 220 (or may include a look-up table). The calculation circuit 206 may calculate and determine suitable compensation values ​​for different data values ​​based on various factors such as display brightness value (DBV), temperature, image load, and frame rate. In this example, the calculation circuit 206 may calculate the compensation value for the current frame F_N based on the previous frame F_(N-1) by referring to the look-up table 220.

[0051] The compensation circuit 208 may receive the image data of the current frame F_N from the receiver 200, receive the image data of the previous frame F_(N-1) from the memory 230, and obtain the appropriate compensation value from the calculation circuit 206 to generate the output image data. In this example, the compensation circuit 208 may modify the image data of the current frame F_N using the compensation value generated based on the previous frame F_(N-1).

[0052] Figure 3is a timing diagram of the operation of the image processing circuit 20. The frame number indicates the number of consecutive frames during which the image processing circuit 20 receives a series of image frames. When the image data of the current frame F_N to F_(N+4) are received, the image data stored in the memory 230 are frames F_(N-1) to F_(N+3) respectively. The compensation circuit 208 can compare the input image data of the current frame with the image data of the previous frame stored in the memory 230 to determine whether to use the corresponding compensation value for compensation, thereby generating output image data.

[0053] Figure 4 FIG. 4 is a flow chart of an image processing process 40 for the image processing circuit 20. Figure 4 As shown, the compensation circuit 208 can compare the image data of the current input frame (such as F_N) with the image data of the previous frame (such as F_(N-1)) stored in the memory (step 402). If the comparison result indicates that the current image data is substantially equal to the previous image data or the difference DIFF between the two image data is less than or equal to a threshold value TH1, the compensation circuit 208 can determine that compensation is not required and transmit the current input image data to the display screen without modification or compensation (step 404). If the comparison result indicates that the current image data is significantly different from the previous image data or the difference DIFF between the two image data is greater than the threshold value TH1, the compensation circuit 208 can determine that compensation is required and modify the currently received image data to generate output image data (step 406).

[0054] It is worth noting that the image processing circuit 20 performs compensation based on only one previous frame, that is, the compensation for frame F_N is based on frame F_(N-1). However, as described above, a brightness drop may occur in a plurality of consecutive image frames after a grayscale change, and a compensation scheme based only on the previous frame F_(N-1) cannot meet the compensation requirements for brightness drops in multiple frames.

[0055] Therefore, the present invention proposes an image processing circuit capable of compensating for the decrease in brightness of multiple frames caused by the change in grayscale values. Figure 5Schematic diagram of an image processing circuit 50 according to an embodiment of the present invention. The image processing circuit 50 includes a receiver 500, a down-sampling circuit 502, an up-sampling circuit 504, an identification circuit 505, a calculation circuit 506, a compensation circuit 508 and a memory controller 510. The image processing circuit 50 may further include a lookup table 520, which may be accessed by the calculation circuit 506; or, the calculation circuit 506 in the image processing circuit 50 may be configured to be coupled to an external memory storing a lookup table 520. The image processing circuit 50 may further include two memories 530_1 and 530_2, which are controlled by the memory controller 510, or, the memory controller 510 in the image processing circuit 50 may be configured to be coupled to the two external memories 530_1 and 530_2, wherein the memories 530_1 and 530_2 may be used to store image data of two previous frames.

[0056] The operation of the down-sampling circuit 502 and the up-sampling circuit 504 is similar to Figure 2 The down-sampling circuit 202 and the up-sampling circuit 204 in the image processing circuit 50 compress and decompress the stored image data to save storage space. In this example, since the image processing circuit 50 includes two memories 530_1 and 530_2 that can be used to store two previous frames (such as F_(N-1) and F_(N-2)), the down-sampling circuit 502 can compress the previous frames F_(N-1) and F_(N-2) before storing them in the memories 530_1 and 530_2, and when any of the previous frames F_(N-1) and F_(N-2) are obtained from the memories 530_1 and / or 530_2, the up-sampling circuit 504 can first decompress them.

[0057] In the above embodiment, the memories 530_1 and 530_2 can store the image data of the previous frames F_(N-1) and F_(N-2) in a compressed form. It should be noted that Figure 5 The implementation of is only one example of many embodiments of the present invention. In another embodiment, the two memories 530_1 and 530_2 can be replaced by a larger memory, which can store information of two frames of image data, whether compressed or not. In addition, the down-sampling circuit 502 and / or the up-sampling circuit 504 are optional circuit modules. If the memory space is sufficient to completely store two frames of image data without down-conversion or compression, the down-sampling circuit 502 and its corresponding up-sampling circuit 504 can be omitted.

[0058] Different from Figure 2 The image processing circuit 20, Figure 5The image processing circuit 50 in the embodiment further includes an identification circuit 505, which can be integrated with the up-sampling circuit 504 or independently set, or set in the image processing circuit 50 in any appropriate manner. The identification circuit 505 can be used to select the first previous frame F_(N-1) or the second previous frame F_(N-2) from the memory 530_1 or 530_2. For example, the identification circuit 505 can determine whether the required compensation is based on the first previous frame F_(N-1) or the second previous frame F_(N-2), so as to control the memory controller 510 to read the image data of the frame F_(N-1) or F_(N-2) from the corresponding memory 530_1 or 530_2.

[0059] Therefore, depending on whether the required compensation is based on the first previous frame F_(N-1) or the second previous frame F_(N-2), the calculation circuit 506 can refer to the lookup table 520 to calculate the compensation value for the current frame F_N based on the previous frames F_(N-1) and / or F_(N-2). The compensation circuit 508 can then use the compensation value to modify the image data of the current frame F_N, or decide not to perform compensation.

[0060] Figure 6 is a timing diagram of the operation of the image processing circuit 50. In this example, the compensation of the current frame is performed based on two previously received image frames. For example, for the compensation of the current frame F_N, the image processing circuit 50 may use the image data of the previous frames F_(N-1) and / or F_(N-2) to determine the compensation value and generate the output image data. These associated frames may be three image frames received consecutively, wherein the first previous frame F_(N-1) is located before the current frame F_N, and the second previous frame F_(N-2) is located before the first previous frame F_(N-1).

[0061] Figure 7 FIG. 7 is a flowchart of an image processing process 70 according to an embodiment of the present invention. The image processing process 70 can be implemented in Figure 5 The image processing circuit 50 in FIG. Figure 7 As shown, the compensation circuit 508 may obtain a current frame (eg, frame F_N) from the receiver 500 and obtain two previous frames (eg, frames F_(N-1) and / or F_(N-2)) from the memories 530_1 and 530_2 (step 702).

[0062] According to the current frame F_N and the two previous frames F_(N-1) and F_(N-2), the compensation circuit 508 may first determine whether the image data of the current frame F_N is substantially equal to the image data of the first previous frame F_(N-1), or whether the difference DIFF between the image data of the current frame F_N and the image data of the first previous frame F_(N-1) is less than or equal to a threshold value TH1 (step 704). If not, the compensation circuit 508 determines that image compensation should be performed on the first previous frame F_(N-1) (step 706), and thus uses the compensation value corresponding to the first previous frame F_(N-1) to modify the image data of the current frame F_N to generate and output compensated image data, similar to the implementation of the image processing flow 40.

[0063] If it is determined that the image data of the current frame F_N is the same as the image data of the first previous frame F_(N-1) or that the difference DIFF is less than or equal to the threshold value TH1, the compensation circuit 508 may further perform a second determination to determine whether the image data of the second previous frame F_(N-2) is less than or equal to a threshold value TH2 (step 708). It should be noted that a multi-frame brightness drop usually occurs when the grayscale rises sharply from an extremely low value to an extremely high value. Therefore, it is preferably determined whether the second previous frame F_(N-2) is less than the threshold value TH2 to determine whether image compensation for the second previous frame F_(N-2) needs to be performed. It should be noted that the threshold values ​​TH1 and TH2 may be set to any suitable values ​​and should not be used to limit the scope of the present invention.

[0064] Therefore, if it is determined that the image data of the second previous frame F_(N-2) is less than the threshold value TH2, the compensation circuit 508 may perform image compensation on the second previous frame F_(N-2) (step 710), that is, the compensation circuit 508 may modify the image data of the current frame F_N using the compensation value corresponding to the second previous frame F_(N-2). On the contrary, if it is determined that the image data of the second previous frame F_(N-2) is greater than the threshold value TH2, the compensation circuit 508 may determine that compensation is not required (step 712), thereby outputting the image data of the current frame F_N that has not been modified or compensated.

[0065] Generally speaking, image compensation can be performed by modifying the grayscale data or data voltage to be output to the display driver to control the required brightness of the display screen, thereby solving the problem of brightness reduction in multiple frames. In one embodiment, the image compensation for the first previous frame F_(N-1) can be calculated by the following method:

[0066] Output=Input±Offset′(Gray, DBV, Color). (1)

[0067] More specifically, the output image data (Output) can be calculated by adding an offset value (Offset) or subtracting an offset value from the input image data (Input), wherein the offset value can be determined based on the grayscale value (including the grayscale value (Gray) of the previous frame F_(N-1) and / or F_(N-2)), the display brightness value (DBV) and / or the color (Color).

[0068] For example, the lookup table 520 may record a plurality of offset values, each of which corresponds to an input grayscale value (of the current frame F_N) and a previous grayscale value (of the previous frame F_(N-1) or F_(N-2)), and each color (such as red, green, and blue) has a lookup table. The actual offset value may be the value of the previous item in the lookup table 520 accessed by using the input grayscale value and the previous grayscale value as an index, and in some cases the value may be further calculated by interpolation. After obtaining the offset value from the lookup table 520 based on the grayscale value and the color, the calculation circuit 506 or the compensation circuit 508 may further correct or adjust the offset value based on the display brightness value. The display brightness value may be a parameter used to indicate the overall panel brightness, which may be automatically controlled by the system or manually adjusted by the user.

[0069] Therefore, in the image processing process 70, when the difference DIFF between the image data of the current frame F_N and the image data of the first previous frame F_(N-1) is greater than the critical value TH1, image data compensation with respect to the first previous frame F_(N-1) can be performed, wherein the calculation circuit 506 can calculate the compensation value, and the compensation circuit 508 can modify the input image data according to equation (1) to generate output image data.

[0070] It is worth noting that the image compensation for the second previous frame F_(N-2) may require different degrees of compensation and be calculated in different ways, as shown below:

[0071] Output=α×Input±β×Offset′±γ. (2)

[0072] The parameter Offset' is similar to the offset value stored in the above-mentioned lookup table 520. In this example, the offset value is obtained by referring to the image data of the current frame F_N and the image data of the second previous frame F_(N-2). The parameter α is a proportional coefficient of the current input image data, the parameter β is a proportional coefficient of the offset value Offset', and the parameter γ is a correction coefficient used to correct the offset value Offset'.

[0073] The value of each parameter α, β and γ can be determined according to the grayscale value, display brightness value, and color of the image frames F_N, F_(N-1) and / or F_(N-2), so as to appropriately adjust the input image data to generate the output image data in various situations. In an embodiment of the present invention, the parameters α, β and γ can be selectively used to calculate the output image data. For example, in one embodiment, the parameter α is equal to 1 and the parameter γ is equal to 0, so the offset value can be modified by adjusting the scale parameter β. In another embodiment, all parameters α, β and γ can be set to suitable values ​​to adjust the input image data and generate the output image data.

[0074] In an actual embodiment, the brightness drop may occur in a number of consecutive image frames with the same grayscale, and the degree of brightness drop gradually decreases among these image frames. Therefore, the image compensation for the first previous frame should provide the maximum compensation value, the image compensation for the second previous frame may provide a smaller compensation value, the compensation value for the image compensation for the third previous frame may be smaller, and so on. These compensation values ​​may be related to each other, so that each compensation value can be calculated using appropriate parameters based on another compensation value. For example, the first input image frame after the grayscale change may be compensated for 100 units of brightness, the next image frame may be compensated for 80 units of brightness, and the next frame may be compensated for 60 units of brightness.

[0075] Therefore, in the image processing process 70, when it is determined that the difference DIFF between the image data of the current frame F_N and the image data of the first previous frame F_(N-1) is less than or equal to the critical value TH1, and the image data of the second previous frame F_(N-2) is less than or equal to the critical value TH2, image compensation for the second previous frame F_(N-2) can be performed, wherein the calculation circuit 506 can calculate the compensation value, and the compensation circuit 508 can modify the input image data according to equation (2) to generate output image data.

[0076] Figure 8 FIG. 8 is a schematic diagram of another image processing circuit 80 according to an embodiment of the present invention. The structure of the image processing circuit 80 is similar to that of the image processing circuit 50, so signals or components with similar functions are represented by the same symbols. The difference between the image processing circuit 80 and the image processing circuit 50 is that the image processing circuit 80 includes another memory controller 810 for processing frame data to be written into the memory 530_2.

[0077] In one embodiment, it is assumed that the image data of frame F_(N-1) is stored in memory 530_1 and the image data of frame F_(N-2) is stored in memory 530_2. During the next frame period, the image data of frame F_(N-1) can be transmitted to memory 530_2, and memory 530_1 receives the image data of frame F_N from receiver 500, and the newly arrived image frame is frame F_(N+1). The memory controller 810 is coupled between memories 530_1 and 530_2, and can be used to obtain image frame F_(N-1) from memory 530_1, extract features of image frame F_(N-1), and store information about the features to memory 530_2 as another previous frame used during the next frame period. In this case, the amount of data stored in memory 530_2 is less than the amount of data stored in memory 530_1, which can further save the memory space used and the overall data output rate.

[0078] Please refer back Figure 7 , regarding the second previous frame stored in the memory 530_2, the judgment is whether the image data of the second previous frame is less than or equal to the threshold value TH2. In this case, the image data stored in the memory 530_2 does not need to include complete frame data or compressed data; in fact, the memory 530_2 can store greatly simplified information as long as the information is sufficient to smoothly perform the required judgment. For example, the stored information or data may represent the grayscale values ​​of one or more regions, and these regions include specific features that can be used to achieve accurate judgment. In this case, the storage space of the memory 530_2 can be reduced, thereby reducing the circuit cost of the image processing circuit 80.

[0079] It is worth noting that the above embodiment illustrates performing compensation to solve the problem of brightness drop on two consecutive image frames. Those skilled in the art will appreciate that similar embodiments may also be applied to more than two image frames. An exemplary embodiment is shown in Fig. 9 , which is a schematic diagram of an image processing circuit 90 according to an embodiment of the present invention.

[0080] like Fig. 9 As shown, the structure of the image processing circuit 90 is similar to that of the image processing circuit 50, so signals or components with similar functions are represented by the same symbols. The difference between the image processing circuit 90 and the image processing circuit 50 is that the image processing circuit 90 includes three memories 930_1, 930_2 and 930_3, which are respectively used to store image data (compressed or uncompressed) and / or related information of three previous frames F_(N-1), F_(N-2) and F_(N-3).

[0081] The timing diagram of the image processing circuit 90 is shown in FIG. Fig.10, wherein, during the fourth frame period (i.e., frame number 4), when the image data of the current frame F_N is received, the image data of the previous frame F_(N-3) is written into the memory 930_3. Those skilled in the art can infer the operation of the image processing circuit 90 based on the contents of the above description, which will not be described in detail here.

[0082] Fig.11 FIG. 1 is a flowchart of an image processing process 110 according to an embodiment of the present invention. The image processing process 110 can be implemented in Fig. 9 . In this example, the first judgment about the first previous frame and the second judgment about the second previous frame are similar to the image processing process 70, and the image processing process 110 also performs a third judgment about the third previous frame (i.e., the previous frame F_(N-3) stored in the memory 930_3). For example, the compensation circuit 508 in the image processing circuit 90 can determine whether the image data of the third previous frame F_(N-3) is less than or equal to a threshold value TH3, and thus determine whether to perform compensation on the third previous frame F_(N-3) according to the judgment result, and the compensation on the third previous frame F_(N-3) can also be performed using an offset value modified with an appropriate proportional value, similar to the description of the above formula.

[0083] By analogy, the implementation and operation of the present invention can be extended to any number of image frames to compensate for the brightness drop of more consecutive image frames. Fig.12 As shown, the image processing circuit 120 includes X memories 1230_1 to 1230_X, which are respectively used to store X previous frames F_(N-1) to F_(NX), so compensation is performed based on X previous frames, where X can be any integer greater than 1 and less than N. Other circuits or modules included in the image processing circuit 120 are similar to those in the previous embodiment, and are therefore represented by the same symbols, and their operations are not repeated here.

[0084] In another embodiment, the image processing circuit 120 may also include a larger memory to replace the X smaller memories 1230_1 to 1230_X, so as to store the image data (or related information) of the X image frames through the larger memory. The related implementation is similar to the above description and will not be repeated here.

[0085] It is noteworthy that the purpose of the present invention is to propose a new image processing circuit and method that can be used to compensate for the brightness drop of multiple consecutive frames. Those skilled in the art can make modifications or changes accordingly, but are not limited to this. For example, in the above-mentioned embodiment, brightness compensation can be performed by modifying or adjusting image data (such as grayscale data of the image). Since grayscale data must be converted into data voltage to drive the panel for display, the output brightness can also be controlled to reach its target value by compensating the data voltage. In other words, the compensation scheme of the present invention can be applied to the data domain and the voltage domain, wherein the data value or the voltage value can be modified to achieve the desired brightness.

[0086] In one embodiment, the image processing circuit may integrate a display driver integrated circuit (DDIC) to process image data or data voltage in a hardware circuit. Alternatively, the image processing circuit may also be implemented as an algorithm to be executed in an application processor (AP) or a central processing unit (CPU), but is not limited thereto. The image processing circuit of the present invention may be applied to any type of display screen, including an organic light emitting diode (OLED) panel, a mini-OLED panel, and a micro-OLED panel, but is not limited thereto.

[0087] In addition, the image data of the previous frame used for comparison or the image data of the current frame to be compensated can be image data of a complete frame, a block, a pixel or a sub-pixel. In one embodiment, each pixel on an image frame can have the same grayscale and therefore have the same image data, and this image data can be used to perform judgment and / or compensation during the brightness reduction compensation process. In another embodiment, the image data of a pixel can be used to determine whether compensation should be performed and which type of compensation should be performed (i.e., compensation with respect to which previous frame), and brightness compensation can be performed for this pixel. Alternatively, several image data in an area or block can be considered together to perform the same compensation in the area or block.

[0088] According to the embodiments of the present invention, the problem of brightness reduction of multiple image frames after grayscale change can be solved. Fig.13A An exemplary embodiment is shown, in which the grayscale changes from W0 in frame F_0 to W224 in frame F_1, and is maintained at W224 during the subsequent several frames (frames F_2 to F_n). Fig.13A As shown, the brightness on frames F_1 and F_2 cannot reach the target value corresponding to grayscale W224. Fig. 13B The luminance waveform measured on the display shows that it takes multiple frame periods for the luminance to reach the target value. This example illustrates the behavior of a display without luminance drop compensation at power-on.

[0089] If the compensation scheme of the present invention is adopted, the brightness drop of multiple frames can be well compensated. Since the brightness of the gray value without compensation gradually increases after changing to W224, the compensation value can have a maximum value in frame F_1 and then gradually decrease, so that the brightness can be maintained consistent during these frames. For example, if Fig.14A As shown, the brightness reaches the target value corresponding to the grayscale 224 starting from the frame F_1 and is maintained at the same value for a plurality of consecutive frames, and the brightness measured in these frames remains unchanged, as shown in FIG. Fig. 14B shown.

[0090] It is worth noting that the grayscale change from W0 to W224 in the above embodiment is only one example. The image compensation for multiple frames of brightness reduction proposed by the present invention can be applied to various scenarios of rapid grayscale changes. For example, the image processing circuit can sequentially receive image data of at least three image frames (such as including F_(N-2), F_(N-1) and F_N), wherein the image data of frame F_(N-2) has a first grayscale value corresponding to low brightness, and the image data of frames F_(N-1) and F_N have a second grayscale value that is greater than the image data of frame F_(N-2) and corresponds to high brightness. The change from the first grayscale value to the second grayscale value causes multiple frames of brightness reduction to occur on at least frames F_(N-1) and F_N. After the image data of frames F_(N-1) and F_N are modified by brightness compensation, the image processing circuit can output the same brightness for frames F_(N-1) and F_N. If the grayscale value remains unchanged in a number of consecutive image frames, the brightness can also be kept unchanged in these image frames by using the appropriate compensation method proposed by the present invention.

[0091] Thus, the problem of multi-frame brightness reduction can be solved by the compensation scheme of the present invention, wherein after the grayscale is changed, the brightness of the display image can reach the desired value, thereby solving the problem of ghosting and improving the visual effect. If the display image after brightness compensation is used for fingerprint sensing illumination, the fingerprint sensing efficiency can also be improved.

[0092] The above operations of the image processing circuit can be summarized as an image processing flow 150, such as Fig.15 The image processing process 150 can be implemented in any of the image processing circuits 20, 50, 80, 90 and 120 to compensate for the brightness drop of multiple frames. Fig.15 As shown, the image processing flow 150 includes the following steps:

[0093] Step 1502: Receive a current image frame and a plurality of previous image frames.

[0094] Step 1504: Store the plurality of previous image frames in at least one memory.

[0095] Step 1506: Select a first previous image frame or a second previous image frame from the at least one memory.

[0096] Step 1508: Calculate a compensation value for the current image frame by referring to a lookup table according to at least one of the first previous image frame and the second previous image frame.

[0097] Step 1510: Determine whether to use the compensation value to modify a current image data of the current image frame.

[0098] The detailed operations and changes of the image processing process 150 can be found in the description of the above paragraphs and will not be repeated here.

[0099] In summary, the present invention proposes an image processing circuit and method that can be used to compensate for the brightness drop of multiple consecutive frames, and the compensation can be performed by referring to a lookup table that records relevant compensation values. Unlike the existing compensation scheme in which image compensation is performed only based on a single previous frame, in the present invention, image compensation of the current frame is performed based on multiple previous frames. When a currently input image frame is received, the image processing circuit can use a first previous frame for comparison to determine whether to perform image compensation on the first previous frame. Based on the above comparison results, the image processing circuit can then use a second previous frame for comparison to determine whether to perform image compensation on the second previous frame. Similarly, the image processing circuit can then use the Nth previous frame for comparison to determine whether to perform image compensation on the Nth previous frame, thereby achieving compensation for the brightness drop of multiple frames.

[0100] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An image processing circuit, characterized in that: include: a receiver, configured to receive a current image frame and a plurality of previous image frames; at least one memory, coupled to the receiver, for storing the plurality of previous image frames; an identification circuit, coupled to the at least one memory, for selecting a first previous image frame or a second previous image frame from the at least one memory; a calculation circuit coupled to the identification circuit, for calculating a compensation value for the current image frame by referring to a lookup table according to at least one of the first previous image frame and the second previous image frame; as well as A compensation circuit is coupled to the calculation circuit and is used for modifying a current image data of the current image frame by using the compensation value.

2. The image processing circuit according to claim 1, characterized in that: Also includes: a down sampling circuit coupled to the receiver and the at least one memory for compressing the plurality of previous image frames before storing the plurality of previous image frames in the at least one memory; as well as An up-sampling circuit is coupled to the identification circuit and the at least one memory, and is used to decompress at least one of the first previous image frame and the second previous image frame when at least one of the first previous image frame and the second previous image frame is retrieved from the at least one memory.

3. The image processing circuit according to claim 1, wherein: The first previous image frame is located before the current image frame, and the second previous image frame is located before the first previous image frame.

4. The image processing circuit according to claim 1, wherein: The compensation circuit is used for determining whether a difference between a first image data of the first previous image frame and the current image data of the current image frame is less than or equal to a first critical value.

5. The image processing circuit according to claim 4, characterized in that: When the compensation circuit determines that the difference between the first image data and the current image data is greater than the first threshold, the compensation circuit is used to modify the current image data by a first compensation value corresponding to the first previous image frame.

6. The image processing circuit according to claim 4, characterized in that: The compensation circuit is further used for determining whether a second image data of the second previous image frame is less than or equal to a second critical value.

7. The image processing circuit according to claim 6, characterized in that: The compensation circuit determines whether the second image data is less than or equal to the second critical value when the compensation circuit determines that the difference between the first image data and the current image data is less than or equal to the first critical value.

8. The image processing circuit according to claim 6, characterized in that: When the compensation circuit determines that the second image data is less than or equal to the second critical value, the compensation circuit is used to modify the current image data by a second compensation value corresponding to the second previous image frame.

9. The image processing circuit according to claim 8, characterized in that: The second compensation value is calculated according to at least one of a display brightness value, a color, a gray value of the first previous image frame, and a gray value of the second previous image frame.

10. The image processing circuit according to claim 8, characterized in that: The second compensation value includes at least one of a proportional coefficient of the current image data, a proportional coefficient of an offset value stored in the lookup table, and a correction coefficient.

11. The image processing circuit according to claim 6, characterized in that: When the compensation circuit determines that the second image data is greater than the second critical value, the compensation circuit is used to output the unmodified current image data.

12. The image processing circuit according to claim 1, wherein: Also includes: A memory controller is used for obtaining the first previous image frame from a first memory in the at least one memory, extracting a feature of the first previous image frame, and storing the feature in a second memory in the at least one memory.

13. The image processing circuit according to claim 1, characterized in that: The image processing circuit is used to sequentially receive a second image data of the second previous image frame, a first image data of the first previous image frame, and the current image data of the current image frame, the second image data having a first grayscale value, the current image data and the first image data having a second grayscale value greater than the first grayscale value, and after the current image data is modified by the compensation circuit, the image processing circuit outputs the same brightness for the first previous image frame and the current image frame.

14. An image processing method, characterized in that: include: Receiving a current image frame and a plurality of previous image frames; storing the plurality of previous image frames in at least one memory; Selecting a first previous image frame or a second previous image frame from the at least one memory; Calculating a compensation value for the current image frame by referring to a lookup table according to at least one of the first previous image frame and the second previous image frame; as well as Determine whether to modify a current image data of the current image frame using the compensation value.

15. The image processing method according to claim 14, characterized in that: Also includes: compressing the plurality of previous image frames before storing the plurality of previous image frames in the at least one memory; as well as When at least one of the first previous image frame and the second previous image frame is retrieved from the at least one memory, at least one of the first previous image frame and the second previous image frame is decompressed.

16. The image processing method according to claim 14, characterized in that: The first previous image frame is located before the current image frame, and the second previous image frame is located before the first previous image frame.

17. The image processing method according to claim 14, characterized in that: Also includes: It is determined whether a difference between a first image data of the first previous image frame and the current image data of the current image frame is less than or equal to a first threshold.

18. The image processing method according to claim 17, characterized in that: The steps of determining whether to modify the current image data include: When it is determined that the difference between the first image data and the current image data is greater than the first critical value, the current image data is modified by a first compensation value corresponding to the first previous image frame.

19. The image processing method according to claim 17, characterized in that: Also includes: It is determined whether a second image data of the second previous image frame is less than or equal to a second threshold.

20. The image processing method according to claim 19, characterized in that: The step of determining whether the second image data is less than or equal to the second critical value is performed when the difference between the first image data and the current image data is determined to be less than or equal to the first critical value.

21. The image processing method according to claim 19, characterized in that: The steps of determining whether to modify the current image data include: When it is determined that the second image data is less than or equal to the second critical value, the current image data is modified by a second compensation value corresponding to the second previous image frame.

22. The image processing method according to claim 21, characterized in that: The second compensation value is calculated according to at least one of a display brightness value, a color, a gray value of the first previous image frame, and a gray value of the second previous image frame.

23. The image processing method according to claim 21, characterized in that: The second compensation value includes at least one of a proportional coefficient of the current image data, a proportional coefficient of an offset value stored in the lookup table, and a correction coefficient.

24. The image processing method according to claim 19, characterized in that: The steps of determining whether to modify the current image data include: When it is determined that the second image data is greater than the second critical value, the current image data is outputted without modification.

25. The image processing method according to claim 14, characterized in that: Also includes: Obtain the first previous image frame from a first memory among the at least one memory; Extracting a feature of the first previous image frame; as well as The characteristic is stored in a second memory of the at least one memory.

26. The image processing method according to claim 14, characterized in that: A second image data of the second previous image frame, a first image data of the first previous image frame, and the current image data of the current image frame are received in sequence, the second image data has a first grayscale value, the current image data and the first image data have a second grayscale value greater than the first grayscale value, and the image processing method further includes: After the current image data is modified by compensation, the same brightness is output for the first previous image frame and the current image frame.

Images